Measuring device for generating a measuring current

Abstract

Measuring device (5) for generating a measuring current, the measuring device (5) comprising: a first amplifier (40) whose inputs are connected to the drain terminal (13) and the source terminal (11) of a first transistor (10), whose source terminal (11) is connected to the ground potential (80), and which outputs a first output potential (90) which is dependent on the potential at the drain terminal (13) of the first transistor (10), the ground potential (80) and a reference potential (81), a second amplifier (50) whose inputs are connected to the gate terminal (12) and the source terminal (11) of the first transistor (10) and which outputs a second output potential (91) which is dependent on the potential at the gate terminal (12) of the first transistor (10), the ground potential (80) and the reference potential (81), and a second transistor (20), to whose drain terminal (23) the first output potential (90) is applied, to whose source terminal (21) the reference potential (81) is applied and to whose gate terminal (22) the second output potential (91) is applied, whereby a measuring current which correlates with the current flowing at the source terminal (11) of the first transistor (10) flows at the source terminal (21) of the second transistor (20).

Description

[0001] The invention relates to a measuring device for generating a measuring current, an electronic circuit with such a measuring device and a method for generating a measuring current. State of the art

[0002] A measuring device for detecting a current of a low-side driver or a transistor is known, which Fig. 4. Here, a resistive or inductive load is driven by the low-side driver. The low-side driver (LSD) can set the output or connection to the load 299 to the negative potential (ground potential) of two possible potentials. The measuring device comprises a first field-effect transistor 200, whose source terminal 201 is connected to the ground potential and which can set a potential at the drain terminal 203 to the ground potential 280 or ground (GND). The current to be measured is the current flowing at the source terminal 201 of the first field-effect transistor 200.For this purpose, the measuring device comprises a second field-effect transistor 210, whose potential at the gate terminal 212 is equal to the potential at the gate terminal 202 of the first field-effect transistor 200, whose potential at the drain terminal 213 is equal to the potential at the drain terminal 203 of the first field-effect transistor 200, and whose source terminal 201 is connected to a first input of a differential amplifier 230. The potential at the second input of the differential amplifier 230 is equal to the potential at the source terminal 201 of the first field-effect transistor 200, and the second input of the differential amplifier 230 is connected to the source terminal 211 of the second field-effect transistor 210 via a measuring resistor 220. The differential amplifier 230 outputs a measuring voltage 240, from which the measuring current at the source terminal 211 of the second field-effect transistor 210 can be determined.From this, the current at the source terminal 201 of the first field effect transistor 200 can be determined.

[0003] The disadvantage of this is that the current at the source terminal of the first field-effect transistor does not always strictly correlate with the current at the source terminal of the second field-effect transistor, or these two currents do not strictly correlate with each other. Thus, the voltage difference between the drain terminal and the source terminal of the first field-effect transistor results in a different value than the voltage difference between the drain terminal and the source terminal of the second field-effect transistor. Consequently, the current measurement, or the determination of the current at the source terminal of the first field-effect transistor using the current at the source terminal of the second field-effect transistor, is imprecise.

[0004] The potential at the drain terminal 213 of the second field effect transistor 210 can be regulated in a known alternative measuring device via a third field effect transistor 215 as a regulating field effect transistor depending on the potential at the drain terminal 203 of the first field effect transistor 200, as in Fig. 5. A control amplifier 250 is arranged between the connection to load 299 of the first field-effect transistor 200 and the gate connection of the third field-effect transistor 215. The measurement current is generated at the drain connection of the control field-effect transistor 215 and converted into a measurement voltage 240, from which the current at the source connection 201 of the first field-effect transistor 200 is determined. The disadvantage of this is that this measuring device is only suitable for unidirectional current measurement, i.e., only positive currents at the source connection of the first field-effect transistor can be detected.

[0005] CN 1 083 18 720 B describes an amplifier according to the prior art. US 2012 / 0 268 075 A1 discloses a method for detecting a bidirectional current without requiring an external measuring resistor, according to the prior art. Disclosure of the invention

[0006] The object of the invention is to provide a measuring device or an electronic circuit comprising such a measuring device or a method which generates a measuring current which strictly correlates with the current at the source terminal of a first transistor whose source terminal is connected to the ground potential, so that a precise determination of the current at the source terminal of the first transistor is possible.

[0007] This object is achieved by a measuring device according to claim 1 or an electronic circuit according to claim 13 or a method according to claim 14.

[0008] In particular, the object is achieved by a measuring device for generating a measuring current, the measuring device comprising: a first amplifier whose inputs are connected to the drain terminal and the source terminal of a first transistor whose source terminal is connected to the ground potential, and which outputs a first output potential which is dependent on the potential at the drain terminal of the first transistor, the ground potential and a reference potential, a second amplifier whose inputs are connected to the gate terminal and the source terminal of the first transistor and which outputs a second output potential which is dependent on the potential at the gate terminal of the first transistor, the ground potential and the reference potential, and a second transistor, to whose drain terminal the first output potential is applied, to whose source terminal the reference potential is applied and to whose gate terminal the second output potential is applied, whereby a measuring current which correlates with the current flowing at the source terminal of the first transistor flows at the source terminal of the second transistor.

[0009] The advantage of this is that it is technically easy to generate a measuring current at the source terminal of the second transistor that strictly correlates with the current at the source terminal of the first transistor. It is also possible for the measuring current to be strictly proportional to the current at the source terminal of the first transistor. A further advantage is that a measuring current to be recorded can be generated regardless of whether the current at the source terminal of the first transistor has a positive sign or is positive or a negative sign or is negative. The measuring current at the source terminal of the second transistor therefore always correlates with the current at the source terminal of the first transistor, regardless of whether this is positive or negative. This allows a bidirectional current measurement to be carried out.By mirroring the potentials at the drain terminal, source terminal, and gate terminal of the first transistor at the drain terminal, source terminal, and gate terminal of a second transistor, a measurement current is generated at the source terminal of the second transistor in a technically simple manner, which strictly correlates with the measurement current at the source terminal of the first transistor. Consequently, the current at the source terminal of the first transistor and, consequently, the current of a low-side driver (LSD) can be determined in a technically simple and precise manner.

[0010] In particular, the object is also achieved by an electronic circuit comprising a first transistor, in particular a field effect transistor, and a measuring device connected to the first transistor as described above.

[0011] One advantage of this is that the current at the source terminal of the first transistor can be precisely determined or measured. This is possible regardless of the current direction at the source terminal of the first transistor.

[0012] In particular, the object is also achieved by a method for generating a measuring current, preferably by means of a measuring device described above or an electronic circuit described above, wherein the method comprises the following steps: generating a first output potential as a function of the potential at the drain terminal of a first transistor whose source terminal is connected to a ground potential, the ground potential, and a reference potential by means of a first amplifier; generating a second output potential as a function of the potential at the gate terminal of the first transistor, the ground potential, and the reference potential by means of a second amplifier;and applying the first output potential to a drain terminal of a second transistor, the reference potential to the source terminal of the second transistor, and the second output potential to the gate terminal of the second transistor, whereby a measuring current that correlates with the current flowing at the source terminal of the first transistor flows at the source terminal of the second transistor;

[0013] The advantage of this method is that it generates a measurement current that strictly correlates with the current at the source terminal of the first transistor. Consequently, the current at the source terminal of the first transistor can be precisely determined. This applies not only when the current to be measured at the source terminal of the first transistor has a positive sign, but also when the current to be measured at the source terminal of the first transistor has a negative sign.

[0014] According to one embodiment of the measuring device, the measuring device comprises a third amplifier that outputs a third output potential and is connected to the second transistor such that the third amplifier regulates the potential at the source terminal of the second transistor to the reference potential. This is advantageous in that the potential at the source terminal of the second transistor can be regulated to the reference potential in a technically simple manner.

[0015] According to one embodiment of the measuring device, the reference potential is applied to a first input of the third amplifier, and a control potential is applied to a second input of the third amplifier. This allows for particularly simple adjustment of the control potential.

[0016] According to one embodiment of the measuring device, the measuring device further comprises a feedback resistor connecting the output of the third amplifier to an input of the third amplifier. An advantage of this is that this feedback resistor allows the potential at the source terminal of the second transistor to be set to the reference potential in a technically simple manner.

[0017] According to one embodiment of the measuring device, the measuring device further comprises a detection device for detecting the third output potential to determine the measurement current flowing at the source terminal of the second transistor. This has the advantage that the current at the source terminal of the first transistor can be determined in a technically simple manner using the third output potential, the output potential of the third amplifier.

[0018] According to one embodiment of the measuring device, a second input of the first amplifier is connected to the source terminal of the first transistor via a first resistor and to the output of the first amplifier via a second resistor. This allows the potential applied to the second input of the first amplifier to be adjusted in a technically simple manner.

[0019] According to one embodiment of the measuring device, a first input of the first amplifier is connected to the drain terminal of the first transistor via a third resistor and to the reference potential via a fourth resistor. One advantage of this is that the potential applied to the first input of the first amplifier can be adjusted in a technically simple manner.

[0020] According to one embodiment of the measuring device, the measuring device further comprises an analog-to-digital converter, wherein a reference current is applied to an additional resistor, and wherein a first input of the analog-to-digital converter is connected to a first side of the additional resistor, a second input of the analog-to-digital converter is connected to a second side of the additional resistor opposite the first side, and the third output potential is applied to a third input of the analog-to-digital converter. Due to the precisely known magnitude of the reference current, the measurement current at the source terminal of the second transistor and consequently the current at the source terminal of the first transistor can be determined particularly precisely.

[0021] According to one embodiment of the measuring device, the additional resistor has essentially the same deviations in its resistance value as a feedback resistor that connects the output of the third amplifier to an input of the third amplifier. One advantage of this is that any process fluctuations or deviations between the respective target resistance value and the respective actual resistance value between the additional resistor and the feedback resistor are compensated. The additional resistor is selected to match the feedback resistor, so to speak. For example, the additional resistor and the feedback resistor come from the same manufacturing batch. Consequently, the differences between the actual resistance value and the target resistance value or from the specified resistance value of the additional resistor and those of the feedback resistor compensate each other.This allows the measurement current flowing at the source terminal of the second transistor to be determined with particularly high accuracy. Consequently, the current flowing at the source terminal of the first transistor can be determined with particularly high precision.

[0022] According to one embodiment of the measuring device, the measuring device further comprises a third transistor, in particular a third field-effect transistor, wherein the third output potential is applied to the gate terminal of the third transistor, the control potential is applied to the drain terminal of the third transistor, and a fourth potential is applied to the source terminal of the third transistor, wherein the sum of an offset current and the measurement current of the source terminal of the second transistor is applied to the drain terminal of the third transistor. The advantage of this is that the measurement current at the source terminal of the second transistor can be determined with high precision. By superimposing an offset current, i.e. a precisely known current, on the measurement current at the source terminal of the second transistor, the measurement current at the source terminal can be determined precisely even if the measurement current at the source terminal of the second transistor is negative or has a negative sign.Thus, if the offset current is chosen accordingly, the current at the source terminal of the third transistor always has a positive sign.

[0023] According to one embodiment of the measuring device, the level of the control potential is equal to the level of the reference potential. This makes it particularly easy to calculate the current at the source terminal of the first transistor from the measurement current at the source terminal of the second transistor.

[0024] According to one embodiment of the measuring device, the reference potential is greater than or equal to the magnitude of the potential difference between the drain terminal and the source terminal of the first transistor. This ensures that the second transistor is switched to conduction even when a negative current is present at the source terminal of the first transistor. Thus, a bidirectional current measurement of the current at the source terminal of the first transistor can be performed in a technically simple manner, i.e., independent of the sign of the current at the source terminal of the first transistor.

[0025] The first transistor can, in particular, be a field-effect transistor. Preferably, the first field-effect transistor can be an N-channel field-effect transistor. The first transistor can, in particular, be a low-side driver. The low-side driver (LSD) can set the output of a load or a connection to the load to the negative potential of two possible potentials. In particular, the low-side driver can be an N-channel low-side driver. The low-side driver can drive a resistive or inductive load.

[0026] The second transistor may in particular be a field-effect transistor. Preferably, the second field-effect transistor may be an N-channel field-effect transistor.

[0027] By precisely determining the current at the source terminal of the first transistor, tight limits can be defined or specified for a current limiting threshold and / or overcurrent detection or overcurrent shutdown threshold of the low-side driver. Consequently, the maximum power dissipation of the first transistor or the low-side driver can be reduced. This allows the size of the first transistor or the low-side driver to be reduced, and the required chip area to be reduced. The current at the source terminal of the first transistor can also be regulated particularly well.

[0028] Another advantage is that no insulation measures or techniques, such as trenches or similar, are required in the measuring device or electronic circuit. Another advantage is that no external shunt resistor connected in series with the first transistor is required. Such a shunt resistor, across which a voltage drop occurs, would increase the measurement error of the current at the source terminal of the first transistor.

[0029] A core idea of ​​the present invention is the detection of the drain potential, the source potential, and the gate potential of the first transistor and the mirroring of these potentials at the drain terminal, the source terminal, and the gate terminal of a second transistor acting as a measuring transistor relative to a selected reference potential. Thus, potentials shifted by the reference potential are present at the terminals of the second transistor corresponding to the terminals of the first transistor.This means that the potential at the drain terminal of the second transistor is shifted by a reference potential relative to the potential at the drain terminal of the first transistor, that the potential at the gate terminal of the second transistor is shifted by a reference potential relative to the potential at the gate terminal of the first transistor, and that the potential at the source terminal of the second transistor is shifted by a reference potential relative to the potential at the source terminal of the first transistor.

[0030] The gate potential of the first transistor can be, in particular, the electrical potential at the gate terminal of the first transistor. The source potential of the first transistor can be, in particular, the electrical potential at the source terminal of the first transistor. The drain potential of the first transistor can be, in particular, the potential at the drain terminal of the first transistor.

[0031] The measuring device and the first transistor can be monolithically integrated or arranged together in an integrated circuit.

[0032] The measuring current at the source terminal of the second transistor may be strictly proportional to the current at the source terminal of the first transistor.

[0033] The reference potential can be freely selected. The ground potential does not have to be zero, but can have a different value (ground shift).

[0034] Preferred embodiments are set out in the dependent claims. The invention is explained in more detail below with reference to drawings of exemplary embodiments. Fig. 1 a schematic view of a first embodiment of the measuring device according to the invention or of the electronic circuit according to the invention; Fig. 2 a schematic view of a second embodiment of the measuring device according to the invention or of the electronic circuit according to the invention; Fig. 3 a schematic view of a third embodiment of the measuring device according to the invention or of the electronic circuit according to the invention; Fig. 4 a schematic view of a measuring device or an electronic circuit according to the prior art; and Fig. 5 a schematic view of another measuring device or another electronic circuit according to the prior art.

[0035] In the following description, the same reference numbers are used for identical and equivalent parts.

[0036] Fig. 1 shows a schematic view of a first embodiment of the measuring device 5 according to the invention or of the electronic circuit 1 according to the invention.

[0037] The measuring device 5 is designed to generate a measuring current that correlates with the current flowing at the source terminal 11 of a first transistor 10, here a field-effect transistor. The first field-effect transistor 10 can be a low-side driver (LSD), i.e., a driver stage that can set an output to the negative or lower potential of two possible potentials. The lower potential can be, for example, ground 80 or ground potential. The low-side driver is thus connected between the consumer or load and ground and can connect the output of the consumer or the connection to the load 99 (e.g., a motor) to ground. The low-side driver can be an N-channel low-side driver, in particular a monolithically integrated N-channel low-side driver.

[0038] The drain terminal 13 of the first field-effect transistor 10 can be connected to the output or to the consumer or to the connection to load 99, or is connected to it. The current flowing at the source terminal 11 of the first field-effect transistor 10 is to be determined. For this purpose, the potential at the drain terminal 13, the potential at the source terminal 11, and the potential at the gate terminal 12 of the first field-effect transistor 10 are mirrored at a second transistor 20, here a field-effect transistor. This means that the respective potentials at the second field-effect transistor 20 are each shifted relative to the potentials at the first field-effect transistor 10. This generates a measuring current at the source terminal 21 of the second field-effect transistor 20, which correlates with the current at the source terminal 11 of the first field-effect transistor 10. However, the measuring current at the source terminal 21 of the second field-effect transistor 20 is generally smaller orlower than the current at the source terminal 21 of the second field effect transistor 20 and has the same sign.

[0039] The measuring device 5 has a second field effect transistor 20, a so-called measuring transistor, and three amplifiers 40, 50, 60, in particular operational amplifiers.

[0040] The drain terminal 13 of the first field-effect transistor 10 is connected to a first input of a first operational amplifier 40. The source terminal 11 of the first field-effect transistor 10 is connected to the second input of the first operational amplifier 40. The second input of the first operational amplifier 40 is or will be inverted. A first resistor 41 is arranged between the source terminal 11 of the first field-effect transistor 10 and the first operational amplifier 40. A third resistor 43 is present between the drain terminal 13 of the first field-effect transistor 10 and the first operational amplifier 40. The first operational amplifier 40 outputs a first output potential 90, which depends on the potential at the drain terminal 13 of the first field-effect transistor 10, the ground potential 80, and a reference potential 81.There is an electrical connection between a point located between the first resistor 41 and the second input of the first operational amplifier 40 and the first output potential 90 via a second resistor 42. There is an electrical connection between a point located between the third resistor 43 and the first input of the first operational amplifier 40 and a reference potential 81 via a fourth resistor 44. The reference potential 81 is provided by a source (not shown).

[0041] The source terminal 11 of the first field-effect transistor 10 is connected to a second input of a second operational amplifier 50. The second input of the second operational amplifier 50 is or will be inverted. The gate terminal 12 of the first field-effect transistor 10 is connected to a first input of the second operational amplifier 50. A fifth resistor 51 is connected between the source terminal 11 of the first field-effect transistor 10 and the second input of the second operational amplifier 50. A seventh resistor 53 is connected between the gate terminal 12 of the first field-effect transistor 10 and the first input of the second operational amplifier 50. The second operational amplifier 50 outputs a second output potential 91. The second output potential 91 depends on the potential at the gate terminal 12 of the first field-effect transistor 10, the ground potential 80, and the reference potential 81.

[0042] There is an electrical connection between a point located between the fifth resistor 51 and the second input of the second operational amplifier 50 and the second output potential 91 or the output of the second operational amplifier 50 via a sixth resistor 52.

[0043] In addition, an electrical connection is provided between a point located between the seventh resistor 53 and the first input of the second operational amplifier 50 and the reference potential 81 via an eighth resistor 54.

[0044] The first output potential 90, i.e., the output potential of the first amplifier 40, is applied to the drain terminal 23 of the second field-effect transistor 20. The second output potential 91, i.e., the output potential of the second amplifier 50, is applied to the gate terminal 22 of the second field-effect transistor 20. The source terminal 21 of the second field-effect transistor 20 is connected to a second input of a third amplifier 60, in particular an operational amplifier, and the potential of the source terminal 21 of the second field-effect transistor 20 is equal to the potential of the second input of the third amplifier 60. The second input of the third amplifier 60 is or will be inverted. The first input of the third operational amplifier 60 is connected to the reference potential 81, or the potential at the first input of the third operational amplifier 60 is equal to the reference potential 81.The third operational amplifier 60 outputs a third output potential 92 at its output. The output of the third operational amplifier 60 is electrically connected to the first input of the third operational amplifier 60 via a feedback resistor 61 or a ninth resistor 61.

[0045] The third amplifier 60 regulates the control potential 82 applied to its second input to the reference potential 81 applied to its first input.

[0046] If the resistance values ​​of the first resistor 41, the second resistor 42, the third resistor 43 and the fourth resistor 44 are equal, the first output potential 90 corresponds to the sum of the potential at the drain terminal 13 of the first field effect transistor 10 minus the ground potential 80 or mass potential plus the reference potential 81, ie the following applies to the first output potential 90 of the first amplifier 40: VOUTOP1=(VDLSD−VGND)+VREF where VD LSD the potential at the drain terminal 13 of the first field effect transistor 10 is V GND the ground potential is 80 or mass potential, V REF the reference potential is 81, and VOUT OP1 the output potential is 90 or output potential at the output of the first amplifier is 40.

[0047] If the ground potential is 80 or the mass potential V GND is zero, then: VOUTOP1=VDLSD+VREF

[0048] Thus, the first output potential 90 is the source-drain potential difference of the first field-effect transistor 10 plus the reference potential 81.

[0049] If the resistance values ​​of the fifth resistor 51, the sixth resistor 52, the seventh resistor 53 and the eighth resistor 54 are equal, the second output potential 91 corresponds to the potential at the gate terminal 12 of the first field effect transistor 10 minus the ground potential 80 or mass potential plus the reference potential 81, i.e. the following applies to the second output potential 91 or the potential at the output of the second amplifier 50: VOUTOP2=(VGLSD−VGND)+VREF where VG LSD the potential at the gate terminal 12 of the first field effect transistor 10 is V GND the mass potential is, V REF the reference potential is 81, and VOUT OP2 the output potential 91 or output potential at the output of the second amplifier 50.

[0050] If the ground potential is 80 or the mass potential is zero, then: VOUTOP2=VGLSD+VREF

[0051] Thus, potentials are present at the terminals (source terminal 21, drain terminal 23, gate terminal 22) of the second field effect transistor 20, which are shifted by the reference potential 81 compared to the respective potentials at the corresponding terminals (source terminal 11, drain terminal 23, gate terminal 12) of the first field effect transistor 10.

[0052] The difference between the gate terminal 12 of the first field-effect transistor 10 and the source terminal 11 of the first field-effect transistor 10 is equal to the difference between the gate terminal 22 of the second field-effect transistor 20 and the source terminal 21 of the second field-effect transistor 20.

[0053] The difference between the drain terminal 13 of the first field-effect transistor 10 and the source terminal 11 of the first field-effect transistor 10 is equal to the difference between the drain terminal 23 of the second field-effect transistor 20 and the source terminal 21 of the second field-effect transistor 20 M SENSE : VDSLSD=VDSMSENSE VGSLSD=VGSMSENSE where VDS LSD the voltage or potential difference between the drain terminal 13 of the first field-effect transistor 10 and the source terminal 11 of the first field-effect transistor 10, VDS MSENSE the voltage or potential difference between the drain terminal 13 of the second field-effect transistor 10 and the source terminal 11 of the second field-effect transistor 10, VGS LSDthe voltage or potential difference between the gate terminal 12 of the first field-effect transistor 10 and the source terminal 11 of the first field-effect transistor 10, and VGS MSENSE the voltage or potential difference between the gate terminal 12 of the second field effect transistor 10 and the source terminal 11 of the second field effect transistor 10.

[0054] This results in the measuring current (I SENSE ) at the source terminal 21 of the second field effect transistor 20, a current which is dependent on the current at the source terminal 11 (I LSD ) of the first field-effect transistor 10 or proportional thereto, which depends on the width / length ratio, ie (W / L) ratio, between the first field-effect transistor 10 and the second field-effect transistor 20. W stands for the width of the gate layer and L for the length of the gate layer of the respective transistor. That is, the following applies: ISENSE=ILSD*(W / L)MSENSE / (W / L)LSD where I SENSE the measuring current at the source terminal 21 of the second field effect transistor 20, (W / L) MSENSE is the ratio of width to length of the second field effect transistor 20, (W / L) LSD is the ratio of width to length of the first field effect transistor 10, and I LSD the current at the source terminal 11 of the first field effect transistor 10.

[0055] Typically, the W / L ratio of the second field-effect transistor 20 is selected such that it is smaller, in particular significantly smaller, than the W / L ratio of the first field-effect transistor 10. For example, the W / L ratio of the second field-effect transistor 20 may be less than 10%, in particular less than 5%, preferably less than 1%, of the W / L ratio of the first field-effect transistor 10.

[0056] This results in a relatively small measuring current at the source terminal 21 of the second field-effect transistor 20, which can be easily detected. For example, this measuring current is between approximately 1 mA and approximately 10 mA.

[0057] Since the first field-effect transistor 10 can, for example, be part of a half-bridge or full-bridge for driving an inductive load, such as a motor, negative drive currents can occur due to the stored magnetic energy in the coils in so-called BEMF phases (backwards electromagnetic force phases), since the potential at the drain terminal 13 of the first field-effect transistor 10 is lower than the potential at the source terminal 11 of the first field-effect transistor 10. This creates a negative current at the source terminal 11 of the first field-effect transistor 10. The drain terminal 13 of the first field-effect transistor 10 is connected to a terminal of a load 99.

[0058] Since the potentials at the second field effect transistor 20 are shifted by the reference potential 81, currents can be generated or measured at the source terminal 21 of the second field effect transistor 20, or the second field effect transistor 20 can be switched to conduction, even if the current at the source terminal 11 of the first field effect transistor 10 is negative.

[0059] This applies in particular if the difference between the potential at the drain terminal 13 of the first field-effect transistor 10 and the potential at the source terminal 11 of the first field-effect transistor 10 is less than or equal to the reference potential 81 (provided the current at the source terminal 11 of the first field-effect transistor 10 is negative). That is, if the following applies: VREF≥|VDSLSD| where VREF is the reference potential 81, and |VDS LSD| is the magnitude of the difference between the potential of the drain terminal of the first transistor and the potential of the source terminal of the first transistor.

[0060] To detect the measuring current at the source terminal 21 of the second field-effect transistor 20, the measuring current is converted into the third output potential 92 by the feedback resistor 61 (ninth resistor), which serves here as a current-to-voltage converter or IV converter. The following applies to the output potential 92 of the third amplifier 60: VOUTOP3=−ISENSE*R3+VREF where R3 is the resistance value of the feedback resistor 61 or the ninth resistor, I SENSE the measuring current to the source terminal 21 of the second field effect transistor 20 is, V REF the reference potential is 81, and VOUT OP3 the output potential 92 of the third amplifier 60.

[0061] The third output potential 92 can be applied to an analog-to-digital converter 95 (ADC).

[0062] The electronic circuit 1 comprises the measuring device 5 and the first transistor 10 connected thereto, the current at the source terminal of which is to be determined.

[0063] Fig. 2 shows a schematic view of a second embodiment of the measuring device 5 according to the invention or of the electronic circuit 1 according to the invention.

[0064] The measuring device 5 or the electronic circuit 1 of the second embodiment differs from the measuring device 5 or the electronic circuit 1 of the first embodiment in the following points: The third output potential 92, i.e., the output potential of the third amplifier 60, is applied to a first input of an analog-to-digital converter 95. This means that the measuring device 5 or the electronic circuit 1 of the second embodiment comprises an analog-to-digital converter 95. Furthermore, the second embodiment comprises a reference current source 97 that supplies or provides a reference current. The magnitude or level of the reference current is precisely known.

[0065] The reference current flows through a tenth resistor or an additional resistor 70. Another input of the analog-to-digital converter 95 is connected to a first side of the tenth resistor 70. Another further input of the analog-to-digital converter 95 is connected to the other side, opposite the first side, of the tenth resistor 70. This means that both sides of the tenth resistor 70 are electrically connected to two different inputs of the analog-to-digital converter 95. Thus, the voltage drop across the tenth resistor 70 can be precisely detected. The analog-to-digital converter 95 outputs a digital output signal 96 that indicates the measurement current or the current level at the source terminal 21 of the second field-effect transistor 20 or from which this value can be determined.

[0066] From this, the current or the current level at the source terminal 11 of the first field effect transistor 10 can be determined in a technically simple manner.

[0067] The resistance value of the additional resistor or tenth resistor 70 or the tenth resistor 70 is selected to match the resistance value of the feedback resistor or ninth resistor 61 or the ninth resistor 61. In this way, the tenth resistor 70 essentially exhibits the same process fluctuations during manufacturing or changes or undesired deviations from the target during manufacturing as the ninth resistor 61. These two deviations are thus compensated because the voltage drop across the ninth resistor 61 is precisely equal to the voltage drop across the tenth resistor 70, provided the respective applied voltage is the same. For example, the ninth resistor 61 and the tenth resistor 70 come from the same manufacturing batch. Thus, the measuring current or the current at the source terminal 21 of the second field-effect transistor 20 can be determined particularly precisely.This eliminates the need to trim a resistor or the ninth resistor 61. Furthermore, the time required to perform a test of the first field-effect transistor 10 can be reduced.

[0068] Fig. 3 shows a schematic view of a third embodiment of the measuring device 5 according to the invention or of the electronic circuit 1 according to the invention.

[0069] The third embodiment is disclosed here independently of the first embodiment and / or the second embodiment. The third embodiment differs from the first embodiment in the following points: In the third embodiment, the first input of the third operational amplifier 60 is not connected to the output of the third operational amplifier 60 via a ninth resistor 61. Instead, the measuring device 5 or the electronic circuit 1 of the third embodiment additionally comprises a third field-effect transistor 100, wherein the drain terminal 103 of the third field-effect transistor 100 is connected to the second input of the third operational amplifier 60 and to the current source that supplies an offset current, or to a reference current source 97. In the third embodiment, the output of the third operational amplifier 60 is connected to the gate terminal 102 of the third field-effect transistor 100. A fourth potential is present at the source terminal 101 of the third field-effect transistor.The source terminal 101 of the third field-effect transistor 100 provides an output signal, here an output current, which is used to measure the current at the source terminal 101 of the first field-effect transistor 10. Furthermore, the first input of the third amplifier 60 is inverted, and the second input of the third amplifier 60 is non-inverted or inverting.

[0070] The core idea of ​​this third embodiment is that the measurement current, i.e., the current at the source terminal 21 of the second field-effect transistor 20, is superimposed with an additional current, namely the offset current. This means that the sum of the measurement current and the offset current is present at the source terminal 101 of the third field-effect transistor 100. The offset current can be subtracted or calculated out from the current at the source terminal 101 of the third field-effect transistor 100, and in this way the measurement current at the source terminal 21 of the second field-effect transistor 20 can be determined. The offset current or its magnitude is precisely known. The current through the third field-effect transistor 100 or at the source terminal 101 of the third field-effect transistor 100 is the sum of the measurement current at the source terminal 21 of the second field-effect transistor 20 and the offset current from the reference current source.

[0071] The third operational amplifier 60, together with the third field-effect transistor 100 and the reference voltage, regulates the source terminal 21 of the second field-effect transistor 20 to the control potential. The control potential corresponds to the reference potential, or these two potentials are equal.

[0072] For a negative current (after deducting the offset current) via the third field effect transistor 100 or at the source terminal 101 of the third field effect transistor 100, the potential at the source terminal 101 of the third field effect transistor 100 must be greater than the potential at the drain terminal 103 of the third field effect transistor 100 (i.e. the control potential 82). This could, firstly, make it more difficult to implement such a control and, secondly, make it more difficult to detect the negative measuring current at the source terminal 21 of the second field effect transistor 20 via a current-dependent potential at the output or source terminal 101 of the third field effect transistor 100. By superimposing or adding the positive offset current to the current at the drain terminal 103 or source terminal 101 of the third field effect transistor 100, a negative current is generated via the third field effect transistor 100 or at the drain terminal 103 orat the source terminal 101 of the third field-effect transistor 100 is technically easily prevented. A positive current thus always flows through the third field-effect transistor 100, provided the offset current is greater than or equal to the magnitude of the measurement current at the source terminal 21 of the second field-effect transistor 20 (for negative measurement currents). Consequently, the current at the source terminal 11 of the first field-effect transistor 10 can be determined directly and precisely, regardless of whether it is positive or negative. List of reference symbols 1 Electronic circuit 5 Measuring device 10 first field-effect transistor 11 Source terminal of the first field-effect transistor 12 Gate terminal of the first field-effect transistor 13 Drain terminal of the first field-effect transistor 20 second field effect transistor 21 Source terminal of the second field-effect transistor 22 Gate terminal of the second field-effect transistor 23 Drain terminal of the second field-effect transistor 40 first amplifier 41 first resistance 42 second resistance 43 third resistance 44 fourth resistance 50 second amplifier 51 fifth resistance 52 sixth resistance 53 seventh resistance 54 eighth resistance 60 third amplifier 61 Feedback resistor / ninth resistor 70 additional resistance / tenth resistance 80 ground or ground potential 81 Reference potential 82 control potential 90 first output potential 91 second output potential 92 third output potential 95 analog-to-digital converters 96 Output of the analog-to-digital converter 97 Reference current source 99 Connection to load 100 third field effect transistor 101 Source terminal of the third field-effect transistor 102 Gate terminal of the third field-effect transistor 103 Drain terminal of the third field-effect transistor 200 first state-of-the-art field-effect transistor 201 Source terminal of the first prior art field effect transistor 202 Gate terminal of the first field-effect transistor of the prior art 203 Drain terminal of the first prior art field effect transistor 210 second field-effect transistor of the state of the art 211 Source terminal of the second field-effect transistor of the prior art 212 Gate terminal of the second field-effect transistor of the prior art 213 Drain terminal of the second field-effect transistor of the prior art 215 third field-effect transistor of the state of the art 220 state-of-the-art measuring resistor 230 state-of-the-art amplifiers 240 state-of-the-art measuring voltage 250 state-of-the-art control amplifiers 280 Ground or ground potential of the state of the art 299 Connection to state-of-the-art load

Claims

[1] Measuring device (5) for generating a measuring current, the measuring device (5) comprising: a first amplifier (40) whose inputs are connected to the drain terminal (13) and the source terminal (11) of a first transistor (10), whose source terminal (11) is connected to the ground potential (80), and which outputs a first output potential (90) which is dependent on the potential at the drain terminal (13) of the first transistor (10), the ground potential (80) and a reference potential (81), a second amplifier (50) whose inputs are connected to the gate terminal (12) and the source terminal (11) of the first transistor (10) and which outputs a second output potential (91) which is dependent on the potential at the gate terminal (12) of the first transistor (10), the ground potential (80) and the reference potential (81), and a second transistor (20), to whose drain terminal (23) the first output potential (90) is applied, to whose source terminal (21) the reference potential (81) is applied and to whose gate terminal (22) the second output potential (91) is applied, whereby a measuring current which correlates with the current flowing at the source terminal (11) of the first transistor (10) flows at the source terminal (21) of the second transistor (20). [2] Measuring device (5) according to claim 1, further comprising a third amplifier (60) which outputs a third output potential (92) and is connected to the second transistor (20) such that the third amplifier (60) regulates the potential at the source terminal (21) of the second transistor (20) to the reference potential (81). [3] Measuring device (5) according to claim 2, wherein the reference potential (81) is applied to a first input of the third amplifier (60) and a control potential is applied to a second input of the third amplifier (60). [4] Measuring device (5) according to claim 2 or 3, further comprising a feedback resistor (61) connecting the output of the third amplifier (60) to an input of the third amplifier (60). [5] Measuring device (5) according to one of claims 2-4, further comprising a detection device for detecting the third output potential (92) for determining the measuring current flowing at the source terminal (21) of the second transistor (20). [6] Measuring device (5) according to one of the preceding claims, wherein a second input of the first amplifier (40) is connected via a first resistor (41) to the source terminal (11) of the first transistor (10) and via a second resistor (42) to the output of the first amplifier (40). [7] Measuring device (5) according to one of the preceding claims, wherein a first input of the first amplifier (40) is connected via a third resistor (43) to the drain terminal (13) of the first transistor (10) and via a fourth resistor (44) to the reference potential (81). [8] Measuring device (5) according to one of claims 2-7, further comprising an analog-digital converter (95), wherein a reference current is applied to an additional resistor (70) and wherein a first input of the analog-digital converter (95) is connected to a first side of the additional resistor (70), a second input of the analog-digital converter (95) is connected to a second side of the additional resistor (70) opposite the first side and the third output potential (92) is applied to a third input of the analog-digital converter (95). [9] Measuring device (5) according to claim 8, wherein the additional resistor (70) has substantially the same deviations in its resistance value as a feedback resistor (61) connecting the output of the third amplifier (60) to an input of the third amplifier (60). [10] Measuring device (5) according to one of claims 3-9, further comprising a third transistor (100), in particular a third field effect transistor, wherein the third output potential (92) is applied to the gate terminal (102) of the third transistor (100), the control potential (82) is applied to the drain terminal (102) of the third transistor (100) and a fourth potential is applied to the source terminal (101) of the third transistor (100), wherein the sum of an offset current and the measuring current of the source terminal (21) of the second transistor (20) is applied to the drain terminal (102) of the third transistor (100). [11] Measuring device (5) according to one of claims 3-10, wherein the level of the control potential (82) is equal to the level of the reference potential (81). [12] Measuring device (5) according to one of the preceding claims, wherein the reference potential (81) is greater than or equal to the magnitude of the potential difference between the drain terminal (13) and the source terminal (11) of the first transistor (10). [13] Electronic circuit (1) comprising a first transistor (10), in particular a field effect transistor, and a measuring device (5) according to one of the preceding claims connected to the first transistor (10). [14] Method for generating a measuring current, preferably by means of a measuring device (5) according to one of claims 1-12 or an electronic circuit (1) according to claim 13, the method comprising the following steps: Generating a first output potential (90) as a function of the potential at the drain terminal (13) of a first transistor (10), the source terminal (11) of which is connected to a ground potential (80), the ground potential (80) and a reference potential (81) by means of a first amplifier (40); Generating a second output potential (91) depending on the potential at the gate terminal (12) of the first transistor (10), the ground potential (80) and the reference potential (81) by means of a second amplifier (50); and Applying the first output potential (90) to a drain terminal (23) of a second transistor (20), the reference potential (81) to the source terminal (21) of the second transistor (20) and the second output potential (91) to the gate terminal (22) of the second transistor (20), whereby a measuring current which correlates with the current flowing at the source terminal (11) of the first transistor (10) flows at the source terminal (21) of the second transistor (20).

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