PLATE, POWER SEMICONDUCTOR ARRANGEMENT AND METHOD FOR MANUFACTURING A POWER SEMICONDUCTOR ARRANGEMENT

The use of a thermally conductive and electrically insulating plate with soldering surfaces and a shielding layer addresses the challenges of heat dissipation and electromagnetic shielding in power semiconductor arrangements, resulting in enhanced performance and reliability.

DE102023136151A1Pending Publication Date: 2025-06-26SMA SOLAR TECH AG
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Patent Information

Application Number
DE102023136151
Authority / Receiving Office
DE · DE
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-20
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

Existing power semiconductor arrangements in power electronic circuits face challenges in achieving improved heat dissipation and electromagnetic shielding, which are crucial for efficient operation and reliability.

Method used

A plate with a base body made of high thermal conductivity and/or high electrical withstand voltage materials is used for mounting power semiconductors, providing heat-dissipating and electromagnetically shielding properties. The plate features soldering surfaces for secure mounting and can include a shielding layer for enhanced electromagnetic compatibility.

Benefits of technology

The proposed solution effectively enhances heat dissipation and electromagnetic shielding in power semiconductor arrangements, leading to improved performance, reliability, and reduced losses in power electronic circuits.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to a board (10) having at least one soldering surface (16), wherein the board (10) is provided for assembly with a power semiconductor (24), wherein for assembly it is provided that the soldering surface (16) is connected to the power semiconductor (24) by a soldering process, wherein a base body (12) of the board (10) has at least one board material with a high thermal conductivity and / or a high electrical dielectric strength and wherein the board (10) is designed to have a heat-dissipating and / or electromagnetically shielding effect with respect to the power semiconductor (24). The application further relates to a power semiconductor arrangement (40) with such a plate (10), a method for producing a power semiconductor arrangement (40), and an inverter with a power semiconductor arrangement (40).
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Description

TECHNICAL FIELD

[0001] This application relates to the technical field of assembly and connection technology for power electronic circuits. In particular, the application relates to a board intended for mounting a power semiconductor, a power semiconductor arrangement comprising such a board, and a method for manufacturing a power semiconductor arrangement. Power semiconductors are semiconductor components, also called chips, designed to switch high electrical currents and voltages. STATE OF THE ART

[0002] DE102019133377A1 describes an inverter with a power semiconductor arrangement comprising two circuit boards. A first circuit board is connected to a heat sink, and the second circuit board is mounted on a metal sheet, which, among other things, has an electromagnetic shielding function.

[0003] DE102021110251A1 describes a power semiconductor arrangement with two printed circuit boards and a power semiconductor arranged between them. The power semiconductor can be designed as an SMD component (SMD Surface Mounted Device).

[0004] SMD components (surface-mounted components) can be electrically connected to the surface of printed circuit boards. They have a contact side on which electrical connections are located. The electrical connections located on the contact side are intended for contact with conductor tracks on a printed circuit board. Contact can be established, for example, via a solder connection, which can also provide mechanical attachment to the circuit board. TASK

[0005] The application is based on the object of providing a power semiconductor device with improved properties and / or an improved method for producing a power semiconductor device. SOLUTION

[0006] The object is achieved by a plate having the features of claim 1 and a method having the features of claim 24. Embodiments are specified in the dependent claims. DESCRIPTION

[0007] A board according to the application is intended for assembly with a power semiconductor. A power semiconductor can comprise, for example, a diode made of silicon, silicon carbide, or gallium arsenide and / or a transistor made of silicon, silicon carbide, or gallium nitride, as well as any associated driver functionalities.

[0008] The plate has at least one soldering surface, wherein, in order to equip the plate with the power semiconductor, the soldering surface is connected to the power semiconductor by a soldering process. The plate has a base body, which comprises at least one plate material with high thermal conductivity and / or high dielectric strength. The plate is designed to dissipate heat and / or provide electromagnetic shielding with respect to the power semiconductor.

[0009] By selecting a suitable plate material for the base body, the desired properties of the plate can be achieved. If, for example, the plate material of the base body is selected to have high thermal conductivity, the base body of the plate will dissipate heat. If, for example, the plate material of the base body is selected to have high dielectric strength, the base body of the plate will also provide good insulation. The plate material for the base body of the plate can also be selected to achieve high thermal conductivity and, in addition, good insulation with high dielectric strength.

[0010] The board offers the advantage that, in addition to the described property or properties, it has at least one soldering surface that makes it possible to mount the power semiconductor on the board or, conversely, to mount the power semiconductor with the board. After mounting, the power semiconductor can benefit from the properties of the board, e.g., its ability to dissipate heat and / or its ability to provide electromagnetic shielding. The mechanical connection between the power semiconductor and the board is created by the soldering connection, with the soldering surface being provided as a surface onto which the power semiconductor can be soldered. The power semiconductor can be soldered to the soldering surface, for example, using solder paste or a preformed piece of solder.

[0011] In one embodiment of the board, the soldering surface is provided for assembly with an SMD power semiconductor. The power semiconductor is designed as an SMD component. Assembly comprises the mechanical connection of the SMD component to the board so that the SMD component can benefit from the board's properties, e.g., its ability to dissipate heat and / or its ability to provide electromagnetic shielding. The SMD power semiconductor can have a housing with multiple sides. On at least one of the housing sides, the SMD power semiconductor can have electrical connections for contacting. This contacting side of the SMD power semiconductor is therefore provided for electrical contacting with a printed circuit board, which can, for example, have further components for implementing a power electronic semiconductor circuit. The SMD power semiconductor can be connected to the soldering surface of the board via one of its sides using solder.The SMD power semiconductor can, for example, be designed as a semiconductor switch that is suitable for switching high currents.

[0012] In one embodiment of the board, the soldering surface is provided for connection to a side of the SMD power semiconductor, which is intended for heat dissipation. If the SMD component has a side intended for heat dissipation, the connection to the board via the soldering surface can further support heat dissipation. Particularly in the case of a board with high thermal conductivity, heat dissipation from the SMD power semiconductor can be further improved, in particular by connecting the board to a heat sink in a thermally conductive manner.

[0013] The SMD power semiconductor can, for example, be designed as a power semiconductor switch and have a contacting side with electrical connections that are provided for contacting a printed circuit board and can be switched via the semiconductor. In one embodiment of the board, the side of the SMD power semiconductor intended for heat dissipation is arranged opposite the contacting side with these switching contacts of the SMD power semiconductor. The waste heat generated in the power semiconductor during switching operations can be dissipated to the side intended for heat dissipation, which is opposite the contacting side. Such SMD power semiconductors can, for example, be designed as TSC (top-side cooled) components.

[0014] The board may have several separate soldering pads intended for connection to different power semiconductors.

[0015] In one embodiment, the plate has at least one recess for receiving a respective mounting means, wherein the respective mounting means is provided in particular for mechanically connecting the plate to a printed circuit board. The at least one recess for receiving the mounting means can in particular be designed as a through-hole. The printed circuit board can in particular be configured to be electrically conductively connected to the switching contacts of the power semiconductor.

[0016] In embodiments of the plate, the at least one plate material comprises ceramic, plastic, and / or composite material. The composition of the plate material is advantageously selected to achieve the desired properties regarding thermal conductivity and / or electromagnetic shielding.

[0017] In one embodiment of the board, the soldering surface has a copper layer. The soldering surface can be formed, for example, as a copper layer. The good thermal conductivity of copper can improve the desired effect with regard to thermal conductivity and / or electrical shielding.

[0018] In one embodiment, the plate has at least one cavity. In particular, the base body of the plate can have the at least one cavity. The at least one cavity is formed, for example, as a blind recess in the plate base body. The at least one soldering surface of the plate is arranged in a respective cavity. The power semiconductor can then be accommodated in the cavity during the assembly process. The depth of the at least one cavity is preferably selected such that it is flush with the power semiconductor when the latter is assembled in the respective cavity.

[0019] In embodiments, the thickness of the plate differs from the thickness of the power semiconductor by less than 1 mm, in particular by less than 300 µm, whereby the plate can have different thicknesses along its length. The thickness of the plate at the soldering surfaces can be less than 1 mm, in particular less than 200 µm.

[0020] In embodiments, the plate comprises multiple layers, each comprising at least one different plate material. By forming the plate with multiple layers of different plate materials, the desired properties of the plate can be further improved. For example, the plate materials can be selected such that they differ with regard to, for example, thermal conductivity and / or dielectric strength and / or magnetic shielding.

[0021] In particular, the plate can have a layer configured as a shielding layer. The shielding layer provides electromagnetic shielding. The shielding layer can, in particular, comprise a metal, e.g., copper, that can divert interference currents to a static potential. The shielding layer can, in particular, be arranged in the plate between the soldering surface and the side of the plate opposite the power semiconductor. The shielding layer can extend laterally across the entire plate or only over parts of the plate.

[0022] The EMC shielding (EMC = electromagnetic compatibility) achieved by dissipating interference currents through the shielding layer is advantageous, for example, in fast-switching half-bridges. Particularly when the SMD power semiconductor is arranged above the plate with a heat sink with a static potential, capacitively coupled interference currents may arise between the SMD power semiconductor and the heat sink. Such capacitively coupled interference currents can be directly dissipated by the additional shielding layer, e.g., a copper layer, in the plate, preventing the interference currents from reaching any heat sink connected to the plate.

[0023] The board can have at least two soldering pads, with the shielding layer extending across the at least two soldering pads in the board, i.e., lying between both soldering pads and the heat sink. This allows shielding to be achieved for both of the respective power semiconductors that can be mounted on the soldering pads.

[0024] In a power converter designed as a DC / DC or DC / AC converter, the shield layer can be connected to one of the DC voltage potentials DC+ or DC- or to a center potential M, for example, to divert capacitively coupled interference currents (=common mode interference) that can occur between the switching node potential of a respective power semiconductor and the heat sink potential or ground potential. The potential of the shield layer can be connected to M, DC-, or DC+, for example, and selected so that it hardly varies with respect to ground. This can significantly reduce interference caused by capacitive interference or leakage currents.

[0025] In one embodiment, the plate has an electrical connection to the shielding layer on the side of the power semiconductor. For example, the contact can be used to specifically influence the potential level of the shielding layer and thus influence the shielding effect of the shielding layer. For example, the shielding effect can be improved by placing the shielding layer at a potential that is essentially static during operation, with no or slow potential fluctuations.

[0026] In an alternative embodiment of the board, the shielding layer is electrically connected to one of the soldering pads. This is advantageous if this one soldering pad is already connected to a static potential (DC+, DC-, or M), for example, via the power semiconductor and its switching contacts, thus eliminating the need for a separate connection to a static potential.

[0027] The shielding layer can be formed as a single-piece copper layer with one soldering surface and extend beneath the other soldering surface. In such an embodiment, the copper layer, which has a soldering surface for a power semiconductor and extends beneath the soldering surface of a second power semiconductor, acts as a shielding layer, particularly for the second power semiconductor.

[0028] In one embodiment of the board, the soldering surface is coated with a solder. The solder can, in particular, comprise solder paste or a preformed piece of solder.

[0029] The soldering surface can be printed with solder paste, for example. Applying the solder to the soldering surface can further simplify the assembly of the board.

[0030] A power semiconductor arrangement according to the application comprises at least one power semiconductor and the described plate. Depending on the manufacturing process used, the plate can be populated with the at least one power semiconductor, or conversely, the power semiconductor can be populated with the plate.

[0031] In one embodiment, the power semiconductor arrangement further comprises a printed circuit board to which the at least one power semiconductor is electrically connected via its switching contacts.

[0032] In one embodiment, the plate of the power semiconductor device is connected to a heat sink via a transfer layer. The plate is thermally connected to the heat sink via the transfer layer, which, for example, comprises a thermally conductive paste.

[0033] In one embodiment of the power semiconductor arrangement, the at least one power semiconductor is connected via solder to the soldering surface in at least one cavity of the board, wherein the power semiconductor is electrically conductively connected to the circuit board on the side opposite the board, wherein the board rests against the circuit board in regions different from the at least one cavity. This embodiment is particularly advantageous for SMD semiconductors that are designed as TSC (top-side cooled) components. The heat generated by the power semiconductor can be dissipated to the side provided for heat dissipation, which is opposite the contacting side and thus the circuit board.

[0034] In one embodiment of the power semiconductor device, the shielding layer is electrically connected to a potential of the power semiconductor device that is essentially static during operation. This allows the voltage level to be advantageously selected, allowing, for example, insulation layer thicknesses to be minimized.

[0035] Another power semiconductor arrangement according to the application comprises at least one SMD power semiconductor and a plate with at least one soldering surface. A base body of the plate comprises at least one plate material with high thermal conductivity and / or high dielectric strength. The plate is designed to dissipate heat and / or provide electromagnetic shielding with respect to the SMD power semiconductor.

[0036] A method for producing such a power semiconductor arrangement comprises: A) equipping the board with the at least one SMD power semiconductor by placing the SMD power semiconductor on the soldering surface or equipping the board by placing the board with the soldering surface on the SMD power semiconductor.

[0037] In embodiments of the method, the soldering surface is placed on a side of the SMD power semiconductor which is provided for heat dissipation of power loss of the SMD power semiconductor, wherein the side of the SMD power semiconductor provided for heat dissipation is opposite a contacting side with switching contacts of the SMD power semiconductor.

[0038] In embodiments of the method, that side of the SMD semiconductor which is intended for heat dissipation of power loss of the SMD power semiconductor is placed on the soldering surface, wherein the side of the SMD power semiconductor intended for heat dissipation is opposite a contacting side with switching contacts of the SMD power semiconductor.

[0039] In one embodiment of the method, after assembly, the SMD power semiconductor is connected to the soldering pad by means of a solder applied to the soldering pad through a soldering process. The connection through the soldering process occurs between the side of the SMD power semiconductor and the soldering pad, which were placed on top of each other in the previous step.

[0040] In embodiments of the method, the soldering surface is connected by the soldering process to the side of the SMD power semiconductor which is intended for heat dissipation of power loss of the SMD power semiconductor and is opposite a contacting side with switching contacts of the SMD power semiconductor.

[0041] In one embodiment of the method, according to A) and B), in C) a circuit board is populated with the SMD power semiconductor by placing the at least one SMD power semiconductor on the circuit board.

[0042] In one embodiment of the method, the SMD power semiconductor is connected to the circuit board by a soldering process before or after assembly with the board.

[0043] The soldering process for assembling the board or connecting it to the circuit board can, for example, involve a reflow soldering process. Reflow soldering, or reflow soldering, is a soft soldering process suitable for soldering SMD components. In reflow soldering, a soft solder is applied to the board or circuit board before assembly, for example by means of stencil printing, as a solder preform, or galvanically. After the solder has been applied, the components are assembled. The components can adhere directly to the applied paste during assembly, eliminating the need for additional adhesive. The assembled circuit board is then heated sufficiently to melt the solder. The heating processes used in reflow soldering are intended to heat the circuit board and components as evenly as possible.

[0044] The soldering processes of the process can be performed individually, one after the other, or in a single step. For example, the soldering process for connecting the board to the SMD power semiconductor can be performed before or after the soldering process for connecting the SMD power semiconductor to the circuit board, or the SMD power semiconductor can be connected to the board and the circuit board in a single step.

[0045] The described method allows for a solder connection between the circuit board and the contacting side of the power semiconductor on one side, and a solder connection between another side of the power semiconductor, particularly the heat-dissipating side of TSC SMD power semiconductors, and the board. The board has solder pads and is particularly suitable for assembly using the SMT (Surface Mount Technology) process.

[0046] The described power semiconductor arrangement can be used, for example, in power converters that convert electrical power in the range of a few kilowatts to a few hundred kilowatts at a voltage of a few hundred volts between direct current and alternating current. Examples of power semiconductors in power converters are semiconductor switches in DC / DC circuits, DC / AC circuits, or AC / AC circuits. Power converters can have power semiconductor arrangements in various topologies, e.g., half- or full-bridge circuits, B6 bridge circuits, or so-called flying cap topologies, and can optionally be operated bidirectionally. Power converters designed as DC / AC converters are also referred to as inverters.

[0047] An inverter may comprise a described power semiconductor arrangement, wherein the power semiconductor arrangement comprises a DC / DC or DC / AC circuit which comprises the at least one SMD power semiconductor.

[0048] Bridge circuits in inverters, so-called inverter bridges, can be designed in single-phase and three-phase inverters and can have a corresponding number of power semiconductor devices.

[0049] In one embodiment of the inverter, the inverter has a rated electrical power of at least one kilowatt. The at least one SMD power semiconductor can be embodied as a power switch configured to switch a maximum electrical current of at least 10 amperes at a maximum voltage of at least 500 volts.

[0050] The plate of the inverter's power semiconductor arrangement can have at least two power switches designed as SMD power semiconductors. One of the SMD power semiconductors can be designed to switch a static potential of the respective bridge circuit, which is connected to its switching contacts. One power switch can also be electrically connected to the shielding layer on its side intended for heat dissipation. The other power switch can be designed to switch a variable potential, in particular a potential of the respective bridge circuit that jumps between different potential values ​​during operation of the inverter.In such an embodiment, the shielding layer connected to the resting potential can improve the electromagnetic shielding of the bridge circuit with respect to the heat sink by extending over the power switch(es) that jump between the different potential values. BRIEF DESCRIPTION OF THE CHARACTERS

[0051] In the following, the application is further explained and described using exemplary embodiments shown in the figures. Fig. 1 shows schematically different embodiments of a plate. Fig. Figure 2 shows schematically different embodiments of the plate with power semiconductors. Fig. 3 schematically shows a first embodiment of a power semiconductor device. Fig. 4 schematically shows a second embodiment of a power semiconductor device. Fig. 5 schematically shows a third embodiment of a power semiconductor device. Fig. 6 schematically shows embodiments of a method for manufacturing the power semiconductor device.

[0052] The same reference numerals are used throughout the figures to refer to identical or similar elements. The illustrations in the figures may not be to scale. FIGURE DESCRIPTION

[0053] Fig. Figure 1 schematically shows a plan view of a plate 10 in the left half. The plate 10 has two cavities 20, in each of which a solder 14, e.g., in the form of a solder paste or a preformed piece of solder, is arranged. In each cavity 20, a respective soldering surface 16 is arranged beneath the solder 14. The cavities 20 are arranged as blind recesses in a base body 12 of the plate 10. The soldering surface 16 can, e.g., be formed as a copper layer and accordingly have good thermal conductivity and good electrical conductivity. Recesses 18 in the form of through-holes are provided in the base body 12 of the plate, which can accommodate mounting means 34. By means of the mounting means 34, the plate 10 can, e.g., be mechanically connected to a printed circuit board 30; see Fig. 3.

[0054] The material of the board 10 can, for example, be similar to the material of a conventional printed circuit board 30, i.e., basically also consist of glass fiber reinforced plastic (GRP), and alternatively or additionally, for example, have a higher thermal conductivity and / or a higher dielectric strength than the printed circuit board 30. The board 10 has, in the Fig. 1, the embodiments shown do not have any conductor tracks. Rather, it can be optimized for heat dissipation and / or electromagnetic shielding.

[0055] In the right half of Fig. 1 shows sections through three embodiments of the plate 10. In all three embodiments shown, the base body 12 of the plate has an optional heat transfer layer 13. The heat transfer layer 13 can comprise a plate material with high thermal conductivity and can therefore dissipate heat better than the plate material of the remaining base body 12.

[0056] In the upper first embodiment of the plate 10, a respective soldering surface 16 with the respective solder 14 is arranged in the respective cavity 20.

[0057] In the middle, second embodiment of the board 10, the left-hand soldering pad 16 is additionally electrically connected to a shielding layer 22. The shielding layer 22 is provided as a further layer of the board 10 and is arranged in the heat transfer layer 13. The shielding layer 22 extends in the heat transfer layer 13 across both cavities 20. The shielding layer 22 can, for example, comprise copper like the soldering pad 16 and can, for example, be formed as a copper layer, which can in particular be formed integrally with the soldering pad 16 or can be connected to the soldering pad 16 via vias shown vertically.

[0058] In the lower, third embodiment of the plate 10, a shielding layer 22 is also provided. As in the middle embodiment, this extends in the heat transfer layer 13 across both cavities 20. A contact 27 of the shielding layer 22 is led to the side of the plate 10 to which the cavities 20 are open. Via the contact 27, the shielding layer 22 can be electrically contacted on the surface of the plate 10 and, for example, connected to conductor tracks of a printed circuit board 30. The shielding layer 22 can, for example, comprise copper like the soldering surface 16 and, for example, be formed as a copper layer.

[0059] In Fig. 2 shows the embodiments of the plate 10 equipped with respective power semiconductors 24. Fig. 2 shows in the left half a schematic plan view of the plate 10 with the power semiconductors 24 arranged in the respective cavities 20 on the respective soldering surfaces 16. The power semiconductors 24 have switching contacts 26 which are provided for contacting with a printed circuit board 30, compare Fig. 3.

[0060] In the right half of Fig. 2 shows sections through the three embodiments of the plate 10. The power semiconductors 24 with their switching contacts 26 are arranged in the respective cavities 20 on the respective soldering surfaces 16. The power semiconductors 24 are essentially flush with the upper edges of the cavities 20. The total thickness of the plate 10 can deviate from the thickness of the power semiconductors 24 by less than 1 mm, preferably by less than 200 µm, so that the heat transfer layer 13, in particular, is less than 1 mm thick. In the area of ​​the soldering surfaces 16, the plate 10 can thus have a thickness of less than 1 mm, preferably less than 300 µm.

[0061] Fig. 3 schematically shows a first embodiment of a power semiconductor device 40, which has a printed circuit board 30 which is thermally connected to a heat sink 36 via a fastening means 34.

[0062] The illustrated first embodiment of the power semiconductor device 40 has the first embodiment of the plate 10. The plate 10 can, as in the embodiments of Fig. 1 and Fig. 2, also have recesses 18. These recesses 18 can then serve alternatively or additionally to accommodate the fastening means 34 or further fastening means 34.

[0063] The circuit board 30 is populated with components on two sides. On one side, the circuit board 30 is populated with an optional THT component 28 and several SMD components 32. On the other side, the circuit board 30 is populated with the power semiconductor 24. The switching contacts 26 of the power semiconductor 24 are contacted with the circuit board 30, e.g., by a soldering process, as described with reference to Fig. 6 described.

[0064] The power semiconductors 24 of the Fig. The first embodiment of the power semiconductor arrangement 40 shown in Figure 3 are mounted on the first embodiment of the board 10. The underside of the board 10, optionally designed as a heat transfer layer 13, is thermally connected to the heat sink 36 via thermal paste 38. The power semiconductors 24 are designed as TSC SMD power semiconductors 24. On their contacting side (in Fig. 3 on the top side) they are connected to the circuit board 30 with their switching contacts 26. On their heat-dissipating side (in Fig. 3 on the underside) they are connected to the plate 10 via the soldering surfaces 16.

[0065] The connection of the power semiconductors 24 to the circuit board 30 and the board 10 can be made by means of one of the Fig. 6 described procedures.

[0066] Fig. 4 schematically shows a second embodiment of the power semiconductor arrangement 40, which has the printed circuit board 30, which is mechanically and thermally connected to the heat sink 36 via the fastening means 34.

[0067] The illustrated second embodiment of the power semiconductor device 40 has the second embodiment of the plate 10, compare Fig. 1 and Fig. 2 in the middle right. The plate 10 can, as in the embodiments of Fig. 1 and Fig. 2, have recesses 18. These recesses 18 can then serve alternatively or additionally to accommodate the fastening means 34 or further fastening means 34.

[0068] The circuit board 30 is populated with components on two sides. On one side, the circuit board 30 is populated with an optional THT component 28 and several SMD components 32. On the other side, the circuit board 30 is populated with the power semiconductor 24. The switching contacts 26 of the power semiconductor 24 are contacted with the circuit board 30, e.g., by a soldering process, as described with reference to Fig. 6 described.

[0069] The power semiconductors 24 of the Fig. The second embodiment of the power semiconductor arrangement 40 shown in Figure 4 are mounted on the second embodiment of the board 10, which has the shielding layer 22, which is connected to one of the soldering surfaces. The shielding layer 22 is arranged in the heat transfer layer 13. The shielding layer 22 and the heat transfer layer 13 run longitudinally to one another and are in particular parallel to one another. The board 10 is mechanically and thermally connected to the heat sink 36 via thermal paste 38. The power semiconductors 24 are designed as TSC SMD power semiconductors 24. On their contacting side, they are connected to the printed circuit board 30 via their switching contacts 26, in particular to conductor tracks (not shown) of the printed circuit board 30. On their heat-dissipating side, they are connected to the board 10 via the soldering surfaces 16.

[0070] The shielding layer 22 is preferably electrically connected to one of the DC voltage potentials DC+, DC-, or the center potential M in order to divert capacitively coupled interference currents (=common-mode interference) that can occur between the switching node potential of the respective power semiconductor 24 and the ground potential. By connecting the shielding layer 22 to M, DC-, or DC+, the potential of the shielding layer 22 hardly varies with respect to ground, so that common-mode interference can be significantly reduced.

[0071] In the illustrated second embodiment of the plate 10, the connection of the shielding layer 22 to a static potential M, DC- or DC+ is effected via the soldering surface 16 and the power semiconductor 24 connected thereto in a common plate 10 with a plurality of power semiconductors 24. In this second embodiment, the potential switched by the power semiconductor 24 connected to the shielding layer 22 is preferably a static potential, while the potential switched by the further power semiconductor 24 arranged on the same plate 10 can be a jumping potential.By extending the static potential of the power semiconductor 24 connected to the shielding layer 22 as a “stabilized” shielding layer 22 under the other power semiconductor(s) 24, the jumping potential of the other power semiconductor 24 is shielded from the heat sink 36, which is at ground potential, and capacitive interference currents can be diverted via the shielding layer 22 and thereby reduced.

[0072] Losses at the power semiconductors 24 can be reduced and the thermal path shortened by inserting suitable additional layers into the plate 10. For example, thermally high-performance prepregs can be selected as an insulating glass fiber resin layer. Prepregs, short for preimpregnated fibers, are semi-finished textile fiber products that are pre-impregnated with special reactive resins. The shielding layer 22 can also be used for heat spreading.

[0073] The connection of the power semiconductors 24 to the circuit board 30 and the board 10 can be made by means of one of the Fig. 6 described procedures.

[0074] Fig. 5 schematically shows a third embodiment of a power semiconductor device 40, which has the printed circuit board 30, which is mechanically and thermally connected to the heat sink 36 via the fastening means 34.

[0075] The illustrated third embodiment of the power semiconductor device 40 has the third embodiment of the plate 10, compare Fig. 1 and Fig. 2 bottom right. The plate 10 can, as in the embodiments of Fig. 1 and Fig. 2, also have recesses 18. These recesses 18 can then serve alternatively or additionally to accommodate the fastening means 34 or further fastening means 34.

[0076] The circuit board 30 is populated with components on two sides. On one side, the circuit board 30 is populated with an optional THT component 28 and several SMD components 32. On the other side, the circuit board 30 is populated with the power semiconductor 24. The switching contacts 26 of the power semiconductor 24 are contacted with the circuit board 30, e.g., by a soldering process, as described with reference to Fig. 6 described.

[0077] The power semiconductors 24 of the Fig. The third embodiment of the power semiconductor arrangement 40 shown in Figure 4 are mounted on the third embodiment of the board 10, which has the shielding layer 22, which has a contact with the edge of the board 10 and is preferably electrically contacted with the printed circuit board 30. The shielding layer 22 can be arranged in a heat transfer layer 13. The shielding layer 22 and the heat transfer layer 13 run longitudinally to one another and are in particular parallel to one another. The board 10 is mechanically and thermally connected to the heat sink 36 via thermal paste 38. The power semiconductors 24 are designed as TSC SMD power semiconductors 24. On their contacting side, they are connected to the printed circuit board 30 via their switching contacts 26, in particular to conductor tracks (not shown) of the printed circuit board 30. On their heat-dissipating side, they are connected to the board 10 via the soldering pads 16.

[0078] The shielding layer 22 is connected via a contact 27, which is implemented, for example, as a via in the board 10, to a direct voltage potential DC+, DC-, or a center potential M of the circuit on the printed circuit board 30 in order to divert capacitively coupled interference currents (=common-mode interference) that can occur between the switching node potential of the respective power semiconductor 24 and the generally grounded heat sink 36. The potential of the shielding layer 22 is connected to M, DC-, or DC+ and is thus selected such that it hardly varies with respect to ground, so that common-mode interference can be significantly reduced.

[0079] In the third embodiment shown, the connection of the shielding layer 22 to M, DC- or DC+ is made directly via the contact 27. The shielding layer 22 is therefore a potential-stabilized layer in the plate 10, which has the effect of shielding the potential of the cooling surface, i.e. the heat-dissipating side of the TSC SMD power semiconductor 24. The potential of the heat-dissipating side of the TSC SMD power semiconductor 24 can, for example, be a jumping switching node potential of a half-bridge of the inverter in an inverter. This jumping potential can be shielded by the shielding layer 22 from the heat sink 36, which is, for example, at ground potential. Capacitive interference currents can also be diverted more directly via the shielding layer 22 than, for example, with conventional filter components in DC or AC lines of an inverter, which can therefore be dimensioned more cost-effectively and / or smaller.

[0080] Losses at the power semiconductors 24 can be reduced and the thermal path can be shortened by inserting suitable additional layers into the plate 10. For example, thermally high-performance prepregs can be selected as an insulating glass fiber resin layer. The shielding layer 22 can also be used for heat spreading.

[0081] The connection of the power semiconductors 24 to the circuit board 30 and the board 10 can be made by means of one of the Fig. 6 described procedures.

[0082] Fig. 6 schematically shows embodiments of a method for manufacturing the power semiconductor device 40.

[0083] In a first embodiment of the method, in A), the board 10 provided with solder 14 on the soldering pads 16 can be placed onto the power semiconductors 24, e.g., using a pick-and-place machine. Alternatively, the power semiconductors 24 can be placed onto the board 10. The solder 14 can be, e.g., solder paste, and the soldering pads 16 can be, e.g., SMT adapter pads printed with the solder paste.

[0084] In B), the soldering surfaces 16 can then be connected to the power semiconductors 24, for example by means of a reflow soldering process.

[0085] In C), the circuit board 30 can be equipped with the SMD components 32 on one side and with the power semiconductors 24, e.g. TSC SMD power semiconductors 24, on the other side.

[0086] In D), the assembled SMD components 32 and power semiconductors 24 can then be contacted with the printed circuit board 30 by a soldering process, e.g., a reflow soldering process.

[0087] In a second embodiment of the method, in C), the printed circuit board 30 can be equipped with the SMD components 32 on one side and with the power semiconductors 24, e.g., TSC SMD power semiconductors 24, on the other side.

[0088] In D), the assembled SMD components 32 and power semiconductors 24 can be contacted with the printed circuit board 30 by a soldering process, e.g., a reflow soldering process.

[0089] In A), the board 10, which has solder 14 applied to the soldering pads 16, can then be placed onto the power semiconductors 24, e.g., using a pick-and-place machine. Alternatively, the power semiconductors 24 can be placed onto the board 10. The solder 14 can be solder paste, for example, and the soldering pads 16 can be SMT adapter pads printed with the solder paste, for example.

[0090] In B), the soldering surfaces 16 can then be connected to the power semiconductors 24, for example by means of a reflow soldering process.

[0091] In the third embodiment of the method, in A), the board 10 is first placed on the power semiconductors 24, or the power semiconductors 24 are placed on the board 10. In C), the printed circuit board 30 is then populated with the SMD components 32 on one side and with the power semiconductors 24, e.g., TSC SMD power semiconductors 24, on the other side.

[0092] In B), D) a reflow soldering process then takes place, which connects the components to the board 10 and the circuit board 30.

[0093] In the fourth embodiment of the method, in C), the printed circuit board 30 is first populated with the SMD components 32 on one side and with the power semiconductors 24, e.g., TSC SMD power semiconductors 24, on the other side. In A), the board 10 is then placed on the power semiconductors 24, or the power semiconductors 24 are placed on the board 10.

[0094] In B), D) a reflow soldering process then takes place, which connects the components to the board 10 and the circuit board 30. LIST OF REFERENCE SYMBOLS 10 plates 12 basic bodies 13 Heat transfer layer 14 lots 16 Soldering surface (e.g. copper layer) 18 Recess 20 cavities 22 shielding layers 24 power semiconductors 26 switching contacts 27 Contacting the shielding layer 28 THT components 30 circuit board 32 SMD components 34 assembly materials 36 heat sinks 38 thermal paste 40 power semiconductor arrangement A), B), C), D) Process steps QUOTES CONTAINED IN THE DESCRIPTION

[0000] This list of documents submitted by the applicant was generated automatically and is included solely for the convenience of the reader. This list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions. Cited patent literature

[0000] DE 102019133377A1

[0002] DE 102021110251A1

[0003]

Claims

[1] Plate (10) having at least one soldering surface (16), wherein the plate (10) is provided for fitting with a power semiconductor (24), wherein for assembly, the soldering surface (16) is connected to the power semiconductor (24) by a soldering process, wherein a base body (12) of the plate (10) comprises at least one plate material with a high thermal conductivity and / or a high electrical dielectric strength and wherein the plate (10) is designed to have a heat-dissipating and / or electromagnetically shielding effect with respect to the power semiconductor (24). [2] Board (10) according to claim 1, wherein the soldering surface (16) is provided for assembly with an SMD power semiconductor. [3] Board (10) according to claim 2, wherein the soldering surface (16) is provided for connection to a side of the SMD power semiconductor which is provided for heat dissipation. [4] Plate (10) according to claim 3, wherein the side of the SMD power semiconductor provided for heat dissipation is opposite a contacting side with switching contacts (26) of the SMD power semiconductor. [5] Board (10) according to one of the preceding claims, wherein the board (10) has a plurality of separate soldering surfaces (16) which are provided for connection to different power semiconductors (24). [6] Plate (10) according to one of the preceding claims, wherein the plate has at least one recess (18) for receiving a respective mounting means, wherein the respective mounting means are provided in particular for connecting the plate (10) to a printed circuit board (30) and a heat sink. [7] Plate (10) according to one of the preceding claims, wherein the at least one plate material comprises ceramic, plastic and / or composite material. [8] Plate (10) according to one of the preceding claims, wherein the soldering surface (16) comprises a copper layer. [9] Plate (10) according to one of the preceding claims, wherein the soldering surface (16) is arranged in a cavity (20). [10] Plate (10) according to one of the preceding claims, wherein the thickness of the plate (10) differs by less than 1 mm, in particular by less than 300 µm, from the thickness of the power semiconductor (24), wherein the plate (10) can have different thicknesses in its course. [11] Plate (10) according to one of the preceding claims, wherein the thickness of the plate (10) at the soldering surfaces (16) is less than 1 mm, in particular less than 200 µm. [12] Plate (10) according to one of the preceding claims, wherein the plate (10) consists essentially of composite material, in particular of an epoxy resin-glass fabric composite material and has several layers with different thermal conductivities. [13] Plate (10) according to claim 12, wherein the plate has a shielding layer (22) which has an electromagnetic shielding effect, wherein the shielding layer (22) in particular comprises a metal, e.g., copper. [14] Plate (10) according to claim 13, wherein the shielding layer (22) is arranged in the plate (10) between the soldering surface (16) and the side of the plate (10) opposite the power semiconductor (24). [15] Board (10) according to claim 14, wherein the board (20) has at least two soldering surfaces (16), wherein the shielding layer (22) extends over the at least two soldering surfaces (16). [16] Plate (10) according to claim 14 or 15, wherein the plate (10) has an electrical contact (27) to the shielding layer (22) on the side of the power semiconductor (24). [17] Board (10) according to claim 14 or 15, wherein the shielding layer (22) is electrically connected to one of the soldering surfaces (16). [18] Plate (10) according to claim 17, wherein the shielding layer (22) is designed as a single piece with the one soldering surface (16) as a copper layer. [19] Plate (10) according to one of the preceding claims, wherein the soldering surface (16) is provided with a solder (14), in particular in that the soldering surface (16) is printed with solder paste or has a preformed solder piece. [20] Power semiconductor arrangement (40) comprising at least one power semiconductor (24) and a plate (10) equipped therewith according to one of the preceding claims and at least one heat sink thermally connected to the plate. [21] Power semiconductor arrangement (40) according to claim 20, further comprising a printed circuit board (30) to which the at least one power semiconductor (24) is electrically conductively connected via its switching contacts (26). [22] Power semiconductor arrangement (40) according to claim 20 or 21, wherein the at least one power semiconductor (24) is connected via a solder (14) to the soldering surface (16) in at least one cavity (20) of the plate (10) and wherein the power semiconductor (24) is electrically conductively connected to the printed circuit board (30) on the side opposite the plate (10), wherein the plate (10) rests against the printed circuit board (30) in regions different from the at least one cavity (20). [23] Power semiconductor arrangement (40) according to one of claims 20 to 22, wherein the shielding layer (22) is electrically connected to a potential of the power semiconductor arrangement (40) which is substantially at rest during operation with respect to the potential of an associated heat sink (36). [24] Method for producing a power semiconductor arrangement (40), wherein the power semiconductor arrangement (40) comprises at least one SMD power semiconductor and a plate (10) with at least one soldering surface (16), and wherein a base body (12) of the plate (10) comprises at least one plate material with a high thermal conductivity and / or a high dielectric strength, and wherein the plate (10) is designed to have a heat-dissipating and / or electromagnetically shielding effect with respect to the SMD power semiconductor, the method comprising: A) Equipping the plate (10) with the at least one SMD power semiconductor by placing the SMD power semiconductor on the soldering surface (16) or equipping the plate (10) by placing the plate (10) with the soldering surface (16) on the SMD power semiconductor. [25] Method according to claim 24, wherein after the assembly in A) in B) the SMD power semiconductor is connected to the soldering surface (16) by means of a solder (14) arranged on the soldering surface (16) by a soldering process. [26] Method according to claim 25, wherein the soldering surface (16) is connected to a side of the SMD power semiconductor which is provided for heat dissipation of power loss of the SMD power semiconductor, wherein the side of the SMD power semiconductor provided for heat dissipation is opposite a contacting side with switching contacts (26) of the SMD power semiconductor. [27] Method according to one of claims 24 to 26, further comprising: C) Equipping a circuit board (30) with the SMD power semiconductor by placing the at least one SMD power semiconductor on the circuit board (30). [28] Method according to claim 27, wherein after the assembly in C) in D) the SMD power semiconductor is connected to the circuit board (30) by a soldering process. [29] Method according to claim 28, wherein the soldering process in B) and / or D) comprises a reflow soldering process. [30] Method according to claim 28 or 29, wherein the soldering process in B) is carried out before or after the soldering process in D) or B) and D) are carried out in one step. [31] A method according to any one of claims 27 to 30, wherein C) is carried out before or after A). [32] Inverter with a power semiconductor arrangement (40) according to one of claims 20 to 23, wherein the power semiconductor arrangement (40) has a DC / DC or DC / AC circuit which has the at least one SMD power semiconductor. [33] Inverter according to claim 32, wherein the inverter has a rated electrical power of at least one kilowatt and the at least one SMD power semiconductor is designed as a power switch for switching a maximum electrical current of at least 10 amperes at a maximum voltage of at least 500 volts. [34] Inverter according to claim 33, wherein the plate (10) has at least two power switches designed as SMD power semiconductors. [35] Inverter according to claim 34, wherein one of the power switches is designed to switch a static potential which is connected to its switching contacts (26) and is electrically connected to the shielding layer (22) on its side intended for heat dissipation, wherein the other of the power switches is designed to switch a variable potential, in particular a potential which jumps between different potential values during operation of the inverter. [36] Inverter according to claim 35, wherein the shielding layer (22) extends over the power switches.

Citation Information

Patent Citations

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