SILICON CARBIDE DEVICE AND MANUFACTURING PROCESS

Abstract

Method (300; 400) for forming an interfacial layer on a silicon carbide body, wherein the silicon carbide body comprises a source region (12) of a first conductivity type and a body region (13) of a second conductivity type, wherein the method comprises: Removing (310; 410) an oxide layer from a surface of a silicon carbide body to obtain a silicon carbide surface (303); After removing the oxide layer, depositing (320; 420) an interface layer (210) directly onto the silicon carbide surface (303), wherein the interface layer (210) has a thickness (t) of less than or equal to 15 nm; Formation (330; 430) of an electrical insulator (22; 220) over the interface layer (210); and Formation (340; 440) of a gate electrode (21) over the electrical insulator, wherein the deposition of the interface layer (210) comprises the deposition (320) of a material by means of atomic layer deposition, hereinafter referred to as ALD, on the silicon carbide surface (303), the deposited material forms the interface layer, and wherein the separation (320) of the material by means of ALD comprises: Deposition of a first compound by ALD directly on the silicon carbide surface (303) for a first time period and Deposition of a second compound via ALD on the silicon carbide surface for a second time period, where the first time period begins before the second time period and the ratio of the concentration of the first compound to the concentration of the second compound varies during the ALD process.

Description

TECHNICAL AREA

[0001] Examples of the present disclosure relate to a silicon carbide device, in particular to a silicon carbide device with a gate electrode and an electrical insulator arranged between the gate electrode and a silicon carbide body of the silicon carbide device, and to a corresponding method for forming an electrical insulator. BACKGROUND

[0002] In a transistor, the gate electrode is typically electrically isolated from the source, body, and drift / drain regions of the transistor and is located adjacent to the body region. The source region is typically connected to a source terminal, and the drain region to a drain terminal. For example, reference is made to the disclosures in US 2012 / 0326163A1, US 2015 / 0084068A1, and US 2023 / 0084127A1. In a silicon carbide device, it may be desirable to adapt the electrical insulator between the gate electrode and the silicon carbide body. SUMMARY

[0003] The invention is defined in the independent patent claims. Further developments are the subject of the dependent patent claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] The present disclosure is illustrated by way of example and is not limited to the depictions in the accompanying drawings, in which the same reference numerals refer to similar or identical elements. The elements in the drawings are not necessarily to scale with each other. The features of the various examples shown may be combined, provided they are not mutually exclusive. Fig. shows a vertical cross-sectional view of a silicon carbide device, in particular a vertical silicon carbide device with a planar gate. Fig. shows a vertical cross-sectional view of a silicon carbide device, in particular a vertical silicon carbide device with a gate arranged in a trench according to the present disclosure. Fig. shows a typical profile of carbon concentration in an interface layer. Fig. shows a profile of a carbon concentration with an interface layer according to the present disclosure. Fig. shows a profile of a carbon concentration with an interface layer according to the present disclosure. Fig. shows a vertical cross-sectional view of an electrical insulator of a silicon carbide device arranged between a silicon carbide body and a gate electrode according to the present disclosure. Fig. shows a vertical cross-sectional view of an electrical insulator of a silicon carbide device arranged between a silicon carbide body and a gate electrode according to the present disclosure. Fig. discloses a method for forming an electrical insulator and a gate electrode on a silicon carbide body of a silicon carbide device according to the present disclosure. Fig. show vertical cross-sectional views of an electrical insulator of a silicon carbide device arranged between a silicon carbide body and a gate electrode according to the present disclosure. Fig. show vertical cross-sectional views of a silicon carbide device, in particular a lateral silicon carbide device according to the present disclosure. Fig. show vertical cross-sectional views of a silicon carbide device, in particular a vertical silicon carbide device according to the present disclosure. Fig. discloses a method for forming an electrical insulator and a gate electrode on a silicon carbide body of a silicon carbide device according to the present disclosure. Fig. show vertical cross-sectional views of an electrical insulator of a silicon carbide device arranged between a silicon carbide body and a gate electrode according to the present disclosure. Fig. show vertical cross-sectional views of a silicon carbide device, in particular a lateral silicon carbide device according to the present disclosure. Fig. show vertical cross-sectional views of a silicon carbide device, in particular a vertical silicon carbide device according to the present disclosure. DETAILED DESCRIPTION

[0005] The following detailed description refers to the accompanying drawings, which form part of this document and illustrate specific embodiments in which a silicon carbide device can be used. It is understood that other embodiments may also be used and structural or logical modifications may be made without affecting the scope of this disclosure. For example, features illustrated or described for one embodiment may be used on or in combination with other embodiments to obtain yet another embodiment. It is intended that this disclosure includes such modifications and variations. The examples are described in specific language, which should not be interpreted as limiting the scope of the attached claims.The drawings are not to scale and are for illustrative purposes only.

[0006] Corresponding elements are designated with the same reference numerals in the various drawings, unless otherwise specified.

[0007] The terms "with," "containing," "including," "comprehensive," and the like are open-ended, indicating the presence of certain structures, elements, or features but not excluding the presence of additional elements or features. The articles "a," "an," and "the" include both the plural and the singular unless the context clearly indicates otherwise.

[0008] The term "electrically connected" can describe a permanent ohmic contact with low resistance between electrically connected elements, e.g. a direct contact between the elements in question or a low-resistance connection via a metal and / or heavily doped semiconductor material.

[0009] The term "electrically coupled" can include the possibility that one or more intermediate elements suitable for signal and / or power transmission can be connected between the electrically coupled elements, e.g., elements that are controllable to temporarily establish a low-impedance coupling in a first state and a high-impedance electrical decoupling in a second state.

[0010] The term "ohmic contact" can describe a non-rectifying electrical junction between two electrically connected elements. The ohmic contact can exhibit a linear or nearly linear current-voltage characteristic (IV), e.g., a linear IV curve in the first and third quadrants of the IV diagram according to Ohm's law.

[0011] In the figures, the relative doping concentrations are indicated by a "-" or "+" next to the doping type "n" or "p". For example, "n-" signifies a doping concentration lower than that of an "n" doping area, while an "n+" doping area has a higher doping concentration than an "n" doping area. Doping areas with the same relative doping concentration do not necessarily have the same absolute doping concentration. For example, two different "n" doping areas can have the same or different absolute doping concentrations.

[0012] Two adjacent doping regions of the same conductivity type but with different dopant concentrations can form a unipolar transition, e.g., an n / n+ or p / p+ transition along an interface between the two doping regions. At the unipolar transition, a dopant concentration profile orthogonal to the unipolar transition may exhibit a step or inflection point where the dopant concentration profile changes from concave to convex or vice versa.

[0013] The ranges specified for physical quantities include the limit values. For example, a range for a parameter y is from a to ba ≤ y ≤ b. The same applies to ranges with a limit value such as "at most" and "at least".

[0014] The term "on" should not be understood as meaning "directly on". If one element is positioned "on" another element (e.g., a layer "on" another layer or "on" a substrate), another component (e.g., another layer) can be positioned between the two elements (e.g., another layer can be positioned between a layer and a substrate if the layer is "on" the substrate).

[0015] The terms “power semiconductor device” and “SiC power device” can refer to semiconductor devices with a high-voltage blocking rating of at least 30 V, e.g. 100 V, 600 V, 1.6 kV, 3.3 kV or more, and with a nominal inrush current or forward current of at least 1 A, e.g. 10 A or more.

[0016] A silicon carbide device can comprise a transistor cell with a gate electrode and a source region. The source region can be formed in a silicon carbide body and has a conductivity type.

[0017] The silicon carbide body can have two substantially parallel principal faces (e.g., a first principal face and a second principal face) that may be of approximately the same shape and size, as well as a side face connecting the edges of the two principal faces. The silicon carbide body can be, for example, a cylinder or a polygonal prism, such as a rectangular or hexagonal prism, with or without rounded edges. The silicon carbide body can have a surface extent along two horizontal directions and a thickness along a vertical direction perpendicular to the horizontal directions. The horizontal directions are hereafter also referred to as lateral directions.

[0018] The silicon carbide body can be made of single-crystal silicon carbide, for example, 15R-SiC (silicon carbide of the 15R polytype), or silicon carbide with a hexagonal polytype, such as 2H-SiC, 4H-SiC, or 6H-SiC. In addition to the main constituents silicon and carbon, the silicon carbide body may contain dopants, such as nitrogen (N), phosphorus (P), beryllium (Be), boron (B), aluminum (Al), and / or gallium (Ga). The silicon carbide body may also contain other impurities, such as hydrogen, fluorine, and / or oxygen.

[0019] The transistor cell can be a transistor cell with an insulated gate and an insulated gate electrode, or it can contain such a component. The gate electrode can be a planar gate electrode, formed on a primary surface of the silicon carbide body, or a trench gate electrode, formed in a trench extending from a primary surface into the silicon carbide body. A combination of a planar and a trench gate electrode is also possible.

[0020] The silicon carbide body can further comprise a drain / drift region. At least part of the drain / drift region can have the same conductivity type as the source region and serve as the drain of the transistor cell.

[0021] The transistor cell can further comprise a body region of complementary conductivity types, such as those of the source region and the drift / drain region. The body region can spatially separate the source region and the portion of the drain / drift region. A gate dielectric can be formed between the gate electrode and the body region. An electric potential applied to the gate electrode controls the distribution of mobile charge carriers in the body region through a field effect.

[0022] Fig. Figure 1 shows a vertical cross-sectional view of a silicon carbide device 1, in particular a vertical silicon carbide device with a planar gate structure. The silicon carbide device 1 comprises a silicon carbide body 100 and one or more device cells 10a, 10b integrated into the silicon carbide body 100. The device cells are hereinafter also referred to as transistor cells. Fig. Only one device cell 10 is shown. However, the silicon carbide device 1 can contain more than two device cells, for example, several tens, several hundred, several thousand, several ten thousand, several hundred thousand, or even several million device cells integrated into a silicon carbide body 100. As shown in Fig. As shown, transistor cells 10a and 10b each comprise a source region 12, a body region 13 and a drift / drain region 14. The body region 13 can be arranged between the source region 12 and the drift / drain region 14.

[0023] As in Fig. As shown, the device cell 10a, 10b further comprises a gate electrode 21, which is arranged on the top surface of the silicon carbide device 1 (e.g., over parts of the body region 13) and is electrically insulated from the silicon carbide body 100, including the source region 12, the body region 13, and the drift / drain region 14, by an electrical insulator 22. The electrical insulator 22 can, for example, be made of silicon oxide (SiO2) or a high-k material and be arranged between the gate electrode 21 and the silicon carbide body 100. In some examples, the electrical insulator 22 can also extend over the source region 12 and the body region 13 (e.g., as a layer covering the silicon carbide body 100). The gate electrode 21 of the device cell 10 can have a surface 21a (e.g. a flat surface) that is in contact with the electrical insulator 22.The body area 13 of the device cell 10 can adjoin the electrical insulator 22, so that the gate electrode 21 is arranged above the electrical insulator 22 and above the body area 13.

[0024] As in Fig. As shown, an electrically insulating layer (insulating layer) 51 can cover the electrical insulator 22 and the gate electrode 21. The insulating layer 51 can have contact openings 52a, 52b where the insulating layer 51 and the electrical insulator 22 can expose the source region 12a of device cell 10a and the source region 12b of device cell 10b. A first and a second source electrode 41a, 41b can be formed within or on the insulating layer 51 and in the contact openings 52a, 52b. The source electrodes 41a, 41b can be electrically insulated from the gate electrode 21 by the insulating layer 51 and connect the source regions 12a and 12b with a source terminal S (in Fig. (only schematically represented) electrically connect or form the source terminal S. The source electrode 41 can be made of or contain a material such as titanium (Ti), platinum (Pt), nickel (Ni), aluminum (Al), copper (Cu), metal alloys (e.g., nickel alloys), or similar.

[0025] As in Fig. As shown, the silicon carbide device 1 can also have a drain / drift region 14 adjacent to the body region 13. A drain electrode (not shown) can be formed on a second main surface of the silicon carbide body 100. The drain electrode can be made of or contain a material such as titanium (Ti), platinum (Pt), nickel (Ni), aluminum (Al), copper (Cu), metal alloys (e.g., nickel alloys), or the like.

[0026] Several device cells 10a, 10b can be connected in parallel by connecting the individual source regions 12a, 12b to the source terminal S via the source electrodes 41a and 41b, the individual drain regions 14 to the drain terminal, and the individual gate electrodes 21 electrically to a common gate terminal G. The connection of the gate electrodes 21 to the gate terminal G is shown in Fig. only shown schematically.

[0027] The silicon carbide device 1 from Fig. is a MOS transistor device that can be implemented as an n-type or p-type device. In an n-type device, the source region 12 and the drain / drift region 14 are n-doped, while the body region 13 is p-doped. In a p-type device, the source region 12 and the drain / drift region 14 are p-doped, while the body region 13 is n-doped.

[0028] The silicon carbide device 1 from Fig. It can be operated like a conventional MOS transistor by applying a load voltage between the drain and source terminals and a control potential to the gate electrode G. This operating principle is briefly explained using an n-type silicon carbide device 1. However, this operating principle also applies to a p-type device, although in the case of a p-type device, the polarities of the voltages explained below must be reversed. The silicon carbide device 1 is in a forward operating mode when a load voltage is applied between the drain and source terminals. This voltage is positive in an n-type device. In forward operating mode, the MOS transistor can be switched on and off by the control potential applied to the gate terminal G.The MOS transistor is switched on (in an on-state) when the control potential applied to the gate terminal G creates conducting channels in the body region 13 between the source region 12 and the drain / drift region 14, and the MOS transistor is switched off (in an off-state) when the conducting channels in the body regions 13 are open. The absolute value of the control potential that switches the transistor on or off depends on the specific type of transistor device.

[0029] The device cell 10 comprises a channel region which is a region of the body region 13 along the electrical insulator 22. The channel region along the electrical insulator 22 allows the flow of charge carriers from the source region 12 to the drain / drift region 14 when the transistor device is in the on-state.

[0030] The doping concentration of the drain / drift area 14 is, for example, between 1E14 cm-3 and 1E17 cm -3 (in the drift area) and for example over 1E19 cm -3 (in the drain area). The doping concentration of body areas 13, for example, is between 5 x 16 cm³. -3 and 5E17 cm -3 The doping concentration of source area 12 is, for example, higher than 1E19 cm³. -3 .

[0031] The gate electrode 21 can be an elongated gate electrode 21. The gate electrode 21 can, for example, be connected to a gate terminal G at one or more points shown in the vertical cross-sectional view of Fig. are not visible. The source electrode 41a, 41b can cover the insulating layer 51 in an area where the contact opening 52a, 52b is located and can be electrically connected to the source area 12a, 12b in the contact opening 52a, 52b. A gate terminal electrode (in Fig. (1A not shown) can be spaced apart from the source electrode 41 and the drain electrode 43 in the first lateral direction x and cover the insulating layer 51 in the areas where a contact opening (in Fig. 1A not shown) is arranged for the gate electrode 21. The gate terminal electrode 42 can be connected to the gate electrodes 21 in the contact opening (in Fig. 1A (not shown) be electrically connected.

[0032] Fig. Figure 1 shows a vertical cross-sectional view of a silicon carbide device 1, in particular a vertical silicon carbide device and especially a vertical silicon carbide power device (optionally with an integrated diode). The silicon carbide device 1 comprises a silicon carbide body 100 and one or more device cells 101, 102 integrated into the silicon carbide body 100. The device cells are hereinafter also referred to as transistor cells. Fig. Only two device cells 101, 102 are shown. However, the silicon carbide device 1 can comprise more than two device cells, for example, several dozen, several hundred, several thousand, several ten thousand, several hundred thousand or even several million device cells integrated into a silicon carbide body 100.

[0033] In Fig. The two device cells 101 and 102 are identified with different reference numerals, while identical features of the individual device cells 101 and 102 are identified with the same reference numerals. As in Fig. As shown, each transistor cell 101, 102 comprises a drift region 11, a source region 12, and a body region 13. The body region 13 can be arranged between the source region 12 and the drift region 11. Each device cell 101, 102 can further (optionally) comprise a diode region 30 and a pn junction formed between the diode region 30 and the drift region 11. In the embodiment of Fig. The individual device cells 101, 102 share the drift area 11. That is, the individual device cells 101, 102 have a common drift area 11.

[0034] As in Fig. As shown, each device cell 101, 102 further comprises a gate electrode 21 arranged in a trench and electrically insulated from the silicon carbide body 100, including the body region 13, the diode region 30, and the drift region 11, by an electrical insulator 22. The electrical insulator 22 can, for example, be made of silicon oxide (SiO2) or a high-k material. The trench containing the gate electrode 21 of each device cell 101, 102 has a first side wall 1101, a second side wall 1102 opposite the first side wall 1101, and a bottom 1103. The body area 13 of each device cell 101, 102 borders the first side wall 1101 of the corresponding trench, the diode area 30 borders the second side wall 1102 of the corresponding trench, and the pn junction between the drift area 11 and the diode area 30 borders the bottom 1103 of the corresponding trench.

[0035] As in Fig. As shown, the individual diode region 30 of a device cell, e.g., device cell 101, can extend from a first surface 101 of the silicon carbide body 100 adjacent to the source region 12 and the body region 13 of a neighboring device cell, e.g., device cell 102, into the drift region 11, where the pn junction is formed. An electrically insulating layer 51 can cover the first surface 101 and the gate electrodes 21. The insulating layer 51 can have contact openings 52 through which the insulating layer 51 can expose the diode regions 32 and the source regions 12 of the individual device cells 101, 102. A source electrode 41 can be formed on the insulating layer 51 and in the contact openings 52. The source electrode 41 can be electrically isolated from the gate electrodes 21 by the insulating layer 51, and the individual diode regions 30 and the individual source regions 12 can be connected with a source terminal S (in Fig. (shown only schematically) electrically connect or form the source terminal S. Optionally, the source electrode 41 can comprise a first source electrode layer 411, which electrically contacts the diode regions 30 and the source regions 12, and a second source electrode layer 412, which electrically connects the first source electrode layer 411. The second source electrode layer 412 can be connected to the source terminal S or form the source terminal S of the silicon carbide device 1. The first electrode layer 411 can, for example, contain titanium (Ti), platinum (Pt), nickel alloys, or similar materials. The second electrode layer 412 can, for example, contain aluminum (Al), copper (Cu), or similar materials.

[0036] As in Fig. As shown, the silicon carbide device 1 can further comprise a drain region 14 adjacent to the drift region 11. Optionally, a field-stop region (not shown) of the same doping type as the drift region 11, but with a higher doping concentration in the drift region 11, is arranged between the drift region 11 and the drain region 14. The drain region 14 can be electrically connected to a drain terminal D (in Fig. (only shown schematically). The individual device cells 101, 102 can share a drain area 14. That is, there can be a common drain area 14 for the individual device cells 101, 102.

[0037] The individual device cells 101, 102 can be connected in parallel by connecting the individual source areas 12 to the source terminal S via the source electrode 41, by using the drain area 14 jointly and connecting the drain area 14 to the drain terminal D, and by electrically connecting the individual gate electrodes 21 to a common gate terminal G.

[0038] The silicon carbide device 1 in Fig. is a MOS transistor device with an integrated diode. The transistor device can be implemented as an n-type or a p-type device. In an n-type device, the source regions 12 and the drift region 11 are n-doped, while the body region 13 is p-doped. In a p-type device, the source regions 12 and the drift region 11 are p-doped, while the body region 13 is n-doped.

[0039] Furthermore, the transistor can be implemented as a MOSFET or an IGBT. In a MOSFET, the drain region 14 has the same doping type as the source regions 12 and the drift region 11, while in an IGBT, the drain region 14 has a doping type that is complementary to the doping type of the source regions 12 and the drift region 11. In an IGBT, the drain region 14 is also referred to as the collector region.

[0040] The diode regions 30 can have the same doping type as the body regions 13, i.e., a doping type complementary to the doping type of the drift region 11. Since the diode region 30 of a device cell, e.g., device cell 101 in Fig. , to the body area 13 of an adjacent fixture cell, e.g., fixture cell 102 in Fig. Adjacent to the drift region 11, the body region 13 of each device cell is electrically connected to the source electrode 41 via the diode region 30 of an adjacent device cell. Optionally, each diode region 30 comprises two differently doped silicon carbide regions: a first region 31, which adjoins the drift region 11 and forms the pn junction with the drift region 11, and a second region 32, which electrically connects the first region 31 to the source electrode 41. The second region 32, which is also referred to as the contact region, can have a higher doping concentration than the first region 31. In the embodiment of Fig. The contact area 32 of a fixture cell, such as the fixture cell 101 in Fig. , adjoin the second side wall of the corresponding trench and the body area 13 of the adjacent device cell, such as device cell 102 in Fig. , connect electrically to the source electrode 41.

[0041] The diode region 30 of each cell 101, 102 can form a diode with the drift region 11 and the drain region 14. A circuit symbol for this diode is also shown in Fig. depicted (the polarity of the in Fig. The circuit symbol shown refers to an n-type silicon carbide device; for a p-type device, the polarity is reversed. The respective pn junctions formed between the diode regions 30 of the individual device cells 101, 102 and the drift region 11 are connected in parallel and in parallel with a load path (drain-source path) of the MOS transistor. The drain-source path of the MOS transistor is an internal path between the drain terminal D and the source terminal S. The individual diodes are reverse-biased (off) when a voltage of a first polarity is applied between the drain and source terminals D, S of the MOS transistor, and the individual diodes are forward-biased (conducting) when a voltage of a second polarity is applied between the drain and source terminals D, S.In an n-type silicon carbide device, the diodes are reverse-biased when a positive voltage is applied between the drain and source terminals D, S, and forward-biased when a negative voltage is applied between the drain and source terminals D, S (which is equivalent to a positive voltage between the source and drain terminals S, D). The individual diodes are connected in parallel to the body diodes of the transistor cells. The body diodes are those formed by the body regions 13 and the drift region 11 of the individual cells 101, 102. Unlike the body diodes, however, the characteristics of the diodes between the diode regions 30 and the drift region 11 can be set largely independently of the characteristics of the MOS transistor. In particular, the diodes between the diode regions 13 and the drift region 11 can be implemented such that they have a high current value (English:“current rating”) by implementing the diode region 30 such that the pn junction between the diode region 30 and the drift region 11 has a relatively large area.

[0042] The silicon carbide device 1 from Fig. It can be operated like a conventional MOS transistor by applying a load voltage between the drain and source terminals D, S and a control potential to the gate electrode G. This operating principle is briefly explained using an n-type silicon carbide device. However, this operating principle also applies to a p-type device, although in the case of a p-type device, the polarities of the voltages explained below must be reversed. The silicon carbide device is in a forward operating mode when a load voltage is applied between the drain and source terminals D, S, which reverse-biases the body diodes and the additional diodes (the diodes between diode regions 30 and drift region 11) of the individual device cells 101, 102. This voltage is a positive voltage in an n-type device.In forward-biased operation, the MOS transistor can be switched on and off by the control potential applied to the gate terminal G. The MOS transistor is switched on (in the on state) when the control potential applied to the gate terminal G creates conducting channels in the body regions 13 between the source regions 12 and the drift region 11, and the MOS transistor is switched off (in the off state) when the conducting channels in the body regions 13 are open. The absolute value of the control potential that switches the transistor device on or off depends on the specific type of transistor device (enrichment device or depletion device).

[0043] The silicon carbide device 1 is in a reverse bias mode when a voltage is applied between the drain and source terminals D, S, which forward biases the body diodes and the additional diodes. In this operating mode, the silicon carbide device 1 can only be controlled by the polarity of the load voltage, but not by the control potential applied to the gate terminal G.

[0044] When the silicon carbide device 1 is in forward operating mode and when the silicon carbide device 1 is switched off, the pn junctions between the diode regions 30 and the drift region 11 and the pn junctions between the body regions 13 and the drift region 11 are reverse-biased, causing a depletion region to expand in the drift region 11. As the load voltage increases, the depletion region extends deeper into the drift region 11 towards the drain region 14. As the load voltage increases and the depletion region extends deeper into the drift region 11, the electric field strength at the pn junctions also increases. Since the pn junctions between the body regions 13 and the first drift region 11 are located close to the electrical insulator 22, the electrical insulator 22 can be damaged when high load voltages are applied, i.e., when high field strengths occur. In the silicon carbide device 1 from Fig. The diode regions 30 of two adjacent device cells 101, 102, together with the drift region 11, can act as a JFET (Junction Field-Effect Transistor). This JFET has channel regions 111 between two adjacent diode regions 30. When the load voltage increases and the electrical potential of the drift region 11 increases, the JFET clamps the channel regions 111 and prevents the field strength at the pn junctions between the body regions 13 and the drift region 11 from increasing further as the load voltage continues to rise. The load voltage at which the channels 111 of the JFET clamp depends, for example, on the distance between two adjacent diode regions 30 in a lateral direction of the silicon carbide body 100.The “lateral direction” of the silicon carbide body 100 is perpendicular to the vertical direction in which the drain region 14 is spaced from the body regions 13 and the diode regions 30, and essentially parallel to the first surface 101. This lateral distance between two adjacent diode regions 30 is, for example, between 0.5 µm (micrometers) and 2 µm (micrometers), or between 0.25 and 1.5 times the width of the grooves in which the gate electrodes 21 are housed. The “width” of the grooves is the distance between the first and second sidewalls 1101, 1102. If the grooves are tapered, as in . Fig. As shown, the width is the greatest distance between the first and second side walls.

[0045] Each device cell 101, 102 comprises a channel area, which is either an area of ​​the body area 13 along the electrical insulator 22 or the optional channel area 15 (in Fig. (shown by dashed lines). The channel region along the electrical insulator 22 allows the flow of charge carriers from the source regions 12 to the drift region 11 when the transistor device is in the on state. The diode region 30 of each device cell 101, 102 does not overlap the channel region. That is, the pn junctions between the diode regions 30 and the drift region 11 are confined to the bottom of the individual gate trenches and do not extend beyond the gate trenches toward the channel regions. Thus, the diode regions 30 do not impede the flow of charge carriers from the channel regions to the drain region 14.

[0046] The voltage-blocking capacity of the silicon carbide device 1 depends, among other things, on the distance between the diode regions 30 and the drain region 14. This distance can be adjusted during the manufacturing process according to the desired voltage-blocking capacity. As a rule of thumb, for a silicon carbide body 100, the distance between the drain region 14 and the diode region 30 is between 0.8 micrometers and 1.0 micrometers per 100 V of voltage-blocking capacity.

[0047] The doping concentration of drift area 11 is, for example, between 1E14 cm. -3 and 1E17 cm -3 The doping concentration of body region 13, for example, is between 5 x 16 cm⁻¹. -3 and 5E17 cm -3 The doping concentrations of the source and drain regions 12, 14 are, for example, higher than 1E19 cm⁻¹. -3 The doping concentration of the diode regions 30 is, for example, between 1E18 cm⁻¹. -3 and 1E19 cm -3 .

[0048] As in Fig. As shown, the body region 13 of each device cell 101, 102 borders the corresponding gate trench at the first side wall 1101. Particularly when the gate trenches have tapered side walls, the first and second side walls 1101, 1102 can correspond to different crystal planes of a crystal lattice of the silicon carbide body 100. According to one embodiment, the silicon carbide body 100 comprises a hexagonal SiC crystal, and the gate trenches have tapered side walls such that the first side wall 1101 corresponds to the 11-20 plane in the SiC crystal. In this case, the individual channel regions exhibit relatively low resistance. In this embodiment, the first side wall 1101 is aligned with the c-axis of the silicon carbide body crystal. The c-axis (major hexagonal axis) is perpendicular to the growth plane (0001 plane) of the SiC crystal. This growth level is in Fig. not shown. The bottom 1103 of the trench is essentially parallel to the first surface 101.

[0049] The angle α (alpha) between the first side wall 1101 and the first surface 101 of the trench 110 depends on the orientation of the first surface relative to the growth plane (0001 plane). According to one embodiment, the first surface 101 is inclined relative to the growth plane, with the angle between the first surface 101 and the growth plane being between 1° and 10°, and in particular between 2° and 8°. In this case, α lies between 80° (90°-10°) and 89° (90°-1°), and in particular between 82° (90°-8°) and 88° (90°-2°). According to a specific embodiment, the angle between the first surface 101 and the growth plane is 4°, so that the angle α between the first surface 101 and the first side wall 1101 of the trench 110 is 86°.In the SiC crystal, there is a high charge carrier mobility along the plane 11-20, so that the alignment of the first side wall to the c-axis leads to a low resistance in the channel area along the electrical insulator 22 in the body area 13.

[0050] The gate trenches can be elongated trenches, with the gate electrodes 21 located at positions shown in the vertical cross-sectional view of Fig. The non-visible components may be connected to a gate terminal electrode. The source electrode 41 covers the insulating layer 51 in the areas where the first contact openings 52 are located and is electrically connected to the contact areas 32 and the source areas 12 in the first contact openings 52.

[0051] A gate runner electrode 42 can be spaced apart from the source electrode 41 in the first lateral direction x and covers the insulating layer 51 in the areas where the second contact openings 52 are located. The gate runner electrode 42 is electrically connected to the gate electrodes 21 in the second contact openings 53.

[0052] In silicon carbide MOSFET devices, charge trapping is a known problem that can be caused by defects at the interface between the silicon carbide body and the electrical insulator that isolates the gate electrode from the silicon carbide body. Charge trapping can cause the electrical parameters of a silicon carbide device to drift during operation, which is undesirable. Charge trapping can occur particularly when carbon atoms are present in an interface layer between the silicon carbide body and an electrical insulator that isolates the gate electrode from the silicon carbide body. Typically, such an interface layer is formed by oxidation (or oxynitridation) of the silicon carbide body to silicon oxide (or silicon oxynitride), for example, by annealing.The oxidation (or oxynitration) of the silicon carbide body not only leads to silicon oxide (silicon oxynitride) but also leaves behind carbon atoms incorporated into the silicon oxide (silicon oxynitride). The presence of these carbon atoms can be a cause of charge trapping. Therefore, it may be desirable to reduce the number of carbon atoms in the interface layer between the silicon carbide body and the electrical insulator that isolates the gate electrode.

[0053] Fig. Figure 1C shows a typical profile 10001 of a carbon concentration C in an interface layer 210 (with a thickness t) between a silicon carbide body 100 and an electrical insulator 220 (such as the one in Fig. 1A and Fig. The electrical insulator 22 (shown in Figure 1B) insulates a gate electrode 21 from the interface layer 210 and / or the silicon carbide body 100. Oxidation (or oxynitration) of the silicon carbide body typically incorporates carbon atoms into the interface layer 210. Thus, the carbon concentration C along a cross-section through the silicon carbide body 100, the interface layer 210, and the electrical insulator 220 in the interface layer 210 can be non-zero and typically decreases across the interface layer 210 (e.g., from an initial carbon concentration C1 at a first surface 301 of the interface layer 210 in contact with the silicon carbide body 100 to approximately zero within the electrical insulator 220). As mentioned earlier, the presence of carbon atoms can lead to charge inclusions.

[0054] The initial carbon concentration C1 at the first surface 301 can be approximately equal to the carbon concentration in the silicon carbide body 100 (which can be approximately 0.5). The carbon concentration C in the interface layer can then decrease and reach half of the initial carbon concentration at a distance d1 from the first surface 301 (this point 10011 of profile 10001 is in Fig. (1C shown). Typical values ​​for the distance d1 are 1 to 2 nm. Furthermore, the distance d1 is typically located approximately midway between the first surface 301 and the second surface 302 of the interface layer 210. In other words, the carbon concentration C is typically greater than half of the first carbon concentration C1 in approximately 50% of the interface layer 210 (i.e., in the region from the first surface 301 to the distance d1) and less than the first carbon concentration in the remainder of the interface layer (i.e., from the first distance d1 to the second surface 302). That is, the distance d1 can be approximately half the thickness t of the interface layer 210.

[0055] Methods according to the present disclosure can make it possible to obtain an interface layer 210 with a lower amount of carbon in the interface layer 210, e.g., by depositing the interface layer 210 as described below. This can prevent carbon atoms from being incorporated into the interface layer 210. Nevertheless, some carbon atoms may still diffuse from the silicon carbide body 100 into the interface layer 210 (e.g., through subsequent processing steps). Therefore, a carbon concentration profile (when applying the methods according to the present disclosure) need not necessarily show a sharp drop (e.g., a step) at the first surface 301 of the interface layer 210, but may still contain some carbon atoms incorporated into the interface layer 210. This will be discussed in the Fig. shown and discussed. For example, the carbon concentration C within more than 75% of the interface layer 210 or within more than 90% of the interface layer can be less than half of the first carbon concentration C1 (where C1 is located at the first surface 301 of the interface layer 210).

[0056] Fig. 1D and Fig. Figures 1E show profiles 10002 and 10003 of the carbon concentration C in an interface layer 210 according to the present disclosure. In some embodiments, the interface layer 210 is deposited on the (purified) silicon carbide surface of the silicon carbide body 100 by atomic layer deposition (ALD) or epitaxially. This can result in fewer carbon atoms being incorporated into the interface layer 210, which can reduce charge trapping. According to the present disclosure, the interface layer 210 is arranged directly on the silicon carbide body 100 and between the silicon carbide body 100 and an electrical insulator 220, which insulates a gate electrode 21 from the silicon carbide body 100 and / or from the interface layer 210. The thickness t of the interface layer can be less than or equal to 15 nm.The interface layer can comprise a first surface 301, which is in contact with the silicon carbide body 100, and a second surface 302, which is opposite the first surface 301. The carbon concentration in the interface layer 210 can decrease along a direction d, which points from the first surface 301 to the second surface 302, from a first carbon concentration C1 at the first surface 301 of the interface layer 210 to a second carbon concentration C2 at a second surface 302 of the interface layer 210, which is opposite the first surface 301.

[0057] In one embodiment, the carbon concentration C is less than half of the first concentration C1 within at least 75% of the interface layer 210, as shown in Fig. Figure 1D shows where point 10012 lies on profile 10002. In other words, the distance d1 can be approximately 0.25 of the thickness t of the interface layer 210.

[0058] In another embodiment, the carbon concentration C is less than half the first concentration C1 within at least 90% of the interface layer 210, as in Fig. Figure 1E shows where a point 10013 lies on the profile 10003. In other words, the distance d1 can be approximately 0.1 of the thickness t of the interface layer 210.

[0059] Both in Fig. as well as in Fig. The distance d1 from the first surface 301 to the point 10012 10013, where the carbon concentration reaches half the carbon concentration C1 present at the first surface 301, can be less than 1 nm.

[0060] With reference to Fig. comprises a silicon carbide device 1 (as described in the Fig. The silicon carbide device 1) shown according to the present disclosure comprises a source region 12 of a first conductivity type formed in a silicon carbide body 100, a body region 13 of a second conductivity type formed in the silicon carbide body, a drain region 14, a gate electrode 21 configured to switch a current between the source region 12 and the drain region 14, and an electrical insulator 22, 220 arranged between the gate electrode 21 and the silicon carbide body 100 and configured to electrically insulate the gate electrode 21 from the silicon carbide body 100. Furthermore, the silicon carbide device comprises an interface layer 210 arranged between the silicon carbide body 100 and the electrical insulator 220.The electrical insulator 220 can comprise or consist of a material different from the material of the interface layer 210. The interface layer 210 is in direct contact with the silicon carbide body 100. The thickness t of the interface layer 210 is less than or equal to 15 nm (nanometers), in particular less than or equal to 10 nm or 5 nm. In other examples, the interface layer 210 can have a thickness t of less than or equal to 4 nm, 3 nm, or 2 nm, or be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules). The interface layer 210 can, for example, consist of a material selected from the group consisting of silicon, aluminum nitride, titanium nitride, silicon nitride, aluminum oxide, zirconium oxide, hafnium oxide, gadolinium oxide, lanthanum oxide, silicon oxynitride, aluminum oxynitride, zirconium silicate, zirconium aluminum oxide, yttrium oxide and aluminosilicate.

[0061] Furthermore, silicon carbide typically oxidizes to silicon oxide, in which carbon is incorporated into the silicon oxide. This can enhance charge trapping compared to silicon oxide without carbon incorporation. The oxidation of silicon carbide to form silicon oxide as an electrical insulator can therefore lead to charge trapping. According to the present disclosure, the interface layer 210 can consist of a material comprising fewer carbon atoms than when the silicon carbide is (over-)oxidized. In particular, the material forming the interface layer 210 can be deposited according to the present disclosure (e.g., by ALD or epitaxial growth).

[0062] More generally, the interface layer 210 according to the present disclosure can consist of a homogeneous or an inhomogeneous material.

[0063] For example, the interface layer 210 can consist of a material comprising a first compound and a second compound, wherein the concentration of the first compound of the material decreases along a direction d pointing from one surface 301 of the interface layer 210 (in contact with the silicon carbide body 100) to the other surface 302 of the interface layer 210, and the concentration of the second compound of the material increases along this direction d. In this example, the first compound can be selected from the group consisting of silicon, aluminum, titanium, zirconium, hafnium, gadolinium, and lanthanum, and the second compound can be selected from the group consisting of oxygen, nitrogen, and oxynitride.

[0064] The electrical insulator 220 can be made of a material different from that of the interface layer 210. For example, the electrical insulator 220 can be made of silicon oxide or a high-k material (such as aluminum nitride, titanium nitride, silicon nitride, aluminum oxide, zirconium oxide, hafnium oxide, silicon oxynitride, aluminosilicate, yttrium oxide, gadolinium oxide, or lanthanum oxide). The electrical insulator 220 can have a thickness of 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, or even more.

[0065] Fig. Figure 1 shows a cross-sectional view of an interface layer 210 and an electrical insulator 220 of a silicon carbide device 1, which is arranged between the silicon carbide body 100 and the gate electrode 21. The electrical insulator 220, the silicon carbide body 100 and the gate electrode 21 of the Fig. can the electrical insulator 22, the silicon carbide body 100 and the gate electrode 21 of the Fig. correspond. The remaining elements of the Fig. are in Fig. Not shown for illustrative purposes. The one in Fig. The cross-section shown can be seen, for example, along the side walls 1101, 1102 and the bottom 1103 of a gate trench according to Fig. (or at least along part of the side walls or the bottom) or in an area where the gate electrode 21 is located above the electrical insulator 22, as in Fig. as shown. In general, as shown in Fig. As shown, a stack 2 is formed by the gate electrode 21, the electrical insulator 220, the interface layer 210, and the silicon carbide body 100. According to the explanations regarding the Fig. The gate electrode 21 can be configured to switch a current between the source region 11 and the drain region 14 of a silicon carbide device 1. The electrical insulator 220 is arranged between the gate electrode 21 and the silicon carbide body 100 of the silicon carbide device 1 and is configured to electrically insulate the gate electrode 22 from the silicon carbide body 100. The interface layer 210 is arranged between the silicon carbide body 100 and the electrical insulator 220. The electrical insulator 220 is arranged between the interface layer 210 and the gate electrode 21. Optionally, as described below with reference to Fig. It is discussed that an additional layer is arranged between the interface layer 210 and the electrical insulator 220. The interface layer 210 is in direct contact with the silicon carbide body 100. The thickness t of the interface layer 210 is less than or equal to 15 nm, and in particular less than or equal to 10 nm or 5 nm. In other examples, the interface layer 210 can have a thickness of less than or equal to 4 nm, 3 nm, or 2 nm, or be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0066] Several stacks 2 are described below that are considered within the context of this revelation. However, other stacks may also be considered, so the stacks described should not be understood as limiting the general concept of this revelation.

[0067] In a first embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising silicon nitride, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material that may comprise silicon oxide or a high-k material. Typical high-k materials are Al₂O₃, ZrO₂, HfO₂, Al₃O₄, and aluminosilicate (AlSiO₂). x, silicon-doped HfO2, TiO2, Y2O2, and Si3N4. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of silicon and the same or approximately the same concentration of nitrogen throughout the interface layer 210). In another example, the material of the interface layer 210 has a first nitrogen concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second nitrogen concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 has a first silicon concentration at the first surface 301 of the interface layer 210 and a second silicon concentration at the second surface 302 of the interface layer 210.

[0068] In one example, the nitrogen concentration can decrease along a direction d pointing from the first surface 301 (where the nitrogen concentration is the first nitrogen concentration) to the second surface 302 (where the nitrogen concentration is the second nitrogen concentration), and the silicon concentration can increase along the direction d from the first silicon concentration (at the first surface 301) to the second silicon concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the nitrogen-to-silicon ratio might be, for example, 90:10, while the nitrogen-to-silicon ratio at the second surface 302 might be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different nitrogen-to-silicon ratio could also exist at the first surface 301, e.g., For example, 100:0, 80:20, 70:30 and so on.

[0069] In another example of the first embodiment, the nitrogen concentration within the interfacial layer 210 can increase from the first surface 301 to the second surface 302 along direction d, while the silicon concentration decreases along direction d. In other words, at the first surface 301 of the interfacial layer 210, the nitrogen-to-silicon ratio can be, for example, 10:90, while the nitrogen-to-silicon ratio at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other nitrogen-to-silicon ratios can also be present at the first surface 301, e.g., 0:100, 20:80, 30:70, etc.

[0070] As already mentioned, the thickness t of the silicon nitride interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0071] In a second embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising silicon oxynitride, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of silicon, the same or approximately the same concentration of oxygen, and the same or approximately the same concentration of nitrogen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first nitrogen concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second nitrogen concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 can exhibit a first silicon concentration at the first surface 301 of the interface layer 210 and a second silicon concentration at the second surface 302 of the interface layer 210, as well as a first oxygen concentration at the first surface 301 and a second oxygen concentration at the second surface 302.

[0072] In one example, the silicon concentration can decrease along a direction d pointing from the first surface 301 (where the silicon concentration is the first silicon concentration) to the second surface 302 (where the silicon concentration is the second silicon concentration), and the oxygen and nitrogen concentrations can increase along the direction d from the first oxygen and nitrogen concentrations (at the first surface 301) to the second oxygen and nitrogen concentrations (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of silicon to oxygen plus nitrogen can be, for example, 90:10, while the ratio of silicon to oxygen plus nitrogen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100.Of course, the first surface 301 can also have a different ratio of silicon to oxygen and nitrogen, e.g. 100:0, 80:20, 70:30, etc.

[0073] In another example, e.g., the second embodiment, within the interface layer 210, the concentration of silicon can increase from the first surface 301 to the second surface 302 along the direction d, while the concentrations of nitrogen and oxygen can decrease. In other words, at the first surface 301 of the interface layer 210, the ratio of silicon to oxygen plus nitrogen can be, for example, 10:90, while the ratio of silicon to oxygen plus nitrogen at the second surface 302 can be one of the following: 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, a different ratio of silicon to oxygen plus nitrogen can also be present at the first surface 301, such as 0:100, 20:80, 30:70, and so on.

[0074] Furthermore, the ratio of oxygen to nitrogen can also increase or decrease, for example from 10:90 at the first surface 301 to 90:10 at the second surface 302 (or vice versa).

[0075] As already mentioned, the thickness t of the silicon oxynitride interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0076] In a third embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising aluminum nitride, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of aluminum and the same or approximately the same concentration of nitrogen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first nitrogen concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second nitrogen concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 can exhibit a first concentration of aluminum at the first surface 301 of the interface layer 210 and a second concentration of aluminum at the second surface 302 of the interface layer 210.

[0077] In one example, the nitrogen concentration can decrease along a direction d pointing from the first surface 301 (where the nitrogen concentration is the first nitrogen concentration) to the second surface 302 (where the nitrogen concentration is the second nitrogen concentration), and the aluminum concentration can increase along the direction d from the first aluminum concentration (at the first surface 301) to the second aluminum concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the nitrogen-to-aluminum ratio might be, for example, 90:10, while the nitrogen-to-aluminum ratio at the second surface 302 might be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different nitrogen-to-aluminum ratio could also be present at the first surface 301, e.g., 90:10. B. 100:0, 80:20, 70:30 etc.

[0078] In another example, e.g., the third embodiment, within the interface layer 210, the concentration of nitrogen can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of aluminum can decrease along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of nitrogen to aluminum can be, for example, 10:90, while the ratio of nitrogen to aluminum at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0.

[0079] As already mentioned, the thickness t of the aluminum nitride interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0080] In a fourth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising aluminum oxynitride, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of aluminum, the same or approximately the same concentration of oxygen, and the same or approximately the same concentration of nitrogen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first nitrogen concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second nitrogen concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first concentration of aluminum at the first surface 301 of the interface layer 210 and a second concentration of aluminum at the second surface 302 of the interface layer 210, as well as a first concentration of oxygen at the first surface 301 and a second concentration of oxygen at the second surface 302.

[0081] In one example, the aluminum concentration can decrease along a direction d pointing from the first surface 301 (where the aluminum concentration is the first aluminum concentration) to the second surface 302 (where the aluminum concentration is the second aluminum concentration), and the oxygen and nitrogen concentrations can increase along the same direction d from the first oxygen and nitrogen concentrations (at the first surface 301) to the second oxygen and nitrogen concentrations (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of aluminum to oxygen and nitrogen can be, for example, 90:10, while the ratio of aluminum to oxygen and nitrogen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100.Of course, the first surface 301 can also have a different ratio of aluminum to oxygen and nitrogen, e.g. 100:0, 80:20, 70:30 and so on.

[0082] In another example, e.g., the fourth embodiment, within the interface layer 210, the concentration of aluminum can increase from the first surface 301 to the second surface 302 along the direction d, while the concentrations of nitrogen and oxygen can decrease. In other words, at the first surface 301 of the interface layer 210, the ratio of aluminum to oxygen and nitrogen can be, for example, 10:90, while the ratio of aluminum to oxygen and nitrogen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, a different ratio of aluminum to oxygen plus nitrogen can also be present at the first surface 301, such as 0:100, 20:80, 30:70, and so on.

[0083] Furthermore, the ratio of oxygen to nitrogen can also increase or decrease, e.g. from 10:90 at the first surface 301 to 90:10 at the second surface 302 (or vice versa).

[0084] As already mentioned, the thickness t of the aluminum oxynitride interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0085] In a fifth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising titanium nitride, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of titanium and the same or approximately the same concentration of nitrogen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first nitrogen concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second nitrogen concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first concentration of titanium at the first surface 301 of the interface layer 210 and a second concentration of titanium at the second surface 302 of the interface layer 210.

[0086] In one example, the nitrogen concentration can decrease along a direction d pointing from the first surface 301 (where the nitrogen concentration is the first nitrogen concentration) to the second surface 302 (where the nitrogen concentration is the second nitrogen concentration), and the titanium concentration can increase along the direction d from the first titanium concentration (at the first surface 301) to the second titanium concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the nitrogen-to-titanium ratio might be, for example, 90:10, while the nitrogen-to-titanium ratio at the second surface 302 might be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different nitrogen-to-titanium ratio could also be present at the first surface 301, e.g., B. 100:0, 80:20, 70:30 etc.

[0087] In another example, e.g., the fifth embodiment, within the interface layer 210, the nitrogen concentration can increase from the first surface 301 to the second surface 302 along direction d, while the titanium concentration can decrease along direction d. In other words, at the first surface 301 of the interface layer 210, the nitrogen-to-titanium ratio can be, for example, 10:90, while the nitrogen-to-titanium ratio at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other nitrogen-to-titanium ratios can also be present at the first surface 301, e.g., 0:100, 20:80, 30:70, etc.

[0088] As already mentioned, the thickness t of the titanium nitride interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0089] In a sixth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising zirconium oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of zirconium and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first concentration of zirconium at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second concentration of zirconium at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first concentration of oxygen at the first surface 301 of the interface layer 210 and a second concentration of oxygen at the second surface 302 of the interface layer 210.

[0090] In one example, the zirconium concentration can decrease along a direction d pointing from the first surface 301 (where the zirconium concentration is the first zirconium concentration) to the second surface 302 (where the zirconium concentration is the second zirconium concentration), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of zirconium to oxygen can be, for example, 90:10, while the ratio of zirconium to oxygen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different ratio of zirconium to oxygen can also be present at the first surface 301, e.g., B. 100:0, 80:20, 70:30 etc.

[0091] In another example, e.g., the sixth embodiment, within the interface layer 210, the concentration of zirconium can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of oxygen decreases along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of zirconium to oxygen can be, for example, 10:90, while the ratio of zirconium to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of zirconium to oxygen can also be present at the first surface 301, e.g., 0:100, 20:80, 30:70, etc.

[0092] As already mentioned, the thickness t of the zirconium oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0093] In a seventh embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising hafnium oxide, and the electrical insulator, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of hafnium and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first hafnium concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second hafnium concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first oxygen concentration at the first surface 301 of the interface layer 210 and a second oxygen concentration at the second surface 302 of the interface layer 210.

[0094] In one example, the hafnium concentration can decrease along a direction d pointing from the first surface 301 (where the hafnium concentration is the first hafnium concentration) to the second surface 302 (where the hafnium concentration is the second hafnium concentration), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of hafnium to oxygen can be, for example, 90:10, while the ratio of hafnium to oxygen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different ratio of hafnium to oxygen may also be present at the first surface 301, such as 100:0, 80:20, 70:30, etc.

[0095] In another example, e.g., the seventh embodiment, within the interface layer 210, the concentration of hafnium can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of oxygen decreases along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of hafnium to oxygen can be, for example, 10:90, while the ratio of hafnium to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of hafnium to oxygen can also be present at the first surface 301, such as 0:100, 20:80, 30:70, and so on.

[0096] As already mentioned, the thickness t of the hafnium oxide interface layer 210 is equal to or less than 10 nm and, in particular, equal to or less than 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0097] In an eighth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising gadolinium oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of gadolinium and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first gadolinium concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second gadolinium concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first oxygen concentration at the first surface 301 of the interface layer 210 and a second oxygen concentration at the second surface 302 of the interface layer 210.

[0098] In one example, the gadolinium concentration can decrease along a direction d pointing from the first surface 301 (where the gadolinium concentration is the first gadolinium concentration) to the second surface 302 (where the gadolinium concentration is the second gadolinium concentration), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of gadolinium to oxygen can be, for example, 90:10, while the ratio of gadolinium to oxygen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different ratio of gadolinium to oxygen may also be present on the first surface 301, such as 100:0, 80:20, 70:30, etc.

[0099] In another example, e.g., the eighth embodiment, within the interface layer 210, the concentration of gadolinium can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of oxygen decreases along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of gadolinium to oxygen can be, for example, 10:90, while the ratio of gadolinium to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of gadolinium to oxygen can also be present at the first surface 301, e.g., 0:100, 20:80, 30:70, etc.

[0100] As already mentioned, the thickness t of the gadolinium oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0101] In a ninth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising lanthanum oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of lanthanum and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first lanthanum concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second lanthanum concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first oxygen concentration at the first surface 301 of the interface layer 210 and a second oxygen concentration at the second surface 302 of the interface layer 210.

[0102] In one example, the lanthanum concentration can decrease along a direction d pointing from the first surface 301 (where the lanthanum concentration is the first lanthanum concentration) to the second surface 302 (where the lanthanum concentration is the second lanthanum concentration), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of lanthanum to oxygen can be, for example, 90:10, while the ratio of lanthanum to oxygen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different ratio of lanthanum to oxygen can also be present at the first surface 301, e.g., B. 100:0, 80:20, 70:30 etc.

[0103] In another example, e.g., the ninth embodiment, the lanthanum concentration within the interfacial layer 210 can increase from the first surface 301 to the second surface 302 along direction d, while the oxygen concentration decreases along direction d. In other words, at the first surface 301 of the interfacial layer 210, the ratio of lanthanum to oxygen can be, for example, 10:90, while the ratio of lanthanum to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of lanthanum to oxygen can also be present at the first surface 301, e.g., 0:100, 20:80, 30:70, etc.

[0104] As already mentioned, the thickness t of the lanthanum oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0105] In a tenth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising aluminum oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of aluminum and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first aluminum concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second aluminum concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first oxygen concentration at the first surface 301 of the interface layer 210 and a second oxygen concentration at the second surface 302 of the interface layer 210.

[0106] In one example, the aluminum concentration can decrease along a direction d pointing from the first surface 301 (where the aluminum concentration is the first aluminum concentration) to the second surface 302 (where the aluminum concentration is the second aluminum concentration), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the ratio of aluminum to oxygen can be, for example, 90:10, while the ratio of aluminum to oxygen at the second surface 302 can be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different ratio of aluminum to oxygen can also be present at the first surface 301, such as... B. 100:0, 80:20, 70:30 etc.

[0107] In another example, e.g., the tenth embodiment, within the interface layer 210, the concentration of aluminum can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of oxygen can decrease along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of aluminum to oxygen can be, for example, 10:90, while the ratio of aluminum to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of aluminum to oxygen at the first surface 301 can also be present, e.g., 0:100, 20:80, 30:70, etc.

[0108] As already mentioned, the thickness t of the aluminum oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0109] In an eleventh embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising silicon oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of silicon and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first concentration of silicon at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second concentration of silicon at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits a first concentration of oxygen at the first surface 301 of the interface layer 210 and a second concentration of oxygen at the second surface 302 of the interface layer 210.

[0110] In one example, the silicon concentration can decrease along a direction d pointing from the first surface 301 (where the silicon concentration is the first concentration of silicon) to the second surface 302 (where the silicon concentration is the second concentration of silicon), and the oxygen concentration can increase along the direction d from the first oxygen concentration (at the first surface 301) to the second oxygen concentration (at the second surface 302). In other words, at the first surface 301 of the interface layer 210, the silicon-to-oxygen ratio might be, for example, 90:10, while the silicon-to-oxygen ratio at the second surface 302 might be one of 80:20, 70:30, 60:40, 50:50, 40:60, 30:70, 20:80, 10:90, or 0:100. Of course, a different silicon-to-oxygen ratio could also exist at the first surface 301, such as... For example, 100:0, 80:20, 70:30 and so on.

[0111] In another example, e.g., the eleventh embodiment, within the interface layer 210, the concentration of silicon can increase from the first surface 301 to the second surface 302 along direction d, while the concentration of oxygen can decrease along direction d. In other words, at the first surface 301 of the interface layer 210, the ratio of silicon to oxygen can be, for example, 10:90, while the ratio of silicon to oxygen at the second surface 302 can be one of 20:80, 30:70, 40:60, 50:50, 60:40, 70:30, 80:20, 90:10, or 100:0. Of course, other ratios of silicon to oxygen at the first surface 301 can also be present, e.g., 0:100, 20:80, 30:70, etc.

[0112] As already mentioned, the thickness t of the silicon oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0113] In a twelfth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising zirconium aluminum oxide, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of zirconium, the same or approximately the same concentration of aluminum, and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 has a first concentration of zirconium at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second concentration of zirconium at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits first concentrations of aluminum and oxygen at the first surface 301 of the interface layer 210 and second concentrations of aluminum and oxygen at the second surface 302 of the interface layer 210.

[0114] Here too, some of the concentrations of zirconium, aluminum, and oxide can increase, while the remaining concentrations of zirconium, aluminum, and oxide can decrease along the direction d. For example, the ratio of zirconium to aluminum to oxide could be 60:30:10 at the first surface 301 and 10:30:60 at the second surface 302 of the interface layer 210. Of course, other ratios at the first and second surfaces 301, 302 are also possible and are considered in the present disclosure.

[0115] As already mentioned, the thickness t of the zirconium aluminum oxide interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0116] In a thirteenth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising zirconium silicate, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of zirconium, the same or approximately the same concentration of silicon, and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first concentration of zirconium at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second concentration of zirconium at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits first concentrations of silicon and oxygen at the first surface 301 of the interface layer 210 and second concentrations of silicon and oxygen at the second surface 302 of the interface layer 210.

[0117] Here too, some of the concentrations of zirconium, silicon, and oxide can increase, while the remaining concentrations of zirconium, silicon, and oxide can decrease along the d direction. For example, the ratio of zirconium to silicon to oxide could be 60:30:10 at the first surface 301 and 10:30:60 at the second surface 302 of the interface layer 210. Of course, other ratios at the first and second surfaces 301, 302 are also possible and are considered in the present disclosure.

[0118] As already mentioned, the thickness t of the zirconium silicate interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0119] In a fourteenth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising aluminum silicate, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be homogeneous (i.e., it has the same or approximately the same concentration of aluminum, the same or approximately the same concentration of silicon, and the same or approximately the same concentration of oxygen throughout the interface layer 210).In another example, the material of the interface layer 210 exhibits a first aluminum concentration at the first surface 301 of the interface layer 210 (which is in direct contact with the silicon carbide body 100) and a second aluminum concentration at the second surface 302 of the interface layer 210 (which is in direct contact with the electrical insulator 220). Likewise, the material of the interface layer 210 exhibits first concentrations of silicon and oxygen at the first surface 301 of the interface layer 210 and second concentrations of silicon and oxygen at the second surface 302 of the interface layer 210.

[0120] Here too, some of the concentrations of aluminum, silicon, and oxide can increase, while the remaining concentrations of aluminum, silicon, and oxide can decrease along the direction d. For example, the ratio of aluminum to silicon to oxide at the first surface 301 could be 60:30:10 and at the second surface 302 of the interface layer 210 could be 10:30:60. Of course, other ratios at the first and second surfaces 301, 302 are also possible and are considered in the present disclosure.

[0121] As already mentioned, the thickness t of the aluminum silicate interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0122] In a fifteenth embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising silicon, and the electrical insulator 220, which is in direct contact with the interface layer 210 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. The material of the interface layer 210 can consist of at least one of the following materials: monocrystalline silicon, polycrystalline silicon, and amorphous silicon.

[0123] As mentioned previously, the thickness t of the silicon interface layer 210 can be equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. For example, the thickness t of the interface layer 210 can be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0124] If the material of the interface layer 210 consists of single-crystal silicon, the layer can be so thin that it does not relax due to the lattice mismatch with the silicon carbide.

[0125] In addition to the stacks 2 described above, stacks 2 can also form in which the interface layer 210 consists of a material comprising hafnium oxide, titanium oxide, tantalum oxide, yttrium oxide, or a mixture with Al or Si of these oxides. As described in more detail above, the concentration of the compounds can vary from the first surface 301 of interface layer 210 to the second surface 302 of interface layer 210.

[0126] Fig. Figure 1 shows a cross-sectional view of a silicon carbide device 1 comprising the silicon carbide body 100, the interface layer 210, the electrical insulator 220, and the gate electrode 21. The electrical insulator 220, the silicon carbide body 100, and the gate electrode 21 of the Fig. can be the electrical insulator 22, 220, the silicon carbide body 100 or the gate electrode 21 of the Fig. correspond. The difference between Fig. The feature is that the electrical insulator 22 comprises not only the interface layer 210 and the electrical insulator 220, but also an additional layer 230, which is arranged between the interface layer 210 and the electrical insulator 220 of the electrical insulator 22. The remaining elements of the Fig. are in Fig. Not shown for illustrative purposes. The one in Fig. The cross-section shown can be, for example, along the side walls 1101, 1102 and the bottom 1103 of a gate trench according to Fig. (or at least along part of the side walls or the bottom) or in an area where the gate electrode 21 is located above the electrical insulator 22, as in Fig. as shown. In general, as shown in Fig. As shown, a stack 2 is formed by the gate electrode 21, the electrical insulator 220, the additional layer 230, the interface layer 210, and the silicon carbide body 100. In accordance with what was stated above regarding the Fig. As previously discussed, the gate electrode 21 can be configured to switch a current between the source region 11 and the drain region 14 of a silicon carbide device 1. The electrical insulator 220 is arranged between the gate electrode 21 and the silicon carbide body 100 of the silicon carbide device 1 and is configured to electrically insulate the gate electrode 21 from the silicon carbide body 100. The interface layer 210 is arranged between the silicon carbide body 100 and the additional layer 230. The additional layer 230 is arranged between the interface layer 210 and the electrical insulator 220. The main layer 220 is arranged between the additional layer 230 and the gate electrode 21. The interface layer 210 is in direct contact with the silicon carbide body 100. The thickness t of the interface layer 210 is less than or equal to 15 nm and, in particular, less than or equal to 10 nm or 5 nm.In other examples, the interface layer 210 can have a thickness of less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules). The interface layer 210 and the electrical insulator 220 in relation to . Fig. can be made of the same material as above in relation to Fig. described. The additional layer 230 can consist of a material that differs from the material of the interface layer 210 and the material of the electrical insulator 220. The additional layer 230 can consist of a material selected from the group consisting of silicon, aluminum nitride, titanium nitride, silicon nitride, aluminum oxide, silicon dioxide, zirconium oxide, hafnium oxide, gadolinium oxide, lanthanum oxide, silicon oxynitride, aluminum oxynitride, zirconium silicate, zirconium aluminum oxide, and aluminosilicate.

[0127] Several stacks 2 are described below that are considered within the context of this revelation. However, other stacks may also be considered, so the stacks described should not be understood as limiting the general concept of this revelation.

[0128] In one embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a silicon-based material. The additional layer 230, which is in direct contact with the interface layer 210, consists of a silicon oxide-based material, and the electrical insulator 220, which is in direct contact with the additional layer 230 and with the gate electrode 21, consists of a high-k material or silicon oxide. In one example, the interface layer 210 material can be monocrystalline. In another example, the interface layer 210 material can be polycrystalline or amorphous.

[0129] As mentioned previously, the thickness t of the silicon interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules). The additional layer 230 can have a thickness of 10 nm, 20 nm, 30 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 90 nm, 100 nm, or even more.

[0130] In another embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of silicon. The additional layer 230, which is in direct contact with the interface layer 210, consists of a material comprising silicon nitride, and the electrical insulator 220, which is in direct contact with the additional layer 230 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be monocrystalline. In another example, the material of the interface layer 210 can be polycrystalline or amorphous.

[0131] As already mentioned, the thickness t of the silicon interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0132] In a further embodiment, the interface layer 210, which is in direct contact with the silicon carbide body 100, consists of a material comprising silicon. The additional layer 230, which is in direct contact with the interface layer 210, consists of a material comprising silicon nitride, and the electrical insulator 220, which is in direct contact with the additional layer 230 and with the gate electrode 21, consists of a material comprising silicon oxide or a high-k material. In one example, the material of the interface layer 210 can be monocrystalline. In another example, the material of the interface layer 210 can be polycrystalline or amorphous.

[0133] As already mentioned, the thickness t of the silicon interface layer 210 is equal to or less than 15 nm, and in particular equal to or less than 10 nm or 5 nm. The thickness t of the interface layer 210 can, for example, be less than or equal to 4 nm, 3 nm, or 2 nm, or it can be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules).

[0134] Fig. A method 300 for forming an interface layer 210 on a silicon carbide body 100 of a silicon carbide device 1 according to the present disclosure is illustrated. The silicon carbide device can be a silicon carbide device 1 as described above in relation to the Fig. was disclosed, comprising a source region 12 of a first conductivity type and a body region 13 of a second conductivity type. Furthermore, the remaining components of the [unclear text] can be disclosed. Fig. The silicon carbide device 1 shown is present. Method 300 is described with reference to the Fig. , the steps for forming the interface layer 210 for the in Fig. The depicted stack 2 illustrates, with reference to the Fig. , the steps for forming the interface layer 210 for the in Fig. The silicon carbide device 1 shown illustrates, and with reference to the Fig. , the steps for forming an interface layer 210 for the in Fig. The silicon carbide device 1 shown illustrates and is explained.

[0135] The process 300 comprises the removal 310 of an oxide layer (such as a native oxide, a deposited oxide, or a grown oxide) from a surface of a silicon carbide body 100 to obtain a silicon carbide surface 303 (e.g., a surface consisting essentially of silicon carbide, such that the surface has a silicon carbide concentration of 90% or more, such as 95% or 99%). As described in the Fig. As shown, this step can be carried out on the first surface 101 (e.g., an upper surface) of the silicon carbide body 100 (e.g., in the case of a lateral silicon carbide device) or in a trench (e.g., a gate trench) of the silicon carbide body 100 (e.g., in the case of a vertical silicon carbide device), such as on one or more of the first side wall 1101, the second side wall 1102, and the bottom 1103.

[0136] The removal 310 of the oxide layer from a surface of the silicon carbide body 100 is carried out to obtain a silicon carbide surface 303 that is free of oxides or substantially free of oxides (where substantially free of oxides can mean less than 10% oxygen atoms on the silicon carbide surface 303), such that the silicon carbide surface 303 consists essentially of silicon carbide. An exemplary method for removing the oxide from the surface of the silicon carbide body 100 is an in-situ cleaning method (e.g., using nitrogen trifluoride or hydrogen).

[0137] After the oxide layer 310 has been removed, the process 300 comprises the deposition 320 of an interface layer 210 on the silicon carbide surface 301.

[0138] The deposition 320 of the interface layer 210 comprises the deposition of the interface layer 210 in direct contact with the silicon carbide surface 301 (from which the oxide was removed in step 310), which has a thickness t of less than or equal to 15 nm, and in particular of less than or equal to 10 nm or 5 nm. In other examples, the interface layer 210 may be deposited with a thickness t of less than or equal to 4 nm, 3 nm, or 2 nm, or may be a monolayer (i.e., a layer consisting of only one layer of atoms or molecules). The material of the interface layer 210 has already been described above with respect to the Fig. explained and will not be repeated here for the sake of brevity. As in the Fig. As shown, the step of depositing 320 of the interface layer 210 can be carried out on the first surface 101 (e.g., an upper surface) of the silicon carbide body 100 (e.g., in the case of a lateral silicon carbide device) or in a trench (e.g., a gate trench) of the silicon carbide body 100 (e.g., in the case of a vertical silicon carbide device), such as on one or more of the first side wall 1101, the second side wall 1102, and the bottom 1103.

[0139] The process 300 then comprises the formation 330 of an electrical insulator 220 over the interface layer 210. As above with reference to Fig. As discussed above, the electrical insulator 220 can be formed in direct contact with the interface layer 210, or an additional layer 230 (or several additional layers) can be formed between the interface layer 210 and the electrical insulator 220 (as discussed above with reference to Fig. (discussed). The electrical insulator can consist of a material that differs from the material of the interface layer 210 (and from the material of the additional layer 230, if present). The (bulk) layer can be formed by ALD or deposited (e.g., by chemical vapor deposition, such as low-pressure chemical vapor deposition or molecular vapor deposition). As discussed in the Fig. As shown, this step can be carried out on the first surface 101 (e.g., an upper surface) of the silicon carbide body 100 (e.g., in the case of a lateral silicon carbide device) or in a trench (e.g., a gate trench) of the silicon carbide body 100 (e.g., in the case of a vertical silicon carbide device), e.g., on one or more of the first side wall 1101, the second side wall 1102, and the bottom 1103.

[0140] Optionally, prior to the step of forming the electrical insulator 220, the process 300 can include the formation 325 of one or more additional layers 230 in direct contact with the interface layer 210. The electrical insulator 220 is then formed 330 in direct contact with one of the additional layers 230.

[0141] The steps of depositing 320 the interface layer 210 and (optionally) forming 325 one or more additional layers 230 can be carried out by atomic layer deposition (ALD). For example, the step of depositing 320 the interface layer 210 can include depositing a material by ALD onto the silicon carbide surface 303, wherein the deposited material forms the interface layer 210 (e.g., the interface layer 210 consists of the deposited material). The material can be deposited homogeneously, so that the material of the interface layer 210 is homogeneous. In some embodiments, the material can comprise a first compound and a second compound. In this case, the ratio between the concentration of the first compound and the concentration of the second compound can vary during the ALD process.For example, this ratio can be 100:0 at the beginning and is continuously changed to be 0:100 at the end of the ALD (or vice versa). This process can yield an interfacial layer 210 consisting of the deposited material (comprising the first and second compounds), wherein the concentration of the first compound of the material decreases along a direction (d) pointing from the first surface 301 of the interfacial layer 210 to a second surface 302 of the interfacial layer 210, which is opposite the first surface 301, and the concentration of the second compound of the material increases along the direction d pointing from the first surface 301 to the second surface 302 (or vice versa).For example, the first compound can be deposited directly onto the silicon carbide surface 303 via ALD for a first time period, and the second compound can be deposited via ALD over the silicon carbide surface 303 for a second time period. The first compound can be selected from the group consisting of silicon, aluminum, titanium, zirconium, hafnium, gadolinium, yttrium, and lanthanum, and the second compound can be selected from the group consisting of oxygen, nitrogen, and oxynitride, or vice versa.

[0142] The process 300 then comprises the formation 340 of a gate electrode 21 over the electrical insulator 220. The gate electrode 21 can, for example, be in direct contact with the electrical insulator 220. The gate electrode 21 can be made, for example, of polycrystalline silicon, titanium, or aluminum. As described in the Fig. As shown, this step can be performed on the first surface 101 (e.g., a top surface) of the silicon carbide body 100 (e.g., in the case of a lateral silicon carbide device) or in a trench (e.g., a gate trench) of the silicon carbide body 100 (e.g., in the case of a vertical silicon carbide device), such as on one or more of the first side wall 1101, the second side wall 1102, and the bottom 1103. As shown in Fig. As can be seen, in a lateral silicon carbide device, the electrode can be arranged next to the body region 13 and between the source electrode 41 and the drain electrode 43. Alternatively, the gate electrode 22 can be positioned as shown in Fig. The gate electrode 22 can be formed by filling the trench with a material of the gate electrode 22.

[0143] Fig. A method 400 for forming an interface layer 210 on a silicon carbide body 100 of a silicon carbide device 1 according to the present disclosure is illustrated. The silicon carbide device can be a silicon carbide device 1 as described above in relation to the Fig. was disclosed, comprising a source region 12 of a first conductivity type and a body region 13 of a second conductivity type. Furthermore, the remaining components of the [component] can be disclosed. Fig. The silicon carbide device 1 shown is present. Method 400 is described with reference to the Fig. , the steps towards the formation of the in Fig. illustrated by stack 2, with reference to the Fig. , the steps towards the formation of the in Fig. Illustrating the silicon carbide device 1 shown, and with reference to the Fig. , the steps towards the formation of the in Fig.The silicon carbide device 1 shown is illustrated and explained.

[0144] Similar to Method 300, Method 400 comprises the steps of removing 410 an oxide layer from the surface of a silicon carbide body 100 to obtain a silicon carbide surface 303, depositing 420 an interface layer 210 on the silicon carbide surface 303 after removing the oxide layer, forming 430 an electrical insulator 220 over the interface layer 210, and forming 440 a gate electrode 21 over the electrical insulator 220. The steps of removing 410 the oxide layer and forming 440 the gate electrode 21 in Method 400 may be the same as the corresponding steps 310 and 340 of Method 300, as described above.

[0145] As explained above with reference to Method 300, the step of depositing the interface layer 210 onto the silicon carbide surface 303 according to Method 400 comprises depositing the interface layer 210 in direct contact with the silicon carbide surface 303. According to Method 400, the step of depositing the interface layer 210 420 corresponds to depositing a silicon layer 810 onto the silicon carbide surface 303. In some embodiments, the silicon layer 810 has a thickness of less than or equal to 15 nm or 10 nm. In other embodiments, the silicon layer 810 may also be thicker, depending on the circumstances. If, for example, the silicon layer 810 is converted (e.g., oxidized) into the additional layer 230 or into the electrical insulator 210 (as explained below), the thickness of the silicon layer can be the sum of the thickness of the interface layer 210 and the additional layer 230 (or the electrical insulator 210).In such a case, the thickness of the silicon layer can be 810 100 nm or more.

[0146] Furthermore, step 325 of forming the additional layer 230 or step 330 of forming the electrical insulator 220 corresponds to the conversion 425 of the silicon layer 810 and the stopping of the conversion 424 before the entire silicon layer 810 is converted, in order to obtain a converted layer (which, depending on the application, is the additional layer 230 or the electrical insulator 220) formed by the converted silicon layer and a remaining silicon layer (which is the interface layer 210) of the silicon layer 810. If the converted layer is used as the additional layer 230, a further step to form the electrical insulator 220 may be present (e.g., to obtain a stack in which the interface layer 210 is silicon, the additional layer 230 is silicon oxide, and the electrical insulator is a high-k material).

[0147] The deposition of silicon layer 810 can involve depositing the silicon layer with a thickness of less than or equal to 5 nm, 4 nm, 3 nm, or 2 nm. In particular, the deposition of a very thin silicon layer 810 (such as 3 nm or thinner) can result in the silicon layer 810 forming in a monocrystalline structure. In this case, the silicon layer 810 may be under stress, and no stress relief may occur. Alternatively, the silicon layer 810 may also form in a polycrystalline or amorphous structure.

[0148] The conversion step 425 of the silicon layer 810 can include the oxidation and / or nitriding of a portion of the silicon layer 810. The oxidation and / or nitriding is stopped before the entire silicon layer 810 is oxidized and / or nitrided. The oxidized and / or nitrided portion of the silicon layer 810 is the additional layer 230 (or the electrical insulator 220, as described above), and the remaining silicon layer (which is not oxidized and / or nitrided) is the interface layer 210. In other words, the silicon layer 810 can form the basis for both the interface layer 210 and the additional layer 230 (or the electrical insulator 220), and the additional layer (or the electrical insulator) is obtained by oxidizing and / or nitriding a portion of the silicon layer 810. The termination of the conversion 425 of the silicon layer 810 can be carried out such that the remaining silicon layer (i.e.the interface layer) has a thickness of 1 nm or less (e.g., one to three monolayers of silicon). In other examples, the thickness of the remaining silicon layer can also be greater than 1 nm. Termination of the 425 transformation can be achieved by low-temperature oxidation that slows down after a few nm or tens of nm (e.g., by a self-limiting Radox process).

[0149] Although specific examples have been illustrated and described herein, those skilled in the art will recognize that the examples shown and described can be replaced by a multitude of alternative and / or equivalent embodiments without departing from the scope of the present invention. The present application is intended to cover all adaptations or variations of the specific examples described herein. Therefore, the invention is to be limited only by the claims and their equivalents.

[0150] It should be noted that the methods and devices described in this document, including their preferred embodiments, can be used individually or in combination with the other methods and devices disclosed in this document. Furthermore, the features described in connection with a device are also applicable to a corresponding method and vice versa. Moreover, all aspects of the methods and devices described in this document can be combined as desired. In particular, the features of the claims can be combined as desired.

[0151] It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. A person skilled in the art will be able to implement various arrangements which, although not explicitly described or shown here, embody the principles of the invention and are contained within its spirit and scope. Furthermore, all examples and embodiments outlined in this document are, in principle and expressly, intended only for explanatory purposes, to assist the reader in understanding the principles of the proposed methods and systems. Moreover, all statements in this document that describe the principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to include their equivalents.

Claims

[1] Method (300; 400) for forming an interfacial layer on a silicon carbide body, wherein the silicon carbide body comprises a source region (12) of a first conductivity type and a body region (13) of a second conductivity type, the method comprising: Removing (310; 410) an oxide layer from a surface of a silicon carbide body to obtain a silicon carbide surface (303); After removing the oxide layer, depositing (320; 420) an interface layer (210) directly onto the silicon carbide surface (303), wherein the interface layer (210) has a thickness (t) of less than or equal to 15 nm; Formation (330; 430) of an electrical insulator (22; 220) over the interface layer (210); and Formation (340; 440) of a gate electrode (21) over the electrical insulator, wherein the deposition of the interface layer (210) comprises the deposition (320) of a material by means of atomic layer deposition, hereinafter referred to as ALD, on the silicon carbide surface (303), the deposited material forms the interface layer, and wherein the separation (320) of the material by means of ALD comprises: Deposition of a first compound by ALD directly on the silicon carbide surface (303) for a first time period and Deposition of a second compound via ALD on the silicon carbide surface for a second time period, where the first time period begins before the second time period and the ratio of the concentration of the first compound to the concentration of the second compound varies during the ALD process. [2] Method (300) according to claim 1, wherein the first compound is selected from the group consisting of silicon, aluminium, titanium, zirconium, hafnium, gadolinium, tantalum, yttrium and lanthanum, and where the second compound is selected from the group consisting of oxide, nitride and oxynitride. [3] Method (300) according to claim 1, where the first compound is selected from the group consisting of oxide, nitride and oxynitride, and the second compound is selected from the group consisting of silicon, aluminium, titanium, zirconium, hafnium, gadolinium, tantalum, yttrium and lanthanum. [4] Method (300; 400) for forming an interfacial layer on a silicon carbide body, wherein the silicon carbide body comprises a source region (12) of a first conductivity type and a body region (13) of a second conductivity type, the method comprising: Removing (310; 410) an oxide layer from a surface of a silicon carbide body to obtain a silicon carbide surface (303); After removing the oxide layer, depositing (320; 420) an interface layer (210) directly onto the silicon carbide surface (303), wherein the interface layer (210) has a thickness (t) of less than or equal to 15 nm; Formation (330; 430) of an electrical insulator (22; 220) over the interface layer (210); and Formation (340; 440) of a gate electrode (21) over the electrical insulator, wherein the deposition (420) of the interface layer (210) comprises: Deposition (422) of a silicon layer (810) on the silicon carbide surface (301), Converting (424) the silicon layer and stopping the conversion before the entire silicon layer is converted to obtain a converted layer formed by the converted silicon layer and a remaining silicon layer of the silicon layer, wherein the remaining silicon layer is the interface layer (210) to the silicon carbide body, and wherein the transformed layer is the electrical insulator and / or an additional layer (230) between the interface layer and the electrical insulator. [5] Method according to claim 4, wherein the interface layer (210) has a thickness of less than or equal to 2 nm. [6] Method (400) according to claim 4 or 5, wherein the conversion (425) of the silicon layer (810) comprises at least one of oxidizing the silicon layer and nitriding the silicon layer, such that the converted layer is at least one of a silicon oxide layer, a silicon nitride layer and a silicon oxynitride layer. [7] Method according to any of the preceding claims, wherein the electrical insulator (22; 220) consists of silicon oxide or of a high-k material. [8] Silicon carbide device comprising: a source region (12) of a first conductivity type formed in a silicon carbide body (100), a body region (13) of a second conductivity type formed in the silicon carbide body, and a drain area (14); a gate electrode (21) which is configured to switch a current between the source region and the drain region; an interface layer (210) that is arranged directly on the silicon carbide body and lies between the silicon carbide body and the gate electrode, where the thickness (t) of the interface layer is less than or equal to 15 nm, wherein the interface layer comprises a first surface (301) which is in contact with the silicon carbide body (100) and a second surface (302) which is opposite the first surface, wherein a concentration of carbon within the interfacial layer decreases along a direction (d) pointing from the first surface to the second surface, from a first concentration of carbon at the first surface of the interfacial layer to a second concentration of carbon at a second surface of the interfacial layer opposite the first surface of the interfacial layer, and wherein the carbon concentration is less than half of the first concentration within at least 75% of the interface layer; and an electrical insulator (22; 220) arranged between the interface layer (210) and the gate electrode and configured to electrically insulate the gate electrode from the silicon carbide body, and wherein the interface layer (210) is defined by a first compound and a second compound, and the ratio of the concentration of the first compound and the concentration of the second compound varies along the direction (d) that points from the first surface to the second surface. [9] Silicon carbide device according to claim 8, the first compound is selected from the group consisting of silicon, aluminium, titanium, zirconium, hafnium, gadolinium, tantalum and lanthanum, where the second compound is selected from the group consisting of oxygen, nitrogen and oxynitride, wherein the concentration of the first compound of the material decreases along the direction (d) pointing from the first surface to the second surface, and the concentration of the second compound of the material increases along the direction that points from the first surface to the second surface. [10] Silicon carbide device according to claim 8, where the first compound is selected from the group consisting of oxygen, nitrogen and oxynitride, the second compound is selected from the group consisting of silicon, aluminium, titanium, zirconium, hafnium, gadolinium, tantalum, yttrium and lanthanum, wherein the concentration of the first compound of the material decreases along the direction (d) pointing from the first surface to the second surface, and the concentration of the second compound of the material increases along the direction that points from the first surface to the second surface. [11] Silicon carbide device comprising: a source region (12) of a first conductivity type formed in a silicon carbide body (100), a body region (13) of a second conductivity type formed in the silicon carbide body, and a drain region (14); a gate electrode (21) which is configured to switch a current between the source region and the drain region; an interface layer (210) that is arranged directly on the silicon carbide body and lies between the silicon carbide body and the gate electrode, where the thickness (t) of the interface layer is less than or equal to 15 nm, wherein the interface layer comprises a first surface (301) which is in contact with the silicon carbide body (100) and a second surface (302) which is opposite the first surface, wherein a concentration of carbon within the interfacial layer decreases along a direction (d) pointing from the first surface to the second surface, from a first concentration of carbon at the first surface of the interfacial layer to a second concentration of carbon at a second surface of the interfacial layer opposite the first surface of the interfacial layer, and wherein the carbon concentration is less than half of the first concentration within at least 75% of the interface layer; and an electrical insulator (22; 220) arranged between the interface layer (210) and the gate electrode and configured to electrically insulate the gate electrode from the silicon carbide body, wherein the interface layer (210) consists of monocrystalline silicon. [12] Silicon carbide device comprising: a source region (12) of a first conductivity type formed in a silicon carbide body (100), a body region (13) of a second conductivity type formed in the silicon carbide body, and a drain region (14); a gate electrode (21) which is configured to switch a current between the source region and the drain region; an interface layer (210) that is arranged directly on the silicon carbide body and lies between the silicon carbide body and the gate electrode, where the thickness (t) of the interface layer is less than or equal to 15 nm, wherein the interface layer comprises a first surface (301) which is in contact with the silicon carbide body (100) and a second surface (302) which is opposite the first surface, wherein a concentration of carbon within the interfacial layer decreases along a direction (d) pointing from the first surface to the second surface, from a first concentration of carbon at the first surface of the interfacial layer to a second concentration of carbon at a second surface of the interfacial layer opposite the first surface of the interfacial layer, and wherein the carbon concentration is less than half of the first concentration within at least 75% of the interface layer; and an electrical insulator (22; 220) arranged between the interface layer (210) and the gate electrode and configured to electrically insulate the gate electrode from the silicon carbide body, and wherein the silicon carbide device furthermore, an additional layer (230) comprising a material selected from the group consisting of silicon oxide, silicon nitride and silicon oxynitride, wherein the additional layer is arranged between the interface layer (210) and the electrical insulator (22; 220). [13] Silicon carbide device according to any one of claims 8 to 11, wherein the gate electrode (21), the interface layer (210) and the electrical insulator (22; 220) are arranged in a gate trench extending from a first main surface (101) into the silicon carbide body (100); or wherein the gate electrode (21), the interface layer (210) and the electrical insulator (22; 220) are arranged on a first main surface (101) of the silicon carbide body (100).

Images