POWER-ON RESET CIRCUIT WITH BROWN-OUT DETECTION

Abstract

A voltage monitoring circuit is designed to monitor the input voltage to a current transformer and, in response to the input voltage falling below a threshold, to activate a reset signal to disable the current transformer's operation. The voltage monitoring circuit may include a power-on reset (POR) block, which activates the reset signal in response to the input voltage falling below a first threshold at a first rate, and a brown-out block, which activates the reset signal in response to the input voltage falling below a second threshold at a faster second rate (e.g., the input voltage rapidly dropping to or near zero, such as during a brown-out event).The brown-out block includes a backup supply voltage that maintains a positive voltage level for a certain period even in the absence of the input voltage, and a discharge circuit designed to quickly activate the reset signal.

Description

TECHNICAL FIELD

[0001] This description relates to current transformers and, in particular, to the provision of a power-on reset circuit in a current transformer. BACKGROUND

[0002] Power converters (e.g., DC / DC converters) are commonly used in electronic systems such as consumer electronics, automotive systems, industrial equipment, lighting systems, etc., to convert an input voltage into an output voltage that is higher or lower than the input voltage. Such converters often use a metal-oxide-semiconductor field-effect transistor (MOSFET) as a power switch, which is turned on and off to regulate the output voltage. A feedback loop, along with a controller, is also used to determine the on or off time of the transistor in each switching cycle based on the feedback voltage, which represents the output voltage of the power converter, and a reference voltage, thereby regulating the output voltage of the power converter. Some power converters incorporate two or more such power switches, which can be controlled complementarily to provide a desired output voltage.For example, some current transformers include a high-side power switch and a low-side power switch that are switched on and off using a pulse-width modulation (PWM) scheme provided by the controller. Monitoring the input voltage to the current transformer often involves monitoring multiple voltage levels to ensure the input voltage is not too low or too high. SUMMARY

[0003] According to one embodiment, a circuit includes an input supply voltage terminal, an output control voltage terminal, a power-on-reset (POR) circuit coupled to the input supply voltage terminal, and a brown-out detection circuit coupled to the input supply voltage terminal and the output control voltage terminal. The POR circuit includes a POR circuit output coupled to the output control voltage terminal. The brown-out detection circuit includes a reserve supply voltage input. The brown-out detection circuit is configured to discharge the output control voltage terminal to a reset state in response to a potential difference between the reserve supply voltage input and the input supply voltage terminal exceeding a threshold voltage.

[0004] According to another embodiment, a controller includes a pulse-width modulation circuit configured to determine a switching element duty cycle for a power converter based on a comparison between a reference voltage and a feedback voltage representing an output voltage of the power converter, and a voltage monitoring circuit. The voltage monitoring circuit includes a reset block, a brown-out detection block, a supply block, and an output circuit. The reset block includes a first transistor coupled between an input supply voltage terminal and a resistor, the resistor coupled between the first transistor and a control output. The brown-out detection block includes a second transistor and a discharge module.The second transistor has a control terminal coupled to the input supply voltage terminal, and the discharge module is configured to discharge voltage at the control output to a ground terminal. The supply block has a third transistor coupled to the input supply voltage terminal and to the second transistor. The output circuit is coupled to the control output and is configured to provide an enable signal for the controller.

[0005] According to another embodiment, a voltage monitoring circuit includes a first block configured to activate a first control signal at a control output in response to an input voltage at an input supply voltage rail terminal falling below a first threshold at a first rate, a second block configured to activate a second control signal at the control output in response to the input voltage at the input supply voltage rail terminal falling below a second threshold at a second rate that is faster than the first rate, and an output circuit coupled to the control output and configured to activate a reset signal based on the first or second control signal. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram of a voltage regulator with a voltage monitoring circuit in one example. Fig. 2A is a circuit diagram of the Fig. 1 shown voltage monitoring circuit in an example. Fig. 2B is a more detailed circuit diagram of the Fig. 1 shown voltage monitoring circuit in an example. Fig. Figure 3 illustrates the change of various voltage levels in the voltage monitoring circuit during a brown-out event in one example. Fig. Figure 4 illustrates the change of various voltage levels in the voltage monitoring circuit and the activation of a result signal during a brown-out event in one example. DETAILED DESCRIPTION

[0006] A voltage monitoring circuit is described. In one example, the circuit is configured to monitor the input voltage in a power converter (e.g., a DC / DC step-down converter). The voltage monitoring circuit may be configured to assert a reset signal in response to the input voltage falling below a threshold level to disable operation of the power converter. The voltage monitoring circuit may include a POR (Power-on-Reset) block configured to assert the reset signal in response to the input voltage falling below a first threshold at a first rate, and a brown-out block configured to assert the reset signal in response to the input voltage falling below a second threshold at a faster second rate (e.g., the input voltage rapidly drops to or near zero, e.g., during a brown-out event).The POR block includes a reference voltage source and compares the input voltage with the reference voltage source to determine when the reset signal should be asserted. The brown-out block includes a backup supply voltage that maintains a positive voltage level for a specified period of time even in the absence of input voltage, and a discharge circuit configured to quickly assert the reset signal in response to a potential difference between the backup supply voltage and the input voltage exceeding a threshold voltage. General overview

[0007] As described above, DC / DC power converters often employ some form of input voltage monitoring, which may include elements such as a POR circuit, a bandgap voltage monitor, and an undervoltage lockout circuit. The POR circuit is used to ensure that the input voltage does not drop too low, as a low input voltage can cause the power converter to malfunction. For ultra-low IQ power converters (e.g., IQ in the tens to three digits of nanoamps) designed to operate at low voltages (e.g., between 1.6 V and 1.8 V), the POR circuit may not detect very rapid input voltage drops (e.g., a drop rate of approximately 1 V / µs), such as during a brown-out event.To compensate for this deficiency, control signals from other voltage circuits can be used, resulting in the POR circuit not being self-contained, thereby increasing both design complexity and vulnerability.

[0008] Thus, according to some embodiments of the present disclosure, a voltage monitoring circuit is disclosed that includes a built-in brown-out detection circuit for activating a reset signal in response to a brown-out condition, as well as a POR circuit for activating the reset signal when the input voltage falls below a threshold. The voltage monitoring circuit may be used with a current converter to disable the current converter when the input voltage becomes too low. The POR circuit and the brown-out detection circuit may each be coupled between an input supply voltage terminal and an output control voltage terminal. The output control voltage terminal may have a logic HIGH voltage level when the input voltage is above a certain threshold for successful operation of the current converter and may be connected to a ground potential (e.g.,a logic LOW level) when the input voltage falls below the threshold.

[0009] According to some embodiments, the POR circuit uses a reference voltage source coupled to the gate terminal of a first transistor and the input voltage terminal coupled to a first source or drain terminal of the first transistor. The second source or drain terminal of the first transistor is coupled to the output control voltage terminal via a resistor, according to some embodiments. The voltage at the output control voltage terminal can be driven to a logic LOW level, according to some embodiments, in response to the input voltage falling below a threshold voltage approximately equal to the sum of the reference voltage generated by the reference voltage source and the voltage drop at the source-gate junction of the first transistor. The source-gate voltage, according to some embodiments, enables the first transistor to output a current approximately equal to I PDis in saturation (as described in more detail with reference to Fig. 2 and Fig. 3 explained).

[0010] The brown-out detection circuit may include a second transistor having a gate terminal coupled to the voltage input terminal, a first source or drain terminal coupled to a reserve supply voltage terminal, and a second source or drain terminal coupled to a discharge circuit. The discharge circuit may have an output coupled to the output control voltage terminal and be configured to pull the output control voltage terminal to a ground potential in response to receiving a reserve supply voltage from the reserve supply voltage terminal when the second transistor is turned on. The reserve supply voltage terminal may be coupled to a capacitor and to a first source or drain terminal of a third transistor.A second source or drain terminal of the third transistor may be coupled to the input voltage terminal, while the control terminal of the third transistor is coupled to another reference voltage source, according to some embodiments.

[0011] Numerous other variations emerge from the embodiments described here. Electronic system

[0012] Fig. 1 illustrates at least a portion of an example electronic system 100. In some cases, the electronic system 100 is implemented as a system-on-chip, a chipset on a printed circuit board (PCB), or as a set of discrete components on a printed circuit board (PCB), which may in turn be integrated into a package of a multi-package system or other higher-level system, although any number of implementations may be used. The electronic system 100 may be part of a switching regulator or power converter, such as a DC-DC step-down switching converter.

[0013] According to some embodiments, electronic system 100 includes a power converter circuit 102, which may be implemented as a chip in a chip package and may have various input / output (I / O) terminals, such as an enable terminal (EN), a power supply terminal (VIN), a bootstrap terminal (BST), a switch node terminal (SW), a ground terminal (GND), and a feedback terminal (FB). Any number of other I / O terminals may be provided.

[0014] According to some embodiments, the power converter circuit 102 includes a high-side switching element (HSD) along with an associated high-side driver (HS) and a low-side switching element (LSD) along with an associated low-side driver (LS). As shown in Fig. 1, both the high-side switching element HSD and the low-side switching element LSD may be n-channel MOSFETs, although other suitable switching elements may be used. The high-side switching element HSD has a first terminal connected to an input power supply rail (e.g., the V IN- terminal) and a second terminal coupled to the switching node SW of the current transformer. Accordingly, the state of the high-side driver HS controls the gate terminal of the high-side switching element HSD, and the high-side switching element HSD supplies the input voltage to V INto the switching node SW when the high-side switching element HSD is turned on. The low-side switching element LSD has a first terminal coupled to the switching node SW and a second terminal coupled to a ground rail (e.g., to the ground terminal GND). The ground terminal GND may be a global ground associated with the chip that includes the power converter circuit 102. The state of the low-side driver LS controls the gate terminal of the low-side switching element LSD, and the low-side switching element LSD provides a ground voltage to the switching node SW when the low-side switching element LSD is turned on. Only one of HSD and LSD can be turned on at a time, and the LSD is turned off when the HSD is turned on, and vice versa.

[0015] A boost capacitor Cb may be coupled between the switching node SW and the bootstrap terminal BST (or a bootstrap voltage rail) and may be used to provide a boosted voltage higher than the output switching voltage at SW, together with a bootstrap charging circuit 104 (used, for example, to charge Cb) between the bootstrap terminal BST and the input voltage terminal V IN This boosted voltage can then be supplied to the positive supply rail of the high-side driver HS.

[0016] An inductor LOUT may be provided at the switching node SW to smooth the changing voltage and provide a more stable output voltage than VOUT. In some cases, the inductor LOUT may be part of a transformer or any other suitable energy storage element, for example. A voltage divider with resistors R1 and R2 may be provided at the output to generate a feedback voltage that is fed to the feedback terminal FB of the power converter circuit 102.

[0017] A controller 106 provides control signals (e.g. HS on and LS on) to the inputs of the high-side driver HS and the low-side driver LS, respectively. These control signals may be pulse-width modulated signals that drive the respective high-side and low-side switching elements. The controller 106 may also receive various inputs (e.g., the feedback voltage at the feedback terminal FB) to facilitate the generation of the control signals via an internal pulse-width modulation circuit. According to some embodiments, the pulse-width modulation circuit of the controller 106 determines a duty cycle of both control signals HS on and LS on based at least on a comparison between an internal reference voltage and the feedback voltage received at the feedback terminal FB.

[0018] According to some embodiments, the electronic system 100 also includes a voltage monitoring circuit 108 connected to the input voltage terminal V INThe voltage monitoring circuit 108 may be configured to monitor the voltage level of the input voltage terminal V IN and provide an output reset signal in response to a voltage level at the input voltage terminal V IN falls below a threshold, activate. In some examples, the reset signal is received by an enable terminal coupled to controller 106, and the state of the reset signal determines whether controller 106 is operating or not. In an example where the voltage level at input voltage terminal V IN falls below the threshold, the voltage monitoring circuit 108 may activate the reset signal to disable the operation of the controller 106. According to some embodiments, the voltage monitoring circuit 108 is configured to respond to a rapid drop in the voltage level of the input voltage terminal V IN, e.g., during a brown-out event. It is understood that the voltage monitoring circuit 108 may be integrated into the controller 106, such that it is provided on the same die as the controller 106. In some other examples, the voltage monitoring circuit 108 is provided on a separate die from the controller 106 and / or the power converter circuit 102.

[0019] Fig. Figure 2A illustrates a diagram of the voltage monitoring circuit 108 according to some embodiments. The voltage monitoring circuit 108 includes a POR circuit 202, a brown-out detection circuit 204, a supply circuit 206, and an output circuit 207. According to some embodiments, the POR circuit 202 may be configured to monitor the logic voltage level of the output control voltage terminal V CTRL in response to the voltage level of the input voltage terminal V INfalls below a first threshold at a first rate, while the brown-out detection circuit 204 may be configured to detect the logic voltage level of the output control voltage terminal V CTRL in response to the voltage level of the input voltage terminal V IN at a second rate that is faster than the first rate, below a second threshold (e.g., during a brownout event). In some examples, the second rate may be a voltage drop of approximately 1 V / µs or more. The first and second thresholds may be designed to be approximately the same voltage level.

[0020] According to some embodiments, the POR circuit 202 is connected between the input voltage terminal V IN and an output control voltage terminal (V CTRL ). According to some embodiments, the voltage level of the output control voltage terminal V CTRLin response to the voltage level of the input voltage terminal V IN falls below the first threshold, brought to a logical LOW level (e.g. connected to ground).

[0021] According to some embodiments, the POR circuit 202 includes a transistor M P1 with a gate terminal coupled to a first reference voltage source 208, a first source / drain terminal coupled to the input voltage terminal V IN and a second source / drain terminal connected via a resistor R1 to the output control voltage terminal V CTRL The first reference voltage source 208 may provide a reference voltage V REF1 provide based on V IN is generated. If V IN falls below the first threshold, M P1 switched off, and the current I PD pulls the potential at the output control voltage terminal V CTRLdown. The first threshold V POR can be determined by the following expression: VPOR=VREF1+|VGS_MP1| where V GS_MP1 the voltage drop at the gate and source terminals of transistor M P1 The value of V GS_MP1 depends on the physical parameters of the transistor M P1 and can be determined by the following expression: IPD=μ⋅Cox⋅wmp1lMP1⋅(n−1)⋅VT2⋅evGS_MP1−vTH_MP1n⋅VT where I PD the value of the pull-down current source is C ox the capacitance of the gate oxide of M P1 is, W MP1 the gate width of M P1 is, L MP1 the gate length of M P1 is and V T is the thermal voltage. The time to pull down the potential of the output control voltage terminal V CTRL can be scaled by the value of IPD.

[0022] According to some embodiments, the brown-out detection circuit 204 includes another transistor M P2 with a gate terminal connected to the input voltage terminal V IN a first source / drain terminal connected to a reserve supply terminal V UPS and a second source / drain terminal coupled to a discharge circuit 210. According to some embodiments, the supply voltage remains at the reserve supply terminal V UPS for a certain period of time at a certain positive voltage level, even after the voltage level of the input voltage terminal V IN drops to zero (e.g., a brown-out condition). Accordingly, the reserve supply voltage can be maintained even in the absence of V INbe used to activate the discharge circuit 210. According to some embodiments, the discharge circuit 210 may be arranged to connect the output control voltage terminal V CTRL in response to M P2 is switched on and the reserve supply voltage at the reserve supply terminal V UPS about M P2 received to a ground potential or a logic LOW voltage level. Further details of the discharge circuit 210 will be described with reference to Fig. 2B provided.

[0023] The supply circuit 206 includes, according to some embodiments, elements for generating a reserve supply voltage at the reserve terminal V UPS . For example, the supply circuit 206 includes another transistor M P3with a gate terminal coupled to a second reference voltage source 212, a first source / drain terminal coupled to the input voltage terminal V IN and a second source / drain terminal connected to the reserve supply terminal V UPS A capacitor C2 can also be connected between the reserve supply terminal V UPS and ground. According to some embodiments, the reserve supply voltage is coupled to V UPS to the value of V IN charged at capacitor C2, while MP3 operates in the triode region. During a brown-out event, the voltage at the input voltage terminal V IN quickly to zero (or close to zero), causing the transistor M P2 switched on and also the stored potential at the reserve supply terminal V UPS is discharged. The V UPS However, the voltage levels off at a value determined by the following expression: VUPS=VREF2+|VTH_MP3|

[0024] According to some embodiments, the rapid drop in voltage at V IN during a brown-out event by transistor M P2 directly, whereby the discharge circuit 210 is activated when the voltage falls below the second threshold V POR_BO which is determined by the following expression: VPOR_BO=VREF2+|VTH_MP3|−|VTHMP2|

[0025] By adjusting the values ​​of V REF1 and V REF2 the two threshold voltages V POR and V POR_BO according to equations 1 and 4 are made essentially equal to each other.

[0026] The output control voltage terminal V CTRLmay be coupled to output circuit 207 to generate a reset signal that may be received by controller 106 (or any other associated circuitry) to disable operation of power converter circuit 102. Output circuit 207 may include a Schmitt trigger or an inverter circuit to generate the reset signal. In the illustrated embodiment, the reset signal is switched to a logic HIGH level to disable operation of power converter circuit 102. In other examples, the reset signal may be switched to a logic LOW level to disable operation of power converter circuit 102.

[0027] Fig. Figure 2B illustrates a more detailed diagram of the voltage monitoring circuit 108 according to some embodiments. Example designs of the first reference voltage source 208, the discharge circuit 210, and the second reference voltage source 212 are shown.

[0028] The first reference voltage source 208 and the second reference voltage source 212 include any number of cascading transistor pairs Q x and D x , which operate in the subthreshold regime according to some embodiments. Each Q-transistor (e.g., Q1-Q5) may be a native transistor with a threshold voltage of substantially 0, while each D-transistor (e.g., D1-D5) may be a transistor arranged in a diode configuration, with the drain terminal of each D-transistor coupled to its gate terminal. The first reference voltage source 208 is arranged to supply V REF1 based on the voltage of V INand the second reference voltage source 212 is arranged to provide V REF2 based on the reserve voltage of V UPS to provide, according to some embodiments. Each of transistors Q1-Q5 and D1-D5 may be n-channel transistors, according to some embodiments. Any of the diode-configured transistors D1-D5 may be replaced with a two-terminal diode, according to some embodiments.

[0029] According to some embodiments, the discharge circuit 210 includes a first transistor M N1 , which is arranged in a diode configuration and connected in series with another resistor R2. Accordingly, a gate terminal of M N1 with a first source / drain terminal of M N1 be coupled, while a first terminal of R2 is connected to the first source / drain terminal of M N1and a second terminal of R2 is connected to the gate terminal of another transistor M N2 The gate terminal of M N2 is connected to the second source / drain terminal of M P2 coupled and thus receives the reserve voltage of V UPS , if M P2 is switched on during a brown-out event. The reception of the reserve voltage V UPS at the gate terminal of M N2 switches M N2 to set the output voltage control terminal V CTRL to ground. According to some embodiments, a C3 may also be connected between the gate terminal of M N2 and ground coupled.

[0030] Each of the transistors M N1 and M N2 may be n-channel transistors. According to some embodiments, the threshold voltage of M N1 lower than the threshold voltage of M N2 be.

[0031] According to some embodiments, the current source I PD by another native transistor (Q6) connected in series with a resistor R3. For example, a first source / drain terminal of transistor Q6 is connected to the output voltage control terminal V CTRL coupled, a second source / drain terminal of Q6 is coupled to a first terminal of resistor R3, a gate terminal of Q6 is coupled to ground, and a second terminal of resistor R3 is coupled to ground.

[0032] Fig. Figure 3 illustrates a graph of various voltages versus time from the voltage monitoring circuit 108 during a brown-out event, according to some embodiments. Before the brown-out event occurs, the reserve voltage level at V UPS essentially equal to the input voltage level at V IN . Furthermore, V REF2set to a constant level which is a predetermined fraction of V depending on the design of the second reference voltage source 212 UPS At the beginning of the brown-out event at about 50 µs, there is a sharp drop in the voltage at V IN to 0. The reserve voltage V UPS also drops, but stops at a voltage level (e.g., about 1.5 V in the example shown) based on the value of V REF2 , as indicated in Equation 3 above. The second reference voltage source 212 remains relatively stable following the brown-out event and, according to some embodiments, experiences only a small potential drop.

[0033] Fig.Figure 4 illustrates additional graphs of various voltage levels versus time from voltage monitoring circuit 108 during a brown-out event, according to some embodiments. The brown-out event occurs at approximately 50 µs. As previously shown, the voltage level at V IN when the brown-out event occurs. The sharp drop in V IN activates the discharge circuit 210, which connects the output voltage control terminal V CTRL quickly to ground, as shown in the diagram below. Due to the sharp decrease in potential at V CTRL the reset signal is activated to a positive voltage level above 0 (e.g., about 1 V in the example shown). At a later time (e.g., at about 350 µs in the example shown), the voltage at V INto its original level or to another operating level. The increase in the voltage level at VIN eventually turns on transistor M P2 off, effectively disabling the discharge circuit 210 and allowing the potential at V CTRL back to a level around V IN (or another suitable operating level). As soon as the potential at the output voltage control terminal V CTRL rises high enough, the reset signal is deactivated again to a logical LOW level (e.g. about 0 volts) and the current transformer can operate normally again.

[0034] In this description, the term "couple" can cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by a direct connection; or (b) in a second example, device A is coupled to device B via an intervening component C, where the intervening component C does not change the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.

[0035] A device "configured" to perform a task or function may be configured (e.g., programmed and / or hard-wired) at the time of manufacture by a manufacturer to perform the function, and / or may be configurable (or reconfigurable) by a user after manufacture to perform the function and / or other additional or alternative functions. Configuring may be accomplished through firmware and / or software programming of the device, through a design and / or construction of hardware components and interconnections of the device, or a combination thereof.

[0036] As used herein, the terms "terminal," "node," "connection," "pin," and "lead" are used interchangeably. Unless otherwise indicated, the use of these terms generally means a connection between, or termination of, a device element, circuit element, integrated circuit, device, or semiconductor component. Furthermore, a voltage rail, or more simply a "rail," may also be referred to as a voltage terminal and can generally mean a common node or set of coupled nodes in a circuit having the same potential.

[0037] A circuit or device that includes certain components according to the present description may instead be configured to be coupled to those components to form the described circuit arrangement or device. For example, a structure that is described as comprising one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and / or inductors), and / or one or more sources (such as voltage and / or current sources) may instead include only the semiconductor elements in a single physical device (e.g., a semiconductor die and / or an integrated circuit (IC) package) and may be configured to be coupled to at least some of the passive elements and / or sources, either during manufacture or after manufacture, such as by an end user and / or a third party, to form the described structure.

[0038] Although the use of specific transistors is described here, other transistors (or equivalent devices) may be used instead. For example, a p-channel field-effect transistor (PFET) may be used instead of an n-channel field-effect transistor (NFET) with little or no circuit modification. Furthermore, other types of transistors (such as bipolar transistors (BJTs)) may be used. Furthermore, the devices may be implemented in / over a silicon (Si) substrate, a silicon carbide (SiC) substrate, a gallium nitride (GaN) substrate, or a gallium arsenide (GaAs) substrate. Furthermore, reference to transistor features such as gate, source, or drain is not intended to exclude suitable transistor technologies. For example, features such as source, drain, and gate are typically used to refer to a FET, while emitter, collector, and base are typically used to refer to a BJT.Such features may be used interchangeably herein. For example, reference to the gate of a transistor may refer to either the gate of a FET or the base of a BJT, and vice versa. In some examples, a control terminal may refer to either the gate of a FET or the base of a BJT. Any other suitable transistor technologies may be used. Any of these transistors may be used as a switch, with the gate or base or other comparable feature acting as a switch select input that can be driven to connect the source and drain (or, where appropriate, the emitter and collector).

[0039] References herein to a field-effect transistor (FET) being "on" (or a switch being closed) mean that the FET's conduction channel is present and drain current can flow through the FET. References herein to a FET being "off" (or a switch being open) mean that the conduction channel is absent and no drain current flows through the FET. However, with a FET turned off, current can flow through the transistor's body diode.

[0040] Circuits described herein are reconfigurable to include additional or different components to provide functionality that is at least partially similar to the functionality available prior to component replacement. Unless otherwise noted, components shown as resistors generally represent one or more elements connected in series and / or parallel to provide an amount of impedance represented by the shown resistance. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors connected in parallel between the same nodes. For example, a resistor or capacitor shown and described herein as a single component may instead be multiple resistors or capacitors connected in parallel between the same nodes.Capacitors connected in series between the same two nodes as the single resistor or capacitor.

[0041] Uses of the term "mass" in the foregoing description include chassis mass, earth mass, floating mass, virtual mass, digital mass, common mass, and / or any other form of ground connection applicable or suitable to the teachings of this description. Unless otherwise noted, "about," "approximately," or "substantially" used in this description before a parameter means within + / - 10% of that parameter. Further examples

[0042] Example 1 is a circuit including an input supply voltage terminal, an output control voltage terminal, a power-on-reset (POR) circuit coupled to the input supply voltage terminal, and a brown-out detection circuit coupled to the input supply voltage terminal and the output control voltage terminal. The POR circuit includes a POR circuit output coupled to the output control voltage terminal. The brown-out detection circuit includes a reserve supply voltage input. The brown-out detection circuit is configured to discharge the output control voltage terminal to a reset state in response to a potential difference between the reserve supply voltage input and the input supply voltage terminal exceeding a threshold voltage.

[0043] Example 2 includes the circuit of Example 1, wherein the POR circuit includes a reference voltage source, a first transistor having a first current terminal, a second current terminal, and a control terminal, wherein the first current terminal of the first transistor is coupled to the input supply voltage terminal and the control terminal of the first transistor is coupled to the reference voltage source, a resistor coupled between the second current terminal of the first transistor and the output control voltage terminal, and a capacitor coupled between the output control voltage terminal and a ground terminal.The brown-out detection circuit includes a second transistor having a first current terminal, a second current terminal, and a control terminal, wherein the control terminal of the second transistor is coupled to the input supply voltage terminal and the first current terminal of the second transistor is coupled to the reserve supply voltage input, and a discharge circuit coupled to the second current terminal of the second transistor and to the output control voltage terminal.

[0044] Example 3 includes the circuit of Example 2, wherein the reference voltage source is a first reference voltage source, the capacitor is a first capacitor, and the circuit further comprises a backup supply voltage circuit including a third transistor having a first current terminal, a second current terminal, and a control terminal, the first current terminal of the third transistor being coupled to the input supply voltage terminal, the control terminal of the third transistor being coupled to a second reference voltage source, and the second current terminal of the third transistor being coupled to the backup supply voltage input of the brown-out detection circuit, and a second capacitor coupled between the backup supply voltage input of the brown-out detection circuit and the ground terminal.

[0045] Example 4 includes the circuit of Example 3, wherein the first transistor, the second transistor, and the third transistor are each a PMOS transistor.

[0046] Example 5 includes the circuit of example 3 or 4, further comprising a third capacitor coupled between the second power terminal of the second transistor and the ground terminal.

[0047] Example 6 includes the circuit of any one of Examples 3-5, wherein the resistor is a first resistor and the discharge circuit comprises a second resistor and a diode circuit connected in series with each other between the second power terminal of the second transistor and the ground terminal.

[0048] Example 7 includes the circuit of Example 6, wherein the diode circuit includes a diode or a diode-connected transistor.

[0049] Example 8 includes the circuit of example 6 or 7, wherein the discharge circuit comprises a fourth transistor having a first current terminal, a second current terminal, and a control terminal, wherein the first current terminal of the fourth transistor is coupled to the output control voltage terminal, the second current terminal of the fourth transistor is coupled to the ground terminal; and the control terminal of the fourth transistor is coupled to the second current terminal of the second transistor.

[0050] Example 9 includes the circuit of Example 8, wherein a threshold voltage of the diode circuit is lower than a threshold voltage of the fourth transistor.

[0051] Example 10 includes the circuit of any one of Examples 1-9, further comprising an output circuit having an input coupled to the output control voltage terminal and configured to generate a reset signal based on a state of the output control voltage terminal.

[0052] Example 11 includes the circuit of Example 10, wherein the output circuit comprises a Schmitt trigger circuit.

[0053] Example 12 includes the circuit of Example 10, wherein the output circuit comprises an inverter circuit.

[0054] Example 13 includes the circuit of any one of Examples 1-12, wherein the POR circuit includes a current source coupled to the output control voltage terminal.

[0055] Example 14 includes the circuit of Example 13, wherein the current source comprises a native transistor having a first current terminal coupled to the output control voltage terminal and a second current terminal coupled to a ground terminal via a resistor.

[0056] Example 15 is an integrated circuit that includes the circuit of any one of Examples 1-14.

[0057] Example 16 is a current transformer that includes the circuit of any one of Examples 1-14.

[0058] Example 17 includes the current transformer of Example 16, wherein the current transformer is a DC / DC current transformer.

[0059] Example 18 is a controller including a pulse width modulation circuit configured to determine a switching element duty cycle for a power converter based on a comparison between a reference voltage and a feedback voltage representing an output voltage of the power converter, and a voltage monitoring circuit. The voltage monitoring circuit includes a reset block, a brown-out detection block, a supply block, and an output circuit. The reset block includes a first transistor coupled between an input supply voltage terminal and a resistor, the resistor coupled between the first transistor and a control output. The brown-out detection block includes a second transistor and a discharge module.The second transistor has a control terminal coupled to the input supply voltage terminal, and the discharge module is configured to discharge voltage at the control output to a ground terminal. The supply block has a third transistor coupled to the input supply voltage terminal and to the second transistor. The output circuit is coupled to the control output and is configured to provide an enable signal for the controller.

[0060] Example 19 includes the controller of Example 18, wherein the reset block includes a capacitor coupled between the control output and a ground terminal.

[0061] Example 20 includes the controller of example 18 or 19, wherein the reset block includes a current source coupled to the control output.

[0062] Example 21 includes the controller of Example 20, wherein the resistor is a first resistor and the current source comprises a native transistor coupled between the control output and a second resistor.

[0063] Example 22 includes the controller of any of Examples 18-21, wherein the first transistor, the second transistor, and the third transistor are each a PMOS transistor.

[0064] Example 23 includes the controller of any of Examples 18-22, wherein the resistor is a first resistor and the discharge module includes a second resistor coupled to the second transistor.

[0065] Example 24 includes the controller of Example 23, further comprising a capacitor coupled to the second resistor.

[0066] Example 25 includes the controller of example 23 or 24, wherein the discharge module comprises a fourth transistor coupled to the control output and coupled to the second resistor.

[0067] Example 26 includes the controller of Example 25, further comprising a fifth transistor coupled between the second resistor and a ground terminal.

[0068] Example 27 includes the control of Example 26, wherein a threshold voltage of the fifth transistor is lower than a threshold voltage of the fourth transistor.

[0069] Example 28 includes the controller of any of Examples 18-27, wherein the output circuit comprises a Schmitt trigger having a first terminal coupled to the control output and a second terminal coupled to an output terminal.

[0070] Example 29 includes the controller of any one of Examples 18-27, wherein the output circuit comprises an inverter circuit.

[0071] Example 30 is a power converter circuit that includes the controller of any one of Examples 18-29, a high-side switching element coupled between the input supply voltage terminal and a switching voltage terminal, a first driver having an output coupled to a control terminal of the high-side switching element, a low-side switching element coupled between the switching voltage terminal and a ground terminal of the power converter circuit, and a second driver having an output coupled to a control terminal of the low-side switching element.

[0072] Example 31 is a voltage monitoring circuit that includes a first block configured to assert a first control signal at a control output in response to an input voltage at an input supply voltage rail terminal falling below a first threshold at a first rate, a second block configured to assert a second control signal at the control output in response to the input voltage at the input supply voltage rail terminal falling below a second threshold at a second rate faster than the first rate, and an output circuit coupled to the control output and configured to assert a reset signal based on the first or second control signal.

[0073] Example 32 includes the voltage monitoring circuit of Example 31, wherein the first block comprises a transistor connected in series with a resistor.

[0074] Example 33 includes the voltage monitoring circuit of Example 32, wherein the transistor includes a first current terminal, a second current terminal, and a control terminal, the first current terminal of the transistor being coupled to the input supply voltage terminal, the control terminal of the transistor being coupled to a reference source, and the second current terminal of the transistor being coupled to the resistor.

[0075] Example 34 includes the voltage monitoring circuit of example 32 or 33, wherein the resistor is coupled between the transistor and the control output.

[0076] Example 35 includes the voltage monitoring circuit of any one of Examples 31-34, further comprising a capacitor coupled between the control output and a ground rail terminal.

[0077] Example 36 includes the voltage monitoring circuit of any of Examples 31-35, wherein the second block comprises a transistor having a gate terminal coupled to the input supply voltage terminal and a first current terminal coupled to a discharge module.

[0078] Example 37 includes the voltage monitoring circuit of Example 36, wherein the discharge module includes a resistor coupled to the first power terminal of the transistor.

[0079] Example 38 includes the voltage monitoring circuit of Example 37, wherein the discharge module comprises a capacitor coupled between the first power terminal of the transistor and a ground rail terminal.

[0080] Example 39 includes the voltage monitoring circuit of example 37 or 38, wherein the transistor is a first transistor and the discharge module comprises a second transistor coupled to the control output and coupled to the resistor.

[0081] Example 40 includes the voltage monitoring circuit of Example 39, further comprising a third transistor coupled between the resistor and a ground terminal.

[0082] Example 41 includes the voltage monitoring circuit of Example 40, wherein a threshold voltage of the third transistor is lower than a threshold voltage of the second transistor.

[0083] Example 42 includes the voltage monitoring circuit of any of Examples 36-41, wherein the transistor is a first transistor and the second block comprises a second transistor having a control terminal coupled to a reference source, a first current terminal coupled to the input supply voltage rail terminal, and a second current terminal coupled to a second current terminal of the first transistor.

[0084] Example 43 includes the voltage monitoring circuit of Example 42, wherein the second block comprises a capacitor coupled between the second power terminal of the first transistor and a ground rail terminal.

[0085] Example 44 includes the voltage monitoring circuit of any one of Examples 31-43, wherein the output circuit comprises a Schmitt trigger.

[0086] Example 45 includes the voltage monitoring circuit of any one of Examples 31-43, wherein the output circuit comprises an inverter circuit.

[0087] Example 46 is a voltage regulator comprising the voltage monitoring circuit of any one of Examples 31-45, the input supply voltage terminal, a ground rail terminal, a feedback circuit configured to provide a feedback voltage representing an output voltage of the voltage regulator, a first switching element coupled between the input supply voltage terminal and a switching terminal, a first driver coupled to a control terminal of the first switching element, a second switching element coupled between the switching terminal and the ground rail terminal such that the first and second switching elements are connected in series between the input supply voltage terminal and the ground rail terminal, a second driver coupled to a control terminal of the second switching element, a reference generator circuit configured to generate a reference voltage,and a pulse width modulation circuit configured to determine a duty cycle of the first switching element and the second switching element based on a comparison between the feedback voltage and the reference voltage.

[0088] Modifications of the described examples as well as other examples are possible within the scope of the claims.

Claims

[1] Circuit comprising: an input supply voltage terminal; an output control voltage terminal; a power-on-reset (POR) circuit coupled to the input supply voltage terminal and including a POR circuit output coupled to the output control voltage terminal; and a brown-out detection circuit coupled to the input supply voltage terminal and the output control voltage terminal, the brown-out detection circuit including a reserve supply voltage input and configured to discharge the output control voltage terminal to a reset state in response to a potential difference between the reserve supply voltage input and the input supply voltage terminal exceeding a threshold voltage. [2] A circuit according to claim 1, wherein: the POR circuit includes: a reference voltage source, a first transistor having a first current terminal, a second current terminal and a control terminal, wherein the first current terminal of the first transistor is coupled to the input supply voltage terminal and the control terminal of the first transistor is coupled to the reference voltage source, a resistor coupled between the second current terminal of the first transistor and the output control voltage terminal, and a capacitor coupled between the output control voltage terminal and a ground terminal; and / or The brown-out detection circuit includes: a second transistor having a first current terminal, a second current terminal and a control terminal, wherein the control terminal of the second transistor is coupled to the input supply voltage terminal and the first current terminal of the second transistor is coupled to the reserve supply voltage input, and a discharge circuit coupled to the second current terminal of the second transistor and to the output control voltage terminal. [3] The circuit of claim 2, wherein the reference voltage source is a first reference voltage source, the capacitor is a first capacitor, and the circuit further comprises a backup supply voltage circuit including: a third transistor having a first current terminal, a second current terminal, and a control terminal, wherein the first current terminal of the third transistor is coupled to the input supply voltage terminal, the control terminal of the third transistor is coupled to a second reference voltage source, and the second current terminal of the third transistor is coupled to the reserve supply voltage input of the brown-out detection circuit; and a second capacitor coupled between the reserve supply voltage input of the brown-out detection circuit and the ground terminal. [4] The circuit of claim 3, wherein the resistor is a first resistor and the discharge circuit comprises a second resistor and a diode circuit connected in series with each other between the second power terminal of the second transistor and the ground terminal. [5] The circuit of claim 4, wherein the discharge circuit comprises a fourth transistor having a first current terminal, a second current terminal, and a control terminal, wherein the first current terminal of the fourth transistor is coupled to the output control voltage terminal, the second current terminal of the fourth transistor is coupled to the ground terminal; and the control terminal of the fourth transistor is coupled to the second current terminal of the second transistor. [6] The circuit of claim 1, further comprising an output circuit having an input coupled to the output control voltage terminal and configured to generate a reset signal based on a state of the output control voltage terminal. [7] A DC / DC power converter comprising the circuit of claim 1. [8] Control which includes: a pulse width modulation circuit configured to determine a switching element duty cycle for a current transformer based on a comparison between a reference voltage and a feedback voltage representing an output voltage of the current transformer; and a voltage monitoring circuit comprising: a reset block including a first transistor coupled between an input supply voltage terminal and a resistor, the resistor being coupled between the first transistor and a control output, a brown-out detection block including a second transistor and a discharge module, wherein the second transistor has a control terminal coupled to the input supply voltage terminal, and the discharge module is configured to discharge voltage at the control output to a ground terminal, a supply block having a third transistor coupled to the input supply voltage terminal and to the second transistor, and an output circuit coupled to the control output and configured to provide an enable signal for the controller. [9] The controller of claim 8, wherein the resistor is a first resistor and the discharge module comprises a second resistor coupled to the second transistor. [10] The controller of claim 9, wherein the discharge module comprises a fourth transistor coupled to the control output and coupled to the second resistor. [11] The controller of claim 10, further comprising a fifth transistor coupled between the second resistor and a ground terminal. [12] The controller of claim 11, wherein a threshold voltage of the fifth transistor is lower than a threshold voltage of the fourth transistor. [13] The controller of claim 8, wherein the output circuit comprises a Schmitt trigger having a first terminal coupled to the control output and a second terminal coupled to an output terminal. [14] Voltage monitoring circuit comprising: a first block configured to activate a first control signal at a control output in response to an input voltage at an input supply voltage terminal falling below a first threshold at a first rate; a second block configured to activate a second control signal at the control output in response to the input voltage at the input supply voltage terminal falling below a second threshold at a second rate that is faster than the first rate; and an output circuit coupled to the control output and configured to activate a reset signal based on the first or second control signal. [15] The voltage monitoring circuit of claim 14, wherein the first block comprises a transistor connected in series with a resistor. [16] The voltage monitoring circuit of claim 14, further comprising a capacitor coupled between the control output and a ground rail terminal. [17] The voltage monitoring circuit of claim 14, wherein the second block comprises a transistor having a gate terminal coupled to the input supply voltage terminal and a first current terminal coupled to a discharge module. [18] The voltage monitoring circuit of claim 17, wherein the transistor is a first transistor and the second block comprises a second transistor having a control terminal coupled to a reference source, a first current terminal coupled to the input supply voltage terminal, and a second current terminal coupled to a second current terminal of the first transistor. [19] The voltage monitoring circuit of claim 18, wherein the second block comprises a capacitor coupled between the second power terminal of the first transistor and a ground rail terminal. [20] Voltage regulator comprising: the voltage monitoring circuit according to claim 14; the input supply voltage connection; a ground rail connection; a feedback circuit configured to provide a feedback voltage representing an output voltage of the voltage regulator; a first switching element coupled between the input supply voltage terminal and a switching terminal; a first driver coupled to a control terminal of the first switching element; a second switching element coupled between the switching terminal and the ground rail terminal such that the first and second switching elements are connected in series between the input supply voltage terminal and the ground rail terminal; a second driver coupled to a control terminal of the second switching element; a reference generator circuit configured to generate a reference voltage; and a pulse width modulation circuit configured to determine a duty cycle of the first switching element and the second switching element based on a comparison between the feedback voltage and the reference voltage.

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