Chip verification method based on SPI (Serial Peripheral Interface)

Abstract

An SPI-based chip verification procedure comprises the following steps: (a) retrieving parameter information from a module of a chip under test and a corresponding register; (b) writing a test case for the module; (c) transferring the parameter information in the test case via a driver to a top-level SPI bus of the chip under test, accessing a register of the module; (d) verifying the access result to determine if the register is functioning correctly; (e) repeating steps (b) through (d) until all registers of the current module have been verified; and (f) repeating steps (a) through (e) until all modules of the chip have been verified. This procedure does not require using the chip bus to access the registers, thus reducing the load on the chip bus, decreasing the probability of access errors, and improving the efficiency of chip verification.

Description

TECHNICAL FIELD OF THE INVENTIONThe present invention relates to the field of chip verification and, more particularly, to a chip verification method based on SPI (Serial Peripheral Interface).BACKGROUND OF THE INVENTIONAs the chip fabrication processes continue to improve, the number of functional modules integrated within chips has increased, resulting in an increasing total number of registers required. Consequently, the verification of chips has become increasingly complex, making the checking of the registers more cumbersome. When all the access methods for registers are merged, the error probability increases significantly and it becomes difficult to make accurate judgements about the verification results. Previously, most chip registers were accessed directly via a configuration bus. However, with the increasing complexity of the internal structure of chips and the plurality of dedicated registers for each functional module, the conventional method for accessing different registers of different modules is prone to errors. This results in unorganized hierarchical logic that is unsuitable for verifying chips with more complex functions and structures.Therefore, there is a need to provide an improved verification method that allows the registers to be accessed without using the chip bus. The SPI-based chip verification method described in the present invention aims to overcome the above-mentioned deficiencies. The chip verification method based on SPI of the present invention aims to overcome the augmented deficiencies.SUMMARY OF THE INVENTIONThe object of the present invention is to provide a chip verification method based on SPI that allows to access the registers without using the chip bus. This reduces the load on the chip bus, reduces the probability of access errors and improves the efficiency of chip verification.To achieve the above objects, the present invention provides an SPI-based chip verification method comprising the following steps:(a) retrieving parameter information of a module of a chip under test and a corresponding register within the module;(b) writing a test case for the module based on the parameter information;(c) transmitting the parameter information in the test case via a driver to an SPI bus at the top level of the chip to be tested, accessing at least one register of a current module of the chip to be tested and retrieving an access result;(d) verifying the access result to determine whether a current register of the current module is functioning properly;(e) repeating steps (b) through (d) until all of the registers of the current module have been verified; and(f) repeating steps (a) to (e) until all modules of the chip have been verified.As a preferred embodiment, the method additionally comprises determining whether an SPI flash device is connected in the chip to be tested, within the test case.As a preferred embodiment, when an SPI flash device is connected in the chip under test, the data information from the SPI flash is loaded into the registers of the current module of the chip under test by configuring an SPI master register within the chip under test.As a preferred embodiment, accessing at least one register of the current module of the chip under test in step (c) specifically comprises accessing the data information of the SPI flash loaded into the registers.As a preferred embodiment, accessing at least one register of the current module of the chip under test in step (c) when no SPI flash device is connected specifically comprises accessing original data in the registers.As a preferred embodiment, accessing at least one register of the current module of the chip under test in step (c) specifically comprises reading data from the registers, writing data to the registers, and reading back the written data.Specifically, as a preferred embodiment, step (d) comprises comparing the data obtained from the registers with original data to determine consistency, and comparing the data written into the registers with the data read from the registers to determine consistency.As a preferred embodiment, the parameter information comprises chip select instructions of the module and address information of the registers.Compared with the prior art, the chip verification method based on SPI described in the present invention makes it possible to perform the access to the registers of the chip to be checked exclusively via the SPI bus without the chip bus having to be used for access operations. This reduces the load on the chip bus, thereby allowing it to perform other operations more efficiently, thus improving the overall performance of the chip. Moreover, in the context of the present invention, the SPI bus is used exclusively for accessing registers, which significantly reduces the probability of access errors compared to the chip bus and thus improves the overall efficiency of the chip verification.BRIEF DESCRIPTION OF THE DRAWINGSThe accompanying drawings facilitate understanding of the various embodiments of this invention. In these drawings: FIG. 1 shows a flow diagram of a chip verification method based on SPI according to an embodiment of the present invention. FIG. 2 shows another flow chart of the chip verification method according to the present invention.DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTSReferring to the accompanying drawings, the embodiments of the present invention will be described. Like reference numerals in the drawings represent like elements. As described above, the present invention provides a chip verification method based on SPI (Serial Peripheral Interface). In this verification method, the registers of the chip can be accessed without dependency on the chip bus, thereby reducing the load on the chip bus, reducing the likelihood of access errors, and improving the overall chip verification efficiency.The chip verification method based on SPI described in the present invention is mainly used for the verification of chips equipped with an SPI and registers responding via the SPI. It will be appreciated that the chip verification method of the present invention is unsuitable for chips without SPI or for those which, while having an SPI, do not use it to address registers.Referring to FIG. 1, which shows a flow chart of the chip verification method based on SPI according to the present invention, the method comprises the following steps:Step S 100: retrieving parameter information of a module of a chip to be tested and a corresponding register within the module. In this step, based on the parameter information, one of the modules and its corresponding register can be accessed and verified on the module and the register. The parameter information includes chip select instructions of the modules and address information of the registers as well as other parameters required for the verification. In particular, the chip select instructions are the instructions corresponding to the current module. After the module is determined using the chip select instructions, the register to be addressed may be identified using the address information. In the subsequent steps, the address information may be changed to sequentially access all registers within the current module.Step S200, write a test case for the module based on the parameter information. In this step, a test case is written based on the address information of the register associated with the current module and other required parameter information retrieved in step S100. Thereby, in the following steps, the registers corresponding to the address information can be sequentially accessed to verify the module. The parameter information may include read / write bit information, buffer information, data information, and other parameter related information required for the specific verification. In addition, it can also be determined in the test case whether an SPI flash device is connected in the chip to be tested. In the test case, there is a designated marker location to indicate the presence of an SPI flash device on the chip under test. Typically, a "1" at this marker location indicates that an SPI flash device is connected, while a "0" indicates that no SPI flash device is connected. By setting the numerical information at the corresponding position in the test case, it can be determined whether an SPI flash device is connected to the chip to be tested. If it is determined that an SPI flash device is connected, data from the SPI flash is loaded into the registers of the current module of the chip under test by configuring the SPI master register in the chip. Within the scope of this invention, the registers in the chip to be tested can be operated both in master and slave mode. When loading data from the SPI flash after power-up, the system operates in master mode. Once charging is complete, it automatically switches to slave mode.Step S300, transfer the parameter information in the test case via a driver to an SPI bus at the top level of the chip to be tested, access at least one register of a current module of the chip to be tested and fetch an access result. In this step, the parameter information of the test case includes chip select value information of the modules, address information of the registers, read / write bit information, buffer information and data formats, among others, and other parameters relevant to the verification. This information determines which register is being accessed and which module is being verified. By transferring the various parameter information to the SPI bus, each register can be accessed via the SPI bus instead of using the chip bus. Different chips being tested may have different forms of SPI flash device connection. If no SPI flash device is attached to the chip under test, this means that the data from the SPI cannot be loaded onto the registers in the current module; in this case, the original data in the registers is to be read. However, if an SPI flash device is connected to the chip to be tested, the data loaded from the SPI flash onto the registers must be read. Specifically, whether the original data in the registers or the data loaded from the SPI flash is accessed, the access operations include reading data from the registers, writing data to the registers, and reading back the written data to complete read / write operations on the registers. Here, the data read from the registers may be either the original data of the registers or the data loaded from the SPI flash, while writing data to the registers is to input pre-designed verification data to the registers according to the verification requirements. Moreover, regardless of the specific access operations on the registers, an access result is obtained after each access. For example, the access result when reading data from the registers is the data thereby obtained. In writing data to the registers and then reading the written data, the access result is the data obtained after reading, because the written data is pre-designed known data which does not need to be retrieved any further.Step S400, verify the access result to determine whether a current register of the current module is functioning properly. This step primarily involves verifying whether the read and write operations on the current register are correct. As shown in FIG. 2, the step of verifying the access result depending on the different access operations in step S300 includes the following subsections:Step S410: Compare the data obtained from the registers with the original data to determine consistency. In this step, since the chip under test is either connected to an SPI flash device or not, the data in the registers may be in two forms: either as original data or as data loaded from the SPI flash. Data in both forms is compared to the original data to check consistency. If the data coincide, this means that the read operation is correct at the registers. If not, a correction operation for the read operation is performed after the completion of the verification.Step S420 compares the data written in the registers with the data read from the registers to determine consistency. In this step, the data written into the registers is known data designed and preset according to the verification requirements. By reading the data back from the registers and then comparing it with the written data, it can be determined whether there are errors in the read and write operations on the registers. If the data agrees, this indicates that normal read and write operations can be performed on the registers. If they differ, this indicates an error in the read and write operations, and error correction is required.Step S500, repeat steps S200 to S400 until all the registers of the current module have been verified. As described above, at this time, the verification of read and write functionality for at least one register in the current module is complete. If the current module has a plurality of registers, steps S 200 to S 400 are repeated as many times as registers are present in the current module. However, if the module has only one register, no repetition is required. During the retry process, only the address information of the registers in the test cases need to be changed. This means that the address of the previously addressed register is changed in the test case to the address of the next register to be addressed.Step S600, repeat steps S100 to S500 until all the modules of the chip have been verified. As described above, at this time, the verification of all functions of a module of the chip to be inspected is completed. If the chip to be tested has a plurality of modules, steps S 100 to S 500 are repeated as many times as modules are present in the chip to be tested. However, if the chip has only one module, no repetition is required.As described above, the SPI-based chip verification method described in the present invention enables access to the registers of the chip under test exclusively via the SPI bus without the need to use the chip bus for access operations. This reduces the load on the chip bus, allowing it to perform other operations more efficiently, and improves the overall performance of the chip. Moreover, in the context of the present invention, the SPI bus is used exclusively for accessing registers, whereby the probability of access errors is significantly reduced compared to the chip bus, which increases the overall efficiency of the chip verification.The above-mentioned exemplary embodiments merely represent a plurality of specific variants of the present invention. The descriptions are relatively specific and detailed, but should not be taken as limiting the scope of the claims. It should be understood that various modifications and improvements may be made by those skilled in the art without departing from the basic spirit of the present invention. All such modifications and improvements fall within the scope of the present invention. Therefore, the scope of the claims is defined by the appended claims.

Claims

A chip verification method based on SPI, comprising the steps of: (a) retrieving parameter information of a module of a chip to be tested and a corresponding register within the module; (b) writing a test case for the module based on the parameter information; (c) transmitting the parameter information in the test case via a driver to an SPI bus at the top of the chip to be tested, accessing at least one register of a current module of the chip to be tested and retrieving an access result; (d) verifying the access result to determine whether a current register of the current module is functioning properly; (e) repeating steps (b) to (d) until all registers of the current module have been verified; and (f) repeating steps (a) to (e) until all modules of the chip have been verified.The SPI-based chip verification method of claim 1, further comprising determining whether an SPI flash device is connected in the chip under test within the test case.The SPI-based chip verification method of claim 2, wherein when an SPI flash device is connected in the chip under test, data information from the SPI flash is loaded into the registers of the current module of the chip under test by configuring an SPI master register within the chip under test.The SPI-based chip verification method of claim 3, wherein accessing at least one register of the current module of the chip under test in step (c) specifically comprises accessing the data information loaded on the registers from the SPI flash.The SPI-based chip verification method according to claim 2, wherein when no SPI flash device is connected in the chip under test, accessing at least one register of the current module of the chip under test in step (c) specifically comprises accessing original data in the registers.The SPI-based chip verification method according to claim 4 or claim 5, wherein accessing at least one register of the current module of the chip to be tested in step (c) specifically comprises reading data from the registers, writing data to the registers, and reading back the written data.The SPI-based chip verification method according to claim 6, wherein step (d) specifically comprises: comparing the data obtained from the registers with original data to determine consistency; and comparing the data written in the registers with the data read from the registers to determine consistency.The chip verification method based on SPI of claim 1, wherein the parameter information comprises chip select instructions of the module and address information of the registers.

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