Silicon carbide semiconductor substrate

Abstract

Silicon carbide semiconductor substrate (10) with a first main surface (10a) and a second main surface (10b) arranged opposite the first main surface (10a), wherein the first main surface (10a) has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of no more than 700 µm, wherein the first principal surface (10a) corresponds to a {0001} plane or a plane with a deviation angle of no more than 8°, with respect to the {0001} plane, wherein one or more crystal defects (5), each consisting of a crystal grain boundary, are present in a region of 1 mm from an outer circumferential end section (10c) of the first principal surface (10a) in the direction of a center point (O) of the first principal surface (10a), wherein a dislocation density in any region with an area of ​​1 mm 2in an area within 5 mm of the outer circumferential end section (10c) of the first principal surface (10a) in the direction of the center point (O) of the first principal surface (10a) not more than 200 / mm 2 is, and wherein in at least one of the one or more crystal defects (5) an angle (θ) formed by a first straight line (r1) and a second straight line (r2) is greater than 45° and not greater than 90°, wherein the first straight line (r1) passes through a part of the crystal defect (5) at an outermost circumferential side of the first principal surface (10a) and the midpoint (O) of the first principal surface (10a) and the second straight line (r2) lies in a longitudinal direction of the crystal defect (5).

Description

Technical field

[0001] The present invention relates to a silicon carbide semiconductor substrate, in particular a silicon carbide semiconductor substrate that can suppress cracking. State of the art

[0002] In recent years, silicon carbide has been used as a material for semiconductor devices to achieve high breakdown voltage and low loss in semiconductor devices such as MOSFETs (metal-oxide-semiconductor field-effect transistors), enabling their use in high-temperature environments and the like. Silicon carbide is a wide-bandgap semiconductor, exhibiting a larger bandgap than silicon, which has traditionally been widely used as a semiconductor material. Therefore, by using silicon carbide as a semiconductor material, the device can exhibit high breakdown voltage, low on-resistance, and other similar properties.Furthermore, the semiconductor device that uses silicon carbide as a material has the advantage that its properties deteriorate less when used in a high-temperature environment, compared to a semiconductor device that uses silicon as a material.

[0003] For example, the published Japanese patent application No. JP 2012-214 376 A (Patent Document 1) describes a method for producing a silicon carbide wafer exhibiting a distortion of less than 5 µm, a warpage of less than 5 µm, a total thickness fluctuation of less than 2.0 µm, and a diameter of 75 mm. According to the method for producing the silicon carbide wafer, a silicon carbide single-crystal body is cut into the shape of a wafer, and the silicon carbide wafer is then polished, with a downward polishing force being reduced to a level less than a downward bending force on the wafer.

[0004] Document JP 2013-087 005 A relates to a process for producing a silicon carbide ingot, comprising a step for producing a base with a deviation angle of ≤ 10° to the (0001) plane and a single-crystal silicon carbide, and a step for growing a silicon carbide layer on the surface of the base. In the silicon carbide layer growth step, the temperature gradient in the latitudinal direction, as seen from the side of the silicon carbide layer growth direction, is increased to ≥ 20 °C / cm. In this way, almost the entire surface of the resulting silicon carbide ingot, including the central portion of the outwardly growing outer surface, becomes a facet plane. Therefore, the silicon carbide ingot, whose entire surface is made a facet plane, can be obtained solely by grinding the outer circumferential sections.

[0005] Document JP 2008-115 037 A relates to a process for producing a high-quality silicon carbide single-crystal ingot. The process involves removing edge regions, including dislocation defect cluster regions such as small-angle grain boundary and subgrain boundary cluster regions or the like, present near the edges of the seed crystals, by grinding or cutting with a machining tool selected from wire EDM, a saw, and edge grinding, leaving a maximum circular area, and subsequently growing a silicon carbide single crystal on the seed crystal substrate.

[0006] Document JP 2008-115 039 A relates to a method for producing a high-quality silicon carbide single-crystal block. The method comprises repeating the manufacturing process at least twice. This process includes a step to extract a circular zone from the substrate as a seed crystal substrate, having a center that differs from the center of the silicon carbide single-crystal substrate and a smaller diameter than the substrate. This is followed by a step to grow a silicon carbide single-crystal ingot on the surface of the extracted circular seed crystal substrate, and a step to form the silicon carbide single-crystal substrate by cutting the resulting silicon carbide single-crystal block and polishing it. Summary of the invention: Technical problem

[0007] In recent years, however, cracking has increasingly occurred in a process for manufacturing silicon carbide semiconductor devices using a silicon carbide semiconductor substrate. For example, when the silicon carbide semiconductor substrate is held in place using electrostatic clamping methods, cracks can form in the silicon carbide semiconductor substrate during an ion implantation step for impurity implantation, during the formation of an oxide film and a nitride film using a CDVD device, in a sputtering step for metal film formation, and in a heat treatment step for sintering, activation annealing, and alloy annealing of electrodes.

[0008] As described in the published Japanese patent application No. JP 2012-214 376 A, it is unlikely that cracks will form in a silicon carbide semiconductor substrate with a diameter of approximately 75 mm. However, cracks frequently occur in a silicon carbide semiconductor substrate with a large diameter of approximately more than 100 mm, making it necessary to suppress crack formation in the silicon carbide semiconductor substrate.

[0009] The present invention was designed to solve the above problem, and it is an object of the present invention to provide a silicon carbide semiconductor substrate in which cracking is suppressed. Solution to the problem

[0010] A silicon carbide semiconductor substrate according to the present invention relates to a silicon carbide semiconductor substrate with a first main surface and a second main surface arranged opposite the first main surface, wherein the first main surface has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of no more than 700 µm, wherein the first main surface corresponds to a {0001} plane or a plane with a deviation angle of approximately no more than 8°, with respect to the {0001} plane, wherein one or more crystal defects, each consisting of a crystal grain boundary, are / are present in a region of 1 mm from an outer circumferential end section of the first main surface towards a center point of the first main surface, wherein a dislocation density in any region with an area of ​​1 mm 2in an area within 5 mm of the outer circumferential end section of the first main surface in the direction of the center of the first main surface not more than 200 / mm 2 is, and wherein in at least one of the one or more crystal defects an angle θ formed by a first straight line and a second straight line is greater than 45° and not greater than 90°, wherein the first straight line passes through a part of the crystal defect at an outermost circumferential side of the first principal face and the center of the first principal face, and the second straight line lies in a longitudinal direction of the crystal defect. Advantageous effects of the invention

[0011] According to the present invention, a silicon carbide semiconductor substrate can be provided to suppress crack formation. Brief description of the drawings Fig. Figure 1 shows a schematic top view illustrating the structure of a silicon carbide semiconductor substrate according to an embodiment of the present invention. Fig. Figure 2 shows a schematic cross-sectional view illustrating the structure of the silicon carbide semiconductor substrate according to one embodiment of the present invention. Fig. Figure 3 shows an enlarged view of area III in Fig. 2. Fig. Figure 4 shows a schematic top view illustrating the structure of a first modification of the silicon carbide semiconductor substrate according to one embodiment of the present invention. Fig. Figure 5 shows a schematic top view illustrating a first example of crystal defects generated in a first principal surface of the silicon carbide semiconductor substrate. Fig. Figure 6 shows a schematic top view illustrating a second example of the crystal defects generated in the first main surface of the silicon carbide semiconductor substrate. Fig. Figure 7 shows a schematic cross-sectional view illustrating the structure of a second modification of the silicon carbide semiconductor substrate according to the first embodiment of the present invention. Fig. Figure 8 shows a schematic cross-sectional view illustrating a first step of a process for producing the silicon carbide semiconductor substrate. Fig. Figure 9 shows a schematic cross-sectional view illustrating a second step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 10 shows a schematic cross-sectional view illustrating a third step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 11 shows a schematic cross-sectional view illustrating a fourth step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 12 shows a schematic cross-sectional view illustrating a fifth step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 13 shows a schematic cross-sectional view illustrating a sixth step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 14 shows a schematic cross-sectional view illustrating the sixth step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 15 shows a schematic top view illustrating a seventh step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 16 shows a schematic enlarged partial top view illustrating the seventh step of the process for producing the silicon carbide semiconductor substrate. Fig. Figure 17 shows a schematic partial cross-sectional view illustrating the seventh step of the process for producing the silicon carbide semiconductor substrate. Description of embodiments [Description of the embodiment of the present invention]

[0012] An embodiment of the present invention is described below with reference to the figures. It should be noted that identical or corresponding elements in the following figures are designated with the same reference numerals and their descriptions are not repeated. Regarding the crystallographic notation used herein, a single orientation is represented by [ ], a group orientation by < >, a single plane by ( ), and a group plane by {}. Although a crystallographically negative index is usually represented by a number with a '-' (bar) above it, it is expressed here by a number with a negative sign. To describe an angle, a system with an omnidirectional angle of 360° is used.

[0013] As a result of a careful study of a method for suppressing crack formation in a silicon carbide semiconductor substrate, the inventors obtained the following insights and conceived the present invention.

[0014] In recent years, silicon carbide semiconductor substrates have tended to have a surface area with a larger diameter and a smaller thickness. As the surface area increases in diameter and the thickness decreases, the likelihood of the silicon carbide semiconductor substrate fracturing also increases. If a silicon carbide semiconductor substrate has a surface area with a maximum diameter greater than 100 mm and a thickness of no more than 700 µm, cracks will form within the silicon carbide semiconductor substrate.

[0015] It has been shown that cracking in the silicon carbide semiconductor substrate is related to a dislocation density in a region within a certain distance from the outer endpoint of the silicon carbide semiconductor substrate towards the center of the first principal surface. As a result of a more detailed investigation, it was found that in a silicon carbide semiconductor substrate with a first principal surface having a maximum diameter greater than 100 mm and a thickness of no more than 700 µm, cracking can be effectively suppressed by limiting the dislocation density in any region with an area of ​​1 mm². 2 in an area within 5 mm of the outer circumferential end section of the first main surface towards the center of the first main surface not more than 500 / mm 2 amounts.

[0016] Furthermore, in a substrate formed from silicon carbide single crystals, stacking defects are more prevalent in the <1-100> direction than in the <11-20> direction. In a bulk crystal growth plane, the angle of deviation of a growth surface increases with increasing distance from the c-plane crystal face. As the angle of deviation increases, step-bunching is very likely to occur. However, with increasing step-bunching, a transformation from a penetrating dislocation to a basal dislocation becomes more probable. This transformation is an inherent defect-forming phenomenon of silicon carbide. Compared to the <11-20> and <1-100> directions, step-bunching is more likely to occur in the <1-100> direction.Thus, the transformation of the penetrating dislocation into the basal dislocation is more likely to occur, particularly in a region that is a large distance from the crystal face in the <1-100> direction. It is assumed that stacking faults are more likely to form, especially in the <1-100> direction, because distortion during cooling or similar processes can cause the basal dislocation to propagate into a stacking fault. (1) A silicon carbide semiconductor substrate 10 according to one embodiment is a silicon carbide semiconductor substrate 10 with a first principal surface 10a and a second principal surface 10b arranged opposite the first principal surface 10a, wherein the first principal surface 10a has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of not more than 700 µm, wherein the first principal surface 10a corresponds to a {0001} plane or a plane with a deviation angle of approximately not more than 8°, with respect to the {0001} plane, wherein one or more crystal defects 5, each consisting of a crystal grain boundary, are / are present in a region of 1 mm from an outer circumferential end section 10c of the first principal surface 10a in the direction of a center point O of the first principal surface 10a, wherein a dislocation density in any region with an area of 1 mm 2in an area within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a not more than 200 / mm 2 is, and wherein in at least one of the one or more crystal defects 5 an angle θ formed by a first straight line r1 and a second straight line r2 is greater than 45° and not greater than 90°, wherein the first straight line r1 passes through a part of the crystal defect 5 at an outermost circumferential side of the first principal surface 10a and the midpoint O of the first principal surface 10a and the second straight line r2 lies in a longitudinal direction of the crystal defect 5. Consequently, silicon carbide semiconductor elements can be produced using the silicon carbide semiconductor substrate with an industrially sufficient yield. (2) Preferably the angle is not less than 60° and not greater than 90°. (3) Preferably in the silicon carbide semiconductor substrate 10 according to point (5) the dislocation density in the arbitrary region with an area of ​​1 mm² 2 in the area within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a not more than 200 / mm 2 In this way, breakage of the silicon carbide semiconductor substrate can be prevented even more effectively. (4) Preferably, in the silicon carbide semiconductor substrate 10 according to point (7), if at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a region of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm 2in the area within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a not more than 100 / mm 2 If neither the crystal grain boundaries nor the dislocation arrangements are present in the area of ​​1 mm from the outer circumferential end section 10c in the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary area with an area of ​​1 mm² is 2 in the area within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a not more than 200 / mm 2 In this way, breakage of the silicon carbide semiconductor substrate can be prevented even more effectively. (5) Preferably, the silicon carbide semiconductor substrate 10 according to one of points (1) to (8) comprises a silicon carbide single-crystal substrate 11 forming the second principal surface 10b; and a silicon carbide epitaxial layer 12 provided on the silicon carbide single-crystal substrate 11 forming the first principal surface 10a. This prevents the silicon carbide semiconductor substrate from fracturing with the silicon carbide semiconductor layer and the silicon carbide single-crystal substrate. (6) Preferably, in the silicon carbide semiconductor substrate 10 according to one of points (1) to (9), the maximum diameter of the first principal surface 10a is not less than 150 mm. The larger the maximum diameter of the first principal surface, the more likely it is that the silicon carbide semiconductor substrate will fracture. However, it is possible to efficiently suppress cracking in the large-diameter silicon carbide semiconductor substrate whose first principal surface has a maximum diameter of not less than 150 mm. (7) Preferably, in the silicon carbide semiconductor substrate 10 according to one of points (1) to (10), the thickness of the silicon carbide semiconductor substrate 10 is no more than 600 µm. If the silicon carbide semiconductor has a larger diameter and a thinner thickness, the probability of the silicon carbide semiconductor breaking increases. The silicon carbide semiconductor substrate with a large diameter and a thin thickness of no more than 600 µm can be particularly effective in preventing cracking. [Detailed description of the embodiments of the present invention]

[0017] First, a structure of a silicon carbide semiconductor substrate 10 according to an embodiment of the present invention will be described below.

[0018] With reference to Fig. 1 and Fig. 2. According to the first embodiment, the silicon carbide semiconductor substrate 10 is formed, for example, from hexagonal silicon carbide single crystals of the 4H polytype and has a first main surface 10a and a second main surface 10b, which is arranged opposite the first main surface 10a. The first main surface 10a of the silicon carbide semiconductor substrate 10 has, for example, a maximum diameter D of 150 mm. Preferably, the maximum diameter D of the first main surface 10a of the silicon carbide semiconductor substrate 10 is greater than 100 mm, more preferably not less than 150 mm, and even more preferably not less than 200 mm.

[0019] With reference to Fig. 2. The silicon carbide semiconductor substrate 10 comprises a thickness T of no more than 700 µm, preferably no more than 600 µm. The thickness T of the silicon carbide semiconductor substrate 10 is preferably no less than 250 µm and less than 600 µm, more preferably no less than 300 µm and less than 600 µm, more preferably no less than 250 µm and no more than 500 µm, and more preferably no less than 350 µm and no more than 500 µm. The silicon carbide semiconductor substrate 10 may contain nitrogen as an impurity and may, for example, be of the n-conductivity type.

[0020] The first principal surface 10a of the silicon carbide semiconductor substrate 10 comprises: a substantially flat inner circumferential section IR, which has the center O of the first principal surface 10a of the silicon carbide semiconductor substrate 10; and an outer circumferential section OR, which surrounds the inner circumferential section IR and has a chamfered section. With reference to Fig. 2 The center of the first principal surface 10a is a point where the first principal surface 10a intersects a line parallel to the normal of the inner circumferential section IR of the first principal surface 10a and passing through the centroid G of the silicon carbide semiconductor substrate 10. The first principal surface 10 of the first silicon carbide semiconductor substrate includes an outer circumferential end section 10c. As in the case of the first principal surface 10a, the second principal surface 10b of the silicon carbide semiconductor substrate 10 also includes an inner circumferential section IR and an outer circumferential section OR.

[0021] The outer perimeter section OR is a region within a distance x1 from the outer perimeter end section 10c of the first principal surface 10a in the direction of the center O of the first principal surface 10a and has a ring-shaped appearance in plan view (field of view in the normal direction to the inner perimeter region IR of the first principal surface 10a). The distance x1 can be, for example, 5 mm or 10 mm. The outer perimeter section OR comprises a region (second outer perimeter region OR2) within a distance x2 from the outer perimeter end section 10c of the first principal surface 10a in the direction of the center O of the first principal surface 10a and a region (i.e., the first outer perimeter region OR1) that differs from the second outer perimeter region OR2 within the outer perimeter region OR. The distance x2 is, for example, 1 mm.

[0022] With reference to Fig. 1 and Fig. 2. The inner circumferential region IR of the first principal surface 10a of the silicon carbide semiconductor substrate 10 can be a surface corresponding to a (000-1) plane or a plane with a deviation angle of approximately no more than 8°, relative to the (0001) plane, while the inner circumferential region of the second principal surface 10b can be a surface corresponding to a (0001) plane or a plane with a deviation angle of approximately no more than 8°, relative to the (0001) plane.

[0023] In the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a of the silicon carbide semiconductor substrate 10, the dislocation density in any region within a range of 1 mm is, according to the present embodiment, 2 in the direction of the center O of the first main surface 10a not more than 500 / mm 2Preferably, in an outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in an arbitrary region with an area of ​​1 mm² is 2 no more than 200 / mm 2 Preferably, in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in any region with an area of ​​1 mm² is 2 no more than 500 / mm 2 . More preferably, in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center O of the first principal surface 10a, the dislocation density in an arbitrary region with an area of ​​1 mm² is 2 no more than 200 / mm 2 .

[0024] The number of dislocations in the outer circumferential region OR of the first principal surface 10a can be counted by forming an etch pit by KOH (potassium hydroxide) etching and by observing the etch pit using, for example, an optical microscope. In particular, the etch pit is formed by soaking the silicon carbide semiconductor substrate 10 in, for example, molten KOH at 515 °C for 8 minutes. The observed etch pit has, for example, a diameter of 50 µm, preferably not less than 10 µm and not more than 100 µm. Certain types of dislocations observed include: screw dislocations, edge dislocations, basal dislocations, and the like. Preferably, the dislocation density of the penetrating dislocations with a Burger vector of c+a does not exceed 25 / mm². 2 Preferably, the dislocation density of the penetrating dislocations with a Burger vector of c+m does not exceed 25 / mm. 2Preferably, the dislocation density of the edge dislocations with a Burgers vector that has no c-component does not exceed 100 / mm². 2 , and preferably no more than 50 / mm 2 on. It should be noted that c of a <0001> -alignment, a corresponds to a <11-20> alignment and m to a <1-100> alignment.

[0025] With reference to Fig. 3 comprises the first principal surface 10a of the silicon carbide semiconductor substrate 10: a flat section 10e; a chamfered section 10d; a boundary section 10f forming a boundary between the flat section 10e and the chamfered section 10d; and an outer circumferential end section 10c. With reference to Fig. 1 and Fig. 3. The second outer circumferential section OR2 can be formed from the chamfered section 10d, the boundary section 10f and a section of the flat section 10e, or from the chamfered section 10d and the boundary section 10f, or only from the chamfered section 10d. The first outer circumferential section OR1 can be formed from a section of the flat section 10e.

[0026] With reference to Fig. 4, Fig. 5 and Fig. 6. Crystal defects 5 can occur in the first main surface 10a of the silicon carbide semiconductor substrate 10. The crystal defects 5 relate, for example, to grain boundaries (area), dislocation arrangements (lines), and the like. The crystal defects 5, such as the grain boundaries and the dislocation arrangements, can be fitted with a rectangular shape to determine their length a in the longitudinal direction, their length b in the transverse direction, and their area. Preferably, the area of ​​the crystal defects 5, such as the grain boundaries and the dislocation arrangements, is not more than 3 mm². 2 , and a length a in the longitudinal direction not exceeding 3 mm. Even more preferably, the area of ​​the crystal defects, such as the crystal grain boundaries and the dislocation arrangements, not exceeding 1 mm². 2, and the length a in the longitudinal direction not exceeding 1 mm. It should be noted that a grain boundary, such as a crystal grain boundary, can be observed using a polarizing microscope, a Nomarski differential interference microscope, and the like. Preferably, the crystal grain boundary is observed using a polarizing microscope with crossed Nicol prisms.

[0027] The following describes a direction in which the crystal defects 5, such as the crystal grain boundaries and the dislocation arrangements, extend. As in Fig. As shown in Figure 4, a first straight line r1 is assumed to be a straight line passing through (i) a portion of the crystal defects 5 on the outermost circumferential side of the first principal surface 10a of the silicon carbide semiconductor substrate 10 and (ii) the midpoint O of the first principal surface 10a of the silicon carbide semiconductor substrate 10; and a second straight line r2 is assumed to be a straight line in the longitudinal direction of the crystal defects 5. This is as shown in Figure 4. Fig. As shown in Figure 5, if the angle θ is small, such as approximately 45°, due to the first straight line r1 and the second straight line r2 (angle not more than 90°), the crystal defects 5 extend towards the inner circumferential section IR of the first principal surface 10a. Thus, if the silicon carbide semiconductor substrate 10 fractures due to the crystal defects 5, the fracture propagates towards the inner circumferential section IR, thereby affecting the semiconductor device formed in the inner circumferential section IR. On the other hand, as shown in Figure 5, the crystal defects 5 extend towards the inner circumferential section IR. Fig. As shown in Figure 6, if the angle θ formed by the first straight line r1 and the second straight line r2 is large, for example approximately no less than 60°, the crystal defects 5 extend within the outer circumferential section OR of the first principal surface 10a, but not towards the inner circumferential section IR. Thus, if the silicon carbide semiconductor substrate 10 fractures through the crystal defects 5, the fracture does not propagate into the inner circumferential section IR, thereby hardly affecting the semiconductor device formed in the inner circumferential section IR. With regard to semiconductor device yield, it is therefore desirable for the angle θ formed by the first straight line r1 and the second straight line r2 to be larger.If a ratio obtained by dividing the length a of the crystal defects 5 in the longitudinal direction by the length b of the same in the transverse direction is not less than 2, the angle θ formed by the first straight line r1 and the second straight line r2 is preferably more than 45°, and more preferably not less than 60°.

[0028] A case in which at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 includes, for example, the following cases: a case in which one or more crystal grain boundaries are present in the second outer circumferential section OR2; a case in which one or more dislocation arrangements are present in the second outer circumferential section OR2; a case in which one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2; a case in which the crystal defects 5, such as the crystal grain boundaries and the dislocation arrangements, are formed such that they cross a boundary between the first outer circumferential section OR1 and the second outer circumferential section OR2, and the like.In the case where at least one or more grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2, the dislocation density of the outer circumferential section OR is preferably lower than the dislocation density of the outer circumferential section OR. In the case where neither grain boundaries nor dislocation arrangements are present in the second outer circumferential section OR2, in particular if one or more grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first principal surface 10a of the silicon carbide semiconductor substrate 10 in the direction of the center O, the dislocation density in any region with an area of ​​1 mm² is 2in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a preferably not more than 200 / mm 2 If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a preferably not more than 500 / mm 2 .

[0029] If, more preferably, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first principal surface 10a in the direction of the center O, the dislocation density in any region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 100 / mm 2 If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a preferably not more than 200 / mm 2 .

[0030] If preferably at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a region of 1 mm from the outer circumferential end section 10c of the first principal surface 10a in the direction of the center O, the dislocation density in any region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a preferably not more than 200 / mm 2If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a preferably not more than 500 / mm 2 . If, more preferably, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first principal surface 10a in the direction of the center O, the dislocation density in any region with an area of ​​1 mm² is 2in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 100 / mm 2 Neither the crystal grain boundaries nor the dislocation arrangements in the second outer circumferential section OR2 of 1 mm of 1 mm are 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a, preferably not more than 200 / mm 2 .

[0031] With reference to Fig. 7 The silicon carbide semiconductor substrate 10 can comprise: a silicon carbide single-crystal substrate 11; and a silicon carbide epitaxial layer 12 provided on the silicon carbide single-crystal substrate 11. The silicon carbide single-crystal substrate 11 forms the second major surface 10b of the silicon carbide semiconductor substrate 10. The silicon carbide epitaxial layer 12 forms the first major surface 10a of the silicon carbide semiconductor substrate 10. Both the silicon carbide single-crystal substrate 11 and the silicon carbide epitaxial layer 12 comprise an impurity, such as nitrogen, and exhibit n-type conductivity. The impurity concentration of the silicon carbide epitaxial layer 12 is preferably lower than the impurity concentration of the silicon carbide single-crystal substrate 11.

[0032] It should be noted that the silicon carbide semiconductor substrate 10 can be a silicon carbide single-crystal substrate 11 that does not have a silicon carbide epitaxial layer 12. Furthermore, the silicon carbide semiconductor substrate 10 can be a seed crystal 2 used in a process for growing a silicon carbide single crystal 1, as described below. In addition, the dislocation density of the first principal surface 10a of the silicon carbide semiconductor substrate 10 was described above; however, the second principal surface 10b of the silicon carbide semiconductor substrate 10 can have the same dislocation density as the first principal surface 10a.

[0033] The following describes a method for producing the silicon carbide semiconductor substrate that is not in accordance with the present embodiment.

[0034] First, a crucible 20, which serves as a silicon carbide single-crystal growth device, is prepared. With reference to Fig. Figure 8 shows that the crucible 20 is made of graphite and essentially comprises a seed crystal holding section 21 and a starting material arrangement section 22. The seed crystal holding section 21 is designed to hold the seed crystal 2 made of single-crystal silicon carbide. The starting material arrangement section 22 is designed such that the silicon carbide starting material 3, which is made of silicon carbide powder, can be arranged therein. The crucible has an outer diameter of approximately 160 mm and an inner diameter of approximately 120 mm. Furthermore, a heating device (not shown) is provided that surrounds the circumference of the crucible. The heating device may, for example, comprise an induction heating coil, a resistance heating device, or the like.The heating device is designed to raise the temperature of the silicon carbide starting material 3 in the starting material arrangement section 22 to a sublimation temperature of silicon carbide.

[0035] The seed crystal 2 and the silicon carbide starting material 3 are then arranged in the crucible. For example, the seed crystal 2, which is formed from hexagonal silicon carbide of the 4H polytype, is attached to the seed crystal holding section 21. The seed crystal 2 has a third principal face 2q and a fourth principal face 2b, which is arranged opposite the third principal face 2a. The fourth principal face 2b of the seed crystal 2 is in contact with and held by the seed crystal holding section 21. The silicon carbide starting material 3 is placed in the starting material arrangement section 22. For example, the silicon carbide starting material 3 is formed from silicon carbide powder. The silicon carbide starting material 3 is arranged on the starting material arrangement section 22, such that the third main surface 2a of the seed crystal 2 faces the surface of the silicon carbide starting material 3.In the manner described above, the seed crystal 2 made from a silicon carbide single crystal and the silicon carbide starting material 3 are arranged in the crucible 20.

[0036] The maximum diameter D1 of the third principal face 2a of the seed crystal 2 is preferably not less than 100 mm, for example 125 mm. The seed crystal 2 comprises a seed crystal 2 with a dislocation density of not more than 500 / mm². 2 in any area with a surface area of ​​1 mm 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section of the third principal face 2a of the seed crystal 2 in the direction of the center O of the third principal face 2a. Preferably, in the outer circumferential section OR, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 no more than 200 / mm 2The dislocation density of the third principal surface 2a of the seed crystal 2 can be equal to the previously mentioned dislocation density of the first principal surface 10a of the silicon carbide semiconductor substrate 10. The third principal surface 2a of the seed crystal 2 can correspond to a plane that is offset by an angle of no more than 10° with respect to the (000-1) plane, while the fourth principal surface 2b of the seed crystal 2 can correspond to a plane that is offset by no more than 10° with respect to the (0001) plane.

[0037] Subsequently, a first silicon carbide single-crystal growth step is performed. Specifically, the crucible 20, containing the silicon carbide starter material 3 and the seed crystal 2, is heated from ambient temperature to the sublimation temperature (e.g., 2300 °C) of the silicon carbide crystal in a gas atmosphere containing, for example, helium and nitrogen gas. The atmosphere may also include argon gas. The seed crystal 2 is heated to a temperature lower than that of the silicon carbide starter material 3. In other words, the crucible 20 is heated to a temperature that decreases in one direction, from the silicon carbide starter material 3 towards the seed crystal 2.Accordingly, the silicon carbide starting material 3 is sublimed in the crucible 20 and recrystallized on the third principal face 2a of the seed crystal 2, causing the silicon carbide single crystal 1 to begin growing on the third principal face 2a of the seed crystal 2. The silicon carbide single crystal 1 is grown, for example, for about 100 hours. In this way, the silicon carbide single crystal 1 is grown on the third principal face 2a of the seed crystal 2 (see ). Fig. 9) grown.

[0038] As in Fig. As shown in Figure 9, in the first silicon carbide single-crystal growth step, the silicon carbide single crystal 1 is grown such that the diameter of the silicon carbide single crystal 1 in a direction parallel to the third principal face 2a of the seed crystal 2 becomes larger than the diameter of the third principal face 2a of the seed crystal 2. With reference to Fig. 10. After the crystal growth of the silicon carbide single crystal 1 is complete, both the silicon carbide single crystal 1 and the seed crystal 2 are removed from the crucible 20. The maximum diameter D1 of the silicon carbide single crystal 1 in the region in contact with the third principal face 2a of the seed crystal 2 is, for example, 125 mm. The diameter of the silicon carbide single crystal 1 increases with increasing distance from the third principal face 2a of the seed crystal 2. Subsequently, the silicon carbide single crystal 1 is, for example, cut along a plane parallel to the third principal face 2a of the seed crystal 2 at a position spaced a certain distance from the third principal face 2a of the seed crystal 2, in order to obtain a single-crystal substrate 1a of silicon carbide single crystal.The silicon carbide single crystal 1a has a maximum diameter D2 that is larger than the maximum diameter of the third principal face 2a of the seed crystal 2. The silicon carbide single crystal 1a is used as seed crystal 2 for growing a further silicon carbide single crystal 1.

[0039] With reference to Fig. In step 11, the seed crystal 2, formed from the single-crystal substrate 1a, is attached to the seed crystal holding section 21 of the crucible 20. The seed crystal 2 has a third principal surface 2a and a fourth principal surface 2b, which is opposite the third principal surface 2a. The fourth principal surface 2b of the seed crystal 2 is in contact with the seed crystal holding section 21 and is held by the seed crystal holding section 21. The silicon carbide starting material 3 is arranged on the starting material arrangement section 22. The silicon carbide starting material 3 is, for example, formed from silicon carbide powder. The silicon carbide starting material 3 is arranged on the starting material arrangement section 22 such that the third principal surface 2a of the seed crystal 2 faces the surface of the silicon carbide starting material 3.

[0040] A second silicon carbide single-crystal growth step is then performed. Specifically, the crucible 20, containing the silicon carbide starter material 3 and the seed crystal 2, is heated from ambient temperature to the sublimation temperature (e.g., 2300 °C) of the silicon crystal in an atmospheric gas, such as helium and nitrogen, as in the first silicon carbide single-crystal growth step. The seed crystal 2 is heated to a temperature lower than that of the silicon carbide starter material 3. In other words, the crucible 20 is heated to a temperature that decreases in one direction from the silicon carbide starter material 3 towards the seed crystal 2. The pressure in the crucible 20 is then reduced, for example, to 1 kPa.Accordingly, the silicon carbide starting material 3 is sublimed in the crucible 20 and recrystallized on the third principal face 2a of the seed crystal 2, causing the silicon carbide single crystal 2 to begin growing on the third principal face 2a of the seed crystal 2. The silicon carbide single crystal 1 is grown, for example, for about 100 hours. In this way, the silicon carbide single crystal 1 is formed on the third principal face 2a of the seed crystal 2 (see ). Fig. 12) grown. As in Fig. As shown in Figure 12, in the second silicon carbide single crystal growth step, the silicon carbide single crystal 1 is grown such that the diameter of the silicon carbide single crystal 1 in a direction parallel to the third principal surface 2a of the seed crystal 2 becomes larger than the diameter of the third principal surface 2a of the seed crystal 2.

[0041] As previously described, the small-diameter seed crystal 2, formed from the high-quality silicon carbide single crystal to achieve a low dislocation density, is used to grow the low-dislocation silicon carbide single crystal 1 on the third principal face 2a of the seed crystal 2 to achieve a large diameter. A cutting step is then repeated to remove a portion of the silicon carbide single crystal 1 and use this portion as seed crystal 2 to grow the next silicon carbide single crystal 1. In this way, a silicon carbide single crystal 1 with a low dislocation density and a large diameter can be grown. Finally, a silicon carbide single crystal 1 with a maximum diameter greater than 100 mm (preferably a maximum diameter of at least 150 mm) is obtained.

[0042] Subsequently, a silicon carbide single-crystal cutting step is performed. For example, the silicon carbide single crystal 1 is cut using a wire saw. The silicon carbide single crystal 1 is cut, for example, along a plane that intersects the normal of the third principal face 2a of the seed crystal 2 (preferably a plane perpendicular to the normal) in order to obtain a plurality of silicon carbide single-crystal substrates 11.

[0043] With reference to Fig. 13 and Fig. In the silicon carbide single-crystal substrate 11, which serves as a silicon carbide semiconductor substrate, a first principal surface 11d and a second principal surface 11e, which is opposite the first principal surface 11d, are described in section 14. The first principal surface 11d of the silicon carbide single-crystal substrate 11 has a maximum diameter D4 of more than 100 mm, preferably not less than 150 mm. The silicon carbide single-crystal substrate 11 has a thickness T of not more than 700 µm, preferably not more than 600 µm. The first principal surface 11d of the silicon carbide single-crystal substrate 11 can, for example, correspond to the {0001} plane or to a plane that is offset by approximately not more than 8° with respect to the {0001} plane.

[0044] In the silicon carbide single-crystal substrate, stacking faults are expected to form more frequently in the <1-100> direction in the main face 11d of the silicon carbide single-crystal substrate 11 than in the <11-20> direction. Specifically, the <1-100> direction includes a [1-100] direction, a [01-10] direction, and a [-1010] direction. Each of the [1-100], [01-10], and [-1010] directions is positioned such that they are offset from each other by an angle of 120° in the first main face 11d of the silicon carbide single-crystal substrate 11. The <11-20> direction has such a positional relationship that the <11-20> direction is shifted by an angle of 30° relative to the <1-100> direction. Each of the first areas 11a, which in Fig. The area shown hatched in Figure 13 is a region in the first principal surface 11d of the silicon carbide semiconductor substrate 11 within 15°, relative to a straight line obtained by projecting a straight line passing through the first midpoint 11c and parallel to the <1-100> direction onto the first principal surface 11d, as viewed from the first midpoint 11c of the first principal surface 11d of the silicon carbide semiconductor substrate 11 (in other words, a region of ±15° relative to the straight line obtained by projecting the straight line parallel to the <1-100> direction onto the first principal surface 11d). The angle ϕ in Fig. 13 is 15°. In other words, each of the second areas 11b, which are in Fig. 13, which are not shown hatched, is an area in the first principal surface 11d of the silicon carbide semiconductor substrate 11 within 15° of a straight line obtained by projecting a straight line onto the first principal surface 11d, passing through the first midpoint 11c and parallel to the <11-20> direction, as viewed from the first midpoint 11c of the first principal surface 11d of the silicon carbide semiconductor substrate 11 (in other words, an area of ​​±15°, with respect to a straight line obtained by projecting the straight line onto the first principal surface 11d parallel to the <11-20> direction). The first areas 11a, which are shown hatched, and the second areas 11b, which are shown unhatched, are arranged alternately at 30° in the circumferential direction of the first main surface 11d of the silicon carbide semiconductor substrate 11.

[0045] With reference to Fig. In the following, the straight line obtained by projecting the straight line passing through the first midpoint 11c of the first principal surface 11d of the silicon carbide single-crystal substrate 11 and parallel to the <1-100> direction onto the first principal surface 11d is described. If initially the deviation angle is 0° (i.e., when α in Fig. 14 0°), the first principal surface 11d of the silicon carbide single crystal substrate 11 corresponds to the {0001} plane, and the normal direction c2 of the first principal surface 11d is the <0001> -direction. If the deviation angle is 0°, the <1-100> direction is a direction a2 parallel to the first principal surface 11d. Thus, the straight line a2 parallel to the <1-100> direction is the straight line obtained by projecting onto the first principal surface 11d the straight line passing through the first center point 11c of the first principal surface 11d of the silicon carbide single-crystal substrate 11 and parallel to the <1-100> direction. If, on the other hand, the deviation angle is 8° (i.e., α in Fig. 14 is 8°), the first principal surface 11d of the silicon carbide single crystal substrate 11 corresponds to a plane that is offset by 8° with respect to the {0001} plane, and the normal direction c1 of the first principal surface 11d is a direction that is offset by 8° with respect to the <0001> The <1-100> direction is inclined. If the angle of deviation is 8°, the <1-100> direction is a direction a1 inclined by 8° with respect to the first principal surface 11d. Thus, a straight line a2 is the straight line obtained by projecting the straight line a1 onto the first principal surface 11d, passing through the first center point 11c of the first principal surface 11d of the silicon carbide single-crystal substrate 11 and parallel to the <1-100> direction.

[0046] Next, a step is performed to remove a circumferential edge section 7 of the silicon carbide single-crystal substrate 11. With reference to Fig. In step 15, the circumferential edge section 7 is removed such that the position of the first center point 11c of the first principal surface 11d of the silicon carbide single-crystal substrate 11 before the removal of the circumferential edge section 7 does not coincide with the position of the second center point O of the first principal surface 11d of the silicon carbide single-crystal substrate 11 after the removal of the circumferential edge section 7, and such that the second center point O, from the perspective of the first center point 11c in the first principal surface 11d in the first region 11a, is located within 15° of the straight line passing through the first center point 11c and parallel to the <1-100> direction.In other words, the circumferential edge section 7 of the silicon carbide single-crystal substrate 11 is chamfered to displace the center point of the silicon carbide single-crystal substrate 11 such that, after removal of the circumferential edge section 7, the position of the second center point O is located in the first region 11a, which is represented by the hatching mentioned above. Preferably, the circumferential edge section 7 is removed such that, viewed from the first center point 11c of the silicon carbide single-crystal substrate 11, the second center point O is located in the first principal surface 11d in a region within 10° of the straight line passing through the first center point 11c and parallel to the <1-100> direction.

[0047] The circumferential edge section 7 of the silicon carbide single-crystal substrate 11 is removed by polishing or grinding the circumferential edge section 7 using a grinding stone or the like. Preferably, the circumferential edge section 7 of the silicon carbide single-crystal substrate 11 is removed such that the maximum diameter D4 of the first principal surface 11d of the silicon carbide single-crystal substrate 11 before the removal of the circumferential edge section 7 is not less than the maximum diameter D3 × 110%, wherein the maximum diameter D3 is the maximum diameter of the first principal surface 11d of the silicon carbide single-crystal substrate 11 after the removal of the circumferential edge section 7.

[0048] After the step of producing the silicon carbide semiconductor substrate 11 and before the step of removing the circumferential edge section 7 of the silicon carbide semiconductor substrate 11, a determination step is preferably carried out to identify a region 6 exhibiting a plurality of defects, such as stacking faults, crystal grain boundaries, or dislocation arrangements, by examining the first principal surface 11d of the silicon carbide semiconductor substrate 11. In particular, observation using an optical microscope, PL imaging, X-ray topography, or the like can be performed to identify the region with the plurality of defects, such as stacking faults, crystal grain boundaries, or dislocation arrangements.In the step of removing the circumferential edge section 7, the area 6 containing the stacking defects or the like is selectively removed by continuous adjustment to selectively remove the specific area by visual or camera observation. For example, by repeatedly rotating the silicon carbide single-crystal substrate 11 clockwise by an angle of less than 360° and then performing a counterclockwise rotation by the same angle, only the specific area of ​​the circumferential edge section 7 of the silicon carbide semiconductor substrate 11 can be selectively removed.

[0049] If at least one or more grain boundaries and one or more dislocation arrangements are present in the first principal face 11d of the silicon carbide semiconductor substrate 11, the circumferential boundary section 7 is removed such that the grain boundaries and / or the dislocation arrangements are not divided in the step of removing the circumferential boundary section 7. In particular, for example, the circumferential boundary section 7 is removed to remove all grain boundaries or dislocation arrangements in the first principal face 11d of the silicon carbide semiconductor substrate 11. With reference to Fig. 16. Before the removal of the circumferential boundary section 7, the outer circumferential end section of the silicon carbide single-crystal substrate 11 comprises an outer circumferential end section 11p, represented by a dashed line, while after the removal of the circumferential boundary section 7, the outer circumferential end section of the silicon carbide single-crystal substrate 11 comprises an outer circumferential end section 10c3, represented by a solid line. In this case, at the crystal defects 5, such as the crystal grain boundaries or the dislocation arrangements, the circumferential boundary section 7 of the silicon carbide single-crystal substrate 11 is removed, so that after the removal of the circumferential boundary section 7, the outer circumferential end section 10c3 of the silicon carbide single-crystal substrate 11 is located closer to the first center point 11c, relative to the section 5a that is closest to the first center point 11c of the silicon carbide single-crystal substrate 11.It should be noted that in the case where the outer circumferential end section of the silicon carbide single crystal substrate 11 is arranged at the outer circumferential end section 10c2 after the removal of the circumferential edge section 7, the crystal defects 5, such as the crystal grain boundaries or the dislocation arrangements, are divided.

[0050] With reference to Fig. In step 16, the circumferential boundary section 7 can be removed such that all the crystal grain boundaries or dislocation arrangements remain in the first principal surface 11d of the silicon carbide semiconductor substrate 11. The outer circumferential end section of the silicon carbide single-crystal substrate 11 after the removal of the circumferential boundary section 7 becomes the outer circumferential end section 10c1, which is represented by a solid line.In this case, the circumferential edge section 7 of the silicon carbide single crystal substrate 11 is removed such that, in the crystal defects 5, such as the crystal grain boundaries or the dislocation arrangements, the outer circumferential end section 10c1 of the silicon carbide single crystal substrate 11 is arranged on an outer circumferential side, with respect to the section 5b that is furthest away from the first center point 11c of the silicon carbide single crystal substrate 11, after the removal of the circumferential edge section 7.

[0051] With reference to Fig. In step 17, an additional chamfering process is performed. Specifically, the circumferential edge section 7 of the silicon carbide single-crystal substrate 11 is removed to eliminate all crystal defects. The outer circumferential end section of the silicon carbide single-crystal substrate 11 after the removal of circumferential edge section 7 becomes the outer circumferential end section 10c3 again. Similarly, if a dislocation section is present in the circumferential edge section 7 of the silicon carbide single-crystal substrate 11, the dislocation section is chamfered to remove the dislocation section. Accordingly, fracture of the silicon carbide semiconductor substrate 10 can be effectively prevented. It should be noted that the additional chamfering process can be performed either before the formation of the silicon carbide epitaxial layer 12 on the first principal surface 11d of the silicon carbide single-crystal substrate 11 or after the formation of the silicon carbide epitaxial layer 12.In the removal of the circumferential edge section 7 by the additional chamfering process, the circumferential edge section 7 is removed by polishing or grinding the circumferential edge section 7 using a grinding stone, a hard rubber or the like. In this way, the silicon carbide semiconductor substrate 10 ( Fig. 1) formed. The silicon carbide semiconductor substrate 10 can be a substrate for a silicon carbide semiconductor device or a seed crystal for growing a silicon carbide single crystal in the sublimation process.

[0052] Subsequently, the silicon carbide epitaxial layer 12 is formed on the silicon carbide single-crystal substrate 11. The silicon carbide epitaxial layer is formed, for example, by a CVD (chemical vapor deposition) process. Specifically, a carrier gas comprising hydrogen (H₂) and a starting material gas comprising monosilane (SiH₄), propane (C₃H₈), nitrogen (N₂), and the like are supplied to the silicon carbide single-crystal substrate 11, and the silicon carbide single-crystal substrate 11 is then heated to a temperature of not less than approximately 1500 °C and not more than 1700 °C. In this way, the silicon carbide semiconductor substrate 10, which has the silicon carbide epitaxial layer 12 on the silicon carbide single-crystal substrate 11, is formed.

[0053] The function and effect of the silicon carbide semiconductor substrate according to the present embodiment are described below.

[0054] The silicon carbide semiconductor substrate 10 according to the present embodiment has a first main surface 10a and a second main surface 10b arranged opposite the first main surface 10a. The maximum diameter of the first main surface 10a is greater than 100 mm, and the thickness of the silicon carbide semiconductor substrate 10 is no more than 700 µm. In the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 no more than 500 / mm 2 This prevents the silicon carbide semiconductor substrate from breaking. Consequently, silicon carbide semiconductor elements can be produced with a sufficiently high industrial yield using the silicon carbide semiconductor substrate.

[0055] Furthermore, if, according to the silicon carbide semiconductor substrate 10 according to the present embodiment, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a second outer circumferential region OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the circumferential section OR within 5 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a not more than 500 / mm 2 .

[0056] A more detailed study showed that in the case where at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first principal surface 10a towards the center O of the first principal surface 10a, the silicon carbide semiconductor substrate 10 is more likely to break compared with the case where neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2.If at least one or more of the crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, crack formation in the silicon carbide semiconductor substrate can be effectively suppressed by maintaining a dislocation density in any region with an area of ​​1 mm. 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2 amounts.

[0057] Furthermore, according to the silicon carbide semiconductor substrate 10 according to the present embodiment, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2 This effectively prevents the silicon carbide semiconductor substrate from breaking.

[0058] Furthermore, if, according to the silicon carbide semiconductor substrate 10 according to the present embodiment, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a second outer circumferential region OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² 2in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 100 / mm 2 If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 5 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2 This effectively prevents the silicon carbide semiconductor substrate from breaking.

[0059] Furthermore, according to the silicon carbide semiconductor substrate 10 of the present embodiment, the dislocation density in any region with an area of ​​1 mm² is 2 in an outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 500 / mm 2 . Accordingly, crack formation in the silicon carbide semiconductor substrate can be effectively prevented.

[0060] Furthermore, if, according to the silicon carbide semiconductor substrate 10 according to the present embodiment, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm²2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2 If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 500 / mm 2 .

[0061] A more detailed investigation revealed that the silicon carbide semiconductor substrate is more likely to fracture when at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2, extending 1 mm from the outer circumferential end section 10c of the first principal surface 10a towards the center O of the first principal surface 10a, compared to the case where neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2. Therefore, if at least one or more crystal grain boundaries and one or more dislocation arrangements are present in the second outer circumferential section OR2, extending 1 mm from the outer circumferential end section 10c of the first principal surface 10a towards the center O of the first principal surface 10a, crack formation in the silicon carbide semiconductor substrate can be effectively suppressed by maintaining a dislocation density of no more than 200 / mm². 2in any area with a surface area of ​​1 mm 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a.

[0062] Furthermore, according to the silicon carbide semiconductor substrate 10 of the present embodiment, the dislocation density is no more than 200 / mm². 2 in any area with a surface area of ​​1 mm 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first main surface 10a in the direction of the center point O of the first main surface 10a. In this way, it can be prevented even more effectively that the silicon carbide semiconductor substrate breaks.

[0063] Furthermore, if, according to the silicon carbide semiconductor substrate 10 according to the present embodiment, at least one or more crystal grain boundaries and one or more dislocation arrangements are present in a second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 100 / mm 2If neither the crystal grain boundaries nor the dislocation arrangements are present in the second outer circumferential section OR2 of 1 mm from the outer circumferential end section 10c of the first main surface 10a in the direction of the center O of the first main surface 10a, the dislocation density in the arbitrary region with an area of ​​1 mm² is 2 in the outer circumferential section OR within 10 mm of the outer circumferential end section 10c of the first principal surface 10a in the direction of the center point O of the first principal surface 10a not more than 200 / mm 2 . Accordingly, it can be prevented even more effectively that the silicon carbide semiconductor substrate breaks.

[0064] Furthermore, according to the present embodiment, the silicon carbide semiconductor substrate 10 comprises: a silicon carbide single-crystal substrate 11, which forms the second main surface 10b; and a silicon carbide epitaxial layer 12, which is provided on the silicon carbide single-crystal substrate 11 and forms the first main surface 10a. This prevents the silicon carbide semiconductor substrate from fracturing with the silicon carbide epitaxial layer.

[0065] Furthermore, according to the silicon carbide semiconductor substrate 10 of the present embodiment, the maximum diameter of the first main surface 10a is not less than 150 mm. The larger the maximum diameter of the first main surface, the more likely it is that the silicon carbide semiconductor substrate will fracture. However, it is possible to effectively suppress cracking in the large-diameter silicon carbide semiconductor substrate, which has a first main surface with a maximum diameter of not less than 150 mm.

[0066] Furthermore, according to the present embodiment, the thickness of the silicon carbide semiconductor substrate 10 is no more than 600 µm. If the silicon carbide semiconductor has a larger diameter and a thinner thickness, the probability of fracture increases. The silicon carbide semiconductor substrate with a large diameter and a thin thickness of no more than 600 µm can be particularly effectively protected against cracking.

[0067] According to the method for producing the silicon carbide semiconductor substrate 10, in the step of removing the circumferential edge section 7, the circumferential edge section 7 is removed such that the position of the first center point 11c of the first principal surface 11d of the silicon carbide semiconductor substrate 11 before the removal of the circumferential edge section 7 does not coincide with the position of the second center point O of the first principal surface 11d of the silicon carbide semiconductor substrate 11 after the removal of the circumferential edge section 7, and such that the second center point O in the first principal surface 11d in the first region 11a is arranged within 15° of the straight line obtained by projecting, from the first center point 11c onto the first principal surface, the straight line passing through the first center point 11c and parallel to the <1-100> direction. Compared to the <11-20> direction, stacking faults occur more frequently in the <1-100> direction.Thus, by removing the circumferential edge section 7, stacking defects can be effectively eliminated, such that the position of the first center point 11c of the first principal surface 11d of the silicon carbide semiconductor substrate 11 before the removal of the circumferential edge section 7 does not coincide with the position of the second center point O of the first principal surface 11d of the silicon carbide semiconductor substrate 11 after the removal of the circumferential edge section 7, and such that the second center point O in the first principal surface 11d is located in the first region 11a within 15° of the straight line obtained by projecting, from the first center point 11c, the straight line passing through the first center point 11c and parallel to the <1-100> direction onto the first principal surface. Consequently, fracture of the silicon carbide semiconductor substrate can be prevented.

[0068] Furthermore, the process for producing the silicon carbide semiconductor substrate 10 includes a determination step for identifying a region 6 with a stacking fault, in which the first principal surface 11d of the silicon carbide semiconductor substrate 11 is examined after the step of producing the silicon carbide semiconductor substrate 11 and before the step of removing the circumferential edge section 7 of the silicon carbide semiconductor substrate 11. In the step of removing the circumferential edge section 7, the region 6 with the stacking faults is removed. Accordingly, the stacking faults can be efficiently removed.

[0069] Furthermore, according to the process for producing the silicon carbide semiconductor substrate 10, at least one or more crystal grain boundaries and one or more dislocation arrangements can occur in the first principal surface 11d of the silicon carbide semiconductor substrate 11 during the step of producing the silicon carbide semiconductor substrate 11. In the step of removing the circumferential edge section 7, the circumferential edge section 7 is removed in such a way that neither the crystal grain boundaries nor the dislocation arrangements are divided. Thus, a crack formation ratio in the silicon carbide semiconductor substrate can be reduced.

[0070] Furthermore, according to the process for producing the silicon carbide semiconductor substrate 10, in the step of removing the circumferential edge section 7, the circumferential edge section 7 is removed in such a way that all crystal grain boundaries or dislocation arrangements in the first principal surface 11d of the silicon carbide semiconductor substrate 11 are removed. Thus, a crack formation ratio in the silicon carbide semiconductor substrate can be effectively reduced.

[0071] Furthermore, according to the process for producing the silicon carbide semiconductor substrate 10, in the step of the circumferential edge section 7, the circumferential edge section 7 is removed in such a way that the entire crystal grain boundaries or the dislocation arrangements in the first principal surface 11d of the silicon carbide semiconductor substrate 11 remain in the first principal surface 11d. In this way, a crack formation ratio in the silicon carbide semiconductor substrate is effectively reduced.

[0072] The embodiments disclosed herein serve only for illustration and are in no way to be considered limiting. Rather, the scope of the present invention is defined by the terms of the claims rather than by the embodiments described above and is intended to encompass all modifications that fall within the scope and meaning of the terms of the patent claims. Reference symbol list 1 Silicon carbide single crystal 1a Single crystal substrate 2 Seed crystal 2a a third main area 2b a fourth main area 3 Silicon carbide starting material 5 Crystal defect 6 Area 7 Perimeter edge section 10 Silicon carbide semiconductor substrate 10a first main area 10b a second main area 10c, 10c1, 10c2, 10c3 Outer circumferential end section 10d chamfered section 10th flat section 10f Border section 10g end section 11 Silicon carbide single crystal substrate 11a first area 11b second area 11c first center point 11d first main area 11e second main area 11p Outer circumferential end section 12 Silicon carbide epitaxial layer 20 melting pots 21 Seed crystal retention section 22 Source material recording section D, D1, D2, D3; D4 maximum diameter G focus IR inner circumferential section L distance O center point (second center point) OR outer perimeter section OR1 first outer circumference section OR2 second outer circumference section T Thickness a, b length r1 first straight line r2 second straight line x1, x2 distance

Claims

[1] Silicon carbide semiconductor substrate (10) with a first main surface (10a) and a second main surface (10b) arranged opposite the first main surface (10a), wherein the first main surface (10a) has a maximum diameter of more than 100 mm, and the silicon carbide semiconductor substrate has a thickness of no more than 700 µm, wherein the first principal surface (10a) corresponds to a {0001} plane or a plane with a deviation angle of no more than 8°, with respect to the {0001} plane, wherein one or more crystal defects (5), each consisting of a crystal grain boundary, are present in a region of 1 mm from an outer circumferential end section (10c) of the first principal surface (10a) in the direction of a center point (O) of the first principal surface (10a), wherein a dislocation density in any region with an area of ​​1 mm 2in an area within 5 mm of the outer circumferential end section (10c) of the first principal surface (10a) in the direction of the center point (O) of the first principal surface (10a) not more than 200 / mm 2 is, and wherein in at least one of the one or more crystal defects (5) an angle (θ) formed by a first straight line (r1) and a second straight line (r2) is greater than 45° and not greater than 90°, wherein the first straight line (r1) passes through a part of the crystal defect (5) at an outermost circumferential side of the first principal surface (10a) and the midpoint (O) of the first principal surface (10a) and the second straight line (r2) lies in a longitudinal direction of the crystal defect (5). [2] Silicon carbide semiconductor substrate (10) according to claim 1, wherein the angle is not less than 60° and not greater than 90°. [3] Silicon carbide semiconductor substrate (10) according to claim 1, wherein the dislocation density in the arbitrary region with an area of ​​1 mm² 2 in an area within 10 mm of the outer circumferential end section (10c) of the first principal surface (10a) in the direction of the center point (O) of the first principal surface (10a) not more than 200 / mm 2 amounts. [4] Silicon carbide semiconductor substrate (10) according to claim 3, wherein the dislocation density is not more than 100 / mm² 2 amounts. [5] Silicon carbide semiconductor substrate (10) according to any one of claims 1 to 4, wherein the silicon carbide semiconductor substrate (10) comprises: a silicon carbide single-crystal substrate (11) forming the second principal surface (10b); and a silicon carbide epitaxy layer (12) which is provided on the silicon carbide single crystal substrate (11) and forms the first main surface (10a). [6] Silicon carbide semiconductor substrate (10) according to any one of claims 1 to 5, wherein the maximum diameter of the first main surface (10a) is not less than 150 mm. [7] Silicon carbide semiconductor substrate (10) according to any one of claims 1 to 6, wherein the thickness of the silicon carbide semiconductor substrate (10) is not more than 600 µm.

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