ELECTRICAL SWITCHING ELEMENT FOR INTERCONNECTING CURRENT BARS OF AN ELECTRICAL POWER DISTRIBUTION SYSTEM
By employing a parallel association of transistor chips with coplanar switching conduction structures and thinned substrates, the electrical switching element addresses high internal resistance issues, achieving reduced conduction losses and enhanced thermal management.
Patent Information
- Application Number
- FR2021009838
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2021-09-20
- Publication Date
- 2025-05-23
- Estimated Expiration
- 2041-09-20
AI Technical Summary
Existing electrical switching elements for energy distribution systems have high internal resistance, leading to significant conduction losses and thermal management challenges.
A parallel association of transistor chips with a coplanar switching conduction structure based on large gap materials and thinned or completely removed substrates, connected to form a drain, source, and gate, is used to create an electrical switching element. This configuration reduces internal resistance and enhances thermal dissipation.
The proposed solution significantly reduces internal resistance, minimizing conduction losses and thermal power evacuation, while also improving mechanical robustness and reducing manufacturing costs.
Abstract
Description
Title of the invention: ELECTRICAL SWITCHING ELEMENT FOR INTERCONNECTING CURRENT BARS OF AN ENERGY DISTRIBUTION SYSTEM ELECTRIC Technical field
[0001] The present invention relates to an electrical switching element of a busbar assembly for use by an electrical power distribution system, and to a method of manufacturing said electrical switching element. Technological background
[0002] Electrical power distribution systems are widely known that use current busbars to distribute electrical power. These distribution systems are used, for example, in the automotive or aeronautical industry. Current busbars are typically aluminum or copper strips whose shape and dimensions depend on their use. The current busbars must be separated from each other by switching elements that are controlled by control devices (also called excitation devices) to establish or break a power loop formed by the current busbars.
[0003] Semiconductor-based switching technologies such as insulated gate bipolar transistors (IGBTs), insulated gate field effect transistors (MOSFETs), or high electronic mobility transistors (HEMTs) are very often used to produce these switching elements. The active part of these components, called a bare chip, is generally mounted in a package itself attached to the surface of a printed circuit board (PCB).
[0004] Recently, it has been found that bare copper-metallized chips can be embedded in a printed circuit board. Such switching elements are based on a standard principle of manufacturing from the growth of components on a disc (in English "Wafer"). These switching elements have a vertical structure which implies that the electric power current flows mainly perpendicular to the surface of the latter. Power electrodes are therefore located above and below the chip. For the integration of these switching elements, the encapsulation is simplified and is limited to the copper metallization of the electrodes and to insertion into a substrate with contacting the switching element by microvia.
[0005] This burial solution makes it possible to optimize the internal resistance of the switching elements, to increase the electrical powers (current) and to limit the thermal powers to be evacuated (to reduce the thermal resistances of access to the dissipation system). It also makes it possible to minimize the connections with the environment (power or control) and thus to reduce the parasitic interconnection elements. In particular, it allows large gap components to operate at high switching frequency.
[0006] However, this burial solution has drawbacks, in particular, the internal resistance values of the switching elements which remain high and which result in significant conduction losses. Summary of the present invention
[0007] An object of the present invention is to define a switching element which solves the disadvantages of the technological background.
[0008] Another object of the present invention is to define a set of current bars for an electrical power distribution system which is switchable.
[0009] According to a first aspect, the present invention relates to an electrical switching element for a set of current bars of an electrical power distribution system, in which the electrical switching element comprises a parallel association of transistor chips with a coplanar switching conduction structure based on a large gap material and with thinned substrates or with completely removed substrates, each transistor chip comprising a drain, a source and a gate, the transistor chips being separated from each other by an electrical insulator and connected to each other at the drains, sources and gates of the transistor chips to form a drain, a source and a gate of the electrical switching element.
[0010] According to a particular and non-limiting example of embodiment, the transistors are field effect transistors.
[0011] According to a particular and non-limiting exemplary embodiment, the transistors are high electron mobility transistors (HEMT).
[0012] According to a particular and non-limiting example of embodiment, the large gap material is based on gallium nitride.
[0013] According to a particular and non-limiting example of embodiment, the field effect transistors are peelable transistors.
[0014] According to a particular and non-limiting example of embodiment, the substrates are thinned by mechanical and chemical polishing or by laser ablation.
[0015] According to a particular and non-limiting exemplary embodiment, the parallel association of transistor chips is a stack of transistor chips.
[0016] According to a second aspect, the present invention relates to a method for manufacturing an electrical switching element according to the first aspect. The method comprises a step of obtaining a plurality of transistor chips with a coplanar switching conduction structure based on wide gap materials and with a thinned substrate or with a completely removed substrate; a step of encapsulating each transistor chip in an insulating resin except for one of its surfaces, called the upper surface; a step of metallizing the upper surface of each transistor chip;a step of creating contacts on the upper surface of each transistor chip by masking, optical revelation and chemical etching of the upper surface of each transistor chip, said contacts of a chip of a transistor comprising a drain, a source, a gate and a Kelvin source, the drain and the source being intended for the passage of power current when the transistor is excited by a particular voltage across the terminals of the Kelvin source and the gate; a step of obtaining the electrical switching element by superimposing the plurality of transistor chips obtained on each other, the upper surfaces of the transistor chips being oriented towards an upper surface of the switching element;and a step of metallizing four faces of the switching element perpendicular to the upper surface of the switching element to obtain four contacts of the electrical switching element comprising a gate, a source, a drain and a Kelvin source, each contact being separated from the others. ;
[0017] According to a third aspect, the present invention relates to a busbar assembly for an electrical power distribution system, comprising first and second busbars electrically insulated from each other and interconnected by an electrical switching element according to the first aspect; and a controller interconnected with the electrical switching element, the controller being configured to energize a gate of the electrical switching element to electrically connect the first and second busbars.
[0018] According to a fourth aspect, the present invention relates to a power distribution system comprising at least one set of current bars according to the third aspect. Brief description of the figures
[0019] Other characteristics and advantages of the present invention will emerge from the description of the particular and non-limiting exemplary embodiments of the present invention below, with reference to the appended figures 1 to 17, in which:
[0020] [Fig.l] schematically illustrates a coplanar architecture of a field effect transistor according to a particular and non-limiting exemplary embodiment of the present invention;
[0021] [Fig.2] schematically illustrates a top view of a HEMT transistor according to a particular and non-limiting exemplary embodiment of the present invention;
[0022] [Fig.3] illustrates a flowchart of the different steps of a method for manufacturing an electrical switching element according to a particular and non - limiting embodiment of the present invention;
[0023] [Fig.4] schematically illustrates a cross - sectional side view of a HEMT transistor with and without its substrate according to a particular and non - limiting embodiment of the present invention;
[0024] [Fig.5] schematically illustrates a perspective view of a bare chip according to a particular and non - limiting embodiment of the present invention;
[0025] [Fig.6] schematically illustrates a cross - sectional side view of a bare chip according to a particular and non - limiting embodiment of the present invention;
[0026] [Fig.7] schematically illustrates a perspective view of a bare chip encapsulated in an insulating resin according to a particular and non-limiting exemplary embodiment of the present invention;
[0027] [Fig.8] schematically illustrates a sectional profile view of a bare chip encapsulated in an insulating resin according to a particular and non-limiting exemplary embodiment of the present invention;
[0028] [Fig.9] schematically illustrates a perspective view of a bare chip with exposed contacts on its upper surface according to a particular and non-limiting exemplary embodiment of the present invention;
[0029] [Fig. 10] schematically illustrates a perspective view of a stack of three chips according to a particular and non-limiting exemplary embodiment of the present invention;
[0030] [Fig. 11] schematically illustrates a sectional profile view of a stack of three chips according to a particular and non-limiting exemplary embodiment of the present invention;
[0031] [Fig.12] schematically illustrates a perspective view of an electrical switching element with its metallized faces according to a particular and non-limiting exemplary embodiment of the present invention;
[0032] [Fig. 13] schematically illustrates a sectional profile view of an electrical switching element with its metallized faces according to a particular and non-limiting embodiment of the present invention;
[0033] [Fig. 14] schematically illustrates a perspective view of the ECE switching element when the drains and sources of the HEMT transistors are nested combs according to a particular and non-limiting exemplary embodiment of the present invention;
[0034] [Fig. 15] schematically illustrates an electrical energy distribution system comprising a set of two current bars according to a particular and non-limiting exemplary embodiment of the present invention;
[0035] [Fig. 16] schematically illustrates an electrical energy distribution system comprising two sets of two current bars according to a particular and non-limiting exemplary embodiment of the present invention; and
[0036] [Fig. 17] illustrates an equivalent electrical diagram of the electrical energy distribution system of [Fig. 16] according to a particular and non-limiting exemplary embodiment of the present invention. Description of examples of implementation
[0037] A switching element, a method of manufacturing this switching element, a set of current bars comprising at least one switching element and a power distribution system will now be described in the following with joint reference to Figures 1 to 17. The same elements are identified with the same reference signs throughout the description which follows.
[0038] According to a particular and non-limiting example of embodiment of the present invention, a switching element is controlled by a control device to ensure a function of switching current bars of an electrical energy distribution system. The switching element comprises a parallel association of transistor chips with a coplanar switching conduction structure based on a large gap material and with thinned substrates or with completely removed substrates, each chip comprising a drain, a source and a gate, the transistor chips being separated from each other by an electrical insulator and connected to each other at the drains, sources and gates to form a drain, a source and a gate of the electrical switching element.
[0039] Stacking several identical very thin chips makes it possible to parallelize these chips to increase the maximum admissible current and reduce the internal resistance of the switching element thus formed while integrating perfectly into a fine structure of a current line, of the order of a few hundred micrometers to several millimeters thick. The internal resistance of the switching element being limited, the thermal power to be evacuated (Joule effect) is limited, thus limiting the costs of the cooling systems.
[0040] The switching element avoids the use of conventional wire connections ("wire bonding" in English) which reinforces the mechanical robustness of the switching element compared to an element which would use wires.
[0041] The contacts of the switching element have very large surfaces which improves their electrical resistances and which facilitates the dissipation of heating of these contacts (Joule effect). The contacts can thus operate at lower temperatures.
[0042] The switching element has a reduced footprint due to the thinning or complete removal of the substrates. It also limits the manufacturing cost of the chips because no package is used.
[0043] The electrical contacts of the switching element are ensured by metallization and soldering which limits the contact resistances.
[0044] The electrical switching element according to the present invention is particularly suitable for use with a Li-ion battery used in electromobility or stationary mode.
[0045] According to a particular and non-limiting exemplary embodiment, the transistors are field effect transistors.
[0046] [Fig.l] schematically illustrates a coplanar architecture of a field effect transistor according to a particular and non-limiting exemplary embodiment of the present invention.
[0047] According to this example, the field effect transistor is a high electron mobility transistor (HEMT).
[0048] This example is particularly advantageous because the coplanar nature of HEMT transistors makes it possible to overcome section restrictions between the transistor and the current lines.
[0049] According to a particular and non-limiting embodiment, the HEMT transistor is obtained by epitaxial growth in the organometallic vapor phase (MOCVD from the English Metalorganic Chemical Vapor Deposition) on an SU substrate of silicon, silicon carbide (SiC) or even sapphire (A12O3) for example. A stack H of semiconductor layers is thus obtained as shown in [Fig.l].
[0050] Preferably, the HEMT transistor is based on gallium nitride, i.e. one of these layers is an AlGaN layer and one layer is a gallium nitride (GaN) layer.
[0051] A HEMT transistor is a purely horizontal component, the architecture of which lends itself perfectly to the implementation of the present invention. Like any switching component, a HEMT transistor consists of a source S defining one of the power terminals of the transistor, a drain D, defining the other power terminal of the transistor. Between these two terminals is a channel activated by a gate G. By applying a particular voltage to the gate G, the channel opens or closes, that is to say that a power current C (dotted line) can flow between the source S and the drain D when the channel is closed.
[0052] For example, the width 1 of the channel can extend between 30 mm and 300 mm and the length L of the channel of the HEMT transistor is of the order of 9 Fm.
[0053] [Fig.2] schematically illustrates a top view of a HEMT transistor. The source S and the drain are in the form of combs nested inside each other and the gate G winds through the labyrinth formed by the two nested combs.
[0054] [Fig.3] illustrates a flowchart of the different stages of a manufacturing process of an electrical switching element according to a particular and non-limiting exemplary embodiment of the present invention.
[0055] In a first step 31, a plurality of transistor chips with a lateral conduction switching structure based on large gap materials with a thinned substrate or with a completely removed substrate are obtained. These transistor chips are called bare chips thereafter.
[0056] According to a particular and non-limiting exemplary embodiment, the present invention is based on the coplanar architecture of the structure of a HEMT transistor in which the power current C flows at the near periphery of the upper surface. It is thus possible to separate the upper active layers of the semiconductor structure from the lower parts by removing all or part of the substrate SU by mechanical and chemical polishing or by laser ablation, or by a Smart Cut® process for example.
[0057] Once the substrate is thinned or completely removed, the bare chip is reduced to a thin film of the order of 1 to 3 microns which can be transferred at will into an electrical switching element.
[0058] According to a particular and non-limiting example of embodiment, the HEMT transistors are peelable, that is to say that the transistors are separated from the disk (in English "wafer") at the end of manufacturing. The disk can then be reused for a new manufacturing of components. The cost of peelable HEMT transistors therefore makes it possible to reduce the manufacturing cost of these components.
[0059] To obtain a peelable HEMT transistor, a nanometric layer of boron nitride can be integrated on the surface of the wafer whose characteristics allow for maintaining epitaxial growth and presenting a very low adhesion to the wafer for the transistor, which then becomes recoverable. If the thickness of a standard HEMT transistor with its substrate is on the order of a millimeter, the active part of an HEMT transistor is only about 1 pm. The boron nitride layer of a few nanometers is produced in the same reactor and just before the deposition of the functional layers of the HEMT structure. Due to the low adhesion of the HEMT transistor to its substrate, it is very easy to peel it off to obtain just a bare chip about 1 pm thick.
[0060] Fig. 4 schematically illustrates a cross-sectional profile view of an HEMT transistor with its SU substrate (left) and without its substrate (right).
[0061] [Fig.5], respectively [Fig.6], schematically illustrates a view in perspective, respectively profile and section, of a bare chip.
[0062] In a second step 32, each bare chip is encapsulated in insulating resin R so that five of their surfaces other than their upper surfaces are covered with the insulating resin R. The upper surface of a bare chip is the one which carries the source S, the drain D and the gate G.
[0063] [Fig.7], respectively [Fig.8], schematically illustrates a perspective view, respectively a profile view in section, of a bare chip encapsulated in the insulating resin R.
[0064] The chips are, for example, placed in the heart of a prepreg of fiberglass coated with epoxy resin. The prepreg can be replaced by polyimide (PI) sheets. In this case, an adhesive allows the layers to be welded. An adhesive for bonding polyimide is often acrylic. Several chips can be placed in the heart of the resins. The assembly forms a new disk (in English "wafer").
[0065] In a third step 33, the upper surface of each bare chip is metallized.
[0066] According to a particular and non-limiting example of embodiment, the metallization is put implemented by cathodic sputtering of copper.
[0067] Alternatively, electroplating thickening may be achieved.
[0068] In a fourth step 34, contacts corresponding to a source S, a drain D, a gate G and a Kelvin source SK are created by masking, optical revelation and chemical etching of the metallized upper surface of each bare chip. The drain D and the source S are intended for the passage of power current C when a bare chip is excited by a voltage across the terminals of the Kelvin source and the gate G.
[0069] [Fig.9] schematically illustrates a perspective view of a bare chip with exposed contacts on its upper surface.
[0070] In a fifth step 35, an electrical switching element ECE is obtained by superimposing (stacking) the plurality of bare chips obtained on top of each other, the upper surfaces of the bare chips being oriented towards the upper surface of the electrical switching element ECE.
[0071] [Fig.10], respectively [Fig.11], schematically illustrates a perspective view, respectively a sectional profile view, of a particular and non-limiting example of an embodiment of a stack of three chips PI, P2 and P3.
[0072] In a sixth step 36, the four faces of the switching element perpendicular to its upper surface are metallized to obtain four contacts of the electrical switching element ECE: a gate G connecting the gates of the chips of the plurality of chips of the switching element ECE, a drain D connecting the drains of the chips of the plurality of chips of the switching element ECE, a source S connecting the sources of the chips of the plurality of chips of the switching element ECE and a Kelvin source SK connecting the Kelvin sources of the plurality of chips of the ECE switching element.
[0073] Each contact of the ECE electrical switching element is separated from the others.
[0074] According to a particular and non-limiting example of embodiment, the metallization of the four The faces of the ECE electrical switching element are provided by electroplating.
[0075] According to a particular and non-limiting example of embodiment, a groove (for example an oblong hole) is created around the ECE switching element, taking care not to expose the corners. This makes it possible to reveal the edge of the tracks, possibly made of copper.
[0076] According to a particular and non-limiting example of embodiment, machining makes it possible to clear the angles of the ECE switching element, at the same time separating the contacts.
[0077] [Fig. 12], respectively [Fig. 13], schematically illustrates a perspective view, respectively a sectional profile view, of the ECE electrical switching element with its four metallized faces.
[0078] [Fig. 14] schematically illustrates a perspective view of the ECE switching element when the drains and sources of the HEMT transistors are nested combs ([Fig.2]).
[0079] By parallelizing HEMT transistor chips, the value of the internal resistance of the ECE electrical switching element is equal to the value of the internal resistance (Rdson) of a HEMT transistor chip divided by the number of ECE electrical switching element chips:
[0080] The equivalent internal resistance RDson is given by:
[0081] R, . . , = .. . elementary dxm__________ dstm equivalent number of chips in parallel
[0082] [Fig. 15] schematically illustrates an electrical power distribution system comprising a set of two current bars B1 and B2 insulated from each other and interconnected by a switching element ECE, and a control (excitation) device DE. The current bars B1 and B2 form a current line when these current bars are interconnected. The switching element ECE is positioned in the current line and may be brazed or sintered onto the two current bars B1 and B2.
[0083] The grid G and the Kelvin source SK of the switching element ECE are connected to the control device DE which controls the switching of the switching element ECE by excitation of the grid G (application of voltage between the grid G and the Kelvin source SK). A channel allowing the flow of the power current C can then be established between the current bars B1 and B2 when a particular voltage is applied between the grid G and the Kelvin source SK and this channel is closed if another voltage is applied or no voltage is applied.
[0084] [Fig. 16] schematically illustrates a system of two sets of two current bars (B 11, B21) and (B12, B22) interconnected by a connection element CH intended to be connected to an electrical load (not shown), two switching elements ECE1 and ECE2 and a control device DE.
[0085] The switching element ECE1 may be soldered or sintered onto the two current bars B11 and B21 and the switching element ECE2 may be soldered or sintered onto the two current bars B12 and B22. The switching element ECE1 allows the interconnection of the current bars B11 and B21 and the switching element ECE2 allows the interconnection of the current bars B12 and B22.
[0086] A control loop BC formed around the gate G and the Kelvin source SK of the electrical switching element ECE1 (and by ECE2) and a power loop BP formed by the two sets of interconnected current bars and by the connection element CH, can be orthogonal. This considerably reduces the inductive couplings between the power and the control of the electrical power distribution system. In addition, the mesh inductance is reduced by the proximity of the current bar B11 (conductor +) and the current bar B12 (conductor -). This proximity can be used to distribute decoupling capacitors (not shown in the figure).
[0087] The grid G and the Kelvin source SK of the switching element ECE1 are connected to the control device DE which controls the switching of the switching element ECE1 by applying a voltage between the grid G and the Kelvin source SK.
[0088] The grid G and the Kelvin source SK of the switching element ECE2 are connected to the control device DE which controls the switching of the switching element ECE2 by applying a voltage between the grid G and the Kelvin source SK.
[0089] A channel allowing the circulation of the power current C can then be established between the current bars B11 and B21 or B22 and B12 when a particular voltage is applied between the grids G and the Kelvin sources SK of one of the two electrical switching elements ECE1 or ECE2 and this channel is open if another voltage level is applied.
[0090] [Fig. 17] illustrates an equivalent electrical diagram of the electrical power distribution system of [Fig. 16]. The electrical switching elements ECE1 and ECE2 are here represented by their gates G, their drains D and their sources S. A load CHA is represented as being connected to the source S of the first electrical switching element ECE1 and to the drain D of the second electrical switching element ECE2. When the control device DE excites one of the gates G of the electrical switching elements ECE1 or ECE2, the power current C flows from either the + terminal or the + terminal
[0091] Of course, the present invention is not limited to the exemplary embodiments described above but extends to an electrical switching element which would include secondary modifications without departing from the scope of the present invention such as a number of stacked chips greater than three or even transistors with a lateral switching conduction structure other than HEMT transistors. Similarly, the present invention is not limited to the exemplary embodiments of the electrical power distribution systems described above but extends to any power distribution system which comprises at least two current bars interconnected by an electrical switching element buried in the current line formed by the interconnection of these two current bars.
Claims
Claims
1. An electrical switching element for a busbar assembly of an electrical power distribution system, wherein the electrical switching element comprises a parallel association of transistor chips with a coplanar switching conduction structure based on a wide gap material and with thinned substrates or with completely removed substrates, each transistor chip comprising a drain, a source and a gate, the transistor chips being separated from each other by an electrical insulator and connected to each other at the drains, sources and gates of the transistor chips to form a drain, a source and a gate of the electrical switching element.
2. An electrical switching element according to claim 1, wherein the transistors are field effect transistors.
3. An electrical switching element according to claim 2, wherein the transistors are high electron mobility transistors.
4. Electrical switching element according to one of the preceding claims, in which the wide gap material is based on gallium nitride.
5. Electrical switching element according to one of claims 2 to 4, in which the field effect transistors are peelable transistors.
6. An element according to one of claims 2 to 4, wherein the substrates are thinned by mechanical and chemical polishing or by laser ablation.
7. An element according to one of the preceding claims, wherein the parallel association of transistor chips is a stack of the transistor chips.
8. Method for manufacturing an electrical switching element according to one of claims 1 to 7, comprising the following steps: - obtaining (31) a plurality of transistor chips with a coplanar switching conduction structure based on large gap materials and with a thinned substrate or with a completely removed substrate; - encapsulating (32) each transistor chip in an insulating resin with the exception of one of its surfaces called the upper surface; - metallizing (33) the upper surface of each transistor chip; - creating (34) contacts on the upper surface of each transistor chip; transistor by masking, optical revelation and chemical etching of the upper surface of each transistor chip, said contacts of a transistor chip comprising a drain, a source, a gate and a Kelvin source, the drain and the source being intended for the passage of power current when the transistor is excited by a particular voltage across the Kelvin source and the gate; - obtaining (35) the electrical switching element by superimposing the plurality of transistor chips obtained on top of each other, the upper surfaces of the transistor chips being oriented towards an upper surface of the switching element; and - metallization (36) of four faces of the switching element perpendicular to the upper surface of the switching element to obtain four contacts of the electrical switching element comprising a gate, a source, a drain and a Kelvin source, each contact being separated from the others.
9. A busbar assembly for an electrical power distribution system, comprising: - a first and a second current bar electrically insulated from each other and interconnected by an electrical switching element according to one of claims 1 to 7; and - a control device interconnected with the electrical switching element, the control device being configured to excite a gate of the electrical switching element to electrically connect the first and second current bars.
10. A power distribution system comprising at least one set of current bars according to claim 9.