Method for manufacturing a photonic device

The manufacturing process for photonic devices, which includes a high-resistivity substrate and a stack of metalization and insulating layers, addresses the challenge of signal degradation in wide-band optical fibers, resulting in improved data transmission efficiency.

FR3155319A1Active Publication Date: 2025-05-16STMICROELECTRONICS INT NV
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Patent Information

Application Number
FR2023012182
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-11-09
Publication Date
2025-05-16
Estimated Expiration
2043-11-09

AI Technical Summary

Technical Problem

Existing manufacturing processes for photonic components face challenges in efficiently producing devices that can effectively handle wide-band optical fibers, often resulting in signal degradation due to material correspondence issues.

Method used

A manufacturing process involving the formation of a photonic device on a high-resistivity semiconductor substrate, with a stack comprising layers of metalization, hook layers made of silicon oxide, and optically thick insulating layers to isolate the waveguide, ensuring a total thickness greater than 3 pm for improved optical isolation.

Benefits of technology

This process enhances the data transmission rate from wide-band optical fibers by improving the material correspondence and reducing signal degradation, thereby creating more efficient photonic components.

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Abstract

Method for manufacturing a photonic device. This description relates to a method for manufacturing a photonic device (100) comprising the following successive steps: - forming on a first substrate at least one metallization layer (103) and a first adhesion layer (104); - forming on a second high-resistivity substrate (101) a second adhesion layer (103) adapted to cooperate with the first adhesion layer (104); - fixing the first adhesion layer (104) to the second adhesion layer (103); - removing the first substrate; and - forming a first optical component (108) on said at least one metallization layer (105), in which a sum of the thicknesses of said first and second adhesion layers (104, 103) and the thickness of said at least one metallization layer is greater than 3 µm. Figure for the abstract: Fig. 1
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Description

Title of the invention: Method for manufacturing a photonic device Technical field

[0001] The present description relates generally to the field of photonics, and more particularly to photonic components. The present description relates more specifically to a photonic component and to its manufacturing method. Prior art

[0002] A photonic component is a component enabling the generation, transmission, processing or conversion of optical signals. A photonic component may, in addition, be adapted to process electrical signals, such as, for example, in the context of converting an optical signal into an electronic signal, or vice versa.

[0003] Certain methods of manufacturing photonic components may use techniques known and used for the manufacturing of electronic components, such as for example microelectronic techniques.

[0004] It would be desirable to be able to improve, at least in part, certain aspects of known photonic devices and / or components, and in particular certain aspects of known manufacturing methods of photonic components. Summary of the invention

[0005] There is a need for more efficient photonic devices and / or components.

[0006] There is a need for more efficient manufacturing processes for a photonic component.

[0007] One embodiment overcomes all or part of the drawbacks of known photonic components.

[0008] One embodiment overcomes all or part of the drawbacks of known manufacturing methods for a photonic component.

[0009] One embodiment provides a method of manufacturing a photonic device comprising the following successive steps: - forming on a first substrate at least one metallization level, and a first bonding layer; - forming on a second high-resistivity substrate a second bonding layer adapted to cooperate with the first bonding layer; - fix the first bonding layer to the second bonding layer; - remove the first substrate; and - forming a first optical component on a first face of said at least one metallization level opposite a second surface of said at least one metallization level in contact with said first bonding layer, in which a sum of the thicknesses of said first and second bonding layers and the thickness of said at least one metallization level is greater than 3 μm.

[0010] According to one embodiment, said sum is greater than 4 pm.

[0011] According to one embodiment, the first bonding layer is made of oxide of silicon, and the second bonding layer is silicon oxide.

[0012] According to one embodiment, the second high resistivity substrate is a semiconductor substrate.

[0013] According to one embodiment, the second high resistivity substrate has a resistivity greater than 500 Ohm.cm.

[0014] According to one embodiment, the second high resistivity substrate has a resistivity greater than 700 Ohm.cm.

[0015] According to one embodiment, the first optical component is a waveguide, or a waveguide adapted to be connected to an optical fiber, or a waveguide adapted to be connected to a broadband optical fiber.

[0016] According to one embodiment, said at least one level of metallization comprises at least one first electronic, optical, or optoelectronic component.

[0017] According to one embodiment, said at least one level of metallization is adapted to be electrically connected by a via in which said first optical component is formed.

[0018] According to one embodiment, the method comprises, during the step of forming the first component, a step of forming a third layer on said first face of said at least one metallization level.

[0019] According to one embodiment, the third layer is made of a material selected from the group comprising: indium phosphide (InP), a material comprising indium phosphide (InP), gallium-indium arsenide (InGaAs), a material comprising gallium-indium arsenide (InGaAs), gallium-aluminium arsenide (AlGaAs), a material comprising gallium-aluminium arsenide (AlGaAs), gallium-indium arsenide phosphide (InGaAsP), a material comprising gallium-indium arsenide phosphide (InGaAsP), lithium niobate (LiNbO3), a material comprising lithium niobate (LiNbO3), barium titanate (BaTiO3), a material comprising barium (BaTiO3), or the third layer is a multiple quantum well stack, comprising layers of materials included in the following group: indium phosphide (InP), doped indium phosphide (InP), for example N-type or P-type doped, indium gallium arsenide (InGaAs), doped indium gallium arsenide (InGaAs), for example N-type doped or P-type doped, aluminum indium gallium arsenide (AlInGaAs), indium gallium arsenide (InGaAs), and indium gallium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a laser.

[0020] According to one embodiment, the first component is chosen from the group comprising: a semiconductor-insulator-semiconductor capacitor modulator, a photodiode, a phototransistor, a laser, and a Pockels effect modulator.

[0021] According to one embodiment, said at least one metallization level is formed on a front face of said first substrate.

[0022] According to one embodiment, at least one second optical component is formed on a rear face of said second substrate.

[0023] According to one embodiment, said at least one second optical component is a waveguide.

[0024] Another embodiment provides a photonic device comprising a first optical component arranged on a stack successively comprising: - first surface of at least one metallization level; - a first layer of adhesion; - a second layer of adhesion; and - a second high resistivity substrate, wherein a sum of the thicknesses of said first and second bonding layers and the thickness of said at least one metallization level is greater than 3 pm.

[0025] According to one embodiment, said sum is of the order of 4 pm.

[0026] According to one embodiment, said second high resistivity substrate having a re sistivity greater than 500 Ohm.cm.

[0027] According to one embodiment, said first optical component is a waveguide.

[0028] According to one embodiment, the photonic device described above is obtained by the process described above.

[0029] According to one embodiment, said at least one metallization level is formed on a front face of said first substrate.

[0030] According to one embodiment, at least one second optical component is formed on a rear face of said second substrate.

[0031] According to one embodiment, said at least one second optical component is a waveguide. Brief description of the drawings

[0032] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0033] [Fig.l] represents a sectional view of an embodiment of a photonic component;

[0034] [Fig.2] represents a sectional view of a step of an embodiment of a method for manufacturing the photonic component of [Fig.1];

[0035] [Fig.3] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig.1];

[0036] [Fig.4] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig.1];

[0037] [Fig.5] represents a sectional view of another step of an embodiment of a method of manufacturing the photonic component of [Fig.1];

[0038] [Fig.6] represents a sectional view of another step of an embodiment of a method of manufacturing the photonic component of [Fig.1];

[0039] [Fig.7] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig.1];

[0040] [Fig.8] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig.1];

[0041] [Fig.9] represents a sectional view of another step of an embodiment of a method of manufacturing the photonic component of [Fig.1];

[0042] [Fig. 10] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig. 1];

[0043] [Fig.l 1] represents a sectional view of another step of an embodiment of a method for manufacturing the photonic component of [Fig.l]; and

[0044] [Fig. 12] shows a sectional view of another embodiment of a photonic component. Description of the embodiments

[0045] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0046] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed.

[0047] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") between them, this means that these two elements can be connected or linked through one or more other elements.

[0048] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0049] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0050] The embodiments and modes of implementation described below relate to a photonic device and its manufacturing method.

[0051] According to one embodiment, this photonic device is a coupling device for receiving one or more optical signals transmitted by an optical fiber. This device is, in addition, more particularly adapted to receiving one or more optical signals transmitted by a broadband optical fiber, having for example a minimum bandwidth of 100 nm, for example ranging from 1310 to 1550 nm.

[0052] Known photonic devices have disadvantages with respect to broadband optical fibers, and in particular for problems of matching material indices between the materials of the optical fiber and the materials of the photonic device. Such matching problems can lead to degradation of the signal received from the optical fiber.

[0053] The photonic device according to said embodiment proposes to overcome this problem, and, in addition, to increase the transmission rate of data received from the optical fiber. For this, the electronic device comprises one or more electronic circuits, or even microelectronic circuits, with high performance and formed in and on a semiconductor substrate. The device then comprises a waveguide receiving the signal(s) from the broadband optical fiber and a high-resistivity semiconductor substrate allowing the implementation of such electronic circuits. Here, the term "high-resistivity substrate" refers to a semiconductor substrate whose resistivity is greater than 500 Ohm.cm, preferably greater than 700 Ohm.cm, or sometimes greater than 1 kOhm.cm.To optically isolate the waveguide from said substrate, the photonic device comprises, according to one embodiment, a very thick optically insulating device, i.e. having a thickness greater than 3 μm, arranged between the waveguide and said substrate. Such an embodiment of a photonic device is described in relation to [Fig.l].

[0054] A method of manufacturing such a photonic device overcomes the conventional drawbacks of techniques for manufacturing electronic, microelectronic and / or photonic components, and in particular, overcomes the drawbacks that can present the use of one as defined previously. Such an embodiment of a method for manufacturing a photonic device is described in relation to Figures 2 to 11.

[0055] [Fig. 1] is a sectional view of one embodiment of a photonic component 100.

[0056] As described above, the photonic component 100 is formed in, on and / or from a highly resistive semiconductor substrate 101, i.e., a substrate having a resistivity greater than 500 Ohm.cm, for example, preferably greater than 700 Ohm.cm, or sometimes greater than 1 kOhm.cm. According to one example, the resistivity of the substrate 101 is of the order of 780 Ohm.cm. According to one example, the substrate 101 is a silicon substrate.

[0057] On a face 102 of the substrate 101, there rests an optically and electrically insulating layer 103. The layer 103 is also used as a bonding layer in the manufacturing process of the device 100. According to one example, the layer 103 is a silicon oxide layer.

[0058] On a rear face of the substrate 101, opposite the face 102, one or more optical components, such as waveguides, may be formed. These components are not shown in [Fig.l].

[0059] On the layer 103, another optically and electrically insulating layer 104 rests. The layer 104 is also used as a bonding layer in the manufacturing method of the device 100. According to one embodiment, the layer 104 is a bonding layer adapted to cooperate with the layer 103. According to one example, the layer 104 is a silicon oxide layer.

[0060] According to one example, the sum of the thicknesses of the layers 103 and 104 is greater than 2 μm, for example of the order of 4 μm.

[0061] On the layer 104, rests one or more metallization levels 105 adapted to comprise one or more electronic, optical or optoelectronic devices 106 of the photonic device 100. According to one example, the device(s) 106 may comprise passive photonic components such as waveguides, and / or active photonic components such as modulators, photodiodes. An active photonic component may be likened to an optoelectronic component. According to another example, the device 106 may be a modulator, a radiator, etc. The device(s) 106 may be formed in and / or on a semiconductor substrate, such as a silicon (Si) or germanium (Ge) substrate. Each device 106 may, in addition, be surrounded laterally by a layer 114 made of an electrically and / or optically insulating material, such as silicon oxide to electrically and optically isolate it from other devices.

[0062] The component(s) 106 are, for example, formed from a substrate of the type silicon on insulator (SOI), a semiconductor layer 106A, or portions of this layer as shown in [Fig.l], may remain above the component(s) 106. Similarly, an insulating layer 106B of the substrate, also called a buried oxide layer (BOx, Buried Oxide) rests on the semiconductor layer 106A.

[0063] The first metallization level is symbolized in [Fig.l] by the placement of the device 106. According to one example, the device 100 comprises three metallization levels. According to one embodiment, the metallization level(s) 105 are considered to be optically insulating. Indeed, the metallization levels 105 comprise metal tracks manufactured in layers of dielectric material, these tracks are, for example, obtained via photo / etching / growth processes of a metal, preferably copper, followed by a planarization process. Only the dielectric parts are "insulators" from the optical point of view, the metal tracks absorb the optical signals.

[0064] According to one embodiment, the sum of the thicknesses of the layers 103 and 104 and the thickness of the metallization level(s) is greater than 3 μm, for example greater than 4 μm.

[0065] On the metallization level(s) 105, there rests a layer 107 in which an optical component 108 forming the waveguide is formed. According to one example, the layer 107 is a layer of silicon oxide, and the optical component 108 is made of silicon nitride (SiN). According to one example, the layer 107 has a thickness greater than 1 μm, for example of the order of 1.5 μm. Thus, the optical component 108 is separated from the resistive substrate 101 by a stack comprising: - the optically insulating layer 103; - the optically insulating layer 104; - the metallization level(s) 105 considered to be optically insulating; and - the insulating layer 114 surrounding the device(s) 106.

[0066] As stated previously, the thickness of this stack is greater than 3 μm, for example greater than 4 μm.

[0067] According to one embodiment, the optical component is adapted to be coupled to a broadband optical fiber, for example having a minimum bandwidth of 100 nm, for example ranging from 1310 to 1550 nm.

[0068] On the layer 107 are formed layers making it possible to form electrical contacts of the device 100. In particular, an electrically insulating layer 109 covered with a passivation layer 110. According to one example, the layer 109 is a layer of silicon oxide, the thickness of which is greater than 4 μm, for example of the order of 5.3 μm. According to one example, the passivation layer 110 is formed from a stack of a layer of silicon oxide and a layer of silicon nitride, and has a thickness between 1 and 3 pm.

[0069] A contact may be formed in the photonic device 100. For this, a first conductive via 111 is formed through the layer 107 and up to one of the metallization levels of the metallization level(s) 105. A conductive track 112 may be formed in the layer 109 and in contact with the first conductive via 111. According to one example, the conductors 111 and 112 are made of a metal or a metal alloy. According to one example, the material of the conductors 111 and 112 comprises copper and / or a copper alloy. A contact 113 is then formed through the layer 109 and the passivation layer 110 to join the track 112. The formation of the conductors 111, 112 and 113 is described in detail in relation to FIGS. 8 to 11. According to one example, the contact is made of a metal or a metal alloy. According to one example, the material of the contact 113 comprises aluminum and / or an alloy comprising aluminum.

[0070] Figures 2 to 11 are sectional views illustrating devices following steps of an embodiment of a method for manufacturing a photonic component of the type of photonic component 100 described in relation to [Fig.l].

[0071] In the step of [Fig. 2], a semiconductor substrate 201, for example a silicon-on-insulator (SOI) type substrate, is used to form one or more metallization levels 202 from its upper face 203. The substrate 201 is composed of a semiconductor substrate 201A on which rests a stack of an electrically insulating layer 201B and a semiconductor layer 201C. The insulating layer 201B is also called a buried oxide layer (BOX). The metallization level(s) 202 are of the type of the metallization level(s) 105 described in relation to [Fig. 1], and comprise at least one electronic component 204 of the type of the component(s) 106 described in relation to [Fig. 1]. As in [Fig.l], the first metallization level of the metallization level(s) 202 is symbolized by the placement of the component 204. In other words, in [Fig.2], the first metallization level is on the side of the face 203 of the metallization levels 202, opposite another face 205 of the metallization levels 202. In addition, as in [Fig.l], the component 204 is surrounded by an insulating layer not shown in figures 2 to 11.

[0072] The metallization levels 202 and the component 204 are thus formed on a front face of the substrate 201.

[0073] In the step of [Fig. 3], following the step of [Fig. 2], a first bonding layer 206 of the type of the insulating layer 104 described in relation to [Fig. 1] is deposited on the face 205 of the metallization level(s) 202. According to one embodiment, according to one example, the layer 206 is a layer of silicon oxide.

[0074] At the step of [Fig.4], following the step of [Fig.3], a second layer 208 is used to fix a high resistivity substrate 209 to the structure obtained in [Fig. 3]. More particularly, the substrate 209 is a substrate of the type of the substrate 101 written in relation to [Fig. 1], that is to say a semiconductor substrate whose resistivity is greater than 500 Ohm.cm, for example, preferably greater than 700 Ohm.cm, or sometimes greater than 1 kOhm.cm. According to one example, the resistivity of the substrate 209 is of the order of 780 Ohm.cm. According to one example, the substrate 209 is a silicon substrate. In addition, the bonding layer 208 is of the type of the insulating layer 103 described in relation to [Fig. 1]. According to one embodiment, the layer 208 is a bonding layer adapted to cooperate with the bonding layer 206. According to one example, the bonding layer is a silicon oxide layer.

[0075] To implement the step of [Fig.4], the bonding layer 208 is formed on one face of the substrate 209. A free face of the bonding layer 208, opposite the substrate 209, is then fixed to the bonding layer 206, for example, using a molecular bonding process.

[0076] Furthermore, as stated previously, the sum of the thicknesses of the layers 206 and 208 is greater than 2 μm, for example of the order of 4 μm. Furthermore, according to one embodiment, the sum of the thicknesses of the layers 206 and 208 and the thickness of the metallization level(s) 202 is greater than 4 μm, for example greater than 5 μm.

[0077] At this stage, optical components can be formed on the rear face of the substrate 209, i.e. the face not covered by the bonding layer 208.

[0078] In the step of [Fig. 5], following the step of [Fig. 4], the structure obtained in step 4 is turned over. Thus, the first metallization level of the metallization level(s) 202 is on the high side of [Fig. 5]. In addition, the entire structure rests on the high resistivity substrate 209.

[0079] In the step of [Fig.6], following the step of [Fig.5], the substrate 201A is removed from the structure obtained in [Fig.5]. According to one example, the substrate 201A is removed using a method combining a grinding step and a chemical removal step.

[0080] In the step of [Fig.7], following the step of [Fig.6], an optical component, of the type of optical component 108 of [Fig.1], is formed on the buried oxide layer 20IB. For this, a first layer 212 can be formed by a photolithography process and then etched to obtain the desired shape. A first part of an insulating layer 210, for example made of silicon oxide, is then formed on the layer 212, for example, by deposition and then chemical planarization. A second layer 211 can be formed on the first part of the layer 210, for example, using a photolithography process and then an etching process. A second part of the insulating layer 210 can then be formed to cover the layer 211. The set of layers 210 to 212 can make it possible, for example, to form a fiber optical, or other passive waveguide-type components allowing coupling to an external optical fiber (not shown).

[0081] In the step of [Fig. 8], following the step of [Fig. 7], a first part of a contact recovery is formed. Thus, a conductive via 213 passing right through the layer 210, the insulating layer 201B, the layer 201C, and a part of the metallization level(s) 202 is formed. The conductive via 213 therefore extends between an upper face of the layer 210 and up to a metallization level of the metallization level(s) 202. The conductive via 213 is of the type of the conductive via 111 described in relation to [Fig. 1]. In other words, the conductive via 213 is made of a metal or a material comprising metal, for example copper or an alloy comprising copper. For this, deposition, photolithography, etching and planarization methods can be implemented here.

[0082] At the step of [Fig.9], following the step of [Fig.8], an insulating layer 214 electrically is formed on the layer 210. According to one example, the insulating layer 214 is a layer of silicon oxide having a thickness greater than 2 μm, for example of the order of 2.8 μm.

[0083] Furthermore, at the step of [Fig.9], a second part of the contact resumption is formed. Thus, a conductive track 215 passing right through the layer 214 is formed. The conductive track 215 therefore extends between an upper face of the layer 210, and is in contact with the via 213. The conductive track 215 is of the type of the conductive track 112 described in relation to [Fig.l]. In other words, the conductive via 215 is made of a metal or a material comprising metal, for example copper or an alloy comprising copper. For this, deposition, photolithography, etching and planarization processes can be implemented here.

[0084] In the step of [Fig. 10], following the step of [Fig. 9], the thickness of the electrically insulating layer 214 is increased to completely cover the conductive via 215. In this step, the layer 214 is of the same type as the layer 109 described in relation to [Fig. 1]. Thus, according to one example, the layer 109 is a layer of silicon oxide, the thickness of which is greater than 4 μm, for example of the order of 5.3 μm.

[0085] In the step of [Fig. 11], following the step of [Fig. 10], once the contact 215 has been formed, a contact 217 of the type of contact 113 described in relation to [Fig. 1] is formed. For this, an insulating layer, for example made of silicon oxide, is deposited. According to one example, this insulating layer has a thickness of the order of 0.6 μm. Photolithography and etching steps are then implemented to form a cavity in the layer 214 and in the layer 216 above the via 215. This cavity is then filled with a layer made of a material forming the contact 217, for example a metal or metal alloy, for example, aluminum or an alloy comprising aluminum. According to one example, this layer has a thickness of the order of 1.5 μm.

[0086] Furthermore, in the step of [Fig. 11], a passivation operation of the layer 214 is implemented. For this, a passivation layer 216 is formed on the accessible surface of the notch 214. According to one example, the passivation layer is composed of a layer of silicon oxide, having a thickness of the order of 2 μm, and a layer of nitride oxide, having a thickness of the order of 0.6 μm. Photolithography and etching steps are then implemented to make the contact accessible, or to facilitate the assembly of the device.

[0087] [Fig. 12] is a sectional view of one embodiment of a photonic component 300.

[0088] The photonic component 300 is similar to the component 100 described in relation to [Fig.l]. Elements identical to the components are not described again in detail here. Only the differences between them are highlighted below.

[0089] Thus, the photonic component 300 has all the elements of the component 100, but also has a layer 301 made of a material M arranged in the layer 107, preferably on an upper face of the metallization levels 105. According to a variant, the layer 301 can be a stack of layers.

[0090] According to a preferred embodiment, the layer 301 is arranged directly in alignment with the electronic device(s) 106 so as to be able to carry out, for example, optical couplings. Similarly, the optical component 108 and the device(s) 106 may also be aligned, at least partially, to also carry out optical couplings.

[0091] According to a first example, the material M is indium phosphide (InP), or comprises indium phosphide (InP). In this case, the photonic component 300 may be a semiconductor-insulator-semiconductor capacitor modulator, or SISCAP modulator (from the English Semiconductor-insulator-semiconductor capacitor modulator).

[0092] According to a second example, the material M is indium gallium arsenide (InGaAs), or comprises indium gallium arsenide (InGaAs). In this case, the photonic component 300 may be a photodiode and / or a phototransistor.

[0093] According to a third example, the material M is gallium-aluminum arsenide (AlGaAs), or comprises gallium-aluminum arsenide (AlGaAs). In this case, the photonic component 300 may be a photonic component allowing the generation of an electron pair, and / or allowing the generation of light such as a laser.

[0094] According to a fourth example, the material M is indium gallium arsenide phosphide (InGaAsP), or comprises indium gallium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a semiconductor-insulator-semiconductor capacitor modulator, or a photodiode.

[0095] According to a fifth example, the material M is lithium niobate (LiNbO3) or comprises lithium niobate (LiNbO3). In this case, the photonic component 300 may be a Pockels effect modulator.

[0096] According to a sixth example, the material M is barium titanate (BaTiO3) or comprises barium titanate (BaTiO3). In this case, the photonic component 300 may be a Pockels effect modulator.

[0097] According to a seventh example, the layer 301 is a multiple quantum well stack, or MQW stack. According to one example, such a stack may comprise layers made of materials included in the following group: indium phosphide (InP), doped indium phosphide (InP), for example N-type or P-type doped, indium gallium arsenide (InGaAs), doped indium gallium arsenide (InGaAs), for example N-type doped or P-type doped, aluminum indium gallium arsenide (AlInGaAs), gallium indium arsenide (InGaAs), and gallium indium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a laser.

[0098] The photonic component 300 may further comprise one or more contact connections 302 and / or 303 making it possible to establish electrical contact with the layer 301. According to one embodiment, the contact connections 302 and / or 303 are formed in the same way as the contact connection formed by the conductors 111 and 112 and the contact 113.

[0099] The method of manufacturing the photonic component 300 is similar to the method of manufacturing the photonic component 300, but further comprises a step of forming the layer 301 and, if necessary, of etching or structuring the layer 301 between the step described in relation to [Fig.6] and the step described in relation to [Fig.7].

[0100] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0101] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

Claims

Claims

1. A method of manufacturing a photonic device (100; 300) comprising the following successive steps: - forming on a first substrate (201) at least one metallization level (202; 103), and a first bonding layer (206; 104); - forming on a second high-resistivity substrate (209; 101) a second bonding layer (208; 103) adapted to cooperate with the first bonding layer (206; 104); - fixing the first bonding layer (206; 104) to the second bonding layer (208; 103); - removing the first substrate (201); and - forming a first optical component (108) on a first face (203) of said at least one metallization level (202; 105) opposite a second surface of said at least one metallization level (202; 105) in contact with said first bonding layer (206; 104), wherein a sum of the thicknesses of said first and second bonding layers (206, 208;104, 103) and the thickness of said at least one metallization level is greater (202; 105) than 3 pm.;

2. The method of claim 1, wherein said sum is greater than 4 pm.

3. The method of claim 1 or 2, wherein the first bonding layer (206; 104) is silicon oxide, and the second bonding layer (208; 103) is silicon oxide.

4. Method according to one of claims 1 to 3, in which the second high resistivity substrate (209; 101) is a semiconductor substrate.

5. Method according to one of claims 1 to 4, in which the second high resistivity substrate (209; 101) has a resistivity greater than 500 Ohm.cm.

6. The method of claim 5, wherein the second high resistivity substrate (209; 101) has a resistivity greater than 700 Ohm.cm.

7. Method according to one of claims 1 to 6, in which the first optical component (108) is a waveguide, or a waveguide (108) adapted to be connected to an optical fiber, or a waveguide (108) adapted to be connected to a broadband optical fiber.

8. Method according to any one of claims 1 to 7, wherein said at least one level of metallization comprises at least one first electronic, optical, or optoelectronic component (204; 106).

9. Method according to any one of claims 1 to 8, wherein said at least one metallization level is adapted to be electrically connected by a via (203) passing through a layer (210) in which said first optical component (108) is formed.

10. Method according to any one of claims 1 to 9, comprising, during the step of forming the first component, a step of forming a third layer on said first face (203) of said at least one metallization level (202; 105).

11. The method of claim 10, wherein the third layer is made of a material selected from the group consisting of: indium phosphide (InP), a material comprising indium phosphide (InP), indium gallium arsenide (InGaAs), a material comprising indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs), a material comprising aluminum gallium arsenide (AlGaAs), indium gallium arsenide phosphide (InGaAsP), a material comprising indium gallium arsenide phosphide (InGaAsP), lithium niobate (LiNbO3), a material comprising lithium niobate (LiNbO3), barium titanate (BaTiO3), a material comprising barium titanate (BaTiO3), or the third layer is a multiple quantum well stack, comprising layers of materials included in the following group: indium phosphide (InP), doped indium phosphide (InP), for example N-type or P-type doped,indium gallium arsenide (InGaAs), doped, e.g., N-doped or P-doped, indium gallium arsenide (InGaAs), aluminum indium gallium arsenide (AlInGaAs), indium gallium arsenide (InGaAs), and indium gallium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a laser.,

12. The method of claim 10 or 11, wherein the first component is selected from the group consisting of: a semiconductor-insulator-semiconductor capacitor modulator, a photodiode, a phototransistor, a laser, and a Pockels effect modulator.

13. A method according to any one of claims 1 to 12, wherein said at least one metallization level is formed on a front face of said first substrate.

14. A method according to any one of claims 1 to 13, wherein at least one second optical component is formed on a rear face of said second substrate (101).

15. The method of claim 14, wherein said at least one second optical component is a waveguide.

16. Photonic device (100) comprising a first optical component (108) arranged on a stack successively comprising: - first surface (203) of at least one metallization level (202 105); - a first bonding layer (206 104); - a second bonding layer (208; 103); and - a second high resistivity substrate (209; 101), wherein a sum of the thicknesses of said first and second bonding layers (206, 208; 104, 103) and the thickness of said at least one metallization level is greater (202; 105) than 3 μm.

17. Device according to claim 16, wherein said sum is of the order of 4 pm.

18. The device of claim 16 or 17, wherein said second high resistivity substrate having a resistivity greater than 500 Ohm.cm.

19. A device according to any one of claims 16 to 18, wherein said first optical component is a waveguide.

20. Photonic device according to any one of claims 16 to 19, obtained by the method according to any one of claims 1 to 15

21. 1 J. Device according to any one of claims 16 to 20, wherein said at least one metallization level is formed on a front face of said first substrate.

22. A device according to any one of claims 16 to 21, wherein at least one second optical component is formed on a rear face of said second substrate (101).

23. A device according to claim 22, wherein said at least one second optical component is a waveguide.

Citation Information

Patent Citations

  • Three-dimensional electronic photonic integrated circuit fabrication process

    US20150016770A1

  • Optoelectronic device manufacturing method

    US20220375914A1

  • Optoelectronic device comprising a iii-v semiconductor membrane laser source forming a lateral p-i-n junction

    US20230318263A1

  • Structure with a micro-electronic component made of a semi-conductor material difficult to etch and with metallized holes

    US6225651B1