Optoelectronic device comprising three-electrode diodes

Abstract

Optoelectronic device comprising three-electrode diodes The present description relates to an optoelectronic device (100) comprising: - a plurality of diodes (126) each comprising a portion of a stack of first and second semiconductor layers (120, 122) doped according to opposite types, a portion of the first layer of each diode (126) being coupled to a first electrode (106); - trenches (130) passing through the stack; - a conductive layer (134) arranged against side walls of the trenches, insulated from the stack, coupled to the second electrodes and which is interrupted in such a way that portions of the conductive layer (134) arranged around each of the diodes (126) are insulated from other portions of the conductive layer (134) arranged around the other diodes (126);- conductive portions (138) arranged in the trenches, insulated from the electrically conductive layer (134) and coupled to each other and to at least one third electrode (111). Figure for abstract: Fig. 1;

Description

Title of the invention: Optoelectronic device comprising three-electrode diodes Technical field

[0001] The present description relates generally to the field of optoelectronic devices comprising light-emitting diodes (also called "LEDs" or "LEDs" for "Light-Emitting Diode" in English) used for example for the production of any light-emitting device (screens, projectors, image walls, etc.), and / or photodiodes. Prior art

[0002] Document EP 2 960 951 A1 describes an optoelectronic device of the LED or photodiode type comprising, in addition to the two electrodes each connected to one of the semiconductors of a pn junction, a third electrode produced in the form of a grid or Schottky contact. This third electrode makes it possible, by generating a lateral electric field making it possible to increase the EQE (external quantum efficiency), to circumvent the problem of lack of charge carriers in certain semiconductor materials due to an excessively high activation energy of the dopants in these semiconductor materials, such as for example in materials with large gaps such as diamond or epitaxial structures based on AlGaN used in particular for LEDs emitting in the UV range.When the device comprises several LEDs and / or photodiodes, the third electrode of the LEDs and / or photodiodes is common and distributed for all of these LEDs and / or photodiodes, for example in the form of trenches formed around the pn junctions or through the pn junctions of the LEDs and / or photodiodes.

[0003] A disadvantage of such an optoelectronic device is that the electrical contacting of the electrodes requires very precise alignment when this device is made with small dimensions. It is possible to facilitate this contacting by making the device with larger dimensions, and therefore to the detriment of the compactness of the device.

[0004] Document WO 2019 / 141948 A1 describes an optoelectronic device of the LED or photodiode type with three electrodes in which the third electrode is electrically coupled to the cathode. Thus, electrical contact is facilitated because it is no longer necessary to electrically access this third electrode and the cathode separately. A disadvantage of this solution is that this architecture does not allow the electrical potentials applied to the third electrodes to be controlled independently of those applied to the cathodes. Summary of the invention

[0005] There is therefore a need to propose an optoelectronic device comprising three-electrode diodes which do not have the drawbacks of existing solutions.

[0006] One embodiment overcomes all or part of the drawbacks of known solutions and proposes an optoelectronic device comprising at least:

[0007] - a plurality of diodes each comprising a part of a stack of at least a first and a second semiconductor layers doped according to opposite conductivity types, a portion of the first semiconductor layer of each diode being electrically coupled to a first electrode disposed under said portion of the first semiconductor layer;

[0008] - trenches crossing the stack, separating the diodes from each other and from which second electrodes are electrically accessible;

[0009] - an electrically conductive layer arranged at least against walls lateral of the trenches, electrically insulated from the stack, electrically coupled to the second electrodes and which is interrupted in such a way that parts of the electrically conductive layer arranged around each of the diodes are electrically insulated from other parts of the electrically conductive layer arranged around the other diodes;

[0010] - electrically conductive portions arranged in the trenches, electrically insulated electrically of the electrically conductive layer and electrically coupled to each other and to at least one third electrode.

[0011] According to a particular embodiment, the electrically conductive layer is interrupted at the bottom walls of the trenches.

[0012] According to a particular embodiment, bottom walls of the trenches are at least partly formed by the second electrodes.

[0013] According to a particular embodiment, the electrically conductive portions are electrically coupled to the portions of the second semiconductor layer of at least a portion of the diodes corresponding to LEDs.

[0014] According to a particular embodiment, the electrically conductive portions are electrically coupled to the portions of the second semiconductor layer of the LEDs by at least one electrically conductive and optically transparent layer arranged on the stack and on the electrically conductive portions.

[0015] According to a particular embodiment, the electrically conductive and optically transparent layer is electrically insulated from the electrically conductive layer by dielectric portions arranged between the electrically conductive layer and the electrically conductive and optically transparent layer.

[0016] According to a particular embodiment, the electrically conductive portions are electrically insulated from the electrically conductive layer by at least a first dielectric layer disposed between the electrically conductive portions and the electrically conductive layer.

[0017] According to a particular embodiment, the third electrode is arranged at an edge of the optoelectronic device.

[0018] According to a particular embodiment:

[0019] - each first electrode is arranged between two second electrodes to which the parts of the electrically conductive layer located around the diode, the portion of the first semiconductor layer of which is electrically coupled to said first electrode, are electrically coupled, and

[0020] - the optoelectronic device comprises several third electrodes each electrically coupled to one of the electrically conductive portions and disposed between two second electrodes each electrically coupled to portions of the electrically conductive layer located around different diodes.

[0021] According to a particular embodiment, the device comprises several third electrodes, each electrically coupled to one of the electrically conductive portions, each of the first electrodes being arranged between one of the second electrodes and one of the third electrodes, and each of the third electrodes is arranged between one of the first electrodes and one of the second electrodes.

[0022] According to a particular embodiment, the parts of the electrically conductive layer arranged around at least a part of the diodes corresponding to photodiodes are electrically coupled to the portions of the second semiconductor layer of the photodiodes.

[0023] According to a particular embodiment, the parts of the electrically conductive layer arranged around the photodiodes are electrically coupled to the portions of the second semiconductor layer of the photodiodes by at least one electrically conductive and optically transparent layer arranged on the stack and on the parts of the electrically conductive layer arranged around the photodiodes.

[0024] According to a particular embodiment, the device further comprises a second dielectric layer arranged between the electrically conductive layer and the stack.

[0025] A method of producing an optoelectronic device is also proposed, comprising at least the steps of:

[0026] - production of a stack of at least a first and a second layer semiconductors doped with opposite conductivity types;

[0027] - making trenches crossing the stack, separating them from each other diodes each comprising a part of the stack and making accessible second electrodes, a portion of the first semiconductor layer of each diode being electrically coupled to a first electrode disposed under said portion of the first semiconductor layer;

[0028] - production of an electrically conductive layer arranged at least against side walls of the trenches, electrically insulated from the stack, electrically coupled to the second electrodes and which is interrupted such that parts of the electrically conductive layer arranged around each of the diodes are electrically insulated from the parts of the electrically conductive layer located around the other diodes;

[0029] - production of electrically conductive portions arranged in the trenches, electrically insulated from the electrically conductive layer and electrically coupled to each other and to at least one third electrode. Brief description of the drawings

[0030] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0031] [Fig.l] represents an example of an optoelectronic device according to a first embodiment;

[0032] [Fig.2], [Fig.3], [Fig.4], [Fig.5], [Fig.6], [Fig.7], [Fig.8] and [Fig.9] represent steps of a method for producing an optoelectronic device according to the first embodiment;

[0033] [Fig. 10] represents an example of an optoelectronic device according to a second embodiment;

[0034] [Fig.11], [Fig.12], [Fig.13] and [Fig.14] represent steps of a method for producing an optoelectronic device according to the second embodiment;

[0035] [Fig. 15] represents an example of an optoelectronic device according to a first variant embodiment; and

[0036] [Fig. 16] represents an example of an optoelectronic device according to a second variant embodiment. Description of the embodiments

[0037] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0038] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, different elements of the device (for example the integrated control circuit) and different The steps in the device production process (deposition, photolithography, etching, etc.) are not detailed. Those skilled in the art will be able to produce these elements in detail and implement these steps from the description given here.

[0039] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected or coupled to each other, this means that these two elements can be connected or be linked by means of one or more other elements.

[0040] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", "on", "under", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures in a normal position of use.

[0041] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0042] Throughout the document, the term "diode" is used to refer to a light-emitting diode or a photodiode.

[0043] Throughout the document, the term “LED” refers to an LED or a micro-LED.

[0044] Throughout the document, the term "layer" is used to denote a layer comprising a single material or several materials arranged against each other, i.e. a stack.

[0045] In Figures 1 to 14, dotted lines are shown to illustrate that the elements of the device 100 shown on either side of these dotted lines are not necessarily arranged directly next to each other.

[0046] An example of an optoelectronic device 100 according to a first embodiment is described below in connection with [Fig.l].

[0047] In the exemplary embodiment described, the device 100 comprises an integrated control circuit 102 comprising at least, in a metallization level 104, first electrodes 106 and second electrodes 108. The circuit 102, which corresponds for example to an ASIC (Application-specific integrated circuit), comprises electronic components making it possible in particular to implement different diode control functions of the device 100, these functions not being detailed here. In [Fig.l], only the level 104 is shown, although the circuit 102 may comprise several superimposed metallization levels making the electrical connections of the electronic components of the circuit 102.

[0048] In the example of [Fig.l], level 104 comprises a dielectric layer 110 in which the electrodes 106, 108 are arranged. This dielectric layer 110 comprises for example SiO2 and its thickness (dimension parallel to the Z axis in [Fig.l]) is for example equal to 1 pm.

[0049] In the described embodiment, the first electrodes 106 correspond to anodes of the diodes of the device 100, and the second electrodes 108 correspond to electrodes to which grids surrounding the pn junctions of the diodes of the device 100 are electrically coupled. In [Fig.l], only two first electrodes 106 and two second electrodes 108 are shown. The total number of first and second electrodes 106, 108 of the device 100 depends in particular on the number of diodes of the device 100. Alternatively, other configurations of the first and second electrodes 106, 108 are possible.

[0050] In the exemplary embodiment described, the circuit 102 also comprises, in the level 104, at least one third electrode 111 serving as cathode of the diodes of the device 100. In the example of [Fig.l], the device 100 comprises a third electrode 111 forming a cathode common to the diodes of the device 100. In addition, in the exemplary embodiment described, the third electrode 111 is arranged at the periphery of the device 100, that is to say at the level of an edge of the device 100 and not within the set of diodes of the device 100.

[0051] The electrodes 106, 108, 111 comprise, for example, a metallic material such as aluminum or copper.

[0052] In the embodiment described, the device 100 further comprises several metal layers stacked on the integrated circuit 102. In the example of [Fig.l], these metal layers correspond to:

[0053] - a first stack 112 of Ti / TiN, comprising for example a thickness of titanium equal to 5 nm and a thickness of TiN equal to 30 nm;

[0054] - a layer of titanium 114 having for example a thickness equal to 500 nm;

[0055] - a second stack 116 of Ti / TiN, comprising for example a thickness of titanium equal to 10 nm and a TiN thickness equal to 40 nm.

[0056] In this exemplary embodiment of the device 100, these metal layers 112, 114, 116 are used in particular for implementing, during the production of the device 100, a direct metal / metal bonding between on one side the first stack 112 and a part of the layer 114 produced on the circuit 102, and on the other side the second stack 116 and another part of the layer 114 produced on a stack of layers used for producing the diodes of the device 100. As a variant, these metal layers could be different from those described in the example of [Fig.l], both in terms of number of layers, thicknesses, materials, etc.

[0057] In the exemplary embodiment described, a layer of AISi 118 is arranged on the second stack 116, and has for example a thickness equal to 100 nm.

[0058] The device 100 further comprises a plurality of diodes 126 each comprising a portion of a stack of at least a first and a second semiconductor layers 120, 122 doped according to opposite conductivity types. In the example of [Fig.l], the semiconductor of the first layer 120 is p-doped, and the semiconductor of the second layer 122 is n-doped. In addition, in this example, this semiconductor stack further comprises an active zone 124 arranged between the layers 120, 122 and comprising one or more emissive or receiving (optically absorbent) layers each forming a quantum well and each arranged between two barrier layers.All the layers of the active zone 124, i.e. the emissive / receiving layer(s) and the barrier layers, comprise intrinsic semiconductor materials, i.e. not intentionally doped (with a residual donor concentration nnid, for example, of between approximately 1015 and 10 18 donors / cm3). The semiconductor stack is arranged, for example glued, on the level 104 (with, in the example of [Fig.l], the layers 112 to 118 arranged between the level 104 and the semiconductor stack) and here forms, for each diode 126, a pin junction.

[0059] The semiconductor materials of the layers 120, 122, 124 comprise, for example, gallium and / or aluminum and / or indium nitride. According to an exemplary embodiment, this semiconductor stack is such that it comprises:

[0060] - a first layer 120 comprising p-GaN and of thickness for example equal to 120 nm;

[0061] - a second layer 122 comprising n-GaN and of thickness for example equal at 500 nm;

[0062] - an active zone 124 comprising one or more emissive layers of InGaN and GaN barrier layers, with a thickness of, for example, between 50 nm and 80 nm.

[0063] According to another exemplary embodiment, the first and second layers 120, 122 may comprise AlGaN and the layer(s) of the active zone 124 may comprise GaN.

[0064] Alternatively, other families of semiconductor materials may be used for producing the layers 120, 122, 124, for example arsenide or phosphide type semiconductors.

[0065] In the first embodiment, all the diodes 126 of the device 100 correspond to LEDs.

[0066] In the example of [Fig.l], two diodes 126 are shown, each comprising a portion of the stack of layers 120, 122, 124. A portion of the first semiconductor layer 120 of each diode 126 is electrically coupled to one of the first electrodes 106 disposed under this portion of the first semiconductor layer. conductive 120, this electrical coupling being achieved by means of an electrically conductive via 128 formed between the first electrode 106 and the parts of the metal layers 112, 114, 116 arranged on this first electrode 106 and which are in contact with this portion of the first semi-conductive layer 120.

[0067] Alternatively, it is possible that the interface between the circuit 102 and the semiconductor stack of diodes 126, or between the level 104 and the semiconductor stack of diodes 126, is formed by layers different from the layers 112 to 118, depending in particular on the techniques implemented for producing the device 100.

[0068] The device 100 also comprises trenches 130 passing through the semiconductor stack (i.e. the layers 120, 122 and 124), surrounding and separating the diodes 126 from each other and whose bottom walls are at least partly formed by the second electrodes 108. In the embodiment described, these trenches 130 also pass through the layers 112, 114, 116 and 118, as well as a part of the dielectric layer 110 until reaching the second electrodes 108.

[0069] The trenches 130 are for example made such that they form, through the different layers in which these trenches 130 are made, a grid delimiting the diodes 126 whose section, in a plane parallel to the main planes in which these different layers extend (plane parallel to the plane (X,Y) visible in [Fig.l]), is of square, hexagonal or rectangular shape. The dimension of one of the trenches 130 between two adjacent diodes 126, that is to say the width of each trench 130 (which corresponds to the dimension of the trench 130 parallel to the X axis in [Fig.l]), is for example equal to approximately 1 μm.

[0070] In the embodiment described, another trench 131 passes through the semiconductor stack as well as the layers 112, 114, 116 and 118 and a part of the dielectric layer 110. In this example, this trench 131 comprises a bottom wall opening onto the third electrode 111 and allows electrical contact to be made with the third electrode 111.

[0071] In the exemplary embodiment described, the side walls, or flanks, of the trenches 130, 131 are covered with a dielectric layer 132 serving as a passivation layer and comprising for example at least one of the following materials: alumina, AIN, SiO2, SiN.

[0072] In the embodiment described, the dielectric layer 132 is covered, at the level of the side walls of the trenches 130, 131, by an electrically conductive layer 134. This electrically conductive layer 134 is also arranged against the bottom walls of the trenches 130, 131. In the example of [Fig. 1], the electrically conductive layer 134 is therefore electrically insulated from the stack of layers present on the circuit 102 by the dielectric layer 132. In addition, the electrically conductive layer 134 is electrically coupled to the second electrodes 108 and is interrupted so that parts of this electrically conductive layer 134 arranged around each of the diodes 126 are electrically insulated from other parts of this electrically conductive layer 134 arranged around the other diodes 126. In the exemplary embodiment described, the electrically conductive layer 134 is interrupted at the bottom walls of the trenches 130. In the example of [Fig.l], the electrically conductive layer 134 is not interrupted in the trench 131.

[0073] According to an exemplary embodiment, the electrically conductive layer 134 comprises at least one metal. This metal can for example allow light reflection, in particular in the visible range, which allows the light emitted laterally by the diodes 126 to be reflected against the electrically conductive layer 134 and thus avoid disturbing the neighboring diodes 126.

[0074] In the embodiment described, the electrically conductive layer 134 is covered by another dielectric layer 136 which also covers the parts of the dielectric layer 132 located at the interrupted parts of the electrically conductive layer 134 (at the bottom walls of the trenches 130 in the example of [Fig. 1]). This other dielectric layer 136 comprises, for example, SiO2 or alumina. In the example of [Fig. 1], the dielectric layer 136 is interrupted at the bottom wall of the trench 131 so that the electrically conductive layer 134 is electrically accessible from the bottom of the trench 131.

[0075] In the exemplary embodiment described, the remainder of the volume of the trenches 130 not occupied by the layers 132, 134 and 136 is filled by electrically conductive portions 138 which are electrically insulated from the electrically conductive layer 134 by the dielectric layer 136. Although this is not visible in [Fig. 1], the electrically conductive portions 138 are here electrically coupled to each other due to the grid shape of the trenches 130. In an exemplary embodiment, each of the electrically conductive portions 138 comprises a stack of several materials, for example a stack of Ti / TiN and copper. In the trench 131, the electrically conductive portion 138 is electrically coupled to the electrically conductive layer 134, and therefore also to the third electrode 111.

[0076] In the exemplary embodiment described, the device 100 further comprises dielectric portions 140, comprising for example SiN, extending over the tops of the parts of the electrically conductive layer 134. In addition, the device 100 comprises an electrically conductive and optically transparent layer 142 arranged on an upper face of the device 100 and which electrically couples the electrically conductive portions 138 to each other and to the portions of the second semiconductor layer 122 of the diodes 126. This layer 142 is electrically insulated from the electrically conductive layer 134 by the dielectric portions 140. The electrically conductive and optically transparent layer 142 may comprise a transparent conductive oxide, for example ITO, in order to allow light emission from the diodes 126 through it. The layer 142 also ensures the spreading of the current over the distance between the semiconductor of the second layer 122 and the electrically conductive portions 138.

[0077] In the embodiment described, the metallic filling of the trenches 130, 131 allows electrical coupling between the portions of the second semiconductor layer 122 of the diodes 126 and the third electrode 111 which corresponds to the common cathode of the diodes 126. In the example shown in [Fig.l], the device 100 also comprises a connection pad 144 arranged on the electrically conductive portion 138 arranged in the trench 131, and serving as electrical access to the common cathode of the diodes 126.

[0078] Thus, the device 100 according to the first embodiment comprises diodes 126 that can be controlled independently of each other and can be addressed by electrical control potentials applied by the circuit 102 to the anodes corresponding to the first electrodes 106. Furthermore, the grids formed by the parts of the electrically conductive layer 134 around the semiconductor stacks of the diodes 126 can be controlled independently of each other and can be addressed by electrical control potentials applied by the circuit 102 to the second electrodes 108. The application of an electrical potential to these grids can modify the distribution of the carriers on the lateral sides of the P or N doped semiconductor (depending on the potential applied), which makes it possible to increase the light emission efficiency of the diodes 126. When these electrical potentials are applied to these grids, no current flows in these grids.

[0079] Advantageously, the thickness of the dielectric layer 132 can be chosen such that it is sufficient to avoid breakdown when an electrical potential is applied to the gates of the diodes 126, without however being too thick in order to maximize the field effect applied via the gate of the diodes 126. By way of example, the thickness of this dielectric layer 132 is for example between 10 nm and 60 nm, depending on the dielectric characteristics of the material(s) of this layer 132.

[0080] Advantageously, the thickness of the dielectric layer 136 can be chosen such that it is sufficient to avoid breakdown due to the electrical potentials applied to the gates of the diodes 126 and the reference electrical potential, for example ground, applied to the cathode. For example, when the potential difference between the electrically conductive layer 134 and the electrically conductive 138 is of the order of 1 V, the dielectric layer 136 may comprise alumina and have a thickness equal to approximately 10 nm.

[0081] The lateral flanks of the trenches 130, 131 may be perpendicular to the surface of the circuit 102 on which the semiconductor stack is secured, or form an angle such that the width of the trenches 130, 131 at the upper face of the device 100 (face at which the dielectric portions 140 and the electrically conductive and optically transparent layer 142 are present) is greater than the width of these trenches 130, 131 at the circuit 102, i.e. of the dielectric layer 110 in the example of [Fig.l]. Such a difference in width of the trenches 130, 131 may facilitate the implementation of the deposition of the materials in the trenches 130, 131.

[0082] The device 100 described therefore comprises a compact set of diodes 126 with three electrodes, the diodes 126 of which can be controlled individually thanks to the electrical independence of the anodes and the grids of these diodes 126.

[0083] The structure of the device 100 can allow its production by monolithic integration, directly on the circuit 102, of the junctions forming the diodes 126 without critical alignment, thanks to the fact that the singulation of the diodes 126 (corresponding to the production of the trenches 130) is carried out after the joining of the semi-conductor layers with the circuit 102.

[0084] An example of a method for producing the device 100 as previously described in connection with [Fig. 1] is described below in connection with FIGS. 2 to 9.

[0085] The integrated circuit 102 is firstly produced from a semiconductor substrate, for example by implementing conventional microelectronics steps (deposition, lithography, etching, etc.) to form the electronic components of this integrated circuit 102 as well as the metallization levels (BEOL) including the metallization level 104. The first stack 112 and a part of the layer 114 are also produced on the level 104 in anticipation of a future direct metal / metal bonding with the semiconductor stack intended for the production of the diodes 126.

[0086] In the embodiment described, the semiconductor stack of layers 124, 122, 120 as well as layer 118, the second stack 116 and a portion of layer 114 are produced on another substrate (not shown). Layers 124, 122 and 120 are for example produced by epitaxy. One or more buffer layers may be present on this other substrate to facilitate the growth of layers 124, 122, and 120.

[0087] A direct metal / metal bonding can then be implemented to secure the two parts of the layer 114 to each other, then the substrate used for the growth of the layers 124, 122 and 120 can be removed. The possible buffer layer(s) interposed between the substrate and the layer 124 can also be removed, for example by thinning and etching.

[0088] Alternatively, other types of joining can be implemented to join the circuit 102 with the semiconductor stack from which the diodes 126 will be made.

[0089] In the embodiment described, a dielectric hard mask 146 is then produced, for example by deposition, on the semiconductor layer 122. According to one example, the dielectric hard mask 146 may comprise SiO2 and / or SiN. The thickness of the dielectric hard mask 146 is here chosen such that it is sufficient to be able to etch the trenches 130, 131 until reaching the electrodes 106, 108, 111. The structure obtained at this stage of the method is shown in [Fig.2].

[0090] The trenches 130, 131 are then made through the semiconductor stack up to the electrodes 111, 106 and 108. In the exemplary embodiment described, lithography and etching can then be implemented, using the dielectric hard mask 146, to form the trenches 130, 131 through the layers present on the electrodes 106, 108 and 111. The etching implemented can judiciously use a stop layer comprising for example TiN and / or SiN and present on the metal level of the electrodes 106, 108, 111. The use of such a stop layer allows that possible variations in thickness of the etched materials do not impact the final depth of the trenches 130, 131. This etching of the trenches 130, 131 up to the level of metallization comprising the electrodes 106, 108, 111 then makes it possible to carry out the various contact connections. The structure obtained at this stage of the process is shown in [Fig.3].

[0091] In the embodiment described, the dielectric layer 132 is then deposited in the trenches 130, 131 by covering the side walls and the bottom walls of these trenches 130, 131, and also on the dielectric hard mask 146. Anisotropic etching can then be implemented in order to remove the parts of the dielectric layer 132 arranged on the bottom walls of the trenches 130, 131 as well as those resting on the dielectric hard mask 146. The remaining portions of the dielectric layer 132 form dielectric spacers covering the flanks, or side walls, of the diodes 126. The structure obtained at this stage of the method is shown in [Fig. 4],

[0092] The electrically conductive layer 134 is then deposited on the structure produced, thus covering the bottom walls of the trenches 130, 131, the dielectric hard mask 146 as well as the remaining portions of the dielectric layer 132 arranged against the side walls of the trenches 130, 131. In the trenches 130, the electrically conductive layer 134 is in electrical contact with the second electrodes 108, that is to say those intended to form the gates of the diodes 126 in the example described. Prior to this deposition, one or more steps of preparation of the surfaces on which the electrically conductive layer 134 is intended to be deposited can be implemented, for example to remove any native metal oxide present on these surfaces. The structure obtained at this stage of the process is shown in [Fig.5].

[0093] A localized etching step can then be implemented in order to remove certain portions of the electrically conductive layer 134 such that parts of the electrically conductive layer 134 arranged around each of the diodes 126 are electrically isolated from other parts of the electrically conductive layer 134 arranged around the other diodes 126. In other words, this etching can be implemented such that the remaining parts of the electrically conductive layer 134 are electrically isolated from one pixel to another while maintaining electrical contact, for the remaining parts of the layer 134, around each diode 126, with one of the second electrodes 108. In the exemplary embodiment described, the etched parts of the electrically conductive layer 134 (designated by the reference 135 in [Fig. 6]) are located on the bottom walls of the trenches 130.In the example described, this etching is implemented in such a way that the parts of the electrically conductive layer 134 located in the trench 131 are not etched and that the electrical contact with the third electrode 111 is maintained. Alternatively, it is possible for the parts of the electrically conductive layer 134 located in the trench 131 to be etched. The structure obtained at this stage of the process is shown in [Fig.6].

[0094] In the described embodiment, the dielectric layer 136 is then deposited on the electrically conductive layer 134, and also on the parts of the bottom walls of the trenches 130 which are no longer covered by the electrically conductive layer 134 (i.e. at the locations of the etched parts 135). A localized etching can then be implemented in order to remove the part of the dielectric layer 136 covering the bottom wall of the trench 131 so that the electrically conductive layer 134 remains electrically accessible from the bottom of the trench 131. The structure obtained at this stage of the method is shown in [Fig.7].

[0095] In the exemplary embodiment described, the electrically conductive portions 138 are then produced in such a way that they fill the remaining volume of the trenches 130, 131 not occupied by the other previously deposited layers. According to an exemplary embodiment, the production of the portions 138 may comprise the deposition of Ti / TiN / Cu layers from which electrochemical growth of copper is then implemented.

[0096] A planarization of the upper face of the structure produced can then be implemented, with a stop on the second semi-conductor layer 122. This chemical-mechanical polishing makes it possible to remove the dielectric hard mask 146 as well as the parts of layers 134 and 136 and portions 138 arranged at the level of the dielectric hard mask 146. The structure obtained at this stage of the process is shown in [Fig.8].

[0097] In the embodiment described, a dielectric encapsulation layer 140 is then deposited on the upper face of the structure produced, this layer 140 then being etched locally in order to remove the parts of this layer covering the electrically conductive portions 138 and the second semi-conductive layer 122. The remaining parts of this encapsulation layer form the dielectric portions 140.

[0098] In the embodiment described, the electrically conductive and optically transparent layer 142 is then deposited on the upper face of the structure produced, thus making the electrical contacts between the parts of the second semi-conductive layer 122 of the diodes 126 and the electrically conductive portions 138, and also with the electrically conductive portion 138 which is in contact with the third electrode 111 corresponding to the common cathode of the diodes 126. The structure obtained at this stage of the method is shown in [Fig.9].

[0099] The device 100 can then be completed by implementing an electrical / chemical passivation deposition and by producing connection pads, including the connection pad 144 serving as a contact to the common cathode of the device 100. The device 100 obtained corresponds to that shown in [Fig.l]. Alternatively, other connection pads coupled to the anodes and / or to the second electrodes 128 can also be produced via routing in the metallization levels of the circuit.

[0100] In the exemplary embodiment of the device 100 previously described in connection with [Fig. 1], all the diodes 126 of the device correspond to LEDs. Alternatively, it is possible that at least some of these diodes 126 correspond to photodiodes. In this case, the active zone 124 may comprise one or more receiving layers, i.e. optically absorbent layers.

[0101] An example of an optoelectronic device 100 according to a second embodiment is described below in connection with [Fig. 10].

[0102] In this second embodiment, the device 100 comprises certain diodes 126 corresponding to LEDs and other diodes 126 corresponding to photodiodes. In [Fig. 10], the diode designated by the reference 126a corresponds to an LED and is similar to the diodes 126 of the device 100 according to the first embodiment previously described. Thus, the part of the second semiconductor layer 122 of this diode 126a is electrically coupled to one of the electrically conductive portions 138 adjacent to this part of the second semiconductor layer 122 so that it is coupled to the common cathode of the LEDs of the device 100. In addition, an electrical potential different from the electrical potentials applied to the anode and the cathode of this diode 126a is intended to be applied to the grid of this diode 126a formed by the parts of the electrically conductive layer 134 arranged around the semiconductor stack of this diode 126a.

[0103] In the example of [Fig. 10], the diode designated by the reference 126b corresponds to a photodiode which is distinguished from the diode 126a by the fact that the electrical potential intended to be applied to the part of the second semiconductor layer 122 of this photodiode 126b does not correspond to that of the common cathode but to that intended to be applied to the gate of this diode 126b formed by the parts of the electrically conductive layer 134 arranged around the semiconductor stack of this diode 126b. This configuration of the diode 126b is obtained thanks to the fact that the dielectric portion 140 formed next to this diode 126b covers the electrically conductive portion 138 and not one of the parts of the electrically conductive layer 134 arranged around the semiconductor stack of this diode 126b.Thus, the portion of the electrically conductive and optically transparent layer 142 formed above this diode 126b electrically couples the portion of the second semiconductor layer 122 of this diode 126b to one of the portions of the electrically conductive layer 134 arranged around the semiconductor stack of this diode 126b. Furthermore, in this configuration, the electrically conductive layer 134 is not continuous but is interrupted (interruption designated by the reference 148 in [Fig. 10]) so that the portions of this layer 134 providing electrical connections for the diodes corresponding to LEDs are not electrically connected to those providing electrical connections for the diodes corresponding to photodiodes.

[0104] In this second embodiment, the electrically conductive and optically transparent layer 142 makes it possible to differentiate the electrical potential applied to the parts of the second semiconductor layer 122 according to the nature of the diodes 126. Thus, for the diodes 126 corresponding to photodiodes, it is possible to apply to the parts of the second semiconductor layer 122 of these photodiodes the same electrical potential as that applied to the anodes of the diodes 126 corresponding to LEDs. Thus, the circuit 102 does not have to provide opposite voltages to the LEDs and the photodiodes of the device 100, given that the same voltage can be used for the polarization of the LEDs and the photodiodes.

[0105] In a particular configuration, the device 100 may comprise a matrix of pixels such that each pixel of the matrix comprises a first diode similar to the diode 126a and corresponding to an LED, and a second diode similar to the diode 126b and corresponding to a photodiode. Each pixel of such a matrix therefore fulfills both a light emission function and a light reception function.

[0106] An example of a method for producing the device 100 according to the second mode of realization is described below in connection with figures 11 to 14.

[0107] The steps previously described in connection with figures 2 to 8 are first implemented, with the difference however that the planarization of the upper face of the structure produced is implemented with a stop not on the second semi-conductor layer 122 but on the dielectric hard mask 146. The structure obtained at this stage of the process is shown in [Fig. 11].

[0108] The dielectric encapsulation layer is then deposited on the upper face of the structure produced. This layer is then etched locally, for example via photolithography, in order to remove, at the diodes 126a intended to form LEDs, the parts of this layer covering the electrically conductive portions 138 and the dielectric hard mask 146, and to remove, at the diodes 126b intended to form photodiodes, the parts of this layer covering the parts of the electrically conductive layer 134 and the dielectric hard mask 146.At the level of the diodes 126 intended to form photodiodes, a sufficiently large thickness of the dielectric layer 136, corresponding for example to a layer of SiO2 with a thickness equal to approximately 200 nm, facilitates the implementation of this etching so as to etch the parts of the encapsulation layer located on the parts of the electrically conductive layer and preserve those located on the electrically conductive portions 138. The remaining parts of this encapsulation layer form the dielectric portions 140. The structure obtained at this stage of the process is visible in [Fig. 12].

[0109] A second photolithography and etching step is then implemented to form openings 149 through the dielectric hard mask 146 allowing access to the parts of the second semiconductor layer 122 of the diodes 126a and 126b. The structure obtained at this stage of the process is shown in [Fig.13].

[0110] The electrically conductive and optically transparent layer 142 is then deposited on the upper face of the structure produced, thus making the electrical contacts between the parts of the second semiconductor layer 122 and the electrically conductive portions 138 for the diodes 126a corresponding to LEDs, and the electrical contacts between the parts of the second semiconductor layer 122 and the parts of the electrically conductive layer 134 for the diodes 126b corresponding to photodiodes. Photolithography and etching steps of the electrically conductive layer 142 can then be implemented so that the electrically conductive layer 142 is interrupted so that the parts of this layer 142 providing electrical connections for the diodes corresponding to LEDs are not electrically connected to those providing electrical connections for the diodes corresponding to photodiodes.The structure obtained at this stage of the process is shown in [Fig. 14].

[0111] The device 100 can be completed as previously described for the first embodiment, the device 100 obtained corresponding to that shown in [Fig. 10].

[0112] In the embodiments of the device 100 previously described, the third electrode 111 forms a cathode common to all of the diodes 126 corresponding to LEDs. In addition, in these examples, the third electrode 111 is arranged at an edge of the device 100, for example next to the matrix of diodes 126.

[0113] In a first variant that can be applied to the first or second embodiment described above, it is possible for each first electrode 106 to be arranged between two second electrodes 108 to which the parts of the electrically conductive layer 134 located around the diode 126 are electrically coupled, the portion of the first semiconductor layer 120 of which is electrically coupled to said first electrode 106. Furthermore, in this first variant, the device 100 may comprise several third electrodes 111 arranged in the metallization level 104, each of the third electrodes 111 being electrically coupled to one of the electrically conductive portions 138 and arranged between two second electrodes 108 each electrically coupled to parts of the electrically conductive layer 134 located around different diodes 126.

[0114] An example of a part of a device 100 according to such a variant applied here to the device 100 according to the first embodiment is shown in [Fig. 15]. As can be seen in this figure, the parts of the electrically conductive layer 134 and of the dielectric layer 136 located on the bottom walls of the trenches 130 and covering the third electrodes 111 are etched so that the electrically conductive portions 138 are in electrical contact with the third electrodes 111. Furthermore, the parts of the electrically conductive layer 134 arranged in the same trench are electrically coupled to second electrodes 108 different from each other.

[0115] This first variant can facilitate the production of the device 100, with however as a counterpart a lesser compactness of the device 100 thus produced compared to a device 100 comprising a single third electrode 111 located at the edge of the device 100.

[0116] In a second variant that can be applied to the first or second embodiment described above, it is possible for the device 100 to comprise several third electrodes 111, each electrically coupled to one of the electrically conductive portions 138 and arranged in the metallization level 104, each of the first electrodes 106 being arranged between one of the second electrodes 108 and one of the third electrodes 111, and each of the third electrodes 111 is arranged between one of the first electrodes 106 and one of the second electrodes 108.

[0117] An example of such a second variant applied here to the device 100 according to the first embodiment is shown in [Fig. 16]. As can be seen in this figure, the electrically conductive layer 134 and the dielectric layer 136 are etched such that one of the portions of the electrically conductive layer 134 is in electrical contact with the second electrode 108 located at the bottom of the trench 130 and the electrically conductive portion 138 is in contact with the third electrode 111 located at the bottom of the trench 130. Furthermore, in the example of [Fig. 16], a portion of the electrically conductive layer 134 may be retained on the third electrode 111, the electrically conductive portion 134 being electrically coupled to the third electrode 111. Alternatively, this portion of the electrically conductive layer 134 may be removed.

[0118] Like the first variant, this second variant makes it easier to produce the device 100, with the counterpart of being less compact than when the device 100 comprises a single third electrode 111 located at the edge of the device 100.

[0119] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art.

[0120] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

Claims

Claims

1. Optoelectronic device (100) comprising at least: - a plurality of diodes (126) each comprising a portion of a stack of at least a first and a second semiconductor layer (120, 122) doped according to opposite conductivity types, a portion of the first semiconductor layer (120) of each diode (126) being electrically coupled to a first electrode (106) arranged under said portion of the first semiconductor layer (120); - trenches (130) passing through the stack, separating the diodes (126) from each other and from which second electrodes (108) are electrically accessible;- an electrically conductive layer (134) arranged at least against side walls of the trenches (130), electrically insulated from the stack, electrically coupled to the second electrodes (108) and which is interrupted in such a way that parts of the electrically conductive layer (134) arranged around each of the diodes (126) are electrically insulated from other parts of the electrically conductive layer (134) arranged around the other diodes (126); - electrically conductive portions (138) arranged in the trenches (130), electrically insulated from the electrically conductive layer (134) and electrically coupled to each other and to at least one third electrode (111).;

2. The optoelectronic device (100) of claim 1, wherein the electrically conductive layer (134) is interrupted at bottom walls of the trenches (130).

3. Optoelectronic device (100) according to one of the preceding claims, wherein bottom walls of the trenches (130) are at least partly formed by the second electrodes (108).

4. Optoelectronic device (100) according to one of the preceding claims, wherein the electrically conductive portions (138) are electrically coupled to the portions of the second semiconductor layer (122) of at least a portion of the diodes (126) corresponding to LEDs.

5. The optoelectronic device (100) of claim 4, wherein the electrically conductive portions (138) are electrically coupled to the portions of the second semiconductor layer (122) of the LEDs by at least one electrically conductive and optically transparent layer (142) disposed on the stack and on the electrically conductive portions (138).

6. The electronic device (100) of claim 5, wherein the electrically conductive and optically transparent layer (142) is electrically insulated from the electrically conductive layer (134) by dielectric portions (140) disposed between the electrically conductive layer (134) and the electrically conductive and optically transparent layer (142).

7. Optoelectronic device (100) according to one of the preceding claims, wherein the electrically conductive portions (138) are electrically insulated from the electrically conductive layer (134) by at least one first dielectric layer (136) disposed between the electrically conductive portions (138) and the electrically conductive layer (134).

8. Optoelectronic device (100) according to one of the preceding claims, wherein the third electrode (111) is arranged at an edge of the optoelectronic device (100).

9. Optoelectronic device (100) according to one of claims 1 to 7, wherein: - each first electrode (106) is arranged between two second electrodes (108) to which the parts of the electrically conductive layer (134) located around the diode (126) are electrically coupled, the portion of the first semiconductor layer (120) of which is electrically coupled to said first electrode (106), and - the optoelectronic device (100) comprises several third electrodes (111) each electrically coupled to one of the electrically conductive portions (138) and arranged between two second electrodes (108) each electrically coupled to parts of the electrically conductive layer (134) located around different diodes (126).

10. Optoelectronic device (100) according to one of claims 1 to 7, comprising several third electrodes (111) each electrically coupled to one of the electrically conductive portions (138), each of the first electrodes (106) being disposed between one of the second electrodes (108) and one of the third electrodes (111), and each of the third electrodes (111) being disposed between one of the first electrodes (106) and one of the second electrodes (108).

11. Optoelectronic device (100) according to one of the preceding claims, wherein the portions of the electrically conductive layer (134) arranged around at least a portion of the diodes (126) corresponding to photodiodes are electrically coupled to the portions of the second semiconductor layer (122) of the photodiodes.

12. The optoelectronic device (100) of claim 11, wherein the portions of the electrically conductive layer (134) disposed around the photodiodes are electrically coupled to the portions of the second semiconductor layer (122) of the photodiodes by at least one electrically conductive and optically transparent layer (142) disposed on the stack and on the portions of the electrically conductive layer (134) disposed around the photodiodes.

13. Optoelectronic device (100) according to one of the preceding claims, further comprising a second dielectric layer (132) disposed between the electrically conductive layer (134) and the stack.

14. Method for producing an optoelectronic device (100), comprising at least the steps of: - producing a stack of at least a first and a second semiconductor layer (120, 122) doped according to opposite conductivity types; - producing trenches (130) passing through the stack, separating from each other diodes (126) each comprising a part of the stack and making accessible second electrodes (108), a portion of the first semiconductor layer (120) of each diode (126) being electrically coupled to a first electrode (106) arranged under said portion of the first semiconductor layer (120);- production of an electrically conductive layer (134) arranged at least against side walls of the trenches (130), electrically insulated from the stack, electrically coupled to the second electrodes (108) and which is interrupted such as parts of the layer electrically; conductive (134) arranged around each of the diodes (126) are electrically insulated from the parts of the electrically conductive layer (134) located around the other diodes (126); production of electrically conductive portions (138) arranged in the trenches (130), electrically insulated from the electrically conductive layer (134) and electrically coupled to each other and to at least one third electrode (111).

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