Converter

Abstract

Converter The present description relates to a voltage converter (400) formed on a substrate coated with GaN, comprising: - a first chip (401) including a first e-mode transistor (T401) and a first control circuit (D401) of said first transistor; and - a second chip (402) including a second e-mode transistor (T402) and a second control circuit (D402) of said second transistor, and being adapted to transmit said first voltage received from a third control circuit (410) to said second chip; in which said second chip includes a voltage converter adapted to convert said first voltage into a second voltage, said voltage converter including a first current source used when an output voltage of said converter (400) is less than a threshold voltage, and a second current source used when said output voltage is greater than said threshold voltage.Figure for the summary: Fig. 4.

Description

Title of the invention: Converter technical field

[0001] This description relates generally to electronic systems and devices, and in particular to voltage conversion within an electronic system or device. More specifically, this description relates to a converter formed in and on a structure comprising Gallium Nitride (GaN). Previous technique

[0002] It is conventional to form electronic systems and devices from silicon substrates, but other semiconductor materials can be used. In particular, structures comprising Gallium Nitride (GaN) can be used.

[0003] It would be desirable to be able to improve, at least in part, certain aspects of electronic systems and devices formed from in and on structures comprising Gallium Nitride. Summary of the invention

[0004] There is a need for electronic systems and devices formed in and on structures comprising Gallium Nitride.

[0005] There is a need for voltage converters formed in and on structures comprising Gallium Nitride.

[0006] An embodiment overcomes all or part of the disadvantages of known voltage converters formed in and on structures comprising Gallium Nitride.

[0007] One embodiment provides for a voltage converter formed in and on structures comprising more efficient Gallium Nitride.

[0008] One embodiment provides for a voltage converter having a more efficient half-bridge type structure.

[0009] One embodiment provides a voltage converter comprising two chips, a first chip being adapted to handle low voltages and a second chip adapted to handle high voltages.

[0010] One embodiment provides such a converter in which control voltages are supplied only to the first chip, these control voltages are transmitted to the second via the first chip.

[0011] According to a first aspect, an embodiment provides a voltage converter including a voltage shift circuit enabling the control voltages of the first chip to be transmitted to the second, more efficient chip.

[0012] One embodiment provides such a voltage converter using several current sources depending on the value of an output voltage of the converter.

[0013] According to a second aspect, an embodiment provides a circuit for converting high voltage signals into low voltage signals.

[0014] According to a third aspect, an embodiment provides a voltage converter formed from two identical configurable chips, each of which can be the first or the second chip.

[0015] One embodiment provides a voltage converter formed in and on a monolithic semiconductor substrate having one face coated with a layer of Gallium Nitride, comprising: - a first chip comprising a first e-mode type HEMT power transistor and a first control circuit for said first transistor; and - a second chip comprising a second e-mode type HEMT power transistor and a second control circuit for said second transistor, and being adapted to transmit at least a first voltage received from a third control circuit to said second chip; in which said second chip includes a first voltage converter circuit adapted to convert said at least a first voltage into a second voltage, said first voltage shifter circuit including a first current source adapted to be used when a third output voltage of said converter is less than a fourth threshold voltage, and a second current source adapted to be used when said third output voltage is greater than said fourth threshold voltage.

[0016] According to one embodiment, the first and second current sources are used to provide a control voltage to said first transistor.

[0017] According to one embodiment, said fourth threshold voltage is between -5 and OV.

[0018] According to one embodiment, said fourth threshold voltage is equal to -2 V.

[0019] According to one embodiment, the first chip is adapted to receive high voltages, and the second chip is adapted to receive low voltages.

[0020] According to one embodiment, said first chip further includes a fourth voltage converter circuit adapted to convert at least a fifth voltage of said first chip into a sixth diagnostic voltage for transmission to said second chip, said fourth voltage adapter circuit including an oscillator being configured to oscillate said sixth voltage when said fifth voltage is in a first state.

[0021] According to one embodiment, said oscillator being configured not to oscillate said sixth voltage when said fifth voltage is in a second state different from the first state.

[0022] According to one embodiment, said first and second chips are identical chips.

[0023] According to one embodiment, said first and second chips each include a configuration terminal enabling them to define their role in said converter.

[0024] According to one embodiment, the converter is a switching power supply.

[0025] According to one embodiment, the converter is a switched-mode power supply of boost converter type.

[0026] Another embodiment provides a method for converting a seventh input voltage into a third output voltage using a voltage converter formed in and on a monolithic semiconductor substrate having one face coated with a layer of Gallium Nitride, comprising: - a first chip comprising a first e-mode type HEMT power transistor and a first control circuit for said first transistor; and - a second chip comprising a second e-mode type HEMT power transistor and a second control circuit for said second transistor, and being adapted to transmit at least a first voltage received from a third control circuit to said second chip; in which said second chip includes a first voltage adapter circuit adapted to convert said at least a first voltage into a second voltage, said first voltage shifter circuit including a first current source adapted to be used when a third output voltage of said converter is less than a fourth threshold voltage, and a second current source adapted to be used when said third output voltage is greater than said fourth threshold voltage.

[0027] Another embodiment provides a method for manufacturing a voltage converter comprising: - a first chip comprising a first e-mode type HEMT power transistor and a first control circuit for said first transistor; and - a second chip comprising a second e-mode type HEMT power transistor and a second control circuit for said second transistor, comprising two identical manufacturing steps of the first and second chips.

[0028] According to one embodiment, the process further comprises a first and second chip configuration step which is successive to the two manufacturing steps.

[0029] According to one embodiment, during the configuration step a configuration terminal for said first and second chips is used. Brief description of the drawings

[0030] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0031] Fig. 1 represents, very schematically, a structure comprising Gallium Nitride;

[0032] [Fig.2] includes two views (A) and (B) illustrating a first type of transistor formed in and on a structure comprising Gallium Nitride;

[0033] Fig. 3 represents two views (A) and (B) illustrating a second type of transistor formed in a structure comprising Gallium Nitride;

[0034] [Fig.4] represents, schematically and in block form, an embodiment of a voltage converter;

[0035] [Fig.5] represents a practical example of the embodiment of [Fig.4];

[0036] Figure 6 represents an embodiment of a part of the converter of the [Fig.4];

[0037] [Fig.7] represents an embodiment of a voltage shifter circuit of the embodiment of [Fig.6];

[0038] [Fig.8] represents, in more detail, an embodiment of a voltage shift circuit of the embodiment of [Fig.6];

[0039] [Fig. 9] represents another voltage converter circuit of the embodiment of [Fig. 6]; and

[0040] [Fig. 10] represents, very schematically, a practical embodiment of the embodiment of [Fig. 4]. Description of the implementation methods

[0041] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0042] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0043] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.

[0044] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0045] Unless otherwise specified, the expressions "approximately", "roughly", and "on the order of" mean within 10%, preferably within 5%.

[0046] The embodiments described below relate to electronic systems and devices formed in and on structures comprising Gallium Nitride; an example of such a structure is described in relation to [Fig. 1]. The use of such structures precludes the use of conventional electronic components, and in particular, precludes the use of electronic components employing PN junctions such as diodes, MOSFET transistors, etc. However, high electron mobility transistors can be used. Two types of these transistors are described in relation to Figures 2 and 3.

[0047] The embodiments described below relate more particularly to a voltage converter formed in and on such structures. More precisely, this concerns a voltage converter using a halfbridge structure, described in relation to Figures 4 and 5. A first aspect of these embodiments concerns a voltage shifter circuit, or voltage shift circuit, for transmitting voltages from a low-voltage chip to a high-voltage chip. A second aspect of these embodiments concerns a conversion circuit for transmitting signals from the high-voltage chip to the low-voltage chip. A third aspect of these embodiments concerns a practical example of a voltage converter and its fabrication process.

[0048] Furthermore, the embodiments described above are particularly suitable for use in any type of industrial market where voltage conversion is required. More specifically, such a voltage converter circuit can be used to: - the automotive industry, for example in the field of automotive electrification or in the field of advanced driver assistance systems (ADAS); - the industrial industry, for example in the field of green energy, in the field of infrastructure electrification, the Internet of Things (IoT) and Smart Homes, where electricity and energy consumption and data exchange are key elements; - the personal electronics industry, for example in the field of mobile telephony and the Internet of Things (IoT), as well as in the field of broadband interfaces; and - the communications equipment, computer and peripherals industry, for example in the field of infrastructure and data centers, and in the field of low Earth Orbit (LEO) satellites.

[0049] More specifically, these embodiments can be used in the automotive industry for energy conversion. More precisely, these voltage converters can be used in vehicle battery chargers and electric vehicle chargers.

[0050] Fig. 1 is a cross-sectional view very schematically representing a semiconductor structure 100 comprising Gallium Nitride.

[0051] The structure 100 is generally composed of a substrate 101 (Si) made of a semiconductor material, for example a silicon substrate, coated on one of its faces with a layer 102 (GaN) made of Gallium Nitride (GaN). The layer 102 has a thickness of between 0.5 and 5 pm.

[0052] When structure 100 is used as the basis of an electronic system or device, electronic components are formed in and on layer 102. Metallization levels can, in addition, be formed on layer 102.

[0053] Figure 2 comprises two views (A) and (B) illustrating a first type of transistor 200 formed in a structure comprising gallium nitride. View (A) shows an electrical diagram of the transistor 200, and view (B) shows a cross-sectional view of a structure 250 forming the transistor 200.

[0054] Transistor 200 is a high-mobility electron transistor (HEMT), also called a modulated-doping field-effect transistor (MODFET). Hereinafter, a high-mobility electron transistor is referred to as a HEMT.

[0055] A HEMT transistor, such as transistor 200, comprises a gate terminal, denoted G in [Fig.2], a source terminal, denoted S in [Fig.2], and a drain terminal, denoted D in [Fig.2].

[0056] Furthermore, transistor 200 is a depletion-mode HEMT, hereafter referred to as a d-mode HEMT, or d-mode transistor. Alternatively, transistor 200 is a normally-ON HEMT, or normally-ON HEMT, or normally-ON transistor. The circuit diagram of transistor 200 shown in view (A) is the circuit diagram that will be used in all subsequent figures to represent a d-mode or normally-ON transistor.

[0057] In practice, the transistor 200 can be obtained from a structure 250 formed from a structure of the type of structure 100 described in relation to [Fig. 1]. Thus, the structure 250 comprises a substrate 251 (Si) made of a conductive material, such as silicon, one face of which is covered by a layer 252 (GaN) of Gallium Nitride. The Gallium Nitride layer 252 is partially covered by a layer 253 (AlGaN) of Aluminum-Gallium Nitride. A connection terminal 254 forms the source contact S of transistor 200. The connection terminal 254 is formed on a portion of layer 252 that is not covered by layer 253. A connection terminal 255 forms the drain contact D of transistor 200. The connection terminal 255 is formed on a portion of layer 252 that is not covered by layer 253. A connection terminal 256 forms the gate contact G of transistor 200.The connection terminal 256 is formed on a portion of layer 253, and is located between the connection pads 254 and 255.

[0058] The operation of transistor 200 is as follows. When the gate G of transistor 200 is left floating or when a positive voltage is applied between its gate G and its source S, transistor 200 is conducting, hence its designation as a normally ON transistor. To "turn off" transistor 200, that is, to make it non-conducting, a negative voltage must be applied between its gate G and its source S.

[0059] Figure 3 comprises two views (A) and (B) illustrating a second type of transistor 300 formed in a structure comprising gallium nitride. View (A) shows an electrical diagram of the transistor 300, and view (B) shows a cross-sectional view of a structure 350 forming the transistor 300.

[0060] Like the transistor 200 described in relation to [Fig.2], the transistor 300 is a high-mobility electron transistor, or HEMT. The transistor 300 comprises a gate terminal, denoted G in [Fig.3], a source terminal, denoted S in [Fig.3], and a drain terminal, denoted D in [Fig.3].

[0061] Furthermore, and unlike transistor 200 in [Fig. 2], transistor 300 is an enhancement-mode HEMT, hereafter referred to as an e-mode HEMT or simply an e-mode transistor. Alternatively, transistor 300 is a normally-off HEMT, or normally-off HEMT. The circuit diagram of transistor 300 shown in view (A) is the circuit diagram that will be used in all subsequent figures to represent an e-mode or normally-off transistor.

[0062] In practice, the transistor 300 can be obtained from a structure 350 formed from a structure of the type of structure 100 described in relation to [Fig. 1]. Thus, the structure 350 comprises a substrate 351 (Si) made of a conductive material, such as silicon, one face of which is covered by a layer 352 (GaN) of Gallium Nitride. The Gallium Nitride layer 352 is partially covered by a layer 353 (AlGaN) in Aluminium-Gallium Nitride. A connection terminal 354 forms the source contact S of transistor 300. Connection terminal 354 is formed on a portion of layer 352 that is not covered by layer 353. A connection terminal 355 forms the drain contact D of transistor 300. Connection terminal 355 is formed on a portion of layer 352 that is not covered by layer 353. A connection terminal 356 forms the gate contact G of transistor 300. Connection terminal 356 is formed between layer 352 and layer 353 and is located between connection pads 354 and 355. Furthermore, a portion of connection pad 354 covers the portion of layer 353 that covers connection pad 356, as shown in view (B) of [Fig. 3].

[0063] The operation of transistor 300 is as follows. When the gate G of transistor 300 is left floating or a negative voltage is applied between its gate G and its source S, transistor 300 is not conducting, hence its designation as a normally OFF transistor. To "turn on" transistor 300, that is, to make it conduct, a positive voltage must be applied between its gate G and its source S.

[0064] Fig. 4 represents an embodiment of a voltage converter 400 and its external control circuit 410 (pC).

[0065] The voltage converter 400, or voltage converter circuit, is adapted to convert a first received voltage into a second supplied voltage between an OUT_400 terminal and the SOURCE_400 reference terminal. For example, the converter 400 is a switched-mode power supply, such as a boost converter-type switched-mode power supply. More specifically, the voltage converter 400 has a half-bridge structure, that is, a structure using two power transistors arranged in series and their driver circuits.

[0066] According to one embodiment, the converter 400 comprises at least two chips, a chip 401 (HS) receiving high voltages and a chip 402 (LS) receiving low voltages. Chip 401 is also called the high-voltage chip, and chip 402 is also called the low-voltage chip. Low voltages are defined here as voltages between 0 and 20 V, preferably between 5 and 15 V. High voltages are defined here as voltages greater than 350 V, preferably between 400 and 650 V.

[0067] The 401 chip includes a T401 HEMT e-mode type power transistor. A drain terminal of transistor T401 is connected, preferably connected, to a DRAIN_400 terminal of converter 400. A source terminal of transistor T401 is connected, preferably connected, to the OUT_400 terminal of converter 400.

[0068] The chip 401 further includes a D401 driver circuit (DRIVER) for the transistor T401. An output terminal of the D401 driver circuit is connected, preferably connected, to the gate terminal of the transistor T401.

[0069] The chip 402 includes a T402 HEMT e-mode power transistor. One drain terminal of the T402 transistor is connected, preferably connected, to an OUT_400 terminal of the 400 converter. One source terminal of the T402 transistor is connected, preferably connected, to the SOURCE_400 terminal of the 400 converter.

[0070] The chip 402 further includes a D402 driver circuit (DRIVER) for the transistor T402. An output terminal of the D402 driver circuit is connected, preferably connected, to the gate terminal of the transistor T402.

[0071] The converter 400 is adapted to be controlled by the control circuit 410. In one embodiment, the control circuit 410 is adapted to provide control voltages for the chips 401 and 402 of the converter 400, but is connected only to chip 402. More specifically, chip 402 includes an IN_LS_400 terminal for receiving CMDLS_400 control voltages for itself, and an IN_HS_400 terminal for receiving CMDLS_400 control voltages for chip 401. In one embodiment, chip 401 includes circuits for adapting the voltage levels of the CMDHS_400 control voltages of the control circuit 410 so that these CMDHS_400 control voltages are used by chip 402. Examples of such circuits are described with reference to Figures 6 to 8.

[0072] The control circuit 410 is further adapted to receive voltages from the chip 402, such as RSPHS_400 diagnostic voltages. To this end, and according to one embodiment, the chip 402 includes circuits for converting the RSPHS_400 diagnostic voltages so that the chip 401 can receive them and transfer them to the control circuit 410. Examples of such circuits are described with reference to Figures 6 and 9.

[0073] A voltage conversion method using the 400 converter is as follows. A voltage to be converted is supplied between the IN_400 and SOURCE_400 terminals, and a converted voltage is supplied between the OUT_400 and SOURCE_400 terminals. A DC potential is supplied to the DRAIN_400 terminal. Transistors T401 and T402 are alternately made to conduct and not conduct by their drive circuits according to the commands supplied by the control circuit.

[0074] Figure 5 represents a practical example of the embodiment of the voltage converter 400 and its control circuit 410 (pC) described in relation to Figure 4. More particularly, Figure 5 illustrates a converter 500 and its control circuit 550 (pC).

[0075] The converter 500 is formed in and on a structure of the type of structure 100 described in relation to [Fig. 1]. More particularly, the converter 500 comprises a majority of its components which are formed on such a structure and includes, in addition, a minority of components formed on a semiconductor structure not comprising Gallium Nitride (GaN).

[0076] The 500 converter includes: - a DRAIN_500 (DRAIN) terminal; - a GUT_500 (OUT) terminal; - a SGURCE_500 (SOURCE) terminal; - an SGND_500 (SGND) terminal; - a VCC_HS_500 terminal (VCC_HS); - a DZ_HS _500 terminal (DZ_HS); - a VDD_HS _500 terminal (VDD_HS); - an OUT_500 (OUT) output terminal suitable for providing a converted voltage; - an output terminal OUT_K_500 (OUT_K); - a VCC_LS_500 terminal (VCC_LS); - a DZ_LS_500 (DC_LS) terminal; - a VDD_LS_500 (VDD_LS) terminal; - an IN_LS_500 terminal (VCC_LS); - an IN_HS_500 terminal (IN_HS); - an RST_500 (RST) terminal; - a DIAG_LS_500 terminal (DIAG_LS); and - a DIAG_HS_500 terminal (DIAG_HS).

[0077] The converter 500 further comprises a chip 510 of the type of chip 401 described in relation to [Fig. 4], and a chip 520 of the type of chip 402 described in relation to [Fig. 4]. These chips 510 and 520 comprise components which are connected to the various terminals of the converter described above, for example, via electrostatic discharge protection (ESD) circuits 503.

[0078] The 510 and 520 chips comprise similar components. More specifically, the 510 and 520 chips may be identical chips further comprising a configuration terminal (not shown in [Fig. 5]). This may have the advantage of avoiding compatibility problems due to differences in manufacturing processes. This aspect of the invention is described in more detail with reference to [Fig. 10].

[0079] The 510 chip is a low-high-voltage chip comprising a T510 transistor of the type of the T401 transistor described in relation to [Fig. 4]. In other words, the T510 transistor is an e-mode HEMT transistor. One drain terminal of the T510 transistor is connected, preferably connected, to the DRAIN_500 terminal of the 500 converter. A first source terminal of the T510 transistor is connected, preferably connected, to the OUT_500 terminal of the 500 converter. A second source terminal of the transistor T510 is connected to the OUT_500 terminal of the 500 converter via a resistor R511.

[0080] The chip 510 further includes a driver circuit for transistor T510 of the type of driver circuit D401 described in relation to [Fig. 4]. The driver circuit for transistor T510 comprises various elements, including: - a 511 gate control circuit (DRIVER) for transistor T510; - a set of 512 logic circuits (LOGIC); - a 513 voltage regulation circuit (REG); - an overheat detection circuit 514 (OT); - a 515 voltage adaptation circuit (HS HV->LV Shifter) converting high voltages into low voltages; - a 516 voltage conversion circuit (HS LV->HV Shifter) converting low voltages to high voltages; and - a 517 protection circuit (VDS Prot.) against overvoltages.

[0081] The gate control circuit 511 includes an output connected, preferably connected, to a gate terminal of transistor T510. The circuit 511 receives control voltages from the logic circuit assembly 512. The circuit 511 is powered by a potential supplied by the VDD_HS_500 terminal, and is referenced to the potential of the output terminal OUT_500.

[0082] The logic circuit assembly 512 receives voltages from circuits 514 to 517, and combines these voltages to provide a control voltage to the gate control circuit 511 of transistor T510. The assembly 512 is powered by a potential supplied by the voltage regulator circuit 513.

[0083] The voltage regulation circuit 513 includes two input terminals connected to the terminals VCC_HS_500 and DZ_HS_500, for example, via electrostatic discharge protection circuits 503. The circuit 513 includes two output terminals, one being connected to the terminal VDD_HS_500, for example via a circuit 503, and the other providing the supply potential to the gate control circuit 511.

[0084] The overheat detection circuit 514 is a circuit for detecting an abnormal increase in temperature within the converter 500, and in particular within the chip 510. The circuit 514 is powered by the regulation circuit 513 and provides an overheat detection voltage to the logic circuit set 512.

[0085] The 515 voltage adaptation circuit is, as previously stated, adapted to convert high voltages to low voltages. More specifically, the 515 voltage adaptation circuit, or 515 voltage adapter circuit, is adapted to convert voltages used by the 510 chip into voltages usable by the 520 chip. The circuit 515 is therefore adapted to receive, from all the logic circuits 512, voltages to be transmitted to chip 520, and to transmit converted voltages to chip 520. A particular embodiment of circuit 515 is described in relation to [Fig.9].

[0086] The 516 voltage conversion circuit is, as previously stated, suitable for converting low voltages to high voltages. More specifically, the 516 voltage conversion circuit, or 516 voltage converter circuit, or 516 voltage shifter circuit, is suitable for converting voltages used by the 520 chip into voltages usable by the 510 chip. The 516 circuit is therefore suitable for receiving voltages from the 510 chip and for transmitting converted voltages to all the 512 logic circuits.

[0087] The protection circuit 517 is adapted to detect overvoltages or overcurrents that may occur at the transistor T510. For this purpose, the circuit 517 is powered by a supply potential provided by the voltage regulation circuit 513. The circuit 517 is connected, preferably directly, to the second source terminal of the transistor T510. The circuit 517 provides a detection voltage to the logic circuitry 512.

[0088] The 520 chip is a low-voltage chip comprising a T520 transistor of the type of the T402 transistor described in relation to [Fig. 4]. In other words, the T520 transistor is an e-mode HEMT transistor. One drain terminal of the T520 transistor is connected, preferably connected, to the OUT_500 output terminal of the 500 converter. A first source terminal of the T520 transistor is connected, preferably connected, to the SOURCE_500 terminal and the SGND_500 terminal of the 500 converter. A second source terminal of the T520 transistor is connected to the OUT_500 terminal of the 500 converter via a resistor R521.

[0089] The 520 chip further includes a driver circuit for transistor T520 of the type of driver circuit D402 described in relation to [Fig. 4]. The driver circuit for transistor T520 comprises various elements, including: - a 521 gate control circuit (DRIVER) for transistor T520; - a set of 522 logic circuits (LOGIC); - a 523 voltage regulation circuit (REG); - an overheat detection circuit 524 (OT); - a 525 voltage conversion circuit (LS HV->LV Shifter) converting high voltages into low voltages; - a 526 voltage conversion circuit (LS LV->HV Shifter) converting low voltages to high voltages; and - a 527 protection circuit (VDS Prot.).

[0090] The gate control circuit 521 includes an output connected, preferably connected, to a gate terminal of transistor T520. The circuit 521 receives control voltages from the logic circuit assembly 522. The circuit 521 is powered by a potential supplied by the VDD_LS_500 terminal, and is referenced to the potential of the output terminal SOURCE_500.

[0091] The logic circuit assembly 522 receives voltages from circuits 524 to 527 and from terminals IN_LS_00, IN_HS_500, RST_500, DIAG_LS_500, and DIAG_HS_500, for example, via circuits 503. The logic circuit assembly 522 combines these voltages to provide a control voltage to the gate driver circuit 21 of transistor T520. The assembly 522 is powered by a potential supplied by the voltage regulator circuit 523.

[0092] The voltage regulation circuit 523 includes two input terminals connected to the terminals VCC_LS_500 and DZ_LS_500, for example, via electrostatic discharge protection circuits 503. The circuit 523 includes two output terminals, one being connected to the terminal VDD_LS_500, for example via a circuit 503, and the other providing the supply potential to the gate control circuit 521.

[0093] The overheat detection circuit 524 is a circuit for detecting an abnormal increase in temperature within the converter 500, and in particular the chip 520. The circuit 524 is powered by the regulation circuit 523 and provides an overheat detection voltage to the logic circuit set 522 and to the DIAG_LS_500 terminal.

[0094] The 525 voltage conversion circuit is, as previously stated, suitable for converting high voltages to low voltages. More specifically, the 525 voltage conversion circuit, or 525 voltage converter circuit, is suitable for converting voltages supplied by the 510 chip into voltages usable by the 520 chip. The 525 circuit is therefore suitable for receiving voltages from the 520 chip to be transmitted to the 510 chip, and for transmitting converted voltages to the 520 logic circuit assembly.

[0095] The voltage conversion circuit 526 is, as previously stated, suitable for converting low voltages to high voltages. More specifically, the voltage conversion circuit 526, or voltage converter circuit 526, or voltage shifter circuit 526, is suitable for converting voltages used by the chip 520 into voltages usable by the chip 510. The circuit 526 is therefore suitable for receiving voltages from all the logic circuits 522, and for transmitting converted voltages to the chip 510. Embodiments of circuits 526 are described with reference to Figures 6 to 8.

[0096] The protection circuit 527 is adapted to detect overvoltages or overcurrents that may occur at the transistor T520. For this purpose, circuit 527 is powered by a supply potential provided by the voltage regulation circuit 523. Circuit 527 is connected, preferably directly, to the second source terminal of transistor T520. Circuit 527 provides a detection voltage to all the logic circuits 522.

[0097] As previously stated, the converter 500 further comprises components which are not formed on the structure of the type of structure 100 described in relation to [Fig. 1]. These components are diodes of various types and capacitors which cannot be formed on such a structure.

[0098] The converter 500 includes a diode D501 connecting the terminals VCC_HS_500 and VCC_LS_500. More particularly, a cathode terminal of diode D501 is connected, preferably connected, to the terminal VCC_HS_500, and an anode terminal of diode D501 is connected, preferably connected, to the terminal VCC_LS_500.

[0099] The converter 500 further includes a capacitor C501 connecting the terminals VCC_HS_500 and OUT_K_500. More particularly, a first terminal of the capacitor C501 is connected, preferably connected, to the terminal VCC_HS_500, and a second terminal of the capacitor C501 is connected, preferably connected, to the terminal OUT_K_500.

[0100] The 500 converter further includes a Zener diode DZ501 connecting the terminals DZ_HS_500 and OUT_K_500. More specifically, a cathode terminal of the diode DZ501 is connected, preferably connected, to the terminal DZ_HS_500, and an anode terminal of the diode DZ501 is connected, preferably connected, to the terminal OUT_K_500.

[0101] The converter 500 further includes a capacitor C502 connecting the terminals VDD_HS_500 and OUT_K_500. More particularly, a first terminal of the capacitor C502 is connected, preferably connected, to the terminal VDD_HS_500, and a second terminal of the capacitor C502 is connected, preferably connected, to the terminal OUT_K_500.

[0102] The 500 converter further includes a Zener diode DZ502 connecting the terminals DZ_LS_500 and SGND_500. More particularly, a cathode terminal of the diode DZ502 is connected, preferably connected, to the terminal DZ_LS_500, and an anode terminal of the diode DZ502 is connected, preferably connected, to the terminal SGND_500.

[0103] The converter 500 further includes a capacitor C503 connecting the terminals VDD_LS_500 and SGND_500. More particularly, a first terminal of the capacitor C503 is connected, preferably connected, to the terminal VDD_LS_500, and a second terminal of the capacitor C503 is connected, preferably connected, to the terminal SGND_500.

[0104] Furthermore, as previously stated, the control circuit 550 of the converter 500 is shown in [Fig. 5]. For example, the control circuit 550 is a processor, a microprocessor, a controller, or a microcontroller. In one embodiment, the control circuit 550 is adapted to communicate only with the chip 520 and is adapted to handle only low voltages, like the chip 520. Thus, the control circuit 550 is adapted to provide control voltages for the chip 520 at the IN_LS_500 terminal and to provide control voltages for the chip 510 at the IN_HS_500 terminal. The control circuit 550 is further adapted to provide a reset voltage at the RST_500 terminal. The control circuit 550 is, moreover, adapted to receive detection voltages from the chip 520 via the DIAG_LS_500 terminal, and to receive detection voltages from the chip 510 via the DIAG_HS_500 terminal.The control circuit is also referenced to terminal SGND_500. According to an alternative embodiment, it is the converter 500 which is referenced to a reference potential supplied by the control circuit 550.

[0105] Figure 6 shows a circuit 600 representing part of a converter circuit voltage of the type of the 400 converter described in relation to [Fig.4] or of the 500 converter described in relation to [Fig.5].

[0106] Circuit 600 includes: - a DRAIN_600 (DRAIN) terminal of the type of the DRAIN_400 terminal described in relation to [Fig.4] or of the type of the DRAIN_500 terminal described in relation to [Fig.5]; - an OUT_600 (OUT) terminal of the type of the OUT_400 terminal described in relation to [Fig.4] or of the type of the OUT_500 terminal described in relation to [Fig.5]; - a SOURCE_600 (SOURCE) terminal of the type of the SOURCE_400 terminal described in relation to [Fig.4] or of the type of the SOURCE_500 terminal described in relation to [Fig.5]; - an SGND_600 (SGND) terminal of the type of the SOURCEK_400 terminal described in relation to [Fig.4] or of the type of the SGND_500 terminal described in relation to [Fig.5] - an IN_LS_600 (VCC_LS) terminal of the type of the IN_LS_500 terminal described in relation to [Fig.5]; - an IN_HS_600 (IN_HS) terminal of the type of the IN_HS_500 terminal described in relation to [Fig. 5]; and - a DIAG_HS_600 (DIAG_HS) terminal of the type of the DIAG_HS_500 terminal described in relation to [Fig.5].

[0107] Like the 400 and 500 converters, the 600 circuit includes two e-mode HEMT power transistors, T601 and T602. More specifically, transistor T601 is of the type T401 or T510 transistor, and transistor T602 is of the type T402 or T520 transistor. Thus, a drain terminal of the transistor T601 is connected, preferably connected, to the DRAIN_600 terminal, and a source terminal of transistor T601 is connected, preferably connected, to the OUT_600 terminal. A drain terminal of transistor T602 is connected, preferably connected, to the DRAIN_600 terminal, and a source terminal of transistor T602 is connected, preferably connected, to the OUT_600 terminal.

[0108] Like the 400 and 500 converters, the 600 circuit includes driver circuits for transistors T601 and T602. Only certain parts of these driver circuits are shown.

[0109] In particular, the driver circuit for transistor T601 comprises: - a grid control circuit D601 of the type of the grid control circuit D401 described in relation to [Fig.4] or of the type of the grid control circuit 511 described in relation to [Fig.5]; - an L601 rocker switch; - an LS601 (LS_HV) voltage shifter circuit of the type of the 516 voltage shifter circuit described in relation to [Fig. 5]; and - an ADAPT601 voltage adapter circuit of the type of the 515 voltage adapter circuit described in relation to [Fig.5].

[0110] The gate control circuit D601 includes an output, preferably connected, to the gate terminal of transistor T601. An input of this circuit D601 is reference connected to an output of flip-flop L601. An input of flip-flop L601 is preferably connected to the output of voltage shifter circuit LS601.

[0111] The voltage adapter circuit ADAPT601 is adapted to receive, as input, a fault detection signal FAULT_601 and to convert it into a fault detection signal interpretable by the driver circuit of transistor T602. For this purpose, the ADAPT601 circuit includes an oscillator OSC601 (OSC), a buffer circuit B601 (buf) and a capacitor C601. An example of the ADAPT601 circuit is described in more detail in relation to [Fig.9].

[0112] The OSC601 oscillator receives the FAULT_601 fault detection signal as input and outputs an oscillating signal. More specifically, when the FAULT_601 signal is in a first state, for example a high state, the OSC601 oscillator outputs an oscillating signal, or oscillating voltage, and when the FAULT_601 signal is in a second state, different from the first state, for example a low state, the OSC601 oscillator outputs a constant signal, that is, a signal that does not oscillate. According to one embodiment, when the FAULT_601 signal is in a second state, the OSC601 oscillator can output an oscillating signal having a different frequency than the signal output when the FAULT_601 signal is in the first state.

[0113] The buffer circuit B601 receives as input the signal supplied by the oscillator OSC601, and includes an inverting output connected, preferably connected, to a first terminal of the capacitor C601. A second terminal of the capacitor C602 is connected, preferably connected, to a node N601.

[0114] Similarly, the driver circuit for transistor T602 comprises: - a grid control circuit D602 of the type of the grid control circuit D402 described in relation to [Fig.4] or of the type of the grid control circuit 521 described in relation to [Fig.5]; - a set of Logic602 logic circuits of the type of the set of 522 logic circuits described in relation to [Fig.5]; - an LS602 (LS_LV) voltage shifter circuit of the type of the 526 voltage shifter circuit described in relation to [Fig. 5]; and - a buffer circuit B602; and - a resistor R602.

[0115] The gate drive circuit D602 includes an output, preferably connected, to the gate terminal of transistor T602. An input of this circuit D602 is reference connected to an output of the Logic602 logic circuit set. A first input of the Logic602 logic circuit set is preferably connected to the IN_HS_600 terminal. A second input of the Logic602 logic circuit set is preferably connected to the IN_LS_600 terminal. The voltage shifter circuit LS601 includes a first input, preferably connected, to the IN_HS_600 terminal, and a second input receiving a VGS_LS_602 potential. Examples of the LS602 circuit are described in more detail with reference to Figures 7 and 8.

[0116] The buffer circuit B602 includes an input connected, preferably connected, to node N601, and includes an output connected, preferably connected, to terminal DIAG_HS_600. The resistor R602 includes a first terminal connected, preferably connected, to node N601, and a second terminal connected, preferably connected, to terminal SGND_600.

[0117] Fig. 7 represents a simplified embodiment of a voltage shift circuit 700 of a converter of the type of converters described in relation to Figures 4 to 6.

[0118] In [Fig.7] are shown the embodiment of the voltage shifter circuit 700, a power transistor T701 and a gate control circuit D701 (DRIVER) of said power transistor T701.

[0119] As described previously, a drain terminal of the power transistor T701 is connected, preferably connected, to a DRAIN_700 terminal, a drain terminal of the power transistor T701 is connected, preferably connected, to a terminal DRAIN_700, and a source terminal of the power transistor T701 is connected, preferably connected, to a SOURCE_700 terminal. A gate terminal of transistor T701 receives a control voltage from the gate control circuit D701.

[0120] The voltage shifter circuit 700 includes an external voltage source Supp701 connected between terminals VCC_HS_701 and OUT_K_700. A positive terminal of the Supp701 source is connected, preferably connected, to the VCC_HS_700 terminal, and a negative terminal of the Supp701 source is connected, preferably connected, to the OUT_K_700 terminal.

[0121] The voltage shifter circuit 700 further comprises a resistor R701 and an inverter circuit INV701. One terminal of resistor R701 is connected, preferably connected, to terminal VCC_HS_700, and a second terminal of resistor R701 is connected, preferably connected, to node N701. An input terminal of inverter circuit INV701 is connected, preferably connected, to node N701, and an output terminal of inverter circuit INV701 is connected, preferably connected, to an input of gate control circuit D701.

[0122] The voltage shifter circuit 700 further includes two current sources CS701 and CS702. Current source CS701 is referenced to terminal SGND_700 and includes an output connected, preferably connected, to node N701. Current source CS702 is referenced to terminal OUT_700 and includes an output connected, preferably connected, to node N701. Current sources CS701 and CS702 are controlled by the potential supplied by terminal IN_HS_700.

[0123] The operating principle of the 700 circuit is as follows. Current sources CS701 and CS702 are used to send commands to the gate driver circuit D701, and ultimately to transistor T701. However, the converter can operate at very high voltages, and the converter's output voltage, i.e., the voltage supplied between terminals OUT_700 and SGND_700, can be between -50 and 650 V, preferably between -15 and 500 V. Current sources CS701 and CS702 do not supply currents of the same magnitude. When the output voltage is above a threshold voltage, only current source CS701 is used, and when the output voltage is below this threshold voltage, the other current source, i.e., current source CS702, is used. As an example, the threshold voltage is between -5 and 0 V.For example, when the output voltage is above -2 V, the CS701 current source is used to transmit commands to the D701 circuit, and when the output voltage is below -2 V, the CS702 current source is used to transmit commands to the D701 circuit.

[0124] Fig. 8 represents a more detailed embodiment of a voltage shift circuit 800 of a converter of the type of converters described in relation to Figures 4 to 6.

[0125] The voltage shifter circuit 800 is of the type of the voltage shifter circuit 526 described in relation to [Fig. 5] and is formed across two chips of the type of chips 510 and 520. More specifically, the circuit portions (A) and (B) delimited by dashed lines are formed in a chip adapted to receive low voltages, hereinafter referred to as the low-voltage chip, of the type of chip 402 described in relation to [Fig. 4] or of the type of chip 520 described in relation to [Fig. 5]. The remaining components are formed in a chip adapted to receive high voltages, hereinafter referred to as the high-voltage chip, of the type of chip 401 described in relation to [Fig. 4] or of the type of chip 510 described in relation to [Fig. 5]. Interconnect terminals 810 of the high-voltage and low-voltage chips are also shown in [Fig. 8].

[0126] According to a first example, shown in [Fig.8], the low voltage and high voltage chips can be connected by three sets of interconnect terminals 810.

[0127] According to a second example, not shown in [Fig. 8], the low-voltage and high-voltage chips can be connected by only two sets of interconnect terminals 810. One advantage of this example is that it allows for a reduction in the size of the substrates on which the high-voltage and low-voltage chips are formed. In this case, by way of example, transistors T805 to T807 described below are part of the low-voltage chip.

[0128] Circuit 800 includes: - a VCC_HS_800 terminal of the type of the VCC_HS_500 terminal described in relation to [Fig.5] or of the type of the VCC_HS_700 terminal described in relation to [Fig.7], the VCC_HS_800 terminal forming a power supply terminal for the high voltage chip; - an SGND_HS_800 terminal of the type of the OUT_K_500 terminal described in relation to [Fig.5], the SGND_HS_800 terminal forming a reference terminal of the high voltage chip; - an SGND_LS_800 terminal of the type of the SGND_500 terminal described in relation to [Fig.5], or of the type of the SGND_700 terminal described in relation to [Fig.7], the SGND_LS_800 terminal forming a reference terminal of the low voltage chip; - a DZ_HS_800 terminal of the type of the DZ_HS_500 terminal described in relation to [Fig.5]; - a DZ_LS_800 terminal of the type of the DZ_LS_500 terminal described in relation to [Fig. 5]; and - a PWM_800 terminal (SOURCE).

[0129] The circuit 800 further comprises, between terminals VCC_HS_800 and SGND_LS_800, three resistors T801, R802 and R803, and two HEMT transistors T801 and T802 of type e-mode. One terminal of resistor R801 is connected, preferably connected, to terminal VCC_HS_800, and the other terminal of resistor R801 is connected, preferably connected, to the first terminal of resistor R802. The other terminal of resistor R802 is connected, preferably connected, to a drain terminal of transistor T801. The other terminal of source of transistor T801 is connected, preferably connected, to a drain terminal of transistor T802. The other terminal of source of transistor T802 is connected, preferably connected, to the first terminal of resistor R803. The other terminal of resistor R803 is connected, preferably connected, to terminal SGND_LS_800. The other terminal of gate of transistor T801 is connected, preferably connected, to terminal DZ_LS_800.

[0130] The circuit 800 further includes a PWM801 pulse-width modulation circuit. An input of this PWM801 circuit is adapted to receive a control signal supplied by the PWM_800 terminal, which has been inverted; an output of this PWM801 circuit is connected, preferably connected, to the gate terminal of transistor T802.

[0131] The 800 circuit further comprises four e-mode HEMT transistors T803, T804, T805, and T806, two resistors R804 and R805, and a voltage source Supp801. One source terminal of transistor T803 is connected, preferably connected, to terminal DZ_LS_800, and one drain terminal of transistor T803 is connected, preferably connected, to one terminal of resistor R804. A second terminal of resistor R804 is connected, preferably connected, to one drain terminal of transistor T805 and to one gate terminal of transistor T805. One source terminal of transistor T804 is connected, preferably connected, to terminal DZ_LS_800, and one drain terminal of transistor T804 is connected, preferably connected, to one terminal of resistor R805. A second terminal of resistor R805 is connected, preferably connected to a drain terminal of transistor T806 and to a gate terminal of transistor T806.The source terminals of transistors T805 and T806 are connected together and to terminal SGND_HS_800. One gate terminal of the transistor receives a voltage from the voltage source Supp801. The voltage source Supp801 is referenced to terminal SGND_LS_800. One gate terminal of transistor T804 is connected, preferably, to terminal PWM_800.

[0132] The circuit 800 further includes an e-mode HEMT transistor. A source terminal of transistor T807 is preferably connected to terminal SGND_HS_800. A gate terminal of transistor T807 is connected to the drain terminal of transistor T806. Transistor T807 is adapted to supply current and is considered as an output of a current source. In one embodiment, transistor T807 forms an output of the current source CS702 described in relation to [Fig. 7].

[0133] The circuit 800 further comprises, between terminals VCC_HS_800 and SGND_LS_800, three resistors R806, R807, and R808, and two e-mode HEMT transistors T808 and T809. One terminal of resistor R806 is connected, preferably connected, to terminal VCC_HS_800, and a second terminal of resistor R806 is connected, preferably connected, to a first terminal of resistor R807. A second terminal of resistor R807 is connected, preferably connected, to a drain terminal of transistor T808. A source terminal of transistor T808 is connected, preferably connected, to a drain terminal of transistor T809. A source terminal of transistor T809 is connected, preferably connected, to a first terminal of resistor R808. A second terminal of resistor R8O8 is connected, preferably connected, to terminal SGND_LS_800. A gate terminal of transistor T8O8 is connected, preferably connected, to terminal DZ_LS_800.Transistors T8O8 and T809 are adapted to supply current and are considered as an output of a current source. In one embodiment, transistors T8O8 and T809 form an output of the current source CS701 described in relation to [Fig. 7].

[0134] The 800 circuit further includes a PWM802 pulse-width modulation circuit. An input of this PWM802 circuit is adapted to receive a control signal supplied by the PWM_800 terminal. An output of this PWM802 circuit is connected, preferably connected, to the gate terminal of transistor T809.

[0135] The 800 circuit further comprises an L801 (LATCH) flip-flop of the type described in relation to [Fig. 6], two resistors R809 and R810, and two e-mode HEMT transistors T810 and T811. One terminal of resistor R809 is connected, preferably connected, to terminal DZ_HS_800, and a second terminal of resistor R809 is connected, preferably connected, to an input terminal of flip-flop L801 and to a drain terminal of transistor T810. A source terminal of transistor T810 is connected, preferably connected, to terminal SGND_HS_800. A gate terminal of transistor T810 is connected, preferably connected, to the second terminal of resistor R806, i.e., to the drain terminal of transistor T807.One terminal of resistor R810 is connected, preferably connected, to terminal DZ_HS_800, and a second terminal of resistor R810 is connected, preferably connected, to a first output terminal of flip-flop L801 and to a drain terminal of transistor T811. A source terminal of transistor T811 is connected, preferably connected, to terminal SGND_HS_800. A gate terminal of transistor T811 is connected, preferably connected, to the second terminal of resistor R801. A second output terminal of flip-flop L801 is adapted to provide a control voltage to a gate control circuit of the type of circuit D701 described in relation to [Fig. 7].

[0136] Fig. 9 represents a more detailed embodiment of a 900 voltage adapter circuit of a converter of the type of converters described in relation to Figures 4 to 6.

[0137] The voltage adapter circuit 900 is of the type of the adapter circuit 515 described in relation to [Fig.5], and more particularly a converter circuit of the type of the adapter circuit ADAPT601 described in relation to [Fig.6].

[0138] The voltage adapter circuit 900 is of the type of the voltage adapter circuit 515 described in relation to [Fig.5] and is formed straddling two chips of the type of chips 510 and 520. More particularly, the portions of circuits 920 are formed in a chip adapted to receive low voltages, hereafter referred to as the low voltage chip, of the type of chip 402 described in relation to [Fig.4] or of the type of chip 520 described in relation to [Fig.5], the rest of the components, referenced 910, are formed in a chip adapted to receive high voltages, hereafter referred to as the high voltage chip, of the type of chip 401 described in relation to [Fig.4] or of the type of chip 510 described in relation to [Fig.5].

[0139] Circuit 900 includes: - a DZ_HS_900 terminal of the type of the DZ_HS_500 terminal described in relation to the [Fig.5]; - a DZ_LS_900 terminal of the type of the DZ_LS_500 terminal described in relation to [Fig.5]; - an OUT_K_900 terminal of the type of the OUT_K_500 terminal described in relation to [Fig.5]; - an SGND_LS_900 terminal of the type of the SGND_500 terminal described in relation to [Fig.5]; - an IN_HS_900 terminal of the type of the IN_HS_500 terminal described in relation to [Fig. 5]; and - a DIAG_HS_900 terminal of the type of the DIAG_HS_500 terminal described in relation to [Fig.5].

[0140] The circuit 900 includes an OSC901 oscillator (OSC), or OSC901 oscillating circuit, an OR logic gate OR901, and an INV901 inverter. The OSC901 oscillator is powered by a potential supplied by the DZ_HS_900 terminal and is referenced to a potential supplied by the OUT_K_900 terminal. A control terminal of the OSC901 oscillator is connected, preferably connected, to the output of the OR901 logic gate. A first input terminal of the OR901 logic gate is adapted to receive an overvoltage detection voltage VDS_HS_900. A second input terminal of the OR901 logic gate is adapted to receive an overheat detection voltage OT_HS_900. An output of the OSC901 oscillator is connected, preferably connected, to an input of the INV901 inverter. The INV901 inverter circuit is powered by a potential supplied by the DZ_HS_900 terminal, and is referenced to a potential supplied by the OUT_K_900 terminal.

[0141] Circuit 900 further comprises a capacitor C901, an e-mode HEMT transistor T901, and a resistor R901. One terminal of capacitor C901 is connected, preferably connected, to the output of the inverter circuit INV901, and a second terminal of capacitor C901 is connected, preferably connected, to a drain terminal of transistor T901. A source terminal of transistor T901 is connected, preferably connected, to a first terminal of resistor R901. A second terminal of resistor R901 is connected, preferably connected, to terminal SGND_LS_900. A gate terminal of transistor T901 is connected, preferably connected, to terminal DZ_LS_900.

[0142] The circuit 900 further comprises two e-mode HEMT transistors, T902 and T904, and a resistor R902. One drain terminal of transistor T902 is connected, preferably connected, to the VCC_LS_900 terminal, and one source terminal of transistor T902 is connected, preferably connected, to one terminal of resistor R902. A second terminal of resistor R902 is connected, preferably connected, to the drain terminal of transistor T904. One source terminal of transistor T904 is connected, preferably connected, to the SGND_LS_900 terminal.

[0143] The circuit 900 further comprises an inverter circuit INV902. An input of the INV902 circuit is connected, preferably connected, to the drain terminal of transistor T904. An output terminal of the INV902 circuit is connected, preferably connected, to the DIAG_HS_900 terminal.

[0144] The circuit 900 further comprises a transistor T903, a capacitor C902, and a resistor R903. One drain terminal of transistor T903 is connected, preferably connected, to the source terminal of transistor T901, and one drain terminal of transistor T903 is connected, preferably connected, to the SGND_LS_900 terminal. The gate terminal of transistor T903 is connected, preferably connected, to a first terminal of capacitor C902. A second terminal of capacitor C902 is connected, preferably connected, to the SGND_LS_900 terminal. One first terminal of resistor R903 is connected, preferably connected, to the gate of transistor T903, and a second terminal of resistor R903 is connected, preferably connected, to the IN_HS_900 terminal.

[0145] The operation of the 900 circuit is as follows. The OSC901 oscillator receives, as input, a fault detection signal obtained from the voltages VDS_HS_900 and OT_HS_901, and provides an oscillating signal as output. More specifically, when the fault detection signal is in a first state, for example a high state, the OSC901 oscillator provides an oscillating signal, or oscillating voltage, as output, and when the fault detection signal is in a second state, different from the first state, for example a In its low state, the OSC901 oscillator provides a constant output signal, that is, a signal that does not exhibit oscillation.

[0146] More specifically, the key element of the 900 circuit is the capacitor C901; it is this capacitor C901 that transfers information by capacitive coupling from the high-voltage chip to the low-voltage chip. The information transfer is carried out with a low-voltage differential voltage, for example, on the order of 6 V, over a common-mode voltage of 400 V. Furthermore, according to one embodiment, the capacitor C901 is formed in and on the low-voltage chip, between metallization levels, for example, between the second and third metallization levels.

[0147] Fig. 10 represents, very schematically and in block form, an embodiment of a 1000 converter of the type of converters described in relation to Figures 4 to 6.

[0148] As described in relation to [Fig.4], the converter 1000 comprises two chips 1010 (Die HS) and 1020 (Die LS) using structures comprising Gallium nitride (GaN), as a structure of the type of structure 100 described in relation to [Fig.1].

[0149] According to one embodiment, chips 1010 and 1020 are identical, that is, they were manufactured using the same manufacturing process and were produced on the same structure. In other words, chips 1010 and 1020 comprise the same electronic circuits and components. Only the component placement may differ from one chip to the other. Furthermore, according to one embodiment, chips 1010 and 1020 are both suitable for use as either a high-voltage or a low-voltage chip.

[0150] Each chip 1010, 1020 includes a main terminal, designated D for chip 1010 and S for chip 1020, and a communication OUT terminal. In one embodiment, chips 1010 and 1020 each include a CONFIG configuration terminal used to define the role of each chip. In particular, the CONFIG terminal allows a chip 1010, 1020 to be configured as a high-voltage chip or a low-voltage chip.

[0151] According to the example illustrated in [Fig. 10], each chip 1010, 1020 further comprises the following terminals: - an ON_HS_LS terminal; - an OFF_HS_LS terminal; - an RST_HS_LS terminal; - a DIAG_HS_LS terminal; - an RST_HS_LS terminal; - an OFF_HS_HS terminal; - an ON_HS_HS terminal; - a VCC terminal; - a VDD terminal; - a DZ terminal; - an EN terminal; - a PWM terminal; - an RST terminal; - a DIAG terminal; and - an SGND terminal.

[0152] To form the converter 1000, the chips 1010 and 1020 are assembled on the same board. Other electronic components can be added to the substrate, as described in relation to [Fig. 5].

[0153] Chips 1010 and 1020 are connected to each other, for example by connecting their OUT communication terminals together. In one example, the ON_HS_LS terminals of chips 1010 and 1020 are also connected to each other. In another example, the OFF_HS_LS terminals of chips 1010 and 1020 are also connected to each other. In another example, the RST_HS_LS terminals of chips 1010 and 1020 are also connected to each other. In another example, the DIAG_HS_LS terminals of chips 1010 and 1020 are also connected to each other.

[0154] Connection terminals of converter 1000 are further connected to the terminals of chips 1010 and 1020. For example: - a VCC_HS terminal of converter 1000 is connected, preferably connected, to the VCC terminal of chip 1010; - a VDD_HS terminal of converter 1000 is connected, preferably connected, to the VDD terminal of chip 1010; - a DZ_HS terminal of converter 1000 is connected, preferably connected, to the DZ terminal of chip 1010; - an SGND_HS terminal of converter 1000 is connected, preferably connected, to the SGND terminal of chip 1010; - a VCC_LS terminal of converter 1000 is connected, preferably connected, to the VCC terminal of chip 1020; - a VDD_LS terminal of converter 1000 is connected, preferably connected, to the VDD terminal of chip 1020; - a DZ_LS terminal of the 1000 converter is connected, preferably connected, to the DZ terminal of the 1020 chip; - an EN terminal of the 1000 converter is connected, preferably connected, to the EN terminal of the 1020 chip; - a PWM terminal of converter 1000 is connected, preferably connected, to the PWM terminal of chip 1020; - an RST terminal of the 1000 converter is connected, preferably connected, to the RST terminal of the 1020 chip; - a DIAG terminal of converter 1000 is connected, preferably linked, to the DIAG terminal of chip 1020; and - an SGND_LS terminal of converter 1000 is connected, preferably connected, to the SGND terminal of chip 1020.

[0155] Thus, a manufacturing process for converter 1000 comprises two identical manufacturing steps for the first and second chips. According to one example, the process further comprises a configuration step using the CONFIG terminals of chips 1010 and 1020.

[0156] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0157] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Voltage converter (400; 500; 600; 1000) formed in and on a monolithic semiconductor substrate (101) having one face covered with a layer of Gallium Nitride (102), comprising: - a first chip (401; 510; 1010) comprising a first HEMT power transistor (T401; T510; T601) of the e-mode type and a first control circuit (D401) of said first transistor (T401; T510; T601); and - a second chip (402; 520; 1020) comprising a second e-mode type HEMT power transistor (T402; T520; T602) and a second control circuit (D402) for said second transistor (T402; T520; T602), and being adapted to transmit at least a first voltage received from a third control circuit (410; 550) to said second chip (402; 520; 1020); wherein said second chip (402; 520; 1020) comprises a first voltage shifter circuit (526; ADAPT601;700) adapted to convert said at least a first voltage into a second voltage, said first voltage shifter circuit (526; LS601; 700) comprising a first current source (CS701) adapted to be used when a third output voltage of said converter (400; 500; 600; 1000) is less than a fourth threshold voltage, and a second current source (CS702) adapted to be used when said third output voltage is greater than said fourth threshold voltage.

2. Converter according to claim 1, wherein the first and second current sources (CS701, CS702) are used to provide a control voltage to said first transistor (T401; T510; T601).

3. Converter according to claim 1 or 2, wherein said fourth threshold voltage is between -5 and 0 V.

4. Converter according to claim 3, wherein said fourth threshold voltage is equal to -2 V.

5. Converter according to any one of claims 1 to 4, wherein the first chip (401; 510; 1010) is adapted to receive high voltages, and the second chip (402; 520; 1020) is adapted to receive low voltages.

6. Converter according to any one of claims 1 to 5, wherein said first chip (401; 510; 1010) further comprises a fourth voltage adapter circuit (515; ADAPT601; 900) adapted to convert at least a fifth voltage of said first chip (401; 510; 1010) into a sixth diagnostic voltage for transmission to said second chip (402; 520; 1020), said fourth voltage adapter circuit (515; ADAPT601; 900) comprising an oscillator (OSC601; OSC901) being configured to oscillate said sixth voltage when said fifth voltage is in a first state.

7. Converter according to claim 6, wherein said oscillator (OSC601; OSC901) is configured not to oscillate said sixth voltage when said fifth voltage is in a second state different from the first state.

8. Converter according to any one of claims 1 to 7, wherein said first and second chips (401, 402; 510, 520; 1010, 1020) are identical chips.

9. Converter according to claim 8, wherein said first and second chips 401, 402; 510, 520; 1010, 1020) each comprise a configuration terminal (CONFIG) enabling them to define their role in said converter.

10. Converter according to any one of claims 1 to 9, being a switching power supply.

11. Converter according to any one of claims 1 to 10, being a boost converter type switching power supply.

12. Method of converting a seventh input voltage into a third output voltage using a voltage converter (400; 500; 600; 1000) formed in and on a monolithic semiconductor substrate (101) having one face covered with a layer of Gallium Nitride (102), comprising: - a first chip (401; 510; 1010) comprising a first HEMT power transistor (T401; T510; T601) of the e-mode type and a first control circuit (D401) of said first transistor (T401; T510; T601); and - a second chip (402; 520; 1020) comprising a second e-mode type HEMT power transistor (T402; T520; T602) and a second control circuit (D402) for said second transistor (T402; T520; T602), and being adapted to transmit to less a first voltage received from a third control circuit (410; 550) to said second chip (402; 520; 1020); wherein said second chip (402; 520; 1020) comprises a first voltage converter circuit (526; ADAPT601; 700) adapted to convert said at least a first voltage into a second voltage, said first voltage converter circuit (526; LS601; 700) comprising a first current source (CS701) adapted to be used when a third output voltage of said converter (400; 500; 600; 1000) is less than a fourth threshold voltage, and a second current source (CS702) adapted to be used when said third output voltage is greater than said fourth threshold voltage.

13. Method of manufacturing a voltage converter (400; 500; 600; 1000) comprising: - a first chip (401; 510; 1010) comprising a first e-mode type HEMT power transistor (T401; T510; T601) and a first control circuit for said first transistor (T401; T510; T601); and - a second chip (402; 520; 1020) comprising a second e-mode type HEMT power transistor (T402; T520; T602) and a second control circuit (D402; 521; D602) for said second transistor (T402; T520; T602); comprising two identical manufacturing steps of the first and second chips (401, 402; 510, 520; 1010, 1020).

14. A method according to claim 13, further comprising a first and second chip configuration step (401, 402; 510, 520; 1010, 1020) which is successive to the two manufacturing steps.

15. Method according to claim 14, wherein during the configuration step a configuration terminal (CONFIG) of said first and second chips (401, 402; 510, 520; 1010, 1020) is used.

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