Substrate comprising a through-hole via and manufacturing method
Patent Information
- Application Number
- GB2022010160
- Authority / Receiving Office
- GB · GB
- Patent Type
- Patents
- Current Assignee / Owner
- Priority Date
- 2020-01-10
- Filing Date
- 2020-12-11
- Publication Date
- 2025-03-19
- Estimated Expiration
- 2040-12-11
AI Technical Summary
Printed circuit boards (PCBs) experience significant energy losses when transmitting high-frequency electromagnetic signals due to limitations in the proximity of conductive through vias, which cannot be minimized further due to manufacturing constraints.
A substrate with a through-hole via is created, comprising a primary hole divided into two separate signal paths by electrically isolating conductive tracks, allowing for improved vertical signal transmission between layers of a PCB.
This configuration enhances the transmission of high-frequency signals by minimizing energy losses and optimizing signal path alignment, effectively addressing the physical limitations of existing PCB designs.
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Abstract
Description
[0001] SUBSTRATE COMPRISING A THROUGH-HOLE VIA AND MANUFACTURING METHOD
[0002] The present invention relates to a substrate and a method, particularly, but not exclusively, the invention concerns the formation of a through hole via within at least a portion of the substrate, wherein the through hole via comprises at least two isolated signal conducting paths. Thus, the present invention enables a substrate and method to create through-PCB (printed circuit board) RF (radio frequency) transition.
[0003] Printed circuit boards (PCBs) typically contain a plurality of 'vias' or holes that extend through the PCB and which may be used for a variety of different purposes. 'Through vias' or 'THRU vias' can be metal plated holes that are used in multilayer PCBs to electrically connect a conductive trace on one layer of a PCB with one or more other layers of a PCB, by providing an electrically conductive conduit therethrough. Two parallel conductive through vias are needed to carry an electromagnetic signal between different layers of a PCB. This electromagnetic signal can be a DC (direct current) signal or an RF (radio frequency) signal. There are high losses associated with the transmission of high frequency signals through the PCB. In order to minimise energy losses, the two conductive through vias are placed as close as possible. However, there are physical limits controlling the proximity of the two through vias. Due to manufacturing limitations, the dimensions of individual vias cannot be further minimised and the separation between vias cannot be reduced further.
[0004] Thus, the aim of the invention is to enable the improved vertical transmission of high frequency electromagnetic signals between layers of a PCB.
[0005] According to a first aspect of the invention, a substrate is provided comprising: a through-hole via, the through-hole via comprising a primary hole defined by an inner surface and having an axis, the through-hole via extending through at least a portion of the substrate; wherein the inner surface is provided with at least two separate conductive tracks such that the through-hole via is divided to form at least two separate signal paths for transmission of signals from one part of the substrate to another; and wherein each conductive track is electrically isolated from the other conductive track(s).
[0006] The term 'via' as used herein refers to 'vertical interconnect access', whereby a hole coated with conductive material enables the vertical transmission of a signal between layers of a substrate.
[0007] According to one embodiment of the first aspect, the through-hole via may extend through the entire substrate.
[0008] According to another embodiment of the first aspect, the substrate may comprise at least one layer, preferably at least two layers, the layer or each layer comprising an insulating portion having a conductive portion on either side. According to this embodiment the insulating portion may comprise a dielectric material. Additionally, according to this embodiment, the conductive portion comprises patterned traces. Further according to this embodiment, the at least two signal paths may extend between different portions of the substrate.
[0009] According to another embodiment of the first aspect, the primary hole may have a uniform cross-section in planes orthogonal to the axis along the entire length of the axis, although non-uniform cross-sections along the axis maybe employed instead. In some circumstances a cone-shaped hole may be preferred to allow for impedance-matching or to allow the via to act as a filter. Preferably the uniform cross-section is circular, although non-circular cross-sections may be employed instead.
[0010] According to a further embodiment of the first aspect, the at least two signal paths may extend substantially parallel to the axis, although it is possible for one or more signal paths to extend at an angle to the axis.
[0011] According to one embodiment of the first aspect, the inner surface of the primary hole may be provided with an electrically conductive coating and the through-hole via may comprise least two secondary holes which extend through the substrate, wherein each secondary hole has an axis and wherein each secondary hole overlaps the primary hole at a respective overlap region, such that the inner surface is interrupted at the respective overlap regions so that electrically conductive coating is not present at the overlap regions and the through- hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
[0012] According to this embodiment of the first aspect, the axes of the primary hole and the secondary holes may be parallel to one another. According to an alternative, however, the axes of the primary hole and one or more secondary hole(s) may be non-parallel to one another. The substrate is typically planar, having substantially parallel planar outer surfaces. Typically the primary hole will be orthogonal to the planar surfaces. In some cases, however, it may be advantageous for the primary hole to be provided at an angle which deviates from 90 degrees to the planar surfaces, so that the length of the primary hole is greater than the thickness of the substrate. Doing so may allow the via to be tailored for impedance-matching or as a filter. Typically the deviation would be up to + / - 15 degrees from the orthogonal. In some cases, it may be advantageous for the primary hole to be curved, again in order to obtain a primary hole whose length is greater than the thickness of the substrate.
[0013] According to one embodiment there are two secondary holes and the axes of the secondary holes and the primary hole are aligned in a plane orthogonal to the axis of the primary hole. According to an alternative embodiment, there are two secondary holes and the axes of the secondary holes and the primary hole are misaligned in a plane orthogonal to the axis of the primary hole.
[0014] According to another embodiment of the first aspect, the through-hole via may be filled with non-conductive material.
[0015] According to another embodiment of the first aspect, the substrate may comprise more than one through-hole via. According to a second aspect of the invention, a printed circuit board (PCB) is provided comprising the substrate of the first aspect of the invention.
[0016] According to a third aspect of the invention, a method of forming a substrate comprising a through-hole via is provided, the through-hole via comprising a primary hole defined by an inner surface and having an axis, the through-hole via extending through at least a portion of the substrate and comprising at least two separate electrically conductive signal paths, the method comprising the steps of: forming a primary hole through at least a portion of the substrate; creating at least two separate conductive tracks along an inner surface of the primary hole, each conductive track being electrically isolated from the other conductive track(s), such that the through-hole via is divided to form at least two separate signal paths for transmission of signals from one part of the substrate to another.
[0017] According to one embodiment of the third aspect, creating at least two conductive tracks along an inner surface of the primary hole comprises depositing electrically conductive coating, preferably a metal, on the inner surface. According to this embodiment, the electrically conductive coating is deposited by a method that comprises anodising, electroplating or a mixture thereof.
[0018] According to another embodiment of the third aspect, creating at least two separate signal conducting paths comprises removing electrically conductive coating along at least two portions, preferably along at least two axially extending portions, of the inner surface.
[0019] According to a first alternative of this embodiment, removing electrically conductive coating along at least two portions of the inner surface comprises forming at least two secondary holes extending through the substrate, wherein each secondary hole has an axis, wherein each secondary hole is formed to overlap the primary hole at a respective overlap region such that the inner surface is interrupted at the respective overlap regions so that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
[0020] According to the first alternative, the method may additionally comprise: a. Filling the primary hole with removable filler prior to forming the at least two secondary holes; b. Removing the removable filler after formation of the at least two secondary holes.
[0021] According to a second alternative of this embodiment removing electrically conductive coating along at least two portions of the inner surface comprises applying a protective mask to the inner surface, except the at least two portions from which electrically conductive coating is to be removed, removing, preferably etching, the electrically conductive coating from the at least two portions while the protective mask protects the remainder of the inner surface, then removing the mask.
[0022] According to another embodiment of the third aspect, the method comprises: a. Providing the through-hole via with at least two secondary holes extending through the substrate, wherein each secondary hole has an axis, wherein each secondary hole is formed to overlap the primary hole at a respective overlap region such that the inner surface is interrupted at the respective overlap regions; b. Filling the secondary holes with removable filler such that the removable filler is present in the overlap regions; c. Depositing an electrically conductive coating, preferably a metal, on the inner surface of the primary hole and on removable filler present in the overlap regions; d. Removing the removable filler including the coated portions, such that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
[0023] According to this embodiment, the method comprising depositing the electrically conductive coating on the inner surface of the primary hole and on removable filler present in the overlap regions by a method that comprises anodising, electroplating or a mixture thereof. According to a fourth aspect of the invention, a method of forming a substrate comprising a through-hole via is provided comprising: a. Providing the through-hole via with at least two secondary holes extending through the substrate, wherein each secondary hole has an axis; b. Filling the secondary holes with removable filler; c. Providing the through-hole via with a primary hole defined by an inner surface and having an axis, the primary hole extending through at least a portion of the substrate, wherein the primary hole is formed to overlap each filled secondary hole at a respective overlap region; d. Depositing an electrically conductive coating, preferably a metal, on the inner surface of the primary hole and on removable filler present in the overlap regions; e. Removing the removable filler including the coated portions, such that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
[0024] According to one embodiment of the fourth aspect, the method comprising depositing the electrically conductive coating on the inner surface of the primary hole and on removable filler present in the overlap regions by a method that comprises anodising, electroplating or a mixture thereof.
[0025] If, according to the third or fourth aspects of the invention, two secondary holes are provided, then: the method may comprise forming the axes of the primary hole and the secondary holes parallel to one another; the method may comprise aligning the axes of the secondary holes with one another and with the axis of the primary hole in a plane orthogonal to the axis of the primary hole; the method may comprise providing the primary hole and the secondary holes such that the axes of the secondary holes and the axis of the primary hole are misaligned in a plane orthogonal to the axis of the primary hole.
[0026] According to one embodiment of the third and fourth aspects, forming the primary hole may comprise drilling the primary hole using a mechanical drill, creating the primary hole by plasma etching, laser-drilling, ion bombardment or by mixtures of these methods. According to another embodiment of the third and fourth aspects forming the secondary holes may comprise drilling the secondary holes using a mechanical drill, creating the primary hole by plasma etching, laser-drilling, ion bombardment or by mixtures of these methods.
[0027] According to a one alternative embodiment of the third and fourth aspects, the secondary holes may have the same size and shape as the primary hole. According to another alternative embodiment of the third and fourth aspects, the secondary holes have a different same size and / or shape than the primary hole.
[0028] According to a further embodiment of the third and fourth aspects, the method may comprise filling the through-hole via with non-conductive solid material, preferably epoxy material.
[0029] Further features and advantages of the present invention will become apparent from the claims and the following description.
[0030] Embodiments of the present invention will now be described by way of example only, with reference to the following diagrams, in which: -
[0031] Figs la and lb are schematic plan and sectional views of a substrate;
[0032] Figs. 2a and 2b are schematic plan and sectional views of the substrate of Fig. 1 with top metal patterning;
[0033] Figs. 3a and 3b are schematic plan and sectional views of a hole drilled through the substrate;
[0034] Figs. 4a and 4b are schematic plan and sectional views of the plated hole of Figs. 3;
[0035] Figs. 5a and 5b are schematic plan and sectional views of a smaller secondary hole drilled at two opposing edges of the primary hole of Figs 4;
[0036] Figs. 6a and 6b are schematic plan and sectional views of the hole of Figs 5 filled with a non- conductive material to form a through hole via with two isolated conductive signal paths; Fig. 7 is a schematic plan view of an alternative embodiment, having two secondary holes drilled at opposing edges of a filled primary hole to create two opposing isolated conduction paths;
[0037] Fig. 8 is a schematic plan view of an alternative embodiment, having two secondary holes drilled and radially offset disposed around an edge of a primary filled hole to create two offset isolated conduction paths;
[0038] Fig. 9 is a schematic plan view of an alternative embodiment having three smaller secondary holes drilled around the edges of a primary filled hole to create three isolated conduction paths through the via;
[0039] Fig. 10 is a schematic plan view of a filled via with two opposing isolated conduction paths; Fig. 11 is a schematic plan view of a top metal layer on a substrate;
[0040] Fig. 12 is a schematic plan view of the substrate of Fig. 11 with a drilled and plated through hole;
[0041] Fig. 13 is a schematic plan view of the through hole of Fig. 12 with two smaller secondary holes drilled at edges thereof to divide the hole and create two arcuate plates along an inner surface of the cylindrical side wall of the primary hole;
[0042] Fig. 14 is a schematic plan view of the through hole of Fig. 13 filled with a non-conductive material;
[0043] Fig. 15 is a schematic plan view of the through hole of Fig. 14 after metal etching to connect the two arcuate plates to a respective metal track;
[0044] Fig. 16 is a schematic plan view of a substrate with top metal patterning forming a conductive oval shape connected to two tracks;
[0045] Fig. 17 is a schematic plan view of the substrate of Fig. 16 with a through hole drilled across the centre of the conductive oval shape to thereby isolate two ends of the oval;
[0046] Fig. 18 is a schematic plan view of the through hole of Fig. 17 filled with a non-conductive material;
[0047] Fig. 19 is a schematic plan view of a substrate with top layer metal patterning in the form of a conductive circular shape joined to two metal tracks;
[0048] Fig. 20 is a schematic plan view of the substrate of Fig. 19 with a hole drilled through the centre of the conductive metal circular shape;
[0049] Fig. 21 is a schematic plan view of the substrate and hole of Fig. 20, wherein the inner surface of the hole has been plated; Fig. 22 is a schematic plan view of the hole of Fig. 21 with a photoresist applied to cover a portion of the hole;
[0050] Fig. 23 is a schematic plan view of the hole of Fig. 22 with metal etched off the area uncovered by the photoresist;
[0051] Fig. 24 is a schematic plan view of the hole of Fig. 23 with the photoresist removed to uncover two arcuate plates extending through the hole; and
[0052] Fig. 25 is a schematic plan view of the hole of Fig. 24 filled with a non-conductive material.
[0053] A substrate in the form of a printed circuit board (PCB) includes at least one layer. Each layer comprises an insulating panel of dielectric material which is clad on one or both sides with a patterned conductive film, which typically takes the form of copper traces. The electrical connection between the conductive films or traces on each side of the insulating panel of a double sided PCB is provided by means of plated through holes or vias in the insulating panel, where the plating is formed from a conductive metal such as copper. A multi-layer PCB is typically fabricated by stacking and gluing together a plurality of double sided PCBs.
[0054] The figures show schematic simplistic representations of the formation of a single through hole via as applied to a single layer of a substrate to aid understanding of the invention. For most applications of the invention and in use, the method of manufacture of the embodiments of the invention may simultaneously or sequentially, be used to form a plurality of through hole vias in multilayer PCBs. The through hole vias may extend through a plurality of layers to provide a vertical conductive paths between different layers of a PCB.
[0055] A first embodiment of a method of manufacture according to the invention is shown in Figures la to 6b. Figures la and lb show a substrate 20 in the form of one layer of a PCB (printed circuit board). The substrate 20 comprises a top and bottom metal film 10, 11 respectively with a dielectric panel 12 located therebetween. Top metal patterning is used to form two tracks 21, 22 extending from a circular conductive patch or annular ring 13, as shown in Figures 2a and 2b. Similar metal patterning is also applied to the lower film 11 to create similar tracks and an annular ring (not shown). A drill 15 is used to drill a cylindrical hole 14 (also known as a 'THRU' or through via) centred within the annular ring 13 as shown in Figures 3a and 3b. An inner surface of the cylindrical hole 14 is plated with conductive metal along its length to create a cylindrical conductive path 16 within the through hole 14 electrically connected to the substantially perpendicular tracks 21, 22 as shown in Figures 4a and 4b. The hole 14 is plated using anodising, or electroplating, so that the cylindrical inner wall of the vertical hole is covered with conductive material to join the top and bottom metallised layer of the substrate 20.
[0056] The through hole 14 is then divided to form two isolated conductive paths. A drill 18 having a smaller diameter is used to drill two secondary vertical holes 17 at diametrically opposing locations through and around the edge of the via 14, such that each secondary hole 17 extends through the substrate 20, part of the circular conductive patch 13, and the cylindrical conductive path 16. The holes 17 are located equidistant between the two tracks 21, 22. This removal of material by the drill 18 creates two separate axial conductive paths 25, 26 along the inner surface of the through hole 14 as shown in Figures 5a and 5b. Thus, the conductivity of the through hole 14 is interrupted by removing the plated core of the inner surface of the hole 14 and surrounding top metal patterning at two diametrically opposite locations to effectively electrically isolate the hole 14 into two separate conducting paths 25, 26 or arcuate metal plates. The through hole 14 is then plugged or filled with non-conductive epoxy 19, or dielectric material as shown in Figures 6a and 6b to form a through hole via 30 in the substrate 20 according to the invention.
[0057] The final step involving plugging or filling the through hole 14 is optional. Thus, the through hole 14 may be filled with a non-conductive substance such as air as shown in Figures 5 or the hole is plugged according to Figures 6 with a non-conductive material 19.
[0058] The above described method of manufacture results in a through hole via 30 as shown in Figures 5 or 6, with two separate axial conduction paths 25, 26 through the via vertically electrically connecting the respective tracks 21, 22 to tracks on a different vertical portion of the substrate 20. The two conduction paths 25, 26 are electrically isolated from one another. This first embodiment effectively 'splits’ a single via into two separate isolated conducting paths 25, 26. A number of different embodiments of the invention are described subsequently. In order to minimise repetition, similar features of the different embodiments are numbered with a common two-digit reference numeral and are differentiated by another one or two digits placed before the two common digits. Such features are structured similarly, operate similarly, and / or have similar functions unless otherwise indicated.
[0059] An alternative embodiment is shown in Figure 7, in which the same drill 15 is used throughout, to avoid the need for different dill bits 18 in the manufacture of the through hole via 130. The separation, S of the outermost drilled holes 117 must be less than twice the diameter of the drill bit, D. The particular values of D and S determine the characteristic impedance of the transition. These values D, S can therefore be preselected to tailor the characteristics of the via 130 of the invention to each specific application.
[0060] Another embodiment is shown in Figure 8, in which the outlying secondary holes 217 are misaligned to form an asymmetric through hole via 230 with two separate axial conduction paths 225, 226. The separation SI, S2, between the centre of the holes 214, 217 can be different. A drill 15 of the same size or drills of different sizes may be used to drill the through hole 214 and the outlying secondary holes 217 as required.
[0061] According to alternative embodiments, multiple conduction paths can be formed to carry multi-mode signals. Figure 9 shows a through hole via 330 according to the invention and having three substantially horizontal tracks 321, 322, 323 electrically coupled to respective vertical conductive paths 325, 326, 327. Any two of the horizontal tracks 321, 322, 323 and associated vertical conductive paths 325, 326, 327 can be used to carry a differential signal while the remaining one can be used for ground. Again, according to this embodiment, the three outlying secondary holes 317 are drilled to disrupt conductivity of the plated through hole.
[0062] Figure 10 shows an embodiment employing drills 15, 18 having a different size for the primary through hole 414 and the secondary outlying holes 417 of the through hole via 430 according to the invention. D1 and D2 represent the diameters of the first and second drill 15, 18 bits respectively. The diameters D1 and D2 define the separation and the length of the arcs forming each vertical conduction path 425, 426 as well as the size of the gap between each conduction path 425, 426. All these factors determine the inductance (L) and capacitance (C) of the transition and therefore the characteristic impedance of the transition. To maximise power transfer, the characteristic impedance of the transition needs to match with that of the transmission lines at the top and bottom of the substrate at the input and output of the transition.
[0063] An alternative method of manufacture of the invention is shown in the steps of Figures 11 to 15. A substrate 1020 is provided with a top metal film 1010. A cylindrical through hole 1014 is drilled through the substrate 1020. The cylindrical inner wall of the through hole 1014 is then plated 1016 as shown in Figure 12. Two smaller secondary holes 1017 are drilled diametrically opposite one another to remove two axial portions of plating 1016 and create two vertical conduction paths 1025, 1026 along the through hole 1014 as shown in Figure 13. Figure 14 shows the through hole 1014 has been filled or plugged with a non- conductive material 1019, such as non-conductive epoxy, or dielectric material. The final step is the etching of the metal film 1010 of the top surface of the substrate 1020 to create two metal tracks 1021, 1022 electrically connected to the two vertical conductive paths 1025, 1026 respectively.
[0064] The result of the above described method of manufacture is a single via 1030 according to the invention containing two arcuate vertical conduction paths 1025, 1026 that are separate and isolated from one another.
[0065] Another embodiment of a method of manufacture is shown in Figures 16 to 18. A top surface of the substrate 2020 is etched to form horizontal metal tracks 2021, 2022 connected to an oval metal patch 2013 as shown in Figure 16. Similar metal patterning is applied to the bottom of the substrate (not shown). A cylindrical through hole 2014 is then drilled through a centre of the oval patch 2013 and an axial part of the sidewalls of the cylindrical through hole 2014 is plated to create two opposing isolated parallel conduction paths 2025, 2026 as shown in Figure 17. The resulting through hole 1014 may then be filled with non-conductive epoxy, or dielectric material as shown in Figure 18. The above described method of manufacture shows that the order of the method steps may be altered to create a through hole via 2030 according to the invention having two isolated separate vertical conduction paths 2025, 2026 extending therethrough to each carry a signal in use.
[0066] An alternative method of manufacture is shown in Figures 18 to 25. The substrate 4020 is subject to top metal patterning to form horizontal metal tracks 4021, 4022 connected to a circular conductive patch or annular ring 4013 as shown in Figure 19. Similar metal tracks and an annular ring are applied to the bottom surface of the substrate (not shown). A cylindrical through via 4014 is then drilled through the substrate 4020 centred on the circular conductive patch or annular ring 4013 as shown in Figure 20. The through via 4014 is then plated 4016 as shown in Figure 21. A photoresist 4040 is deposited, and a lithograph process is used to create a pattern to cover the tracks 4021, 4022 and a part of central region of the through hole 4014. The photoresist 4040 is arranged to fully cover the desired area and unwanted photoresist 4040 is completely removed as shown in Figure 22. All metal not covered by the photoresist 4040 is etched off in the next method step. Metal lining the vertical walls of the through hole 4014 is also etched away as shown in Figure 23. The photoresist 4040 is removed to reveal a through hole via 4030 according to the invention with two vertical metal tracks 4021, 4022 leading to two horizontal conductive paths 4025, 4026 electrically isolated from one another as shown in Figure 24. According to the present embodiment, the through hole 4014 is plugged or filled with non-conductive paste 4019.
[0067] Although particular embodiments of the invention have been disclosed herein in detail, this is by way of example and for the purposes of illustration only. The aforementioned embodiments are not intended to be limiting with respect to the scope of the statements of invention. Relative terms such as 'vertical' and 'horizontal' are used illustratively as reference terms only and are not intended to be limiting.
[0068] It is contemplated by the inventors that various substitutions, alterations, and modifications may be made to the invention without departing from the scope of the invention as defined by the statements of invention. Examples of these include the following: any number of different tracks and / or axial conductive paths can be provided as part of a via forming the apparatus of the invention and as far as manufacturing capability allows.
[0069] The secondary holes formed to isolate the different tracks and conductive paths may be spaced at any location around the primary through hole. The vias forming the apparatus of the invention may be plugged with any type of non-conductive material or may be left so that the air gap acts as an insulator.
[0070] The horizontal metal tracks 21, 22 extending along the top and bottom surfaces of each through hole via 30, 130, 230, 330, 430, 1030, 2030, 3030 may be parallel or lead in any other direction.
[0071] The order of the method steps in the manufacture of through hole vias 30, 130, 230, 330, 430, 1030, 2030, 3030 of the invention may be altered. Once the through hole vias 30, 130, 230, 330, 430, 1030, 2030, 3030 of the invention are created they may be subject to additional manufacturing steps including interconnecting or overlaying with other components.
[0072] Various aspects and embodiments of the invention are defined by the following numbered clauses:
[0073] 1. A substrate comprising: a through hole via extending through at least a portion of the substrate; wherein an inner surface of the through hole via is provided with at least two conductive tracks such that the through hole via is divided to form at least two signal paths for transmission of signals from one part of the substrate to another; and wherein each conductive track is electrically isolated from the other conductive track(s).
[0074] 2. The substrate of clause 1 comprising at least one layer. 3. The substrate of clause 2, wherein the layer comprises an insulating portion having a conductive portion on either side.
[0075] 4. The substrate of clause 4, wherein the insulating portion comprises a dielectric material.
[0076] 5. The substrate of clause 3 or 4, wherein the conductive portion comprises patterned traces.
[0077] 6. The substrate of any preceding clause comprising at least two layers stacked and electrically coupled together.
[0078] 7. The substrate of clause 6, wherein the layers are stacked and adhered together.
[0079] 8. The substrate of any preceding clause comprising a printed circuit board (PCB), preferably a multi-layer PCB.
[0080] 9. The substrate of any of clauses 6 to 8, wherein the at least two signal paths extend between different layers of a substrate.
[0081] 10. The substrate of clause 9, wherein the at least two signal paths extend between different layers of a multi-layer PCB.
[0082] 11. The substrate of any preceding clause, wherein the at least two signal paths are substantially parallel to an axis of the via.
[0083] 12. The substrate of any preceding clause, wherein the at least two signal paths are axially disposed along the length of the inner surface of the via.
[0084] 13. The substrate of any preceding clause, wherein the through hole via is split or otherwise divided to form at least two conductive tracks on the inner surface of the via, to thereby create two or more electrically conductive paths that are isolated from one another, for the transmission of electric signals.
[0085] 14. The substrate of any preceding clause, wherein the at least two conductive tracks on the inner surface of the through hole via comprise at least two arcuate conductive plates extending along a cylindrical sidewall of the via.
[0086] 15. The substrate of clause 14, the arcuate conductive plates located diametrically opposite one another, such that the through hole via is symmetrical.
[0087] 16. The substrate of clause 14, wherein the arcuate conductive plates have different dimensions such that the through hole via is asymmetrical.
[0088] 17. The substrate of clause 14 comprising at least three conductive tracks in the form of arcuate conductive plates, such that the through hole via is capable of carrying multi-mode signals in use.
[0089] 18. The substrate of any preceding clause, wherein the at least two conductive tracks on the inner surface of the through hole via are configured to carry a differential signal.
[0090] 19. The substrate of any preceding clause, wherein one of the conductive tracks of the through hole via is configured to be a ground for the electronic signal.
[0091] 20. The substrate of any preceding clause, wherein at least one of the conductive tracks on the inner surface of the through hole via is electrically connected to a metal track running along the substrate substantially perpendicular to the conductive tracks on the inner surface of the via.
[0092] 21. The substrate of any preceding claim, wherein the through hole via is at least partially filled with non-conductive material. 22. The substrate of clause 21, wherein the non-conductive material filling the through hole via is selected from the group including but not limited to: air; gas; epoxy resin; and dielectric material.
[0093] 23. The substrate of any preceding clause comprising a plurality of through-hole vias.
[0094] 24. The substrate of clause 23, wherein the plurality of through-hole vias is configured to transmit an electric signal between different layers of the substrate.
[0095] 25. A method of forming a through hole via extending through at least a portion of a substrate and comprising at least two electrically conductive signal paths, the method comprising the steps of: forming a hole through at least a portion of the substrate; creating at least two conductive tracks along an inner surface of the hole; and isolating the conductive tracks from one another, to thereby form at least two electrically conductive signal paths.
[0096] 26. The method of clause 25, wherein the step of forming a hole extending through at least part of the substrate includes drilling a through hole via using a drill.
[0097] 27. The method of clause 25, wherein the step of forming a hole through at least part of the substrate includes one of the following techniques: plasma etching; laser drilling; or ion bombardment.
[0098] 28. The method of any of clauses 25 to 27, wherein the inner surface of the hole is substantially perpendicular to end faces of the substrate.
[0099] 29. The method of any of clauses 25 to 28, wherein the step of creating at least two conductive tracks along an inner surface of the hole comprises metal plating at least part of an interior of the hole. 30. The method of any of clauses 25 to 28, wherein the step of creating at least two conductive tracks along an inner surface of the hole comprises metal plating the inner surface of the hole; and dividing the hole into at least two separate conductive signal paths.
[0100] 31. The method of clause 29 or 30, wherein the step of metal plating the inner surface of the hole includes at least one of the following techniques: anodising; and electroplating.
[0101] 32. The method of any of clauses 29 to 31, wherein the step of metal plating the hole includes depositing conductive metal around the cylindrical inner surface of the hole, such that the inner surface of the hole is substantially covered with conductive metal.
[0102] 33. The method of any of clauses 30 to 32, wherein the step of dividing the hole into at least two separate signal conducting paths includes the step of removing material surrounding a portion of an edge of the hole.
[0103] 34. The method of any of clauses 30 to 33, wherein the step of dividing the hole into at least two separate signal conducting paths includes the step of removing conductive metal along at least two axially extending portions of the inner surface of the hole.
[0104] 35. The method of any of clauses 30 to 34, wherein the step of dividing the hole into at least two separate signal conducting paths further includes removing conductive metal from a corresponding surrounding edge of the hole.
[0105] 36. The method of clause 34 or 35, wherein the step of dividing the hole into at least two separate signal conducting paths includes forming at least two secondary holes through an edge of the formed and metal plated hole.
[0106] 37. The method of clause 36, wherein the at least two secondary holes are the same size or have different sizes. The method of clause 36 or 37, wherein the secondary holes are formed by drilling. The method of clause 36 or 37, wherein the secondary holes are formed by one of the following techniques: plasma etching; laser-drilling; or ion bombardment. The method of any of clauses 30 to 39, wherein dividing the hole into two separate signal conducting paths includes the step of dividing the formed plated hole at diametrically opposing locations thereby creating a symmetrical via with two conducting paths. The method of any of clauses 30 to 39, wherein dividing the formed plated hole into at least two separate conducting paths includes the step of dividing the via at two or more different locations around the exterior of the formed hole such that the resulting via with at least two conducting paths is asymmetrical. The method of clause 40 or 41, wherein the step of dividing the formed plated hole into two separate conduction paths includes the step of isolating a portion of the hole and removing metal from the non-isolated portion. The method of clause 42, wherein the step of isolating a portion of the plated hole includes covering a portion of the plated hole. The method of clause 43, wherein the step of isolating a portion of the plated hole includes applying a photoresist across a portion of the hole. The method of clause 42, wherein the step of removing material from the non isolated portion of the hole includes etching the metal surrounding the non-isolated portion of the hole. The method of any of clauses 42 to 45, wherein the step of isolating the signal paths from one another comprises filling the hole with a non-conductive material. The method of clause 46, wherein the non-conductive material is selected from the group including air; gas; epoxy resin; and dielectric material.
Claims
CLAIMS1. A substrate comprising: a through-hole via, the through-hole via comprising a primary hole defined by an inner surface and having an axis, the through-hole via extending through at least a portion of the substrate; wherein the inner surface is provided with at least two separate conductive tracks such that the through-hole via is divided to form at least two separate signal paths for transmission of signals from one part of the substrate to another; and wherein each conductive track is electrically isolated from the other conductive track(s).
2. The substrate of any preceding claim, wherein the through-hole via extends through the entire substrate.
3. The substrate of claim 1 or 2, comprising at least one layer, preferably at least two layers, the layer or each layer comprising an insulating portion having a conductive portion on either side.
4. The substrate of claim 2, wherein the insulating portion comprises a dielectric material.
5. The substrate of claim 3 or 4, wherein the conductive portion comprises patterned traces.
6. The substrate of any preceding claim, wherein the at least two signal paths extend between different portions of the substrate.
7. The substrate of any preceding claim, wherein the primary hole has a uniform cross-section in planes orthogonal to the axis along the entire length of the axis, preferably wherein the uniform cross-section is circular.
8. The substrate of any preceding claim, wherein the at least two signal paths extend substantially parallel to the axis.
9. The substrate of any preceding claim, wherein the inner surface of the primary hole is provided with an electrically conductive coating and wherein the through-hole via comprises least two secondary holes which extend through the substrate, wherein each secondary hole has an axis and wherein each secondary hole overlaps the primary hole at a respective overlap region, such that the inner surface is interrupted at the respective overlap regions so that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
10. The substrate of claim 9, wherein the axes of the primary hole and the secondary holes are parallel to one another.
11. The substrate of claim 9, wherein the substrate is substantially planar and is delimited by a substantially planar first face and, substantially parallel thereto, a substantially planar second face and wherein the primary hole and the secondary holes are provided orthogonal to the substantially planar first and second faces.
12. The substrate of claim 9, wherein the substrate is substantially planar and is delimited by a substantially planar first face and, substantially parallel thereto, a substantially planar second face and wherein the primary hole is provided at an angle which deviates from the orthogonal by up to + / - 15 degrees to the substantially planar first and second faces.
13. The substrate of any of claims 9 to 12, wherein there are two secondary holes and wherein the axes of the secondary holes and the primary hole are aligned in a plane orthogonal to the axis of the primary hole.
14. The substrate of any of claims 9 to 12, wherein there are two secondary holes and wherein the axes of the secondary holes and the primary hole are misaligned in a plane orthogonal to the axis of the primary hole.
15. The substrate of any preceding claim, wherein the through-hole via is filled with non-conductive material.
16. The substrate of any preceding claim, comprising more than one through-hole via.
17. A printed circuit board (PCB) comprising the substrate of any preceding claim.
18. A method of forming a substrate comprising a through-hole via, the through-hole via comprising a primary hole defined by an inner surface and having an axis, the through-hole via extending through at least a portion of the substrate and comprising at least two separate electrically conductive signal paths, the method comprising the steps of: forming a primary hole through at least a portion of the substrate; creating at least two separate conductive tracks along an inner surface of the primary hole, each conductive track being electrically isolated from the other conductive track(s), such that the through-hole via is divided to form at least two separate signal paths for transmission of signals from one part of the substrate to another.
19. The method of claim 18, wherein creating at least two conductive tracks along an inner surface of the primary hole comprises depositing electrically conductive coating, preferably a metal, on the inner surface.
20. The method of claim 19, wherein electrically conductive coating is deposited by a method that comprises anodising, electroplating or a mixture thereof.
21. The method of any of claims 19 or 20, wherein creating at least two separate signal conducting paths comprises removing electrically conductive coating along at least two portions, preferably along at least two axially extending portions, of the inner surface.
22. The method of claim 21, wherein removing electrically conductive coating along at least two portions of the inner surface comprises forming at least two secondary holes extending through the substrate, wherein each secondary hole has an axis, wherein each secondary hole is formed to overlap the primary hole at a respective overlap region such that the inner surface is interrupted at the respective overlap regions so that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
23. The method of claim 22, comprising: a. Filling the primary hole with removable filler prior to forming the at least two secondary holes; b. Removing the removable filler after formation of the at least two secondary holes.
24. The method of claim 21, wherein removing electrically conductive coating along at least two portions of the inner surface comprises applying a protective mask to the inner surface, except the at least two portions from which electrically conductive coating is to be removed, removing, preferably etching, the electrically conductive coating from the at least two portions while the protective mask protects the remainder of the inner surface, then removing the mask.
25. The method of claim 18, comprising: a. Providing the through-hole via with at least two secondary holes extending through the substrate, wherein each secondary hole has an axis, wherein each secondary hole is formed to overlap the primary hole at a respective overlap region such that the inner surface is interrupted at the respective overlap regions; b. Filling the secondary holes with removable filler such that the removable filler is present in the overlap regions; c. Depositing an electrically conductive coating, preferably a metal, on the inner surface of the primary hole and on removable filler present in the overlap regions; d. Removing the removable filler including the coated portions, such that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
26. A method of forming a substrate comprising a through-hole via comprising: f. Providing the through-hole via with at least two secondary holes extending through the substrate, wherein each secondary hole has an axis; g. Filling the secondary holes with removable filler;h. Providing the through-hole via with a primary hole defined by an inner surface and having an axis, the primary hole extending through at least a portion of the substrate, wherein the primary hole is formed to overlap each filled secondary hole at a respective overlap region; i. Depositing an electrically conductive coating, preferably a metal, on the inner surface of the primary hole and on removable filler present in the overlap regions; j. Removing the removable filler including the coated portions, such that electrically conductive coating is not present at the overlap regions and the through-hole via is thereby divided into the at least two separate conductive tracks on the inner surface.
27. The method of claim 25 or 26, comprising depositing electrically conductive coating on the inner surface of the primary hole and on removable filler present in the overlap regions by a method that comprises anodising, electroplating or a mixture thereof.
28. The method of any of claims 22 to 27, comprising forming the axes of the primary hole and the secondary holes parallel to one another.
29. The method of any of claim 22 to 28, wherein there are two secondary holes, comprising aligning the axes of the secondary holes with one another and with the axis of the primary hole in a plane orthogonal to the axis of the primary hole.
30. The method of any of claims 22 to 28, wherein there are two secondary holes and comprising providing the primary hole and the secondary holes such that the axes of the secondary holes and the axis of the primary hole are misaligned in a plane orthogonal to the axis of the primary hole.
31. The method of any of claims 18 to 30, wherein forming the primary hole comprises drilling the primary hole using a mechanical drill, creating the primary hole by plasma etching, laser-drilling, ion bombardment or by mixtures of these methods.
32. The method of any of claims 18 to 31, wherein forming the secondary holes comprises drilling the secondary holes using a mechanical drill, creating the primary hole by plasma etching, laser-drilling, ion bombardment or by mixtures of these methods.
33. The method of any of claims 22 to 32, wherein the secondary holes have the same size and shape as the primary hole.
34. The method of any of claims 22 to 32, wherein the secondary holes have a different same size and / or shape than the primary hole.
35. The method of any of claims 18 to 34 comprising filling the through-hole via with non-conductive solid material, preferably epoxy material.
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