Gate drive circuit

Abstract

To provide a high-side driver for a gate drive circuit using an N-channel MOSFET with a simpler circuit configuration.SOLUTION: A high-side driver circuit is a circuit for driving a power semiconductor switch includes a main switch N-channel MOSFET having a drain terminal connected to the positive side Vdc of a power supply and a source terminal connected to an OUT terminal of a signal that drives the power semiconductor switch, a charge storage circuit that stores charge from Vdc, and a switch with a voltage detection function that detects a voltage difference between an output terminal of the charge storage circuit and Vdc, and applies a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET when it detects that the output terminal voltage of the charge storage circuit has become higher than the voltage of the positive side Vcc of the power supply by a certain voltage or more.SELECTED DRAWING: Figure 1A

Description

[Technical field]

[0001] The present invention relates to a gate drive circuit for driving a power semiconductor switch such as an IGBT. [Background technology]

[0002] Power equipment such as high-power inverters and DC-DC converters often use high-frequency, high-power switching elements. IGBTs (Insulated Gate Bipolar Transistors) or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are often used as high-frequency, high-power switching elements. The input characteristics of the drive terminals (e.g., gate terminals) of such elements are often capacitive, and a large current must flow when they are driven. For this reason, various circuits have been proposed for the purpose of driving these high-frequency, high-power switching elements. Such circuits are often called gate drive circuits. The present invention relates to an improved high-side driver used in such gate drive circuits.

[0003] Conventional technology and its problems Examples of conventional gate drive circuits for driving the high-frequency, high-power switching elements as described above are shown in FIGS. The gate drive circuit 3 shown in Fig. 7 is a circuit that uses a P-channel MOSFET 1 (hereinafter referred to as Q1) as an element that drives an IGBT 2 to the ON state. Q1 is turned ON by making its gate voltage lower than its source voltage. As a result, Q1 becomes conductive and the Vcc voltage appears at the drain terminal. This Vcc voltage is applied to the gate terminal of IGBT 2 via resistor 11 and output terminal 7.

[0004] Therefore, Q1 can be turned on by setting the IN terminal 5 in Fig. 7 to LOW. When Q1 is turned on, IGBT2 can be turned on as described above. In this way, according to the gate drive circuit 3 having the circuit configuration shown in FIG. 7, the IGBT 2 can be turned on (or off) by the input potential of the IN terminal 5. However, P-channel MOSFETs generally have fewer varieties than N-channel MOSFETs and tend to have higher ON resistance, so using an N-channel MOSFET for Q1 in Figure 7 is expected to improve performance as a circuit that turns IGBT2 ON.

[0005] For this reason, a gate drive circuit with the circuit configuration shown in FIG. 8 has also been used. In this circuit configuration, the gate drive circuit 3a is configured using an N-channel MOSFET as Q1a in FIG. 8. To turn on an N-channel MOSFET, its gate potential must be made higher than its source potential. On the other hand, the source voltage of Q1a in FIG. 8 rises to near the positive voltage Vcc of the power supply of the gate drive circuit 3a. The positive voltage Vcc is supplied to the positive voltage terminal 4 in FIG. 8, and similarly in FIG. 7, the positive voltage Vcc is supplied to the positive voltage terminal 4.

[0006] Therefore, a bootstrap circuit and a level shift circuit as described below are configured to generate a high potential for raising the gate potential of Q1a in FIG. 8 to a voltage higher than the source potential. In the example of the circuit configuration shown in Fig. 8, a series circuit of a diode 12 (hereinafter referred to as D1) and a capacitor 13 (hereinafter referred to as C1) is connected between the OUT terminal 7 and the positive voltage terminal 4 as shown in Fig. 8. Then, when the OUT terminal 7 is at the GND potential, charge is stored in C1, and when the IN terminal 5 is set to High and Q1a is turned ON, the output side transistor of a level shift photocoupler 10 (hereinafter referred to as PC1) is turned ON and the charge stored in C1 is applied to the gate terminal of Q1a. As a result, when Q1a is turned ON and the voltage of the OUT terminal 7 rises, the terminal voltage at the point where C1 and the cathode side of D1 are connected becomes higher than Vcc, and a voltage higher than Vcc can be applied to the gate terminal of Q1a.

[0007] According to this method, the high potential power supply that drives Q1a can be made relatively easily using D1 and C1. However, in order to turn Q1a ON using that high voltage power supply, some ingenuity in the circuit is considered necessary. For example, an insulating element such as a photocoupler (PC1 in Figure 8) can be used to isolate the high voltage power supply from the input potential of the IN terminal 5, or a level shift circuit can be used to provide a separate switch that shifts the voltage level from the high voltage power supply. Without such ingenuity, it would be difficult to make a circuit that turns Q1a ON / OFF using the input potential of the IN terminal 5.

[0008] Prior patent technology For example, Patent Document 1 (Japanese Patent No. 6303060) described below discloses a gate drive circuit using a P-channel MOSFET and an N-channel MOSFET. In particular, the circuit configuration is characterized in that an input signal is supplied to the P-channel MOSFET via a level shift circuit.

[0009] Patent Document 2 (JP Patent Publication 2006-270382 A) described later discloses a circuit configuration that uses a level shift circuit capable of high-speed operation in a configuration in which power is supplied to a high-side driver from a floating power supply.

[0010] Patent Document 3 (JP Patent Publication No. 2000-286687) described below discloses a circuit configuration in which power is supplied to a high-side driver from a floating power supply, characterized by the use of a level shift circuit that can prevent malfunction without increasing the chip area or power consumption. [Prior art documents] [Patent documents]

[0011] [Patent Document 1] Patent No. 6303060 [Patent Document 2] JP 2006-270382 A [Patent Document 3] JP 2000-286687 A Summary of the Invention [Problem to be solved by the invention]

[0012] As mentioned above, when a P-channel MOSFET is used as the main switch in a gate drive circuit, the performance is considered to be insufficient, so an N-channel MOSFET is often used, and a high-voltage power supply for driving an N-channel MOSFET can be made relatively easily. However, driving an N-channel MOSFET using that high-voltage power supply requires insulating parts and a voltage shift circuit to eliminate the voltage difference with the input signal, making the circuit complicated and expensive, and it is possible that sufficient improvement cannot be obtained by adopting an N-channel MOSFET. The present invention has been made in view of the above problems, and an object of the present invention is to provide a high-side driver of a gate drive circuit using an N-channel MOSFET with a simpler circuit configuration. [Means for solving the problem]

[0013] (1) In order to solve the above problems, the present invention provides a circuit for driving a power semiconductor switch, comprising: a main switch N-channel MOSFET having a drain terminal connected to a positive side Vdc of a power supply of the circuit and a source terminal connected to an OUT terminal that outputs a signal for driving the power semiconductor switch; a charge storage circuit that injects a current from the positive side Vdc of the power supply of the circuit to store charge; and a switch with voltage detection function that operates by detecting a voltage difference between an output terminal of the charge storage circuit and the positive side Vdc of the power supply of the circuit, wherein the switch with voltage detection function is a high-side driver that applies a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET to turn ON the main switch N-channel MOSFET when it detects that the output terminal voltage of the charge storage circuit has become higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more.

[0014] (2) The present invention also relates to the high-side driver as described in (1) above, comprising: a startup P-channel MOSFET connected in parallel with the main switch N-channel MOSFET, the startup P-channel MOSFET having a source terminal connected to the positive side Vdc of the power supply and a drain terminal connected to the OUT terminal; and an ON signal input terminal to which a signal for turning on the power semiconductor switch is input, the ON signal input terminal being connected to a gate terminal of the startup P-channel MOSFET, wherein when a signal for turning on the power semiconductor switch is input to the ON signal input terminal, the startup P-channel MOSFET turns on, and as a result of the startup P-channel MOSFET turning on, a voltage at the OUT terminal increases, and the switch with voltage detection function detects that the output terminal voltage of the charge storage circuit has become higher by a certain voltage or more than the voltage of the positive side Vdc of the power supply of the circuit, and applies part or all of the output voltage of the charge storage circuit to the gate terminal of the main switch N-channel MOSFET, thereby turning on the main switch N-channel MOSFET.

[0015] (3) The present invention also relates to the high-side driver according to (1) or (2) above, wherein the switch with voltage detection function is an internal switch that turns ON to apply a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET when the switch with voltage detection function detects that the output terminal voltage of the charge storage circuit has become higher by a certain voltage or more than the voltage of the positive side Vdc of a power supply of the circuit.

[0016] (4) The present invention also provides a high-side driver according to any one of (1) to (3) above, comprising: an OFF signal input terminal for inputting a signal for turning off the power semiconductor switch; a voltage conversion circuit connected between a positive side Vdc of a power supply of the circuit and the OFF signal input terminal, the voltage conversion circuit dividing a voltage between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal and / or converting the voltage by subtracting a constant value; a reverse current prevention circuit provided between a gate terminal of the main switch N-channel MOSFET and a gate charge extraction MOSFET, for allowing a current to flow only in a direction from the gate terminal of the main switch N-channel MOSFET to the gate charge extraction MOSFET; and and a gate charge extraction MOSFET having a source terminal connected to the OFF signal input terminal and a gate terminal connected to an output terminal for outputting a voltage converted by the voltage conversion circuit, the drain terminal of the gate charge extraction MOSFET being connected to the gate terminal of the main switch N-channel MOSFET via the backflow prevention circuit, when a signal for operating the power semiconductor switch in an OFF operation is input to the OFF signal input terminal and the voltage of the OFF signal input terminal drops from the positive side Vdc of a power supply of the circuit, an output voltage of an output terminal for outputting the converted voltage of the voltage conversion circuit rises, the charge extraction MOSFET operates ON, and the main switch N-channel MOSFET operates OFF. Effect of the Invention

[0017] According to the present invention, it is possible to provide a high-side driver having a simpler configuration than the conventional one without the need for an insulating element, and further, it is possible to configure a gate drive circuit using the high-side driver. [Brief description of the drawings]

[0018] [Figure 1A] FIG. 2 is an explanatory diagram showing a circuit configuration of Principle 1 in this embodiment. [Figure 1B]FIG. 2 is an explanatory diagram showing a circuit configuration of a modified example of Principle 1 in the present embodiment. [Diagram 2] FIG. 11 is an explanatory diagram showing a circuit configuration of Principle 2 in this embodiment. [Diagram 3] 1 is a graph showing a change in gate voltage when an IGBT or the like transitions to an ON operation. [Figure 4] FIG. 11 is an explanatory diagram showing a circuit configuration of Principle 3 in this embodiment. [Figure 5A] FIG. 2 is a diagram showing a specific example of a charge storage circuit. [Figure 5B] FIG. 2 is a diagram showing a specific example of a charge storage circuit. [Figure 6A] FIG. 2 is a circuit diagram showing an example of a specific circuit configuration of a gate drive circuit in the embodiment. [Figure 6B] FIG. 2 is a circuit diagram showing an example of a specific circuit configuration of a gate drive circuit when a modified example of Principle 1 is used in the present embodiment. [Figure 7] FIG. 1 is a circuit diagram of a conventional gate drive circuit using a P-channel MOSFET. [Figure 8] FIG. 1 is a circuit diagram of a conventional gate drive circuit using an N-channel MOSFET instead of a P-channel MOSFET. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. First, three principles of the present invention will be described, and then a high-side driver of a gate driving circuit, which is a specific embodiment of the present invention, will be described.

[0020] 1.Principle 1 Fig. 1A is a block diagram for explaining Principle 1 for solving the above problems in this embodiment. Fig. 1A illustrates a gate drive circuit 26 according to Principle 1, and also illustrates an IGBT 27 driven by the gate drive circuit 26. For easy understanding, the illustration focuses on the high-side driver, which is a characteristic configuration, and some circuit configuration parts of the gate drive circuit similar to those of the conventional circuit are omitted and not illustrated because they have the same function as the conventional circuit.

[0021] As shown in Fig. 1A, the gate drive circuit 26 in the explanatory diagram of the present principle 1 (Fig. 1A) includes, in addition to the N-channel MOSFET 21 (hereinafter referred to as Q21) which is the main switch, a charge storage circuit 23 and a switch with a voltage detection function 22. Q21 literally corresponds to a suitable example of the main switch N-channel MOSFET in the claims. First, in FIG. 1A, the OUT terminal 25 is an output terminal, and its output voltage swings between a voltage lower than GND and the positive voltage Vdc. The source terminal of Q21, which is the main switch of the gate drive circuit 26 in FIG. 1A, is connected to the OUT terminal 25, and its drain terminal is connected to the positive voltage Vdc. When the gate voltage of Q21 becomes a voltage higher than the OUT terminal 25 (i.e., the source terminal) by Vgson (a constant value), Q21 turns ON, and an output voltage (= approximately Vdc voltage) is output to the OUT terminal 25. Here, Vgson means the gate threshold voltage of Q21.

[0022] The charge storage circuit 23 stores electric charge, but the pins for storing the electric charge and the pins for discharging the electric charge are different. First, when the OUT terminal 25 (pin c connected to it) becomes low potential (= a voltage approximately equal to or lower than GND), it receives a current from pin a connected to the positive voltage Vdc and accumulates charge. Then, the accumulated charge is superimposed on the potential of the OUT terminal 25 and is output from pin b without flowing back to Vdc. Therefore, the potential of pin b becomes higher than the potential of the OUT terminal 25 (the source potential of Q1) by the voltage corresponding to the accumulated charge. Pin b is connected to pin e of switch 22 with voltage detection function, which will be described next. Specific examples of charge accumulation circuit 23 are shown in Figs. 5a and 5b, and will be described in detail later. These specific examples are representative examples, and other circuit configurations may be used.

[0023] Next, in the switch 22 with voltage detection function in FIG. 1A, the pin d is connected to the positive voltage terminal 24 (Vdc), the pin e is connected to the pin b of the charge storage circuit 23, and the pin f is connected to the gate terminal of Q21. Under such a connection relationship, the switch 22 with voltage detection function monitors the voltage between the pin d (i.e., the positive voltage Vdc) and the pin e. When the result of this monitoring is that the voltage of the pin e becomes higher than the voltage of the pin d by a predetermined value or more, that is, when the voltage of the pin e becomes higher than Vdc by a predetermined voltage, the switch 22 with voltage detection function turns on and supplies the voltage of the pin e to the pin f. Since the voltage corresponding to the charge stored in the charge storage circuit 23 is supplied from the pin b to the pin e, by turning on the switch built in the switch 22 with voltage detection function, a part or all of the voltage corresponding to the stored charge can be applied between the gate and source of Q21. As a result, a voltage higher than Vdc is applied to the gate (source) of Q21, and if the gate-source voltage of Q21 is Vgson or higher, Q21 turns ON.

[0024] When the potential of OUT terminal 25 rises from a low potential toward Vdc, charge storage circuit 23 superimposes the voltage between pins b and c on the voltage of OUT terminal 25 due to the charges already stored, and outputs it from pin b. This is because pin c is connected to OUT terminal 25. Since the voltage output in this manner is superimposed on the voltage of OUT terminal 25, if the potential of OUT terminal 25 rises, the voltage of pin b also rises accordingly. When the voltage of OUT terminal 25 approaches Vdc further, the voltage of pin e of switch with voltage detection function 22 rises beyond the voltage of pin d (i.e., the positive voltage Vdc). When the voltage difference reaches a predetermined value, a switch built into switch with voltage detection function 22 turns ON, and a part or all of the output voltage of charge storage circuit 23 is applied to the gate terminal of Q21. In other words, the built-in switch is functionally a switch that connects pin e and pin f, and when this built-in switch is turned on, all or part of the output voltage (pin b = pin e) of the charge storage circuit 23 is supplied to pin f (=gate terminal of Q21). Note that the built-in switch referred to here corresponds to a preferred example of the internal switch in the claims.

[0025] Here, the voltage output to pin b (voltage between pin b and pin c) by the charge stored in the charge storage circuit 23 is V CH The voltage difference exceeding Vdc set in the switch 22 with voltage detection function (threshold voltage) is V DET Let us assume that. Then, the switch built into the switch 22 with voltage detection function turns ON when the voltage V ON is expressed by the following formula (1): When Q21 turns ON, the output voltage of the OUT terminal 25 rises rapidly due to Q21 turning ON, and finally becomes approximately Vdc. VO ON = V DET -V CH +Vdc (1) Here, the voltage between the gate terminal and the source terminal at which Q21 turns ON is Vgson, k is a constant, and the following equation (2) is assumed to hold. V CH>= k × Vgson (2) Here, k is a constant indicating the proportion of the output voltage of the charge storage circuit 23 that is applied to the gate terminal of Q21. k is a constant less than or equal to 1. When the entire output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21, k=1. When 1 / 2 of the output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21, k=1 / 2. In this way, a part or the entire output voltage of the charge storage circuit 23 is applied to the gate terminal of Q21.

[0026] For example, the voltage V at pin b due to the charge stored in the charge storage circuit 23 CH V CH = Vdc, and the threshold voltage of the switch 22 with voltage detection function is V DET = Vdc / 2, then from equation (1), the voltage VO of the OUT terminal 25 at which Q21 turns ON is ON VO ON = Vdc / 2. The output voltage of the OUT pin 25 is VO ON When the voltage reaches Vdc / 2, the built-in switch of the switch 22 with voltage detection function turns ON, and (1 / k)×V CH A voltage equal to the voltage Vcc is applied between the gate and source terminals of Q21. Therefore, if the above formula (2) is satisfied, Q21 turns ON.

[0027] As described above, the high-side driver having the configuration shown in FIG. 1A has the function of autonomously turning on and maintaining the on state when the voltage of OUT terminal 25, which is its own output voltage, reaches or exceeds a certain level, without using an insulating element such as a voltage shift circuit or a photocoupler. As shown in FIG. 1A, the f pin is connected to the gate terminal of Q21. A resistor 29 may be provided between this gate terminal and the source terminal, but this is not an essential configuration.

[0028] 1.2 Variations of Principle 1 In the above-mentioned Principle 1, the terminal c of the charge storage circuit 12 is connected to the OUT terminal 25. Therefore, the voltage rise at the OUT terminal 25 is applied to the terminal c. In contrast, as shown in FIG. 1B, the terminal c of the charge storage circuit 12 may be connected to the OFF signal input terminal 34 instead of the OUT terminal 25. Here, the details of the OFF signal input terminal 34 and the signal input thereto will be explained in detail in FIG. 4 and the explanation of Principle 3 described later. In the case of the circuit based on Principle 1 described in Figure 1A, it is preferable to combine a startup P-channel MOSFET as shown in Figure 2 described later. This configuration allows the IGBT to be driven more rationally. Details will be described later in 2. Principle 2. In contrast, according to the modified example of Principle 1 shown in Fig. 1B (Fig. 1B), unlike the circuit configuration shown in Fig. 1A, it is not necessary to combine a P-channel MOSFET, and a simpler circuit configuration can be achieved, except in cases where the IGBT to be driven must be continuously turned on.

[0029] 2. Principle 2 Fig. 2 is a diagram for explaining another principle 2 of this embodiment, in which a small-capacity semiconductor switch (start-up P-channel MOSFET) is combined with the high-side driver of Fig. 1A described above. This makes it possible to provide a high-side driver of a gate drive circuit that can drive an IGBT more rationally.

[0030] Operation of IGBT The gate circuit of a semiconductor switch such as an IGBT passes through roughly three states when transitioning from OFF to ON. Figure 3 shows a graph that diagrammatically illustrates this process. This graph shows how the gate voltage rises over time. First, in region A, the IGBT is in the OFF operating state, and this is the region where only the gate voltage is rising.

[0031] Region B is the time period when the IGBT transitions from OFF to ON operation. In this region, the rise in gate voltage temporarily slows down. In region B, the transition to ON operation is progressing, and the collector potential of the IGBT drops. Region B is the time period when the discharge current of the IGBT's feedback capacitance needs to be covered, so region B is a time period where a large drive current is required. Generally, the output current of an IGBT gate drive circuit is finite, so a certain amount of time is required for the charge of the feedback capacitance to be discharged. This time period can be considered to be region B. In region C, the voltage between the collector terminal and emitter terminal of the IGBT is almost saturated (the collector potential is sufficiently low). This region C is where only the gate voltage rises further, making the IGBT's ON operating state more certain.

[0032] Concept of Figure 2 (Principle 2) In order to switch an IGBT from an OFF state to an ON state at high speed, it is considered that a sufficiently large drive current is required in region B compared to regions A and C. In consideration of these IGBT characteristics, the high-side driver of the gate drive circuit shown in Figure 2 was independently invented by the present inventor as one circuit that reasonably meets the requirements for raising the gate voltage more quickly. The configuration in Fig. 2 is generally similar to that in Fig. 1, but differs in that a startup P-channel MOSFET 30 is newly added and an ON signal is applied to this startup P-channel MOSFET 30 (hereinafter referred to as Q22). Q22 corresponds to a suitable example of a startup P-channel MOSFET in the claims. The source terminal of Q22 is connected to Vdc (positive voltage terminal 24), and the drain terminal is connected to the OUT terminal 25. A resistor 29b is connected between Vdc and the gate terminal, and an ON signal is supplied to the gate terminal.

[0033] The operation of the circuit configuration in FIG. 2 will now be described. When the ON signal input terminal 28 shown in Fig. 2 goes LOW, Q22 transitions from an OFF state to an ON state. Then, the voltage at the OUT terminal 25 starts to rise toward Vdc. This time period corresponds to area A in Fig. 3. Although omitted in Fig. 2, it is assumed that the IGBT to be driven is connected to the OUT terminal in Fig. 2. Area A here refers to area A of the IGBT to be driven. Now, when the voltage of the OUT terminal (gate voltage of the IGBT not shown) reaches the gate threshold voltage of the IGBT to be driven, it enters region B as described above. At this time, the voltage V of the b pin of the charge storage circuit 23 is turned on so that Q21 of the gate drive circuit turns on. CH and the threshold voltage V of the voltage detection switch DET is appropriately set based on the above-mentioned formulas (1) and (2).

[0034] The term "appropriately set" means that Q21 is set to ON when the IGBT enters region B. Specifically, the gate voltage at which the IGBT to be driven enters region B is expressed as follows: VO ON Vdc is determined by design and V CH is determined from equation (2) using the coefficient k from Vgson of Q21. Therefore, from these values, V in equation (1) DET Each voltage value can be set using this calculation.

[0035] In the high-side driver configured in this way, when the IGBT to be driven enters region B, Q21 turns ON, so that a large current can be supplied to the gate terminal of the IGBT to be driven, and the IGBT to be driven can be driven at high speed. When the charge storage circuit 23 of the high-side driver completely discharges the accumulated charge, the ON operation of Q21 cannot be maintained and Q21 turns OFF. However, if the discharge time constant of the accumulated charge is set to be longer than the time for the IGBT to be driven to pass through region B (see FIG. 3), it is possible to satisfy the requirement for the IGBT to be ON. Once the IGBT to be driven enters region C (see FIG. 3), it is no longer necessary to supply a large current to the gate terminal of the IGBT to be driven, so in region C, it is sufficient for the P-channel MOSFET Q22 to supply a current. In other words, the IGBT can be driven sufficiently.

[0036] In this way, according to the circuit configuration shown in FIG. 2, an N-channel MOSFET (i.e., Q21) capable of handling large currents is used to supply current in region B, and a P-channel MOSFET (i.e., Q22), which has an inferior current value to the N-channel MOSFET but can apply the power supply voltage Vdc with a simple circuit, is used in regions A and C, thereby achieving rational high-speed switching of the IGBT. In addition, the feature common to Fig. 1 that the N-channel MOSFET (Q21) of the main switch can be driven without using a photocoupler or a voltage shift circuit can also be efficiently used in Fig. 2. The present invention (principle 2) can provide an inexpensive gate drive circuit that is suitable for high-speed driving of the IGBT to be driven, and has a simple circuit configuration.

[0037] 3.Principle 3 Up until now, in Principle 1 (Fig. 1A) and Principle 2 (Fig. 2), we have mainly explained circuits that have characteristics in the operation when the IGBT to be driven transitions from OFF operation to ON operation. On the other hand, when the IGBT to be driven transitions from ON operation to OFF operation, usually another circuit must operate to begin drawing out the charge from the IGBT gate circuit. At this time, the OFF operation of the IGBT must not be impeded. The circuit configuration showing the third principle (Fig. 4) is a circuit configuration with high noise resistance that satisfies these requirements. The circuit configuration shown in Fig. 4 is a circuit configuration in which a voltage conversion circuit 31, a gate charge extraction MOSFET 32 (hereinafter referred to as Q32), and a backflow prevention circuit 33 are added to the circuit configuration shown in Fig. 1.

[0038] The g pin of voltage conversion circuit 31 is connected to Vdc, the i pin is connected to OFF signal input terminal 34, and the h pin is connected to the gate terminal of Q32. The source terminal of Q32 is connected to OFF signal input terminal 34, and the drain terminal is connected to backflow prevention circuit 33. The h pin is a so-called output terminal of voltage conversion circuit 31, and corresponds to a suitable example of an output terminal in the claims. One end of reverse current prevention circuit 33 is connected to the drain terminal of Q32, and the other end is connected to the f terminal of switch 22 with voltage detection function, i.e., the gate terminal of Q21. Reverse current prevention circuit 33 may be, for example, a series circuit of a diode and a resistor, and the cathode of the diode may be connected to the drain terminal of Q32 and the anode may be connected to the f pin of switch 22 with voltage detection function.

[0039] In order not to prevent the OFF operation of the IGBT to be driven, Q21 must be rapidly switched to the OFF operating state. When the IGBT to be driven switches from the ON operating state to the OFF operating state, the collector current of the IGBT rapidly decreases, causing noise due to the generated magnetic flux and spike noise due to the wiring inductance of the collector circuit, etc., to occur in the system. This noise may be superimposed on the control circuit and drive circuit, causing the elements that make up the circuit to malfunction. Therefore, the circuit configuration for switching Q21 from the ON operating state to the OFF operating state is required to prevent malfunctions due to noise, and to have a high noise tolerance.

[0040] FIG. 4 shows a circuit configuration with high noise immunity when the N-channel MOSFET 21 (Q21), which is the main switch of the gate drive circuit, is turned OFF. The circuit configuration shown here is characterized in that the OFF signal input terminal 34 is connected to the source terminal of the gate charge extraction MOSFET 32 (Q32). In other words, a characteristic configuration is adopted in which the OFF signal input terminal 34 is connected to the source terminal of Q32, not the gate terminal. The voltage conversion circuit 31 has a voltage conversion function that divides the voltage between the g pin and the i pin and / or converts the voltage by processing such as subtracting a constant value. In other words, the voltage conversion circuit converts the voltage between the g pin and the i pin using a predetermined mechanism, and outputs the converted voltage between the h pin and the i pin. However, the output voltage is a positive voltage. In other words, the h pin is a suitable example of an output terminal in the claims.

[0041] In the example described below, the voltage conversion function will be described as an example of subtracting a constant voltage, but it may be voltage division using resistors etc. (resistive voltage division). For example, if written as an equation, it is as follows. h pin-i pin voltage = g pin-i pin voltage - constant voltage h pin-i pin voltage = (g pin-i pin voltage) × t It may be expressed as follows. Here, the proportionality constant t may be a number in the range of 0 < t ≤ 1. Also, both of the above processes may be applied. That is, after subtracting a constant value, voltage division may be performed. Also, after voltage division, a constant value may be subtracted.

[0042] When the voltage of the OFF signal input terminal 34 is near Vdc, since the voltage between the g pin and the i pin is almost 0V, the voltage between the h pin and the i pin is also almost 0V, and Q32 is in the OFF operation state. When the voltage of the OFF signal input terminal 34 changes in the downward direction from Vdc, a voltage (potential difference) is generated between the g pin and the i pin, so a voltage obtained by converting that voltage is generated between the h pin and the i pin.

[0043] When the voltage of the OFF signal input terminal 34 further decreases, the voltage (difference) between the g pin and the i pin further increases. Accordingly, the voltage between the h pin and the i pin also rises, and when it exceeds the gate threshold voltage of Q32, Q32 operates in the ON state. When Q32 operates in the ON state, the gate charge of Q21 is discharged to the potential of the OFF signal input terminal 34 through the reverse current prevention circuit 33. As a result, the gate potential of Q21 becomes a voltage value that is higher than the potential of the OFF signal input terminal 34 by the voltage drop generated in the reverse current prevention circuit 33. If this gate potential of Q21 is set lower than the gate threshold voltage (Vgson) of Q21, Q21 operates in the OFF state. And as a result of this operation, this bootstrap circuit is in a state that does not prevent the OFF operation of an IGBT (not shown in the figure, which is the IGBT to be driven connected to the OUT terminal 25).

[0044] By operating Q21 in the OFF state, it becomes a state that does not prevent the OFF operation of the IGBT to be driven. However, in order to maintain this state, even when the OUT terminal 25 becomes a Low voltage, the OFF operation state of Q21 must be maintained. Therefore, the Low voltage of the OUT terminal 25 is VO low Let it be, and the voltage drop of the reverse current prevention circuit 22 be V dr Then, the input voltage V of the OFF signal input terminal 34 for operating Q21 in the OFF state INlowmust satisfy the following formula (4). Also, V that satisfies formula (4) INlow Since it is necessary to turn on Q32, when the gate threshold voltage of Q32 is VgsonQ32 and the conversion equation of the voltage conversion circuit 31 is expressed by equation (3), equation (5) must also be satisfied. The input voltage itself of the OFF signal input terminal 34 is V IN Moreover, Vm represents a constant voltage used during conversion in the voltage conversion circuit 31. Moreover, the gate threshold voltage of Q21 is represented by Vgson, as in Principle 1.

[0045] Therefore, assuming the following four conditions, satisfying equations (4) and (5) is the condition for this high-side driver shown in Figure 4 not to interfere with the OFF operation of the IGBT that it drives. (Item 1.) The gate threshold voltage of Q32 is represented as VgsonQ32. (Item 2.) The conversion formula for the voltage conversion circuit 31 is to convert the voltage between pins h and i into V hi Then, it is expressed by the following equation (3). V hi = Vdc - V IN - VM (3) (Item 3.) Set the voltage drop value of the reverse current prevention circuit 33 to V dr Let us assume that. (Item 4.) The voltage of OUT terminal 25 when Q21 is in the OFF state is VO low Then, the above-mentioned formulas (4) and (5) become as follows: V INlow < VO low -V dr + Vgson (4) V INlow < Vdc - Vm - VgsonQ32 (5)

[0046] Here, it is assumed that the input voltage of the OFF signal input terminal 34 is near Vdc (=15V), Q32 is in the OFF state, Q21 is in the ON state, and as a result the output voltage of the OUT terminal 25 is approximately near Vdc. Under this assumption, a command is issued to turn off the IGBT to be driven, and the OUT terminal 25 must be set to -5V or lower. That is, VO low The condition is =< -5V. To avoid interfering with this command, the voltage drop value V of the backflow prevention circuit 33 must be dr If V = 2V and Vgson = 4V, then V INlow < -3V. Furthermore, the gate threshold voltage of Q32 is VgsonQ32 = 4V, and V INlow = -3V, the constant Vm<14V in the conversion equation of the voltage conversion circuit 31 can be obtained from the above equation (5).

[0047] 4, the OFF signal input terminal 34 is connected to the source terminal of the MOSFET 32 (Q32). INlow If the voltage is not varied to this extent, the state of this circuit will not change to a state that does not interfere with the OFF operation of the IGBT to be driven. That is, in the specific examples of each voltage mentioned above, the OFF signal input terminal 34 must be variable from +15V to -3V in order to change state and not prevent the IGBT from turning OFF. This means that a voltage change of 18V is required for the high-side driver in Fig. 4 to change state, and conversely, it means that the state will not change in response to a voltage change (noise) of less than 18V. In other words, it can be said that the noise resistance is extremely high.

[0048] In conventional circuits that have been put to practical use, when trying to turn Q21 OFF, the input signal is often input to the gate terminal of the MOSFET 32 (Q32) for extracting gate charge, and the source terminal of Q32 is connected to a fixed potential, such as Vee (negative voltage). In such cases, the input signal is initially Vee, and to cause a state change (i.e., to turn Q21 OFF), a voltage of about Vee + 5V is applied to the gate terminal of Q32, turning Q32 ON and turning Q21 OFF.

[0049] However, in this configuration, a change in the gate-source voltage of Q32 from 0V to 5V turns Q32 ON, changing the state of the high-side driver. The gate terminal of the MOSFET in particular has high input impedance and is susceptible to noise. In this regard, the circuit shown in Principle 3 (Figure 4) can handle a voltage difference of more than three times, and is clearly superior to conventional methods in terms of noise resistance characteristics.

[0050] 4. Example of a charge storage circuit Specific examples of the charge storage circuit 23 described above are shown in FIG. 5A and FIG. 5B. As shown in FIG. 1, FIG. 2, and FIG. 4, the charge storage circuit 23 has pins a, b, and c. In the circuit shown in Example 1 of FIG. 5A, a series circuit of a diode D1 and a capacitor C1 is provided between pins a and c, and the connection point of the diode D1 and the capacitor C1 is connected to pin b. With this circuit configuration, when pin a is higher than pin c by the voltage drop of the diode D1, charge is stored in the capacitor C1, and as a result, a voltage is generated in the capacitor C1. This voltage appears at pin b (between pin b and pin c). As already described, the voltage appearing at pin b is connected to pin e of the switch 22 with voltage detection function, and is supplied to the gate terminal of Q21 via the switch 22 with voltage detection function.

[0051] The circuit shown in Example 2 in Figure 5A is a circuit in which a Zener diode D2 is connected in series with the diode D1 in the circuit of Example 1. As a result, the capacitor C1 can be charged (charge can be stored) at a lower voltage by the voltage drop of the Zener diode D2. The circuit shown in Example 3 of Fig. 5A is a circuit in which a resistor R1 is connected in series with a diode D1 in the circuit of Example 1. As a result, the charging current can be limited by the value of the resistor R1. The circuit shown in Example 4 in Fig. 5A is a circuit in which a Zener diode D2 and a resistor R1 are connected in series to the diode D1, in addition to the circuit in Example 1. As a result, the capacitor C1 is charged (accumulated) at a voltage lower than the voltage drop of the Zener diode D2, and the charging current can be limited by the value of the resistor R1.

[0052] The circuit shown in Example 5 in Figure 5B is a circuit in which a resistor R2 is connected in parallel to the capacitor C1 in the circuit of Example 1. As a result, the charge accumulated in the capacitor C1 can be discharged, and the voltage output to the b pin can be reduced over time. The circuit shown in Example 6 in Fig. 5B is a circuit in which a resistor R3 is provided between the connection point of the diode D1 and the capacitor C1 and the b pin in addition to the circuit in Example 5. As a result, the value of the current discharged from the b pin can be limited by the value of the resistor R3. The circuit shown in Example 7 in Figure 5B is a circuit in which a Zener diode D3 is connected between pin c and pin b, and resistor R1 is removed from the circuit in Example 6. As a result, the value of the current discharged from pin b can be limited by the value of resistor R3, and the voltage output from pin b can be limited to the voltage drop generated in Zener diode D3.

[0053] 5. Specific embodiments of the present invention 6A shows a circuit configuration of a gate drive circuit as an example of a specific embodiment of the present invention. In particular, the area enclosed by a dashed line is a gate drive circuit 40, which is a characteristic circuit of this embodiment. Q21 is a P-channel MOSFET as a main switch. A P-channel MOSFET Q44, a diode D4, resistors R3 and R5 constitute a switch 22 with a voltage detection function. Q44 corresponds to a preferred example of an internal switch in the claims.

[0054] The charge storage circuit 23 is composed of a diode D2, a diode D3, and a capacitor C1. The operation of these circuits is as described above. Q22 is a small-capacity semiconductor switch, which corresponds to Q22 in FIG. 2 and operates similarly to Q22 in FIG. 2. Q32 corresponds to Q32 in FIG. 4 and operates similarly to Q32 in FIG. 4. The voltage conversion circuit 31 in FIG. 6A is composed of a diode D1, resistors R2, and R1, and operates similarly to the voltage conversion circuit 31 in FIG. 4. The reverse current prevention circuit 33 is composed of a diode D5 and resistor R4, and operates similarly to the reverse current prevention circuit 33 in FIG. 4.

[0055] The high-side driver of the gate drive circuit 40 shown in Fig. 6A is composed of a single module, and the signal inputs of this module are two types of signals: IN and inverted IN (represented in Fig. 6A by a symbol with a bar above IN). Note that the inverted IN is an inverted signal of the IN signal (see Fig. 6A). The OUT terminal 25 and the IN terminal 45 swing from approximately Vee to Vdc, and the inverted IN terminal 46 swings from Vdc to a voltage intermediate between Vdc and Vee. The external circuit of the gate drive circuit 40 is also shown in FIG. 6A. The control IC 50 is a device that controls the ON / OFF of the power semiconductor switch. The control IC 50 is supplied with Vdc and Vee as power supplies. The control IC 50 is operated by this power supply, generates an IN signal, and supplies it to the IN terminal 45 of the gate drive circuit 40 (see FIG. 6A). The inverter 51 inverts this IN signal to generate an inverted IN signal, and supplies it to the inverted IN terminal 46 of the gate drive circuit 40.

[0056] When the potential of the OUT terminal 25 is approximately Vee, the IN terminal 45 is also at the potential of Vee, Q32 turns ON and Q21 turns OFF. In this state, the voltage of the IN terminal 45 satisfies the conditions of the above-mentioned equations (4) and (5), and does not prevent the OFF operation of the IGBT (not shown) to be driven. At this time, the capacitor C1 of the charge storage circuit 23 is charged by the current that flows from Vdc through the diode D3 and diode D2 to Vee. The charging voltage V of the capacitor C1 C1 is expressed by the following formula (6). C1 is the Zener voltage V of the constant voltage diode D3 zd3 However, the forward voltage drop of the diode D2 can be adjusted by VF D2 Let us assume that. V C1 = Vdc - Vee - V zd3 - VF D2 (6) V in the already explained formula (1) CH V C1 This equation is called equation (7). V C1 = V CH (7)

[0057] This V C1 (= V CH ) is selected to satisfy formula (2) due to the need to apply a gate voltage to Q21 that sufficiently exceeds the gate threshold voltage. When the IN terminal 45 becomes High (≈ Vdc), Q32 turns OFF, and the inverted IN terminal 46 becomes Low (≈ intermediate potential between Vdc and Vee), Q22, a P-channel MOSFET that is a small-capacity semiconductor switch, turns ON. When Q22 turns ON, the voltage at the OUT terminal 25 starts to rise. However, during this period, the IGBT to be driven is still in the OFF state, and only the gate voltage of the IGBT is rising (see region A in FIG. 3 described above). When the voltage at the OUT terminal 25 continues to rise, the charge accumulated in the charge storage circuit 23 causes the voltage at pin b to exceed Vdc and continue to rise. As a result, the voltage between pins e and d of switch with voltage detection function 22 rises.

[0058] The voltage detection switch 22 detects the voltage between pins e and d at its threshold voltage V DET When the voltage of the OUT terminal 25 reaches 0 V, that is, when the voltage of the OUT terminal 25 satisfies the formula (1), the switch Q44 is turned ON. With the ON operation of Q44, the stored voltage V of the charge storage circuit 23 is applied between the gate terminal and the source terminal of the main switch N-channel MOSFET Q21. C1 A voltage multiplied by a constant k is applied, causing Q21 to rapidly transition from OFF to ON operation. When Q21 transitions to ON operation, the IGBT is transitioning from OFF to ON operation, and Q21 handles the large current required to cover the increase in gate current associated with the IGBT's feedback capacitance (see area B in Figure 3). The charge and discharge time constant of capacitor C1 are selected so that they can cover the time period of area B in Figure 3. After the charge in capacitor C1 is discharged and Q21 turns OFF, Q22 secures the gate voltage of the IGBT (see area C in Figure 3).

[0059] Next, when an IGBT is in ON operation and a command to turn the IGBT OFF comes from the system, the IN terminal 45 starts to transition to Low, and the inverted IN terminal 46 transitions to High. When the inverted IN terminal 46 goes High, Q22 turns OFF. The gate drive circuit 40 of this embodiment starts transitioning Q21 from ON to OFF so as not to interfere with the OFF operation of the IGBT. When the IN terminal 45 drops from Vdc toward Vee, a voltage is generated between the g pin and the i pin of the voltage conversion circuit 31. Accordingly, a corresponding output voltage is output between the h pin and the i pin, which are the output of the voltage conversion circuit 31.

[0060] When the voltage drop at the IN terminal 45 progresses and the output voltage of the voltage conversion circuit 31 exceeds the gate threshold voltage of Q32, Q32 turns ON and pulls out the gate charge of the main switch N-channel MOSFET (Q21) via the reverse current prevention circuit 33. As a result, the gate potential of Q21 becomes the sum of the potential at the IN terminal 45 and the voltage drop at the reverse current prevention circuit 33. The conversion equation for the voltage conversion circuit 31 is expressed by the following equation (8) if R1 >> R2. Note that Vhi is the voltage between pin h and pin i, which is the output of the voltage conversion circuit 31. Also, V m is Vz in the following formula (8). D1 is equivalent to. V hi = Vdc - V IN - Vz D1 (8)

[0061] The condition for Q32 to turn ON is shown by the formula (5) already explained. When the IGBT is in OFF state, the low voltage of the OUT terminal 25 is VO low Then, the voltage of IN terminal 45 that maintains the OFF operating state of Q21 even if the voltage of OUT terminal 25 drops is expressed by the above-mentioned formula (4).

[0062] A variation of FIG. 6A The specific embodiment shown in FIG. 6A is an example in which the terminal c of the charge storage circuit 12 is connected to the OUT terminal 25, that is, the circuit configuration shown in FIG. 1A (Principle 1) is used. In response to this, the circuit configuration shown in Fig. 1B (a modified example of Principle 1) may be used. Thus, a circuit diagram of a specific embodiment using the configuration of Fig. 1B is shown in Fig. 6B. That is, as shown in Fig. 6B, the terminal c of the charge storage circuit 12 is connected to the IN terminal 45 instead of the OUT terminal 25. By adopting such a configuration, as explained in "1.2 Variations of Principle 1", it becomes unnecessary to combine a P-channel MOSFET, and it is possible to make the circuit configuration simpler. This means that, in the case of Fig. 6B, the circuit consisting of resistors R7 and Q22 is not necessarily required.

[0063] 6. Effects and other information As described above, the high-side driver and the gate drive circuit including the high-side driver in this embodiment provide the following advantages. The voltage generated by the charge storage circuit 23 is supplied to the main switch by using the switch 22 with voltage detection function. Therefore, the main switch is autonomously turned on by the output voltage, so there is no need to use a voltage shift circuit or an insulating element, and the circuit configuration can be simplified. Furthermore, by adopting a more rational driving method in consideration of the operating characteristics of the power semiconductor switch to be driven, it is possible to provide an inexpensive gate drive circuit that is suitable for high-speed driving of power semiconductor switches and has a simple circuit configuration. In addition, it is possible to provide a circuit that does not hinder the OFF operation of the power semiconductor switch to be driven, and further, it is possible to provide a circuit that has superior noise resistance compared to conventional circuits. The above-described embodiment is an example of a means for realizing the present invention, and should be appropriately modified or changed depending on the configuration of the device to which the present invention is applied and various conditions, and the present invention is not limited to the aspects of the present embodiment. For example, in the above-described embodiment, IGBTs have been mainly described as the power semiconductor switch to be driven, but the present invention can also be applied to other power semiconductor switches. The configurations of the charge storage circuit and the switch circuit with voltage detection function are merely examples, and other circuits having similar functions may be used. Furthermore, in this embodiment (the present invention), MOSFETs are used as the main components, but other configurations may be used as long as they provide similar effects. For example, various semiconductor switches or switches made of other materials may be used. [Explanation of symbols]

[0064] 1 P-channel MOSFET 1a N-channel MOSFET 2 IGBT 3. 3a Gate drive circuit 4 Positive voltage terminal 5 IN terminal 6, 8 GND terminals 7 OUT terminal 9, 10, 11 Resistor 10 Photocoupler 12 Diodes 13 Capacitor 21 N-channel MOSFET 22 Voltage detection switch 23 Charge storage circuit 24 Positive voltage terminal 25 OUT terminal 26, 26b Gate drive circuit 27 IGBT 28 ON signal input terminal 29, 29b resistance 30 Start-up P-channel MOSFET 31 Voltage conversion circuit 32 MOSFET 33 Backflow prevention circuit 34 OFF signal input terminal 40 Gate drive circuit 50 Control IC 51 Inverter

Claims

1. 1. A circuit for driving a power semiconductor switch, comprising: a main switch N-channel MOSFET having a drain terminal connected to the positive side Vdc of a power supply of the circuit and a source terminal connected to an OUT terminal which is a terminal for outputting a signal for driving the power semiconductor switch; a charge storage circuit connected between a positive side Vdc of a power supply of the circuit and the OUT terminal, which injects a current from the positive side Vdc of the power supply of the circuit based on a voltage between the positive side Vdc of the power supply of the circuit and the OUT terminal, stores charge, and releases the stored charge from an output terminal; a switch with a voltage detection function that detects a voltage difference between the output terminal of the charge storage circuit and a positive side Vdc of a power supply of the circuit and operates in response to the voltage difference; Equipped with When the switch with voltage detection function detects that the output terminal voltage of the charge storage circuit has become higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, the switch with voltage detection function applies a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET, thereby turning on the main switch N-channel MOSFET.

2. 2. The high-side driver of claim 1, a startup P-channel MOSFET connected in parallel with the main switch N-channel MOSFET, the startup P-channel MOSFET having a source terminal connected to the positive side Vdc of the power supply and a drain terminal connected to the OUT terminal; an ON signal input terminal to which a signal for turning on the power semiconductor switch is input, the ON signal input terminal being connected to a gate terminal of the startup P-channel MOSFET; Equipped with When a signal for turning on the power semiconductor switch is input to the ON signal input terminal, the startup P-channel MOSFET is turned on, When the startup P-channel MOSFET is turned on, the voltage of the OUT terminal increases, a high-side driver that detects when the output terminal voltage of the charge storage circuit becomes higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, and applies a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET, thereby turning on the main switch N-channel MOSFET.

3. 3. The high-side driver according to claim 1, The switch with a voltage detection function is an internal switch which, when the switch with a voltage detection function detects that the output terminal voltage of the charge storage circuit has become higher than the voltage of the positive side Vdc of the power supply of the circuit by a certain voltage or more, turns on and applies a part or all of the output voltage of the charge storage circuit to a gate terminal of the main switch N-channel MOSFET; A high-side driver with

4. 4. A high-side driver according to claim 1, an OFF signal input terminal for inputting a signal for turning off the power semiconductor switch; a voltage conversion circuit connected between a positive side Vdc of a power supply of the circuit and the OFF signal input terminal, the voltage conversion circuit dividing the voltage between the positive side Vdc of the power supply of the circuit and the OFF signal input terminal and / or converting the voltage by subtracting a constant value; a backflow prevention circuit provided between a gate terminal of the main switch N-channel MOSFET and a gate charge extraction MOSFET, for allowing a current to flow only in a direction from the gate terminal of the main switch N-channel MOSFET to the gate charge extraction MOSFET; a gate charge extraction MOSFET having a drain terminal connected to the backflow prevention circuit, a source terminal connected to the OFF signal input terminal, and a gate terminal connected to an output terminal that outputs a voltage converted by the voltage conversion circuit; the drain terminal of the gate charge extraction MOSFET is connected to the gate terminal of the main switch N-channel MOSFET via the backflow prevention circuit, A high-side driver in which, when a signal for turning off the power semiconductor switch is input to the OFF signal input terminal, and the voltage of the OFF signal input terminal drops from the positive side Vdc of the power supply of the circuit, the output voltage of the output terminal that outputs the converted voltage of the voltage conversion circuit rises, the charge extraction MOSFET operates ON, and the main switch N-channel MOSFET operates OFF.

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