Wire substrate, mounting substrate having wire substrate, and method for manufacturing wire substrate

Abstract

To provide a wire substrate where an organic layer can be prevented from being removed.SOLUTION: A wire substrate 10 includes: a substrate 12 having a first surface 13 and a second surface 14 located on the opposite side to the side where the first surface is located and including an inorganic material; a first wire structure part 30 including a first-surface first conductive layer 31 and a first-surface first organic layer 32 located in the first surface of the substrate; and a first-surface first underlying layer 371 located between the external edge of the first-surface first organic layer and the first surface of the substrate and including a metal material. The substrate may be provided with a through-hole 20. The wire substrate is located in the through-hole and may further include a through-hole electrode 22 electrically connected to the first-surface first conductive layer.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] An embodiment of the present disclosure relates to a wiring substrate including a first wiring structure including at least a first-surface first conductive layer and a first-surface first organic layer located on a first surface of a substrate. The embodiment of the present disclosure also relates to a mounting substrate including the wiring substrate, and a method for manufacturing the wiring substrate. [Background technology]

[0002] There is known a wiring board including a substrate containing an inorganic material such as glass or silicon, and a conductive layer and an organic layer laminated on the substrate. For example, Patent Document 1 discloses a wiring board further including a through electrode located in a through hole of the substrate, which is a so-called interposer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2015-198093 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the wiring board, the organic layer plays a role of covering and protecting the conductive layer. However, the adhesion of the organic layer to the substrate containing an inorganic material is generally lower than that of the conductive layer to the substrate. Therefore, when the outer edge of the organic layer is in direct contact with the substrate, the outer edge of the organic layer is likely to peel off from the substrate, forming a gap between the organic layer and the substrate.

[0005] An object of the embodiments of the present disclosure is to provide a wiring board that can effectively solve such problems. [Means for solving the problem]

[0006] One embodiment of the present disclosure is a wiring board comprising: a substrate having a first surface and a second surface located opposite the first surface and including an inorganic material; a first wiring structure including at least a first-surface first conductive layer and a first-surface first organic layer located on the first surface of the substrate; and a first-surface first base layer located between an outer edge of the first-surface first organic layer and the first surface of the substrate and including a metal material.

[0007] In the wiring board according to the embodiment of the present disclosure, the dimension of the first surface first foundation layer in the direction in which the outer edge of the first surface first organic layer extends is preferably 100 μm or more.

[0008] In the wiring board according to one embodiment of the present disclosure, the dimension of the portion of the first surface first foundation layer that overlaps with the first surface first organic layer in a direction perpendicular to the outer edge direction is preferably 50 μm or more and 1 mm or less.

[0009] In the wiring board according to one embodiment of the present disclosure, the dimension of the portion of the first surface first underlayer exposed from the first surface first organic layer in a direction perpendicular to the outer edge direction is preferably 50 μm or more and 1 mm or less.

[0010] In a wiring board according to one embodiment of the present disclosure, the ratio of the length of the portion of the outer edge of the first surface first organic layer that overlaps with the first surface first base layer to the total length of the outer edge of the first surface first organic layer is preferably 50% or more.

[0011] In the wiring board according to the embodiment of the present disclosure, the ratio of the thickness of the first surface first foundation layer to the thickness of the first surface first organic layer is preferably 50% or more.

[0012] In a wiring board according to one embodiment of the present disclosure, an outer edge of the first surface first organic layer may have a polygonal contour including a plurality of sides, and a plurality of the first surface first undercoat layers may be discretely arranged along at least one of the sides of the first surface first organic layer.

[0013] In the wiring board according to the embodiment of the present disclosure, the corner where the two sides of the first organic layer on the first surface are connected preferably has a curved shape with a curvature radius of 50 μm or more.

[0014] In a wiring board according to one embodiment of the present disclosure, a gap may exist between a lower surface of the first surface first base layer and the first surface of the substrate, and the first surface first organic layer may be located in the gap.

[0015] In the wiring board according to the embodiment of the present disclosure, the first surface first organic layer may at least partially cover the first surface first conductive layer.

[0016] In the wiring board according to the embodiment of the present disclosure, the first-surface first organic layer may be located between the first-surface first conductive layer and the first surface of the substrate.

[0017] In the wiring board according to the embodiment of the present disclosure, the first surface first foundation layer may be located inside an outer edge of the substrate.

[0018] In the wiring board according to the embodiment of the present disclosure, the first surface first underlayer may have a plurality of layers including a metal material.

[0019] A wiring board according to one embodiment of the present disclosure may further include a first-side second organic layer located on the first-side first organic layer, and a first-side second base layer located between an outer edge of the first-side second organic layer and an upper surface of the first-side first organic layer, the first-side second base layer containing a metal material.

[0020] In the wiring board according to the embodiment of the present disclosure, the substrate may include glass.

[0021] In a wiring board according to one embodiment of the present disclosure, the board may have a through hole, and the wiring board may further include a through electrode located in the through hole and electrically connected to the first surface first conductive layer.

[0022] A wiring board according to one embodiment of the present disclosure may further include a second wiring structure portion including at least a second-side first conductive layer and a second-side first organic layer located on the second side of the substrate, and a second-side first base layer located between an outer edge of the second-side first organic layer and the second side of the substrate and including a metal material.

[0023] One embodiment of the present disclosure is a mounting board including the wiring board described above and an element mounted on the wiring board.

[0024] One embodiment of the present disclosure is a method for manufacturing a wiring board, comprising the steps of: preparing a substrate including a first surface and a second surface located on the opposite side of the first surface; forming a first-side first base layer including a metal material on the first surface of the substrate; forming a first-side first organic layer partially in contact with the first surface of the substrate such that an outer edge of the first-side first organic layer is at least partially located on the first-side first base layer; and forming a first-side first conductive layer before forming the first-side first organic layer or after forming the first-side first organic layer. Effect of the Invention

[0025] According to the embodiment of the present disclosure, peeling of the organic layer can be suppressed. [Brief description of the drawings]

[0026] [Figure 1] FIG. 1 is a plan view showing a wiring board according to an embodiment. [Diagram 2] 2 is a cross-sectional view of the wiring board of FIG. 1 as viewed from the II-II direction. [Diagram 3] 3 is an enlarged cross-sectional view showing a through electrode of the wiring board of FIG. 2. [Figure 4] 3 is an enlarged cross-sectional view showing a first frame of the wiring board of FIG. 2. [Diagram 5] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 6] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 7]5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 8] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 9A] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 9B] FIG. 9B is a plan view of the substrate in the state shown in FIG. 9A. [Figure 10A] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 10B] FIG. 10B is a plan view of the substrate in the state shown in FIG. 10A. [Figure 11] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 12] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 13] 5A to 5C are cross-sectional views showing a manufacturing process of the wiring board. [Figure 14] FIG. 4 is a plan view showing one manufacturing process of the wiring substrate. [Figure 15] FIG. 11 is a cross-sectional view showing a wiring board according to a first modified example. [Figure 16] FIG. 11 is a plan view showing a wiring board according to a second modified example. [Figure 17] FIG. 2 is a plan view showing an example of a mounting board including a wiring board and an element. [Figure 18] 1A and 1B are diagrams illustrating examples of products on which a wiring board is mounted. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] Hereinafter, the configuration of the wiring board according to the embodiment of the present disclosure and the manufacturing method thereof will be described in detail with reference to the drawings. Note that the embodiment shown below is an example of the embodiment of the present disclosure, and the present disclosure is not limited to these embodiments. In addition, in this specification, terms such as "substrate", "base material", "sheet" and "film" are not distinguished from each other based only on the difference in name. For example, "substrate" and "base material" are concepts that include members that can be called sheets and films. Furthermore, terms such as "parallel" and "orthogonal" and values ​​of length and angle, which specify the shape and geometric conditions and their degree, used in this specification, are interpreted to include the range in which similar functions can be expected without being bound by strict meaning. In addition, in the drawings referred to in this embodiment, the same or similar symbols are given to the same parts or parts having similar functions, and repeated explanations thereof may be omitted. In addition, the dimensional ratios of the drawings may differ from the actual ratios for convenience of explanation, and part of the configuration may be omitted from the drawings.

[0028] Wiring Board Hereinafter, an embodiment of the present disclosure will be described. First, a configuration of a wiring board 10 according to the present embodiment will be described. Fig. 1 is a plan view showing the wiring board 10. Fig. 2 is a cross-sectional view of the wiring board 10 of Fig. 1 as viewed from the II-II direction.

[0029] The wiring board 10 includes a substrate 12, a through electrode 22, a first wiring structure portion 30, a first frame body 37, a second wiring structure portion 40, and a second frame body 47. Each of the components of the wiring board 10 will be described below.

[0030] (substrate) The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side to the first surface 13. The substrate 12 also has a plurality of through holes 20 extending from the first surface 13 to the second surface 14.

[0031] The substrate 12 includes an inorganic material having a certain degree of insulating properties. For example, the substrate 12 is a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a silicon substrate, a silicon carbide substrate, an alumina (Al2O3) substrate, an aluminum nitride (AlN) substrate, a zirconia oxide (ZrO2) substrate, or a laminate of these substrates. The substrate 12 may partially include a substrate made of a conductive material, such as an aluminum substrate or a stainless steel substrate.

[0032] An example of the glass used for the substrate 12 is non-alkali glass. The alkali-free glass is glass that does not contain an alkali component such as sodium or potassium. The alkali-free glass contains, for example, boric acid instead of an alkali component. The alkali-free glass also contains an alkaline earth metal oxide such as calcium oxide or barium oxide. Examples of the alkali-free glass include EN-A1 manufactured by Asahi Glass Co., Ltd. and Eagle XG manufactured by Corning Co., Ltd. When the substrate 12 contains glass, the thickness T of the substrate 12 is, for example, 0.25 mm or more and 0.45 mm or less. When the substrate 12 contains glass, the insulating properties of the substrate 12 can be improved compared to when the substrate 12 is made of silicon.

[0033] 2, symbol S1 indicates the width of through hole 20 at the position where through hole 20 is connected to first surface 13. Width S1 is, for example, 40 μm or more and 150 μm or less. Furthermore, the ratio of the length of through hole 20 to width S1 of through hole 20, i.e., the aspect ratio of through hole 20, is, for example, 4 or more and 10 or less.

[0034] The through hole 20 formed in the substrate 12 may at least partially have a shape in which the width decreases from the first surface 13 to the second surface 14 of the substrate 12. In the example shown in FIG. 2, the through hole 20 has a shape in which the width decreases from the first surface 13 and the second surface 14 of the substrate 12 to the central portion in the thickness direction of the substrate 12. As a result, the width of the through hole 20 is smallest at the central portion in the thickness direction of the substrate 12, as shown by the reference symbol S2 in FIG. 2. The "central portion" includes the middle position in the thickness direction of the substrate 12, the range from the middle position to 0.1×T toward the first surface 13 side, and the range from the middle position to 0.1×T toward the second surface 14 side. The reference symbol T represents the thickness of the substrate 12 as described above.

[0035] It should be noted that the cross-sectional shape of through hole 20 is not limited to the shape shown in Fig. 2. For example, although not shown, the width of through hole 20 may decrease from the first surface 13 side toward the second surface 14 side.

[0036] (Through electrode) 3 is an enlarged cross-sectional view of the through electrode 22 provided in the through hole 20. The through electrode 22 is a conductive member that is at least partially located inside the through hole 20. In this embodiment, the thickness of the through electrode 22 is smaller than the width of the through hole 20, and therefore, there is a space inside the through hole 20 where the through electrode 22 is not present. In other words, the through electrode 22 is a so-called conformal via. The thickness of the through electrode 22 is, for example, 5 μm or more and 22 μm or less.

[0037] As long as the through electrode 22 has conductivity, the method of forming the through electrode 22 is not particularly limited. For example, the through electrode 22 may be formed by a physical film formation method such as a vapor deposition method or a sputtering method, or may be formed by a chemical film formation method or a plating method. The through electrode 22 may be composed of a single layer having conductivity, or may include a plurality of layers having conductivity. Here, an example in which the through electrode 22 has a first layer 221 and a second layer 222 as shown in FIG. 3 will be described. The first layer 221 and the second layer 222 each include a metal material.

[0038] The first layer 221 is a layer that is at least partially located on the side wall 21 of the through hole 20 and has electrical conductivity. The first layer 221 is formed on the side wall 21 by a physical film formation method such as a sputtering method or a vapor deposition method, or a sol-gel method. Preferably, the first layer 221 is formed on the side wall 21 by a sputtering method. This allows the first layer 221 to be firmly attached to the side wall 21. The thickness of the first layer 221 is, for example, 0.05 μm or more and 1.0 μm or less. Note that other layers may be provided between the first layer 221 and the side wall 21 of the through hole 20.

[0039] When the first layer 221 is formed by a physical film formation method, the material constituting the first layer 221 may be a metal such as titanium, chromium, nickel, copper, or an alloy using these metals, or a laminate of these metals. When the first layer 221 is formed by a sol-gel method, the material constituting the first layer 221 may be zinc oxide or the like. Note that the first layer 221 may further have, in addition to the sol-gel layer formed by the sol-gel method, an electroless plating layer containing a metal such as copper formed on the sol-gel layer by an electroless plating method.

[0040] The second layer 222 is located on the first layer 221 and is a layer having electrical conductivity. The second layer 222 contains, for example, copper as a main component, more specifically, 80 mass % or more of copper. The second layer 222 may contain metals such as gold, silver, platinum, rhodium, tin, aluminum, nickel, chromium, etc., or alloys using these metals. The second layer 222 is formed on the first layer 221 by electrolytic plating. As a method for analyzing the composition of the second layer 222, for example, a transmission electron microscope (TEM) or an energy dispersive X-ray spectrometer (EDS) can be adopted. The thickness of the second layer 222 is, for example, 5 μm or more and 20 μm or less. Note that another conductive layer may be provided between the first layer 221 and the second layer 222.

[0041] Although not shown, the wiring board 10 may include an organic layer located closer to the center of the through hole 20 than the through electrode 22. Here, "closer to the center" means that, inside the through hole 20, the distance between the organic layer and the side wall 21 is greater than the distance between the through electrode 22 and the side wall 21. The organic layer contains an organic material having a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less, similar to the first surface first organic layer 32 described later.

[0042] Although not shown, the through electrode 22 may be a filled via that fills the through hole 20. In this case, the through electrode 22 extends at least partially to the center point of the through hole 20 in the planar direction of the first surface 13.

[0043] (1st wiring structure part) Next, the first wiring structure 30 will be described. The first wiring structure 30 has layers such as a conductive layer and an organic layer provided on the first surface 13 side of the substrate 12 so as to configure an electrical circuit on the first surface 13 side. In this embodiment, the first wiring structure 30 has a first surface first conductive layer 31, a first surface first organic layer 32, a first surface second conductive layer 33, a first surface second organic layer 34, and a first surface third conductive layer 35.

[0044] [First surface, first conductive layer] The first-surface first conductive layer 31 is a layer that is located on the first surface 13 side of the substrate 12 and contains a metal material having electrical conductivity. In this embodiment, the first-surface first conductive layer 31 is in direct contact with the first surface 13 of the substrate 12. The first-surface first conductive layer 31 may be electrically connected to the through electrode 22. The first-surface first conductive layer 31 may be composed of a single layer having electrical conductivity, or may include a plurality of layers having electrical conductivity. For example, the first-surface first conductive layer 31 may include a first layer 221 and a second layer 222 that are stacked in order on the first surface 13 of the substrate 12, similar to the through electrode 22. The first-surface first conductive layer 31 may include only a part of the conductive layers of the first layer 221 and the second layer 222. The material that constitutes the first-surface first conductive layer 31 is the same as the material that constitutes the through electrode 22. The thickness of the first surface first conductive layer 31 is, for example, not less than 100 nm and not more than 20 μm, and may be not less than 5 μm and not more than 20 μm.

[0045] [First surface, first organic layer] The first-surface first organic layer 32 is located on the first surface 13 side of the substrate 12, contains an organic material, and is an insulating layer. In this embodiment, the first-surface first organic layer 32 is disposed so as to partially cover the upper surface of the first-surface first conductive layer 31. For example, as shown in FIG. 1 and FIG. 2, the first-surface first organic layer 32 is provided over almost the entire first surface 13 of the substrate 12, except for a region close to the outer edge of the substrate 12. For example, when the substrate 12 has a polygonal outline such as a rectangle including a plurality of sides, the first-surface first organic layer 32 also has a polygonal outline such as a rectangle. In addition, as shown in FIG. 2, an opening is formed in a part of the first-surface first organic layer 32, which is located on the first-surface first conductive layer 31.

[0046] The term "upper surface" refers to the surface of a layer stacked on substrate 12 that is located farther from substrate 12. The term "lower surface" refers to the surface of a layer stacked on substrate 12 that is located closer to substrate 12 and is visible when the layer is viewed from the substrate 12 side along the normal direction of first surface 13 of substrate 12. The term "side surface" refers to a surface that extends from the lower surface to the upper surface.

[0047] The organic material of the first-surface first organic layer 32 may be polyimide, epoxy, or the like. The organic material of the first-surface first organic layer 32 has a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. By forming the first-surface first organic layer 32 using an organic material with a small dielectric loss tangent, it is possible to prevent an electric signal that should pass through the inductor 16 (described later) or the like from passing through the first-surface first organic layer 32. This makes it possible to expand the band of the wiring board 10 on which components such as the inductor are provided to the high frequency side.

[0048] Incidentally, the adhesion of the first-side first organic layer 32 containing an organic material to the substrate 12 containing an inorganic material is generally low. Therefore, when the lower surface of the first-side first organic layer 32 directly contacts the first surface 13 of the substrate 12, the first-side first organic layer 32 is likely to peel off from the first surface 13 of the substrate 12. Peeling is particularly likely to occur at the outer edge of the first-side organic layer 32. In order to solve this problem, in this embodiment, it is proposed to provide a first-side underlayer 371 containing a metal material between the outer edge of the first-side organic layer 32 and the first surface 13 of the substrate 12. The first-side underlayer 371 will be described in detail later. In this specification, the "outer edge of the first-side organic layer 32" refers to an edge that defines the outer shape of the first-side organic layer 32 when the first-side organic layer 32 is viewed along the normal direction of the first surface 13 of the substrate 12. The same applies to the outer edge of the substrate 12, the outer edge of the first-side second organic layer 34, and the like.

[0049] When the outer edge of the first-surface first organic layer 32 has a polygonal outline, preferably, corner 32c where two sides of the outer edge of the first-surface first organic layer 32 are connected has a curved shape as shown in Fig. 1. This makes it possible to suppress concentration of forces such as stress at corner 32c, and to suppress peeling of corner 32c from first surface 13 of substrate 12. The radius of curvature of corner 32c is preferably 50 µm or more.

[0050] [First surface, second conductive layer] The first-surface second conductive layer 33 is a layer containing a conductive metal material located on an organic layer such as the first-surface first organic layer 32. The first-surface second conductive layer 33 constitutes, for example, wiring extending on the first-surface first organic layer 32. Although not shown, the first-surface second conductive layer 33 may be electrically connected to the through electrode 22, the first-surface first conductive layer 31, the first-surface third conductive layer 35, and the like. The first-surface second conductive layer 33 may also constitute a part of a component such as a capacitor or inductor formed in the first wiring structure portion 30.

[0051] The first-surface second conductive layer 33 may include a plurality of conductive layers such as a laminated first layer 221 and a second layer 222, similar to the through electrode 22 and the first-surface first conductive layer 31. The material constituting the first-surface second conductive layer 33 is similar to the material constituting the through electrode 22 and the first-surface first conductive layer 31. The thickness of the first-surface second conductive layer 33 is, for example, not less than 100 nm and not more than 20 μm.

[0052] [First surface, second organic layer] The first-surface second organic layer 34 is a layer located on the first surface 13 side, containing an organic material, and having insulating properties. In this embodiment, the first-surface second organic layer 34 is arranged so as to partially cover the upper surface of the first-surface second conductive layer 33 located on the first-surface first organic layer 32. For example, as shown in FIG. 1 and FIG. 2, the first-surface second organic layer 34 is provided over almost the entire upper surface of the first-surface first organic layer 32, except for a region close to the outer edge of the first-surface first organic layer 32. For example, when the first-surface first organic layer 32 has a polygonal outline such as a rectangle including multiple sides, the first-surface second organic layer 34 also has a polygonal outline such as a rectangle. In addition, as shown in FIG. 2, an opening located on the first-surface first conductive layer 31 may be formed in a part of the first-surface second organic layer 34.

[0053] The organic material of the first-surface second organic layer 34 may be polyimide, epoxy, or the like, similar to the first-surface first organic layer 32. The organic material of the first-surface second organic layer 34 preferably has a dielectric tangent of 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less.

[0054] When the outer edge of the first-surface second organic layer 34 has a polygonal outline, preferably, corner 34c where two sides of the outer edge of the first-surface second organic layer 34 are connected has a curved shape, similar to the first-surface first organic layer 32. The radius of curvature of corner 34c is preferably 50 μm or more.

[0055] [First surface, third conductive layer] The first-surface third conductive layer 35 is a layer having conductivity located on an organic layer such as the first-surface second organic layer 34. The first-surface second conductive layer 33 constitutes, for example, wiring extending on the first-surface second organic layer 34. The first-surface third conductive layer 35 may be electrically connected to the through electrode 22, the first-surface first conductive layer 31, the first-surface third conductive layer 35, and the like. In addition, the first-surface third conductive layer 35 may constitute a part of a component such as a capacitor or inductor formed in the first wiring structure portion 30.

[0056] The first-surface third conductive layer 35 may include a plurality of conductive layers such as a laminated first layer 221 and a second layer 222, similar to the through electrode 22 and the first-surface first conductive layer 31. The material constituting the first-surface third conductive layer 35 is similar to the material constituting the through electrode 22 and the first-surface first conductive layer 31. The thickness of the first-surface third conductive layer 35 is, for example, not less than 100 nm and not more than 20 μm.

[0057] (First frame) The first frame 37 is a member for suppressing peeling of an organic layer included in the first wiring-structure portion 30. The first frame 37 includes a first-surface first foundation layer 371 and a first-surface second foundation layer 372. Fig. 4 is an enlarged cross-sectional view showing the first frame 37.

[0058] [First surface, first base layer] The first-surface first underlayer 371 is a layer containing a metal material, located between the outer edge of the first-surface first organic layer 32 and the first surface 13 of the substrate 12. As shown in Fig. 1, the first-surface first underlayer 371 extends along the outer edge direction of the first-surface first organic layer 32. In the example shown in Fig. 1, the first-surface first underlayer 371 extends continuously around the outer edge of the first-surface first organic layer 32.

[0059] The first-side first base layer 371 may be located inside the outer edge of the substrate 12. In other words, an exposed portion R where the first-side first base layer 371 or the organic layer is not present and the first surface 13 is exposed may be present between the outer edge of the first-side first base layer 371 and the outer edge of the substrate 12. The width g of the exposed portion R is, for example, not less than 30 μm and not more than 300 μm.

[0060] The first-surface first base layer 371 may be electrically connected to the first-surface first conductive layer 31, the through electrode 22, etc. Alternatively, the first-surface first base layer 371 may be in an electrically floating state from other conductive layers.

[0061] As long as the first-side first foundation layer 371 includes a metal material, the layer configuration of the first-side first foundation layer 371 is not particularly limited. For example, the first-side first foundation layer 371 may include a first layer 221 and a second layer 222 stacked in order on the first surface 13 of the substrate 12, similar to the through electrode 22. The first-side first foundation layer 371 may include only a part of the conductive layers of the first layer 221 and the second layer 222. The material constituting the first-side first foundation layer 371 is the same as the material constituting the through electrode 22.

[0062] The first-surface first base layer 371 functions to suppress peeling of the outer edge of the first-surface first organic layer 32. The reason for this is not particularly limited, but the following reasons are considered, for example. (Reason 1) Metal materials such as titanium, chromium, nickel, and copper have higher adhesion to inorganic materials such as glass and silicon than organic materials have to inorganic materials. Therefore, by interposing first-side first base layer 371 between the outer edge of first-side organic layer 32 and first surface 13 of substrate 12, it is possible to prevent the outer edge of first-side organic layer 32 from peeling off. (Second reason) 4, the first-side first underlayer 371 is locally interposed between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. In this case, the thickness of the first-side first organic layer 32 overlapping the first-side first underlayer 371 is locally smaller than the thickness of the surrounding first-side organic layer 32, which increases the adhesion between the first-side first organic layer 32 and the first-side first underlayer 371. This makes it possible to prevent the outer edge of the first-side first organic layer 32 from peeling off. In addition, in wiring board 10 having first-surface first base layer 371, improved adhesion may be realized for the first reason described above, or improved adhesion may be realized for the second reason described above, or improved adhesion may be realized for both reasons, or improved adhesion may be realized for some other reason.

[0063] The thickness t1 of the first-side first underlayer 371 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. The ratio of the thickness t1 of the first-side first underlayer 371 to the thickness t2 of the first-side first organic layer 32 is preferably 50% or more. By setting the thickness t1 of the first-side first underlayer 371 in this manner, as described later, it is possible to prevent a layer formed on the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12 so as to straddle the outer edge of the first-side first organic layer 32 in the manufacturing process of the wiring substrate 10 from being interrupted by a step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12.

[0064] In FIG. 4, the symbol W1 represents the dimension of the portion of the first-surface first underlayer 371 that overlaps with the first-surface first organic layer 32 in the direction perpendicular to the outer edge direction of the first-surface first organic layer 32. The dimension W1 is, for example, 50 μm or more and 1 mm or less, and more preferably 100 μm or more and 0.3 mm or less. By setting the dimension W1 to 50 μm or more, it is possible to prevent the outer edge of the first-surface first organic layer 32 from not overlapping with the first-surface first underlayer 371 due to alignment errors when forming the first-surface first organic layer 32 by, for example, a photolithography method. In addition, by setting the dimension W1 to 1 mm or less, it is possible to prevent the region in which the first-surface first conductive layer 31 can be formed from being narrowed by the first-surface first underlayer 371.

[0065] In FIG. 4, the symbol W2 represents the dimension of the portion of the first surface first underlayer 371 exposed from the first surface first organic layer 32 in the direction perpendicular to the outer edge direction of the first surface first organic layer 32. The dimension W2 is, for example, 50 μm or more and 1 mm or less, and more preferably 100 μm or more and 0.3 mm or less. By setting the dimension W2 to 50 μm or more, it is possible to prevent the outer edge of the first surface first organic layer 32 from not overlapping with the first surface first base layer 371 due to alignment errors when forming the first surface first organic layer 32 by photolithography, for example. Furthermore, by setting the dimension W2 to 1 mm or less, it is possible to prevent the dead space from becoming wide from the outer edge of the first surface first organic layer 32 to the outer edge of the substrate 12.

[0066] As shown in FIG. 4, a gap may exist between the lower surface 37a of the first-side first underlayer 371 and the first surface 13 of the substrate 12. The first-side first organic layer 32 may be located in the gap. In this case, the adhesion of the first-side first organic layer 32 to the first-side first underlayer 371 can be increased, for example, by an anchor effect. This is because the first-side first organic layer 32 located in the gap is locked by the lower surface 37a of the first-side first underlayer 371, thereby suppressing the displacement of the first-side first organic layer 32 in the normal direction of the first surface 13 of the substrate 12. The dimension d of the gap between the lower surface 37a of the first-side first underlayer 371 and the first surface 13 of the substrate 12 in the direction perpendicular to the outer edge direction of the first-side first organic layer 32 is, for example, 0.3 μm or more. The gap between the lower surface 37a of the first-side first underlayer 371 and the first surface 13 of the substrate 12 may be caused by side etching of the first-side first underlayer 371 when removing unnecessary portions of the first layer 221 constituting the first-side second conductive layer 33 by etching, as described below. The "lower surface 37a of the first-side first underlayer 371" is a surface of the first-side first underlayer 371 that is visible when the first-side first underlayer 371 is viewed from the substrate 12 side along the normal direction of the first surface 13 of the substrate 12. In the example shown in FIG. 4, the lower surface 37a of the first-side first underlayer 371 includes a portion in contact with the first surface 13 of the substrate 12 and a portion not in contact with the first surface 13 of the substrate 12.

[0067] When the outer edge of the first-side first underlayer 371 has a polygonal outline, preferably, corner 371c where two sides of the outer edge of the first-side first underlayer 371 are connected has a curved shape, similarly to the first-side first organic layer 32. The radius of curvature of corner 371c is preferably 50 μm or more.

[0068] [First side second base layer] The first-surface second underlayer 372 is a layer containing a metal material, located between the outer edge of the first-surface second organic layer 34 and the upper surface of the first-surface first organic layer 32. As shown in Fig. 1, the first-surface second underlayer 372 extends along the direction in which the outer edge of the first-surface second organic layer 34 extends. In the example shown in Fig. 1, the first-surface second underlayer 372 extends continuously around the outer edge of the first-surface second organic layer 34.

[0069] The first-side second base layer 372, like the first-side first base layer 371, may be electrically connected to a part of the first-side first conductive layer 31 or the through electrode 22, or the first-side first base layer 371 may be electrically floating from the other conductive layers.

[0070] The thickness t3 of the first-side second underlayer 372 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. The ratio of the thickness t3 of the first-side second underlayer 372 to the thickness t4 of the first-side second organic layer 34 is preferably 50% or more. By setting the thickness t3 of the first-side second underlayer 372 in this manner, it is possible to prevent the layers formed on the upper surfaces of the first-side second organic layer 34 and the first-side first organic layer 32 so as to straddle the outer edge of the first-side second organic layer 34 in the manufacturing process of the wiring board 10 from being interrupted by a step between the upper surface of the first-side second organic layer 34 and the upper surface of the first-side first organic layer 32.

[0071] The dimension of the first-surface second base layer 372 in a direction perpendicular to the direction in which the outer edge of the first-surface second organic layer 34 extends is the same as that of the first-surface first base layer 371. Also, as in the case of the first-surface first base layer 371, a gap into which the first-surface second organic layer 34 can enter may be formed between the lower surface of the first-surface second base layer 372 and the upper surface of the first-surface first organic layer 32.

[0072] (Second wiring structure part) Next, the second wiring structure 40 will be described. The second wiring structure 40 has layers such as a conductive layer and an organic layer provided on the second surface 14 side of the substrate 12 to configure an electrical circuit on the second surface 14 side. In the present embodiment, the second wiring structure 40 has a second surface first conductive layer 41 and a second surface first organic layer 42.

[0073] [Second surface, first conductive layer] The second-surface first conductive layer 41 is a layer that is located on the second surface 14 of the substrate 12 and contains a metal material having electrical conductivity. In this embodiment, the second-surface first conductive layer 41 is in direct contact with the second surface 14 of the substrate 12. The second-surface first conductive layer 41 may be electrically connected to the through electrode 22. The second-surface first conductive layer 41 may be composed of a single layer having electrical conductivity, or may contain a plurality of layers having electrical conductivity. For example, the second-surface first conductive layer 41 may include a first layer 221 and a second layer 222 that are stacked in order on the second surface 14 of the substrate 12, similar to the through electrode 22. The second-surface first conductive layer 41 may include only a part of the conductive layers of the first layer 221 and the second layer 222. The material that constitutes the second-surface first conductive layer 41 is the same as the material that constitutes the through electrode 22. The thickness of the second-surface first conductive layer 41 is, for example, not less than 100 nm and not more than 20 μm, and may be not less than 5 μm and not more than 20 μm.

[0074] 1 and 2, the first-surface first conductive layer 31, the through electrode 22, and a portion of the second-surface first conductive layer 41 may be connected to form a spiral member, i.e., an inductor 16. By using glass having high insulating properties as the substrate 12 and using an organic material having a small dielectric tangent as the organic layers such as the first-surface first organic layer 32 and the second-surface first organic layer 42, the band of the inductor 16 can be expanded to the high frequency side.

[0075] [Second side, first organic layer] The second-surface first organic layer 42 is located on the second surface 14 side of the substrate 12, contains an organic material, and is an insulating layer. Like the first-surface first organic layer 32 and the first-surface second organic layer 34, the second-surface first organic layer 42 contains an organic material having a dielectric tangent of preferably 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. Like the first-surface first organic layer 32 and the first-surface second organic layer 34, the organic material of the second-surface first organic layer 42 may be polyimide, epoxy, or the like.

[0076] (Second frame) The second frame 47 is a member for preventing peeling of an organic layer included in the second wiring-structure portion 40. The second frame 47 includes a second-surface first base layer 471.

[0077] [Second side, first base layer] The second-surface first underlayer 471 is a layer containing a metal material, located between the outer edge of the second-surface first organic layer 42 and the second surface 14 of the substrate 12. The second-surface first underlayer 471 extends along the direction in which the outer edge of the second-surface first organic layer 42 extends. For example, the second-surface first underlayer 471 extends continuously around the entire circumference so as to surround the outer edge of the second-surface first organic layer 42.

[0078] The second surface first base layer 471 may be electrically connected to the second surface first conductive layer 41 or the through electrode 22, similar to the first surface first base layer 371, or may be electrically floating from the other conductive layers.

[0079] The thickness t5 of the second-side first base layer 471 is, for example, 100 nm or more and 20 μm or less, and may be 5 μm or more and 20 μm or less. Moreover, the ratio of the thickness t5 of the second-side first base layer 471 to the thickness t6 of the second-side first organic layer 42 is preferably 50% or more.

[0080] The dimension of second-surface first underlayer 471 in a direction perpendicular to the direction in which the outer edge of first-surface first organic layer 32 extends is similar to that of first-surface first underlayer 371. Also, similar to the first-surface first underlayer 371, a gap into which second-surface first organic layer 42 can enter may be formed between the lower surface of second-surface first underlayer 471 and second surface 14 of substrate 12.

[0081] Method for manufacturing wiring board An example of a method for manufacturing the wiring board 10 will now be described with reference to FIGS. Here, a method is described in which a plurality of first wiring structure portions 30, a first frame body 37, a second wiring structure portion 40 and a second frame body 47 are formed on one substrate 12, and then the substrate 12 is cut to obtain a plurality of wiring substrates 10.

[0082] (Through hole formation process) First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. After that, an opening is provided in the resist layer at a position corresponding to the through hole 20. Next, the substrate 12 is processed at the opening in the resist layer, thereby forming the through hole 20 in the substrate 12 as shown in FIG. 5. Methods for processing the substrate 12 include dry etching methods such as reactive ion etching and deep reactive ion etching, and wet etching.

[0083] The through holes 20 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, the resist layer does not need to be provided. As a laser for the laser processing, an excimer laser, a Nd:YAG laser, a femtosecond laser, or the like can be used. When an Nd:YAG laser is used, a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, a third harmonic with a wavelength of 355 nm, or the like can be used.

[0084] Laser irradiation and wet etching can also be appropriately combined. Specifically, first, an altered layer is formed in the region of the substrate 12 where the through hole 20 is to be formed by laser irradiation. Then, the substrate 12 is immersed in hydrogen fluoride or the like to etch the altered layer. In this way, the through hole 20 can be formed in the substrate 12. Alternatively, the through hole 20 can be formed in the substrate 12 by a blasting process in which an abrasive is sprayed on the substrate 12.

[0085] By processing the substrate 12 from both the first surface 13 side and the second surface 14 side, it is possible to form a through hole 20 having a shape that becomes narrower toward the center of the thickness direction of the substrate 12, as shown in Figure 5.

[0086] (Through electrode formation process) Next, a through electrode 22 is formed on a side wall 21 of the through hole 20. In the present embodiment, an example will be described in which a first-surface first conductive layer 31 and a first-surface first foundation layer 371 are formed on a portion of the first surface 13 of the substrate 12, and a second-surface first conductive layer 41 and a second-surface first foundation layer 471 are formed on a portion of the second surface 14 of the substrate 12, simultaneously with the through electrode 22.

[0087] First, as shown in FIG. 6, a first layer 221 is formed on the first surface 13, the second surface 14, and the sidewall 21 of the substrate 12 by a physical film formation method, a sol-gel method, an electroless plating method, or the like. The first layer 221 is preferably formed by a physical film formation method, particularly preferably by a sputtering method. This allows the first layer 221 to be firmly attached to the first surface 13, the second surface 14, and the sidewall 21 of the substrate 12. The physical film formation method, such as a sputtering method or a vapor deposition method, is preferably performed from both the first surface 13 side and the second surface 14 side. In this case, the conductive material flying from the first surface 13 side and the conductive material flying from the second surface 14 side are attached to the sidewall 21 of the through hole 20.

[0088] 7, a resist layer 39 is formed partially on the first layer 221. The resist layer 39 may be made of a photosensitive material such as a dry film resist containing an acrylic resin.

[0089] 8, the second layer 222 is formed by electrolytic plating on the first layer 221 that is not covered by the resist layer 39. For example, the substrate 12 is immersed in an electrolytic plating solution containing copper. In addition, a current is passed through the first layer 221. This allows the second layer 222 to be deposited on the first layer 221.

[0090] (Resist and conductive layer removal process) Thereafter, as shown in Fig. 9A, the resist layer 39 is removed. Next, as shown in Fig. 9A, the portion of the first layer 221 covered by the resist layer 39, in other words, the portion of the first layer 221 exposed from the second layer 222, is removed by, for example, wet etching. In this manner, the through electrode 22 including the first layer 221 and the second layer 222, the first surface first conductive layer 31, the first surface first underlayer 371, the second surface first conductive layer 41, and the second surface first underlayer 471 can be formed. Thereafter, a step of annealing the conductive layers such as the second layer 222 may be performed.

[0091] Fig. 9B is a plan view showing substrate 12 in the state shown in Fig. 9A as viewed from the first surface 13 side. As shown in Fig. 9B, a plurality of first-surface first underlayers 371 and first-surface first conductive layers 31 are formed on one substrate 12. Fig. 9A corresponds to a cross-sectional view of substrate 12 shown in Fig. 9B taken along line IX-IX.

[0092] Incidentally, in the process of removing the portion of the first layer 221 covered by the resist layer 39 by wet etching, the second layer 222 is also exposed to the etching solution, and the surface of the second layer 222 is also partially scraped off. As a result, an uneven shape is formed on the upper and side surfaces of the conductive layers, such as the first-surface first conductive layer 31 and the first-surface first base layer 371. The uneven shape makes it easier for an anchor effect to occur between the first-surface first base layer 371 and the first-surface first organic layer 32. In addition, the uneven shape increases the contact area between first-surface first underlayer 371 and first-surface first organic layer 32. This can improve the adhesion between first-surface first underlayer 371 and first-surface first organic layer 32. The same applies to the adhesion between second-surface first conductive layer 41 and second-surface first underlayer 471.

[0093] (Step of forming first organic layer on first surface) Next, as shown in FIG. 10A, the first-side organic layer 32 is formed on the first surface 13 side. For example, first, a first-side film (not shown) having a photosensitive layer containing an organic material and a base material is attached to the first surface 13 side of the substrate 12. Next, the first-side film is subjected to an exposure process and a development process. Thereby, as shown in FIG. 10A and FIG. 10B, the first-side organic layer 32 made of the photosensitive layer of the first-side film and having its outer edge located on the first-side base layer 371 can be formed on the first surface 13 side of the substrate 12. As shown in FIG. 10A, the second-side organic layer 42 may be formed on the second surface 14 side of the substrate 12 and having its outer edge located on the second-side base layer 471.

[0094] The method of forming the first-surface first organic layer 32 and the second-surface first organic layer 42 is not limited to the method of using a film. For example, first, a liquid containing an organic material such as polyimide is applied by a spin coating method or the like, and dried to form an organic layer. Next, the first-surface first organic layer 32 and the second-surface first organic layer 42 can also be formed by subjecting the organic layer to an exposure process and a development process.

[0095] Furthermore, an organic layer may be formed inside the through-hole 20 by allowing a part of the first surface first organic layer 32 or a part of the second surface first organic layer 42 to reach the inside of the through-hole 20 .

[0096] 11, a first layer 221 that functions as a seed layer for the first-side second conductive layer 33 and the first-side second underlayer 372 is formed on the upper surface and side surface of the first-side first organic layer 32, the first surface 13 of the substrate 12, the upper surface and side surface of the second-side first organic layer 42, and the second surface 14 and sidewall 21 of the substrate 12. Here, in this embodiment, the first-side underlayer 371 exists between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. Therefore, compared with the case where the first-side first underlayer 371 does not exist, the step between the upper surface of the first-side first organic layer 32 and the first surface 13 of the substrate 12 can be made smaller, and the first layer 221 can be prevented from being disconnected by the step. Therefore, by connecting a power source to the first layer 221 near the outer edge of the substrate 12, power can be supplied to the first layer 221, and the second layer can be deposited on the first layer 221 by electrolytic plating. FIG. 12 is a cross-sectional view showing a state in which the first-surface second conductive layer 33 including the first layer 221 and the second layer and the first-surface second base layer 372 are provided on the first-surface first organic layer 32.

[0097] 13, a first-surface second organic layer 34 is formed to cover the first-surface second conductive layer 33. The first-surface second organic layer 34 is formed so that its outer edge is located on the first-surface second base layer 372. In addition, a first-surface third conductive layer 35 is formed on the first-surface second organic layer 34. In this manner, a plurality of first wiring structure portions 30 and first frames 37 can be formed on one substrate 12, as shown in FIG.

[0098] Next, the substrate 12 is cut along the cutting lines C. This allows a plurality of wiring substrates 10 to be obtained. In this case, it is preferable that no members such as the first surface first base layer 371 or the organic layer are present in the portion of the substrate 12 that overlaps with the cutting lines C. In other words, it is preferable that the substrate 12 is cut at the exposed portion R.

[0099] The effects brought about by this embodiment will be described below.

[0100] In the present embodiment, a first-side first base layer 371 containing an organic material is located between the outer edge of the first-side first organic layer 32 and the first surface 13 of the substrate 12. Therefore, it is possible to suppress peeling of the first-side first organic layer 32 from the substrate 12, compared to a case in which the outer edge of the first-side first organic layer 32 is in direct contact with the first surface 13 of the substrate 12.

[0101] Furthermore, according to the present embodiment, by providing the first-surface first underlayer 371, it is possible to reduce the step between the upper surface of the first-surface first organic layer 32 and the first surface 13 of the substrate 12. Therefore, when the first layer 221 functioning as a seed layer for the first-surface second conductive layer 33 is formed on the upper surface of the first-surface first organic layer 32 and the first surface 13 of the substrate 12, it is possible to prevent the first layer 221 from being disconnected due to the step between the upper surface of the first-surface first organic layer 32 and the first surface 13 of the substrate 12.

[0102] It should be noted that various modifications can be made to the above-described embodiment. Below, the modified examples will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for the corresponding parts in the above-described embodiment will be used for parts that can be configured in the same manner as in the above-described embodiment, and duplicated descriptions will be omitted. Also, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified examples, the description may be omitted.

[0103] (First Modification of the First Frame) In the above-described embodiment, an example has been shown in which the first-side first organic layer 32, the peeling of which is suppressed by the first-side first underlayer 371, is an organic layer covering the first-side first conductive layer 31 electrically connected to the through electrode 22. In other words, an example has been shown in which the first-side first conductive layer 31 is formed before the first-side first organic layer 32 is formed. However, this is not limited to this, and as shown in FIG. 15, the first-side first organic layer 32, the peeling of which is suppressed by the first-side first underlayer 371, may be an organic layer located between the first-side first conductive layer 31 electrically connected to the through electrode 22 and the first surface 13 of the substrate 12. In other words, the first-side first conductive layer 31 connected to the through electrode 22 may be formed after the first-side first organic layer 32 is formed.

[0104] Furthermore, as shown in FIG. 15 , the second frame 47 may further have, in addition to the above-mentioned second-side first base layer 471, a second-side second base layer 472 located between the outer edge of the second-side second organic layer 44 and the second-side first organic layer 42.

[0105] (Second Modification of the First Frame) In the above-described embodiment, an example in which the first-side first underlayer 371 extends continuously around the outer edge of the first-side first organic layer 32 has been shown, but the present invention is not limited to this. As shown in FIG. 16, a plurality of first-side first underlayers 371 may be arranged discretely along the side of the first-side first organic layer 32. According to the example shown in FIG. 16, the contact area between the first-side first underlayer 371 and the first-side first organic layer 32 can be increased compared to the case in which the first-side first underlayer 371 extends continuously. Therefore, the adhesion between the first-side first underlayer 371 and the first-side first organic layer 32 can be improved.

[0106] In the example shown in FIG. 16, the dimension L of the first surface first foundation layer 371 in the outer edge direction in which the outer edge of the first surface first organic layer 32 extends is preferably 100 μm or more, and more preferably 200 μm or more.

[0107] Furthermore, the ratio of the length of the portion of the outer edge of the first surface first organic layer 32 overlapping with the first surface first base layer 371 to the entire length of the outer edge of the first surface first organic layer 32 is preferably 50% or more. This makes it possible to appropriately suppress peeling of the first surface first organic layer 32.

[0108] 16, a plurality of first-side second underlayers 372 may be discretely arranged along a side of the first-side second organic layer 34. Although not shown, a plurality of second-side first underlayers 471 may be discretely arranged along a side of the second-side first organic layer 42.

[0109] Mounting board 17 is a plan view showing an example of a mounting board 60 including a wiring board 10 and an element 50 mounted on the wiring board 10. The element 50 is an LSI chip such as a logic IC or a memory IC. The element 50 may also be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical components, sensors, actuators, electronic circuits, and the like are integrated on a single substrate. The element 50 has a terminal electrically connected to a conductive layer such as the third conductive layer 35 on the first surface of the wiring board 10.

[0110] Examples of products that incorporate wiring boards 18 is a diagram showing an example of a product in which the wiring board 10 according to the embodiment of the present disclosure can be mounted. The wiring board 10 according to the embodiment of the present disclosure can be used in various products. For example, the wiring board 10 is mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, and the like. [Explanation of symbols]

[0111] 10 Wiring board 12 Substrate 13 Page 1 14 Side 2 16 Inductor 20 Through hole 21 Side wall 22 Through electrode 221 1st layer 222 2nd layer 30 1st wiring structure section 31 First surface first conductive layer 311 Top surface 312 Side 32 1st surface 1st organic layer 32c corner 33 1st surface 2nd conductive layer 34 1st side 2nd organic layer 35 1st surface, 3rd conductive layer 36 1st side 3rd organic layer 37 First Frame 371 1st surface 1st base layer 372 1st side 2nd base layer 39 Resist layer 40 2nd wiring structure section 41 Second surface first conductive layer 42 2nd side 1st organic layer 44 2nd side 2nd organic layer 47 Second Frame 471 2nd side 1st base layer 50 elements 51 Terminal 60 Mounting Board C cutting line

Claims

[Claim 1] a substrate having a first surface and a second surface opposite to the first surface, the substrate including an inorganic material; a first wiring structure including at least a first surface first conductive layer and a first surface first organic layer located on the first surface side of the substrate, and a first surface second conductive layer and a first surface second organic layer located on the first surface first organic layer; a first-surface first underlayer including a metal material and located between an outer edge of the first-surface first organic layer and the first surface of the substrate; a first-surface second underlayer that is located between an outer edge of the first-surface second organic layer and an upper surface of the first-surface first organic layer and that contains a metal material; the first-surface first underlayer extends continuously around an outer edge of the first-surface first organic layer, or a plurality of the first-surface first underlayers are discretely arranged along the outer edge of the first-surface first organic layer, the first-surface second underlayer extends continuously around an outer edge of the first-surface second organic layer, or a plurality of the first-surface second underlayers are discretely arranged along the outer edge of the first-surface second organic layer, A wiring board, wherein a gap exists between a lower surface of the first surface first underlayer and the first surface of the substrate, and the first surface first organic layer is located in the gap.

Images