Atomic Layer Etching with Boron Trichloride

Abstract

A method and apparatus are provided for etching a material using boron trichloride during atomic layer etching, the method including providing a wafer to a process chamber, the wafer having an oxygen-containing material, exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on a surface of the wafer, and exposing the modified oxygen-containing layer to boron trichloride to remove the modified layer from the surface of the wafer.

Description

Incorporation by Reference

[0001] A PCT application is being filed contemporaneously herewith as a part of this application. Each application identified in that contemporaneously filed PCT application to which this application claims benefit or priority is hereby incorporated by reference in its entirety for all purposes.

[0002] The fabrication of semiconductor devices involves the formation of structures that may be sensitive to the etching process, such as exposure to energetic species, and to oxidation, moisture, and additional exposure to energetic species after etching. As a result, some structures undergo post-etch processing to address damage from etching and environmental exposure. However, some methods of post-etch processing, and corresponding apparatus, may not be able to adequately address the damage and exposure to the structures, potentially causing further damage to the structures.

[0003] The background description provided herein is intended to provide a general overview of the contents of the present disclosure. Work by the currently named inventors within the scope of what is described in this Background section, as well as aspects of the description that may not otherwise be regarded as prior art at the time of filing, are not admitted, expressly or impliedly, as prior art against the present disclosure. Summary of the Invention

[0004] One aspect relates to a method for processing a wafer, the method including providing a wafer to a processing chamber, the wafer having an oxygen-containing material, exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on a surface of the wafer, and exposing the modified oxygen-containing layer to boron trichloride to remove the modified layer from the surface of the wafer.

[0005] In various embodiments, exposing the modified oxygen-containing layer is performed in a plasma-free environment.

[0006] In various embodiments, exposing the modified oxygen-containing layer forms a volatile oxychloride.

[0007] In various embodiments, exposing the modified oxygen-containing layer causes ligand exchange to occur.

[0008] In various embodiments, exposing the oxygen-containing material to a halogen-containing gas and exposing the modified oxygen-containing layer to an atomic layer etch are performed in alternating pulses.

[0009] In any of the above embodiments, the modified oxygen-containing layer may include boron oxide.

[0010] In any of the above embodiments, the oxygen-containing material may be a metal oxide. For example, in some embodiments, the metal oxide comprises a metal selected from the group consisting of aluminum, silicon, germanium, antimony, indium, zirconium, selenium, tin, gallium, zinc, molybdenum, hafnium, tellurium, and combinations thereof.

[0011] In any of the above embodiments, the oxygen-containing material may be selected from the group consisting of aluminum oxide and indium gallium zinc oxide.

[0012] In any of the above embodiments, the oxygen-containing material may be selected from the group consisting of zirconium oxide, hafnium oxide, and hafnium zirconium oxide.

[0013] In any of the above embodiments, the oxygen-containing material may be a carbide or nitride formed by oxidizing a carbide or nitride.

[0014] In any of the above embodiments, the oxygen-containing material may be doped.

[0015] In various embodiments, exposing the oxygen-containing material to be etched to a halogen-containing gas includes igniting the halogen-containing gas to form a halogen-containing plasma. For example, in some embodiments, the oxygen-containing material includes a metal.

[0016] In various embodiments, the halogen-containing plasma is generated remotely.

[0017] In various embodiments, the halogen-containing plasma is generated in situ.

[0018] In various embodiments, the halogen-containing gas includes fluorine.

[0019] In various embodiments, the halogen-containing gas includes nitrogen trifluoride.

[0020] Another aspect relates to a method for processing a wafer, the method including providing a wafer to a processing chamber, the wafer having an oxygen-containing material, exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on a surface of the wafer, and exposing the modified layer to a boron-and-chlorine-containing gas to remove the modified oxygen-containing layer from the surface of the wafer.

[0021] In various embodiments, exposing the modified oxygen-containing layer is performed in a plasma-free environment.

[0022] In various embodiments, exposing the modified oxygen-containing layer forms a volatile oxychloride.

[0023] In various embodiments, exposing the modified oxygen-containing layer causes ligand exchange to occur.

[0024] In various embodiments, exposing the oxygen-containing material to a halogen-containing gas and exposing the modified oxygen-containing layer to an atomic layer etch are performed in alternating pulses.

[0025] In any of the above embodiments, the modified oxygen-containing layer may include boron oxide.

[0026] In any of the above embodiments, the oxygen-containing material may be a metal oxide. For example, in some embodiments, the metal oxide comprises a metal selected from the group consisting of aluminum, silicon, germanium, antimony, indium, zirconium, selenium, tin, gallium, zinc, molybdenum, hafnium, tellurium, and combinations thereof.

[0027] In any of the above embodiments, the oxygen-containing material may be selected from the group consisting of aluminum oxide and indium gallium zinc oxide.

[0028] In any of the above embodiments, the oxygen-containing material may be selected from the group consisting of zirconium oxide, hafnium oxide, and hafnium zirconium oxide.

[0029] In any of the above embodiments, the oxygen-containing material may be a carbide or nitride formed by oxidizing a carbide or nitride.

[0030] In any of the above embodiments, the oxygen-containing material may be doped.

[0031] In various embodiments, exposing the oxygen-containing material to be etched to a halogen-containing gas includes igniting the halogen-containing gas to form a halogen-containing plasma. For example, in some embodiments, the oxygen-containing material includes a metal.

[0032] In various embodiments, the halogen-containing plasma is generated remotely.

[0033] In various embodiments, the halogen-containing plasma is generated in situ.

[0034] In various embodiments, the halogen-containing gas includes fluorine.

[0035] In various embodiments, the halogen-containing gas includes nitrogen trifluoride.

[0036] Another aspect relates to a method for processing a wafer, the method including providing a wafer to a processing chamber, the wafer having a material to be etched, exposing the material to be etched to a halogen-containing gas to form a modified layer on a surface of the wafer, and exposing the modified layer to a boron- and chlorine-containing gas in a plasma-less environment to remove the modified layer from the surface of the wafer.

[0037] In various embodiments, the material to be etched is selected from the group consisting of oxides, carbides, nitrides, doped oxides, doped carbides, doped nitrides, and combinations thereof.

[0038] In various embodiments, the boron and chlorine containing gas is boron trichloride.

[0039] In various embodiments, the material to be etched comprises oxygen.

[0040] In various embodiments, the material being etched is a dielectric.

[0041] In various embodiments, exposing the material to be etched to a halogen-containing gas includes igniting the halogen-containing gas to form a halogen-containing plasma. For example, in some embodiments, the material to be etched includes a metal. In some embodiments, the material to be etched is oxidized prior to exposure to the halogen-containing plasma.

[0042] In various embodiments, the halogen-containing plasma is generated remotely.

[0043] In various embodiments, the halogen-containing plasma is generated in situ.

[0044] In various embodiments, the halogen-containing gas includes fluorine.

[0045] In various embodiments, the halogen-containing gas includes nitrogen trifluoride.

[0046] Another embodiment relates to a method for processing a wafer, the method including providing a wafer to a processing chamber, the wafer having a metal oxide thereon, exposing the metal oxide to hydrogen fluoride or nitrogen trifluoride to form a modified metal oxide layer on a surface of the wafer, and exposing the modified layer to boron trichloride in a plasma-less environment to remove the modified metal oxide layer from the surface of the wafer.

[0047] In various embodiments, the metal oxide is selected from the group consisting of aluminum oxide, hafnium oxide, and indium gallium zinc oxide.

[0048] In various embodiments, exposing the metal oxide to hydrogen fluoride or nitrogen trifluoride includes igniting the hydrogen fluoride or nitrogen trifluoride to form a fluorine-containing plasma. For example, in some embodiments, the fluorine-containing plasma is generated remotely. In some embodiments, the fluorine-containing plasma is generated in situ.

[0049] In various embodiments, forming the modified layer and removing the modified metal oxide layer are performed without breaking vacuum.

[0050] In various embodiments, forming the modified metal oxide layer and removing the modified metal oxide layer are carried out at a temperature greater than about 170°C.

[0051] Another embodiment relates to a method for processing a wafer, the method including providing a wafer to a processing chamber, the wafer having a tungsten-free material, exposing the tungsten-free material to be etched to form a modified tungsten-free layer on a surface of the wafer to a fluorine-containing gas, and exposing the modified tungsten-free layer to a non-pyrophoric chlorine-containing gas in a plasma-less environment to remove the modified tungsten-free layer from the surface of the wafer.

[0052] Another embodiment is an apparatus for semiconductor processing comprising a first processing chamber including a first interior, a first processing station having a first wafer support configured to support a wafer in the first interior, a first wafer heating unit configured to heat a wafer supported by the first wafer support, a process gas unit configured to flow a first chemical species comprising fluorine onto the wafer at the first processing station in the first processing chamber and boron trichloride onto the wafer at the first processing station in the first processing chamber, and a process gas unit configured to deliver the wafer to the first processing station in the first processing chamber. and a controller having instructions configured to: cause a first wafer heating unit to heat the wafer to a first temperature, the wafer having a layer of chalcogenide material, modifying a surface of the material on the wafer by causing a process gas unit to flow a first chemical species over the wafer at a first processing station of the first processing chamber while the wafer is at the first temperature to produce a modified layer, and etching the material on the wafer by removing the modified layer without the use of a plasma by causing the process gas unit to flow boron trichloride over the wafer at the first processing station of the first processing chamber.

[0053] These and other aspects are further described below with reference to the drawings. [Brief description of the drawings]

[0054] [Figure 1] FIG. 1 is an exemplary schematic diagram of an atomic layer etch in accordance with certain disclosed embodiments.

[0055] [Diagram 2] FIG. 2 is an exemplary process flow diagram for performing operations in accordance with certain disclosed embodiments.

[0056] [Figure 3A] FIG. 3A is a diagram illustrating an exemplary gas flow sequence in accordance with certain disclosed embodiments. [Figure 3B] FIG. 3B is a diagram illustrating an exemplary gas flow sequence, in accordance with certain disclosed embodiments. [Figure 3C] FIG. 3C is a diagram illustrating an exemplary gas flow sequence in accordance with certain disclosed embodiments.

[0057] [Figure 4] FIG. 4 is a schematic diagram of one embodiment of a process station that may be used to deposit material in accordance with certain disclosed embodiments.

[0058] [Diagram 5] FIG. 5 illustrates an example wafer processing chamber for etching materials in accordance with certain disclosed embodiments.

[0059] [Figure 6] FIG. 6 is a cross-sectional side view of an exemplary device, in accordance with certain disclosed embodiments.

[0060] [Figure 7] FIG. 7 is a top view of a wafer heater having multiple LEDs.

[0061] [Figure 8] FIG. 8 is a diagram illustrating a first exemplary processing device, in accordance with certain disclosed embodiments.

[0062] [Figure 9] FIG. 9 is a diagram illustrating a second exemplary processing device, in accordance with certain disclosed embodiments.

[0063] [Figure 10] FIG. 10 illustrates the etch rate per atomic layer etch cycle using boron trichloride and hydrogen fluoride, according to certain disclosed embodiments, and the results after exposure to boron trichloride alone.

[0064] [Figure 11A] FIG. 11A shows the relative etch amounts of hafnium oxide, aluminum oxide, silicon, silicon oxide, silicon nitride, titanium nitride, and tungsten for the ALE etching process.

[0065] [Figure 11B] FIG. 11B illustrates the relative etch amounts of hafnium oxide, aluminum oxide, silicon, silicon oxide, silicon nitride, titanium nitride, and tungsten for an ALE etch process performed in accordance with certain disclosed embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0066] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail so as not to unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with specific embodiments, it will be understood that the specific embodiments are not intended to limit the disclosed embodiments.

[0067] Semiconductor fabrication processes often involve the etching of various materials, such as metal oxides. Some materials may be susceptible to damage when exposed to plasma-based etching processes. However, some thermal processes may not be able to adequately etch certain materials, and in some cases, the application of certain thermal processes may be limited by temperature limitations of the tool. In some cases, materials can be etched using thermal or plasmaless processes, but some processes may be difficult to control, especially when etching materials of certain thicknesses or achieving selectivity to other exposed surfaces during etching.

[0068] Techniques and apparatus for etching various materials using boron trichloride are provided herein. Certain disclosed embodiments are directed to etching various materials using gases containing boron and chlorine. Certain disclosed embodiments are directed to atomic layer etching using boron trichloride as a removal gas in a plasma-less environment. Boron trichloride can be used as a replacement for dimethylaluminum chloride (DMAC), which can be used to etch various materials, including but not limited to aluminum oxide, hafnium oxide, zirconium oxide, hafnium silicon oxide, silicon-doped hafnium oxide, indium gallium zinc oxide, hafnium zirconium oxide, alloy oxides made from hafnium and zirconium, and chalcogenide materials such as germanium, selenium, and tellurium. Boron trichloride is a commonly available and inexpensive gas, and has the added advantage of not needing to be volatilized and not being pyrophoric.

[0069] Certain disclosed embodiments perform thermal or plasmaless atomic layer etching using boron and chlorine containing gases such as boron trichloride. Certain disclosed embodiments can be used for a variety of etching applications, including, but not limited to, etching one or more layers of chalcogenide materials, etching indium gallium zinc oxide, and etching metal oxides such as aluminum oxide, hafnium oxide, or zirconium oxide.

[0070] Boron trichloride can be used as a removal gas, where the modification gas or species used to modify the surface of the substrate forms bonds on the surface of the substrate that are thermally removed upon exposure to boron trichloride in a thermodynamically favorable reaction. Boron trichloride can be used to isotropically remove material by atomic layer etching.

[0071] As described in more detail below, thermal atomic layer etching can modify the surface of a layer of material by flowing a first chemical species having a halogen over the wafer to produce a modified layer of material, and remove the modified layer of material without the use of a plasma by flowing a second chemical species having boron and chlorine, such as boron trichloride, over the wafer, which can be performed by a ligand exchange mechanism.

[0072] In accordance with certain disclosed embodiments, atomic layer etching ("ALE") can be used to etch materials. The ALE process uses successive self-limiting reactions to remove thin layers of material. In general, an ALE cycle is a minimum set of operations used to perform an etching process once, such as etching a monolayer. One ALE cycle results in etching at least a portion of a membrane layer on the wafer surface. Typically, an ALE cycle includes a modification operation that forms a reactive layer, followed by a removal operation that removes or etches only this reactive layer. A cycle may include certain auxiliary operations, such as removing one of the reactants or by-products, as well as cleaning operations that remove residues that have built up on the surfaces of the processing chamber. In general, a cycle includes one instance of a unique sequence of operations.

[0073] As an example, an ALE cycle can include the following operations: (i) delivery of a first process gas, which is a reactant gas, (ii) purging the reactant gas from the chamber, (iii) delivery of a second process gas, which is a removal gas and optional plasma, and (iv) purging the chamber. The modification operation (item (ii) above) generally forms a thin reactive surface layer thinner than the unmodified material, e.g., one, two, or three atomic layers thick, or thinner than an entire atomic layer in one cycle.

[0074] The etching process described herein may rely on chemical reactions in conjunction with maintaining the wafer at a particular temperature or temperature range to drive the chemical reactions in a modification and / or removal operation that is considered a "thermal ALE" or "thermal etch". In some embodiments, a thermal etch or thermal ALE may be considered an isotropic etch. In some embodiments, one or more layers of the wafer may be modified by chemical adsorption (hereinafter "chemisorption") rather than plasma while the wafer is maintained at a first temperature, and then one or more modified layers of the wafer may be removed by desorption rather than plasma while the wafer is at a second temperature. Some implementations may optionally use plasma during the modification operation but not during the removal operation. In some embodiments, the first and second temperatures may be the same, while in some other embodiments, they may be different from one another.

[0075] Chemisorption and desorption are temperature-dependent chemical reactions that may occur in separate temperature regimes, partially overlapping temperature regimes, or the same temperature regime. For this reason, some of the thermal etching techniques described herein maintain the temperature of the wafer at the same temperature, or substantially the same temperature (e.g., within about 10% or 5% of each other) during the modification and removal operations. Some other embodiments adjust the temperature of the wafer between the modification and removal operations to allow and utilize chemisorption to occur at one temperature for the modification operation, and desorption to occur at a different temperature for the removal operation.

[0076] In some thermal etching processes provided herein, one or more surface layers of a material may be modified by chemisorption while the wafer is maintained at a first temperature, thereby producing one or more modified surface layers of the wafer. The wafer includes a layer of material and an exposed surface, which may be a uniform layer of material or a non-uniform layer containing different molecules and elements. A first process gas having modifying molecules may be flowed over the wafer maintained at the first temperature. In some embodiments, the modifying molecules may include fluorine or chlorine, as described below, to fluorinate or chlorinate the molecules on the wafer. The first process gas may also include a carrier gas, such as nitrogen (N2), argon (Ar), helium (He), and neon (Ne). This first temperature allows for chemisorption between the modifying molecules and at least a portion of the molecules at the exposed surface of the material.

[0077] The modified surface layer or layers may be removed while the wafer is maintained at the second temperature. In some embodiments, the second temperature alone may allow desorption of the modified molecules from the wafer, thereby removing the modified molecules from the wafer. In some embodiments, a second process gas containing the removal molecules may be flowed over the wafer, including over the exposed surface of the wafer. The second process gas may also include a carrier gas as described above. These removal molecules may react with the modified molecules to form different volatile molecules, which may be considered volatile molecules. The volatilized molecules may be removed from the wafer by desorption when the wafer is at the second temperature. In some embodiments, the flow of the second process gas may be part of the removal operation, or may be a separate operation that occurs before, after, or during heating of the wafer.

[0078] In some embodiments, the thermal ALE may be isotropic and therefore non-directional. In some other embodiments, when directional ions are used in an etching process, such as during a modification operation, the thermal ALE is not isotropic.

[0079] Other thermal etches may be performed in which the modifying and removing molecules are at least co-flowed over the wafer, such that the modifying and removing operations at least partially overlap. During such processes, one or more process gases containing both the modifying and removing molecules may be flowed over the wafer simultaneously. In many implementations of this thermal etch, the modifying and removing molecules are constrained so that they do not adversely affect each other so that they can co-flow over the wafer. In some cases, this co-flow may occur throughout the entire etch, while in other cases, the co-flow may occur for only a portion of the etch. In some examples with only partially overlapping flows, the modifying molecules may be flowed over the wafer before the removing molecules are flowed over the wafer, and then both the modifying and removing molecules may be flowed over the wafer simultaneously. In some cases, the flow of both the modifying and removing molecules may be stopped substantially simultaneously (e.g., within about 10% or 5% of each other), while in other cases, the flow of the modifying molecules may be stopped and the removing molecules may be flowed over the wafer.

[0080] The techniques provided herein can also deposit one or more encapsulating materials onto the etched chalcogenide. This can include depositing the encapsulating material using chemical vapor deposition ("CVD"), plasma enhanced CVD ("PECVD"), or atomic layer deposition ("ALD") in a processing chamber separate from the processing chamber in which the etching is performed. Some embodiments can transfer the wafer between these processing chambers without exposing the wafer to atmospheric pressure, such that the wafer remains at vacuum pressure in both processing chambers and during transfer between processing chambers. In some embodiments, a layer of a first encapsulating material can be deposited onto the etched chalcogenide while the wafer remains in the processing chamber in which the etching is performed, and the first encapsulating material can include aluminum, such as aluminum oxide. After the first encapsulating material is deposited, the wafer can be transferred to another processing chamber where additional encapsulating material can be deposited onto the wafer.

[0081] Some implementations of the described etches are further explained with the aid of FIG. 1, which illustrates an exemplary schematic diagram of an atomic layer etch according to disclosed embodiments. Diagrams 100a-100e show an ALE cycle. At 100a, a wafer having one or more layers of oxygen-containing material to be etched is provided. At 100b, the surface of the oxygen-containing material is modified. At 100c, the next operation is prepared, which may include flowing a second process gas or purging the chamber. At 100d, the wafer is exposed to a removal molecule that reacts with the modified layer to desorb the modified layer from the wafer, thus removing it from the wafer. At 100e, the desired material is removed.

[0082] In schematic diagrams 102a-102e, a single layer of oxygen-containing material is etched from a wafer. In 102a, a wafer is provided, the wafer having one or more layers of oxygen-containing material 104, with each molecule represented as an unshaded circle. The top layer of oxygen-containing material may be considered an oxygen-containing material surface layer 106. In 102b, a first process gas containing fluoride- or chloride-containing modifying molecules 108 (filled circles) is introduced to the wafer to modify the oxygen-containing material surface layer 106, forming a fluorinated or chlorinated oxygen-containing material. The schematic diagram of 102b shows that some of the modifying molecules 108 are adsorbed onto the molecules of oxygen-containing material 104 of the oxygen-containing material surface layer 106, producing a modified surface layer 110 containing modified molecules 112 (one modified molecule 112 is identified inside the dotted oval in 102b). As mentioned above, the modifying molecules 108 may be fluorine-bearing species, such as hydrogen fluoride, or chloride-bearing species, such as hydrogen chloride. In some thermal ALE techniques, this diagram 102b may occur while the wafer is maintained at a first temperature, as described above, that enables chemisorption of the modifying molecules on the surface of the oxygen-containing material, for example.

[0083] In diagram 102c, after the modified molecules 112 and modified surface layer 110 are produced in 102b, the first process gas may optionally be purged from the chamber.

[0084] In diagram 102d, removal molecules 114 are introduced into the process chamber, which in some embodiments can be done by flowing a second process gas having a second species, i.e., removal molecules 114, over the wafer, which can include a boron and chlorine-containing compound, such as boron trichloride. Diagram 102d further shows that the removal molecules 114, shown as shaded diamonds, react with the fluorinated chalcogenide or chlorinated oxygen-containing material, i.e., modified molecules 112, which causes the oxygen-containing material 104 and molecules 108 (which can be fluorides or chlorides) to desorb from the wafer, and thus be removed from the wafer. In some embodiments, the reaction between the removal molecules 114 and the modified molecules 112 causes the modified molecules 108 to desorb from the wafer, and the removal molecules and oxygen-containing material form another compound 116, shown by the combination of the unshaded circle for the oxygen-containing material 104 and the shaded diamond for the removal molecules 114, which desorb from the wafer. In some other embodiments, not shown, the removal molecules and the modified molecules combine to form another compound that desorbs from the wafer.

[0085] In some thermal ALE embodiments, the removal operation may be performed at a second temperature at which desorption of the modified molecules 112 of the modified surface layer 110 from the wafer occurs, and plasma is not utilized in these removal operations. In some embodiments, the second temperature is the same as or substantially the same as the first temperature (e.g., within about 10% or 5% of each other). In other embodiments, the first and second temperatures may be different from each other, and in these embodiments, the temperature may be changed from the first temperature to the second temperature by heating or cooling the wafer. In some cases, the temperature in one or more of the operations may be increased.

[0086] In 102e, the modified molecules 112, and therefore the modified surface layer 110, have been removed from the wafer.

[0087] FIG. 2 illustrates an exemplary process flow diagram for performing operations according to disclosed embodiments. In operation 201, a wafer is provided to a processing chamber configured to perform etching of the wafer. The wafer may include a material to be etched. The material to be etched may be a dielectric material. The material to be etched may be an oxygen-containing material. The material to be etched may be a metallic material. The material to be etched may be tungsten-free. The material to be etched may be a non-tungsten metallic material. The material to be etched may be a tungsten-free metallic material. The material to be etched may be an oxide. The material to be etched may be a semiconductor oxide. The material to be etched may be a semiconductor material such as silicon, silicon germanium, germanium, or combinations thereof. The material to be etched may be a metal oxide. The metal oxide may be hafnium oxide, tungsten oxide, molybdenum oxide, aluminum oxide, zinc oxide, gallium oxide, zirconium oxide, indium oxide, tin oxide, selenium oxide, tellurium oxide, or combinations thereof. In some embodiments, the wafer includes a transition metal oxide.

[0088] The material to be etched may be formed by exposing a metal surface to an oxygen-containing reactant. In some embodiments, operation 201 includes exposing a metal surface to an oxygen-containing reactant. Exemplary metal surfaces include hafnium, tungsten, molybdenum, aluminum, zinc, gallium, zirconium, indium, tin, selenium, tellurium, and the like. In some embodiments, the metal surface includes a transition metal. In some embodiments, the metal surface includes a metallic element. Other materials include indium gallium arsenide (InGaAs), indium aluminum arsenide (InAlAs), indium phosphide (InP), and combinations thereof. In some embodiments, the metal surface includes a metalloid. In some embodiments, the wafer includes a chalcogenide. The chalcogenide may be any of those listed herein. In some embodiments, the chalcogenide may be a phase change material, such as a germanium (Ge), antimony (Sb), tellurium (Te) (collectively "GST" or "GeSbTe") material. This may also include n-doped GeSbTe compounds (N-GST), Sb2Te, and Ag and In doped Sb2Te (AIST). As noted above, phase change materials are advantageous for use in forming memory devices because, for example, the phase of the metal chalcogenide determines the bit state. In some implementations, the chalcogenide may include those that do not change phase, such as Ovonic Threshold Switching (OTS) materials, which may include compounds containing germanium, arsenic, and selenium (GeAsSe), or compounds containing germanium, antimony, selenium, and nitrogen (GeSb,Se,N).

[0089] In some embodiments, the material being etched on the wafer is a non-oxide. The material being etched may be a nitride. The material being etched may be a carbide. The material being etched may be a doped nitride. The material being etched may be a doped carbide. The material being etched may be a doped oxide. The material being etched may include a dopant, such as, but not limited to, carbon.

[0090] During operation 201, after a wafer is delivered to the chamber, the wafer may be heated to a first temperature, which may be considered both a specific temperature or a temperature range as provided herein. In some embodiments, the first temperature may be, for example, about 20° C. to about 500° C., about 20° C. to about 150° C., about 20° C. to about 80° C., about 20° C. to about 100° C., about 100° C. to about 450° C., about 100° C. to about 400° C., about 150° C. to about 400° C., about 200° C. to about 600° C., about 200° C. to about 500° C., about 200° C. to about 400° C., about 200° C. to about 350° C., or about 350° C. to about 500° C., or at least about 120° C., or less than about 170° C. As described in more detail below, the wafer may be maintained at the first temperature during all, or substantially all (e.g., at least 80%, 90%, or 95%) of the etching, modification, and / or removal operations.

[0091] In operation 203, a halogen-containing species is introduced into the chamber. In various embodiments, in operation 203, an oxide surface is exposed to the halogen-containing species. In some embodiments, an oxide surface is exposed to a fluorine-containing species. In some embodiments, a metal oxide surface is exposed to a fluorine-containing species. In some embodiments, a metal oxide surface is exposed to nitrogen trifluoride. The halogen-containing species reacts with or modifies the surface of the wafer to form a modified surface. The modified surface may include one or more halogen end groups as a result of the reaction or modification. The halogen-containing species may be a halogen-containing gas or a vaporized halogen-containing species. Examples include fluorine-containing species, such as hydrogen fluoride, such as HF, sulfur fluoride, such as sulfur tetrafluoride or sulfur hexafluoride or sulfuryl fluoride (SO2F2), nitrogen fluoride, such as nitrogen trifluoride (NF3), and xenon fluoride, such as xenon difluoride, and chlorine-containing species, such as hydrogen chloride, such as HCl, sulfur chloride, such as sulfur dichloride or sulfur tetrachloride or sulfuryl chloride (SO2Cl2), or nitrogen chloride, such as trichloroamine (NCl3). The modification gas used is selected based on thermodynamically favorable removal using a boron and chlorine-containing gas, such as boron trichloride, in operation 207. In some embodiments, the use of fluorine or chlorine species to modify the surface of the layer of material to be etched results in a unique reactive compound that enables and allows removal of all materials in the presence of removal molecules, because fluorine and chlorine bond very strongly to the surface and weaken the bond with the underlying layer. In some embodiments, the modification gas used is a fluorine-containing gas. The first chemical species may be flowed over the wafer in vapor form, for example, as part of a process gas that may optionally include a carrier gas, such as nitrogen, argon, helium, or neon.

[0092] During operation 203, the surface of the oxide layer is modified, i.e., this operation represents a modification operation. Operation 203 includes flowing a first process gas containing a first chemical species having a fluoride or chloride over the wafer. Flowing the first chemical species over the wafer modifies the surface of the oxide layer to produce a layer of fluorinated material or fluorinated oxide that can be inherently removed by exposure to and reaction with boron trichloride. This first chemical species in the first process gas may be any of those provided herein, including one or more of the following non-limiting examples: hydrogen fluoride such as HF, sulfur fluoride such as sulfur tetrafluoride or sulfur hexafluoride or sulfuryl fluoride, nitrogen fluoride such as nitrogen trifluoride, and xenon fluoride such as xenon difluoride, hydrogen chloride such as HCl, sulfur chloride such as sulfur dichloride or sulfur tetrachloride or sulfuryl chloride, or nitrogen chloride such as trichloroamine (NCl3). The first process gas may also be flowed over the wafer in vapor form and may optionally include a carrier gas, such as, for example, N2, Ar, He, or Ne. The modification operation of operation 203 may be stopped by stopping the flow of the first process gas to the wafer.

[0093] In some embodiments, activation energy may be provided to help the modifying molecules overcome the activation barrier for adsorption on the wafer. This activation energy may be provided by thermal energy, radical energy, and / or UV photons, and in some cases may include heating the wafer and / or generating plasma or photons. This adsorption of the modifying molecules onto the first material can be considered chemical adsorption or "chemisorption", which is an energy-dependent (e.g., temperature-dependent) chemical reaction. In some thermal etching techniques, this chemisorption during the modifying operation occurs only in a certain temperature range that allows the activation barrier of the molecules in the material layer and the incoming modifying molecules to be overcome, allowing dissociation and chemical bonding between these molecules and the adsorbates in the modifying molecules. Outside this temperature range, chemisorption may not occur or may occur at an undesirable (e.g., slow) rate.

[0094] Thus, some embodiments of operation 203 modify the surface layer of oxide using only thermal activation energy rather than plasma. A first process gas is flowed over the wafer maintained at a first temperature that provides the activation energy, and the oxide is modified by chemisorption to form a modified layer of oxide. The first temperature may be any temperature or range of temperatures provided herein, such as, for example, about 20° C. to about 500° C., about 20° C. to about 150° C., about 20° C. to about 80° C., about 20° C. to about 100° C., about 100° C. to about 450° C., about 100° C. to about 400° C., about 150° C. to about 400° C., about 200° C. to about 600° C., about 200° C. to about 500° C., about 200° C. to about 350° C., or about 350° C. to about 500° C., or at least about 120° C., or less than about 170° C. Additionally, the wafer may be maintained at the first temperature for all or substantially all (e.g., at least 80%, 90%, or 95%) of the modification operation. The duration of the modification operation may be a duration at which modification of substantially all (e.g., at least 80%, 90%, or 95%) of the desired exposed molecules on the wafer occurs. The duration may range, for example, from about 0.5 seconds to about 600 seconds, from about 0.5 seconds to about 400 seconds, from about 0.5 seconds to about 300 seconds, from about 0.5 seconds to about 10 seconds, from about 0.5 seconds to about 5 seconds, from about 1 second to about 5 seconds, or from about 5 seconds to about 300 seconds.

[0095] In some embodiments, a plasma can be generated in operation 203 by igniting a halogen-containing species. The plasma may be generated in situ or remotely. In various embodiments, a plasma can be used when the material to be etched includes a metal. In various embodiments, a plasma can be used when the material to be etched is a metal oxide.

[0096] In some implementations, ion energy from a plasma or the like can be used to drive the modification operation of operation 203. In some cases, a plasma may be ignited and fluorine or chlorine can react with the wafer or be adsorbed onto the surface of the wafer. The species generated from the plasma can be generated directly by forming a plasma in the process chamber that contains the wafer, or can be generated remotely in a process chamber that does not contain the wafer and delivered to the process chamber that contains the wafer.

[0097] The chamber may optionally be purged in operation 205. Purging may be accomplished by pumping excess by-products or gases from the chamber, or by flowing a purge gas, such as an inert gas, or both.

[0098] In operation 207, boron trichloride, or another boron and chlorine-containing gas, is introduced into the chamber in a plasma-less environment to remove the modified surface. The species of compound used in operation 207 reacts with the fluorinated or chlorinated material to volatilize the element and desorb from the wafer. For example, this exchange reaction is energetically favorable, and thus the fluorinated or chlorinated material can form a volatile compound with the compound, for example, through chlorine transfer, or through combining to form volatile germanium, antimony, and tellurium compounds, including combinations of fluoride and chloride, for example, for etching chalcogenide materials. Boron trichloride may also be flowed over the wafer in vapor form or as part of a process gas that may optionally include a carrier gas inert to the reaction to remove the material, exemplary carrier gases may include, for example, nitrogen, argon, helium, or neon. In some embodiments, boron trifluoride may be used in place of boron trichloride in operation 207. In some embodiments, other chemical species may be used in place of boron trifluoride or boron trichloride. Exemplary chemical species may include compounds having a central atom that is aluminum, boron, silicon, or germanium and having at least one chlorine atom. The selection of species used in operation 207 may depend on the species and surface modified in operation 203.

[0099] In some embodiments, operation 207 may be performed under a variety of process conditions that enable such etching. In addition to the temperature ranges described above, some embodiments may maintain the wafer at a temperature during etching, for example, between about 20° C. and about 500° C., between about 20° C. and about 150° C., between about 20° C. and about 80° C., between about 20° C. and about 100° C., between about 100° C. and about 450° C., between about 100° C. and about 400° C., between about 150° C. and about 400° C., between about 200° C. and about 600° C., between about 200° C. and about 500° C., between about 200° C. and about 350° C., or between about 350° C. and about 500° C., or at least about 120° C., or less than about 170° C. The etch may also be performed while the process chamber is maintained at a pressure of, for example, about 10 milliTorr (mTorr) to about 100 Torr, or about 20 mTorr to 760 Torr (1 atmosphere), including about 20 mTorr to 600 mTorr, about 30 mTorr to 500 mTorr, and about 40 mTorr to 400 mTorr, as well as about 3 Torr to 8 Torr, about 4 Torr to 8 Torr, 2 Torr to 10 Torr, and 100 Torr to 760 Torr. As described in more detail below, some embodiments perform the etch at substantially constant process conditions (e.g., with small deviations, such as about 10% to 5% deviations from the set conditions), while other embodiments may vary one or more of the process conditions during the etch.

[0100] In operation 207, the modified oxide, i.e., fluorinated or chlorinated oxide, is removed from the wafer. Operation 207 includes flowing boron trichloride over the wafer in a plasma-less environment. As described herein, boron trichloride is an inexpensive, readily available, non-flammable gaseous precursor that can be used for a variety of thermal ALE applications. Without being bound by a particular theory, boron trichloride can be used to remove the modified layer in a ligand exchange mechanism, whereby the exchange of chlorine with fluorine on a surface previously modified with a fluorine-containing gas is thermodynamically favored. The boron trichloride reacts with the fluorinated or chlorinated oxide, desorbing the component from the wafer and thus removing it from the wafer. The boron trichloride may also be flowed using a carrier gas such as nitrogen, argon, helium, or neon and / or any inert gas. The removal operation 207 can be stopped by stopping the flow of boron trichloride to the wafer.

[0101] In the case of desorption, a particular temperature range can overcome the activation barrier of the modified molecules, thereby allowing the release of the modified layer from the wafer. In some examples, the temperature ranges in which chemisorption and desorption occur do not overlap, while in other embodiments they may overlap partially or completely. Thus, to remove molecules from the wafer using chemisorption and desorption, some implementations can maintain the wafer at the same temperature or substantially the same temperature (e.g., within about 10% or 5% of each other) during the removal and modification operations. To remove molecules from the wafer using chemisorption and desorption occurring at different temperature regimes, operation 203 can be performed at a first temperature range, and removal operation 207 can be performed at a second, different temperature range that may be higher or lower than the first temperature. While some such embodiments can perform multiple cycles to remove multiple layers of material by maintaining the wafer at the same or substantially the same temperature during the removal and modification operations, other embodiments may repeatedly heat and cool the wafer between two temperature regimes for chemisorption and desorption.

[0102] In some of the embodiments using different temperature regimes, during or before operation 207, the temperature of the wafer can be brought to a second temperature that is different from the first temperature at which the wafer is maintained during operation 207. In some other embodiments, the second temperature is the same or substantially the same (e.g., within about 10% or 5% of each other) as the first temperature. This second temperature can be a temperature at which desorption occurs for one or more modified surface layers. In some embodiments, the second temperature can be higher than the first temperature, and in these embodiments, operation 207 can include heating the wafer from the first temperature to the second temperature. In some other embodiments, the second temperature can be lower than the first temperature, and in these embodiments, the wafer can be actively cooled from the first temperature to the second temperature.

[0103] The wafer may be heated using radiative heating, convective heating, solid-to-solid heat transfer, or plasma. In addition, the top, bottom, or both of the wafer may be heated. The wafer may also be heated nonlinearly in some embodiments, as described further below. As also described below, the wafer may be actively cooled in various manners. In some cases, the wafer may be heated to two different temperatures by positioning the wafer on two separate wafer supports, such as heated pedestals, each maintained at a different temperature from the other. Thus, the wafer may be heated to two different temperatures by being transferred between these two different wafer supports and placed on the different wafer supports.

[0104] In operation 207, the modified surface layer or layers may be removed using boron trichloride in a plasma-less environment. In some embodiments, operation 207 is performed while the wafer is maintained at a second temperature. In some embodiments, the second temperature is the same as the temperature used during operation 203. In some embodiments, the second temperature alone may allow desorption of the modified molecules from the wafer, thereby removing the modified molecules from the wafer.

[0105] In some embodiments, the second temperature may be, for example, about 20°C to about 500°C, about 20°C to about 150°C, about 20°C to about 80°C, about 20°C to about 100°C, about 100°C to about 450°C, about 100°C to about 400°C, about 150°C to about 400°C, about 200°C to about 600°C, about 200°C to about 500°C, about 200°C to about 350°C, or about 350°C to about 500°C, or at least about 120°C, or less than about 170°C. Additionally, the wafer may be maintained at that temperature for all, or substantially all (e.g., at least 80%, 90%, or 95%) of the removal operation. The duration of the removal operation may be a duration that causes desorption of substantially all (e.g., at least 80%, 90%, or 95%) of the desired molecules on the wafer. The duration may be in the range, for example, from about 0.5 seconds to about 600 seconds, from about 0.5 seconds to about 400 seconds, from about 0.5 seconds to about 300 seconds, from about 0.5 seconds to about 10 seconds, from about 0.5 seconds to about 5 seconds, from about 1 second to about 5 seconds, or from about 5 seconds to about 300 seconds.

[0106] In some embodiments, operations 203 and 207 are performed isothermally. In some embodiments, operations 203 and 207 are performed isobarically. In some embodiments, operations 203 and 207 are performed isothermally and isobarically. In various embodiments, operations 203-211 are performed without breaking vacuum. In various embodiments, operations 203-211 are performed in the same chamber. In various embodiments, operations 203-211 are performed in the same station of a chamber.

[0107] The performance of operations 203 and 207 may be considered a single thermal ALE cycle. In some implementations, these operations 203 and 207 may be repeated to perform multiple cycles and remove atomic monolayers, submonolayers, and multiple layers of oxygen-containing or oxide materials. Some embodiments remove a portion of a monolayer in one cycle because some etch rates may be lower than the lattice constant of the material being etched. This may include, for example, performing about 1 to about 1,000 cycles, about 1 to about 500 cycles, about 1 to about 100 cycles, about 1 cycle to about 30 cycles, or about 1 to about 20 cycles. Any suitable number of ALE cycles may be included to etch a desired amount of film. In some embodiments, ALE is performed in cycles that etch about 1 angstrom (Å) to about 50 Å of the surface of the layer on the wafer. In some embodiments, the ALE cycle etches about 2 Å to about 50 Å of the surface of the layer on the wafer. In some embodiments, each ALE cycle may etch at least about 0.1 Å, 0.5 Å, 1 Å, 2 Å, or 3 Å. As further shown in FIG. 2, operations 205 and 207, and in some implementations, the optional purge of block 207, may be repeated for N ALE or etch cycles. When operation 211 determines that N ALE cycles have been performed, the etch may be complete and thus may be terminated.

[0108] In some operations, an optional purge operation 205 may be performed after the modify operation 203 and before the remove operation 207. In the purge operation, non-surface-bound active modification molecules, such as fluorine or chlorine species, and / or other residues or particles may be removed from the process chamber, chamber walls, chamber gas volume, and / or wafer. This may be done by purging and / or evacuating the process chamber to remove active species or other elements without removing the adsorbed layer. Species generated in the plasma may be removed by stopping the plasma and allowing the remaining species to decay, optionally combined with purging and / or evacuation of the chamber. Purging may be done using any inert gas, such as N2, Ar, Ne, He, and combinations thereof. Purging may also be done after any operation, block, or step provided herein, including after the modify operation, after the remove operation, or both. Purging is optional, so some implementations may not purge.

[0109] In some implementations, the process conditions of the modifying operation 203 and the removing operation 207 are varied, such as the duration, temperature, pressure, etc., of each operation. In some embodiments, operations 203 and 207 may be performed for substantially the same time (e.g., within about 10% or 5% of each other), while in other embodiments, the operations may be performed for different times. For example, operation 203 may be performed for a shorter or longer period than operation 207. The various periods of each block may range, for example, from about 0.5 seconds to about 600 seconds, from about 0.5 seconds to about 400 seconds, from about 0.5 seconds to about 300 seconds, from about 0.5 seconds to about 10 seconds, from about 0.5 seconds to about 5 seconds, from about 1 second to about 5 seconds, or from about 5 seconds to about 300 seconds.

[0110] Although operations 201-211 are illustrated in FIG. 2, it will be understood that in some embodiments, additional operations and exposures may be used in addition to, during, or before any of operations 201-211.

[0111] In one example for etching aluminum oxide, hafnium oxide, or zirconium oxide, an exemplary process flow according to FIG. 2 may involve introducing hydrogen fluoride or nitrogen trifluoride in operation 203, introducing BCl3 in operation 207, and then optionally also introducing a hydrogen plasma.

[0112] In another example for etching silicon-doped hafnium oxide, indium gallium zirconium oxide, oxides alloyed with hafnium and zirconium, or chalcogenides, an exemplary process flow according to FIG. 2 may involve introducing hydrogen fluoride in operation 203 and introducing BCl3 in operation 207.

[0113] 3A-3C illustrate an exemplary gas flow sequence according to various embodiments. In FIG. 3A, a first process gas having a first species and a second process gas having a second species are flowed over the wafer without overlapping, which may be considered as the gas flows described with respect to FIG. 2. Here, the first process gas is flowed from time t1 to time t2 and then stopped, which may be considered as a modification operation 203. In some cases, an optional purge operation may be performed between time t2 and time t3, such as optional operation 205. At time t3, the second process gas is flowed over the wafer until time t4 before stopping, which may be considered as a removal operation 207.

[0114] In FIG. 3B, the first process gas and the second process gas overlap only for a portion of the etch. At time t1, the first process gas is flowed over the wafer, but the second process gas is not flowed over the wafer, which continues until time t2. This can also be considered a modification operation 203. At time t2, the first process gas is flowed over the wafer at the same time that the second process gas is flowed over the wafer. Both the first and second process gases flow over the wafer between time t2 and time t3, which can be considered a period of overlap or co-flow of the first and second process gases. At time t3 in FIG. 3B, the flow of the first process gas is stopped and the second process gas continues to flow until time t4, when it is stopped. This time can also be considered a removal operation of operation 207.

[0115] In some embodiments, the temperature of the wafer can be adjusted during the etch shown in FIG. 3B. For example, the wafer can be maintained at a first temperature between times t1 and t2, adjusted to a second temperature at time t2, and maintained at that second temperature until time t3 or t4. In some such implementations, the temperature can be adjusted to a third temperature from time t3 to time t4. In some other embodiments, the temperature can be held at a first temperature from time t1 to time t3, and then adjusted to a second temperature. This can be considered, in some embodiments, as a temperature ramp-up or ramp-down sequence where the second temperature is higher or lower than the first temperature, and, if applicable, the third temperature is higher or lower than the second temperature. These temperatures can be any of the temperatures provided herein above. Adjusting the temperature during any of the etches provided herein can allow for additional control and use of chemisorption and desorption. In some other embodiments, the wafer can be maintained at a substantially constant temperature (e.g., within about 10% or 5% of the set temperature) during the etch of FIG. 3B.

[0116] Similarly, the wafer temperature may be increased or decreased during modification, removal, or both. For example, referring to FIG. 3A, the wafer temperature may be increased from a first temperature to a higher second temperature or decreased from a first temperature to a lower third temperature during the modification operation between times t1 and t2. Alternatively or additionally, the wafer temperature may also be increased or decreased during the removal operation between times t3 and t4.

[0117] Alternatively or additionally, the chamber pressure can be adjusted during the etch of FIG. 3B. For example, the chamber can be maintained at a first pressure between times t1 and t2, adjusted to a second pressure at time t2, and maintained at the second pressure until time t3 or t4. In some such implementations, the pressure can be adjusted to a third pressure from time t3 to time t4. In some other embodiments, the pressure can be held at the first pressure from time t1 to time t3, and then adjusted to the second pressure. This can be considered, in some embodiments, as a pressure increase or decrease sequence where the second pressure is higher or lower than the first pressure, and, if applicable, the third pressure is higher or lower than the second pressure. These pressures can be any of the pressures provided herein above. Adjusting the pressure during the etch as provided herein can reduce the buildup of unwanted residues in the chamber, as well as allowing for additional control and use of chemisorption and desorption. In some other embodiments, the pressure may be substantially constant during the etch of FIG. 3B (eg, within about 10% or 5% of the set pressure).

[0118] Similarly, an increase or decrease in chamber pressure may be performed during modification, removal, or both. For example, referring to FIG. 3A, the chamber pressure may be increased from a first pressure to a higher second pressure or decreased from a first pressure to a lower second pressure during the modification operation between times t1 and t2. Alternatively or additionally, the chamber pressure may be increased or decreased as well during the removal operation between times t3 and t4.

[0119] In FIG. 3C, the first and second species are co-flowed or flowed simultaneously over the wafer for substantially all of the etch. Due to imperfections in the design, implementation, tolerances, and operation of the gas delivery system, the gases may not be co-flowed exactly at the same time, even though they are intended to be. Here in FIG. 3C, the first and second species are flowed simultaneously over the wafer from time t1 to t2, and then both are stopped. In some embodiments, the first and second species may be in the same process gas with any carrier gas flowed over the wafer. In some other embodiments, the first species may be part of a first process gas and the second species may be part of a separate second process gas, as described above, and both of these first and second process gases are co-flowed over the wafer from time t1 to time t2.

[0120] In some embodiments, it may be advantageous to keep the first and second species separate until entering the process chamber. This may avoid cross-reactions between the first and second species. Thus, the first and second species may be flowed into the process chamber in separate lines, through separate ports, such as through a dual plenum showerhead or separate nozzles. This may allow the two chemicals to meet only on the wafer surface.

[0121] In some embodiments, the temperature of the wafer can be adjusted during the etch shown in FIG. 3C and FIG. 4. For example, the wafer can be maintained at a first temperature between times t1 and ta, adjusted to a second temperature at time ta, and maintained at that second temperature until time t2. In some such implementations, the temperature can be adjusted to a third temperature or other temperature throughout the etch. This can be considered in some embodiments as a temperature ramp-up or ramp-down sequence, for example, where the second temperature is higher or lower than the first temperature, and, if applicable, the third temperature is higher or lower than the second temperature. These temperatures can be any of the temperatures provided herein above. In some other embodiments, the wafer can be maintained at a substantially constant temperature during the etch of FIG. 3C.

[0122] Alternatively or additionally, the chamber pressure can be adjusted during the etch of FIG. 3C. For example, the chamber can be maintained at a first pressure between times t1 and t2, adjusted to a second pressure at time t2, and maintained at the second pressure until time t3. This can be considered, in some embodiments, as a pressure ramp-up or ramp-down sequence where the second pressure is higher or lower than the first pressure. These pressures can be any of the pressures provided herein above. In some other embodiments, the pressure can be substantially constant during the etch of FIG. 3C.

[0123] Device Certain disclosed embodiments herein may be implemented on any suitable apparatus, including single-wafer and multi-wafer apparatus. Certain disclosed embodiments may be implemented on a four-station apparatus. Each station may be configured as described below. In some embodiments, in a four-station apparatus, two stations may be configured to perform the modification of an atomic layer etching (ALE) process, and two more stations may be configured to perform the thermal removal operation of the ALE. For example, two stations may be configured to deliver fluorine-containing species such as volatile hydrogen fluoride, and two more stations may be configured to deliver boron trichloride in a plasma-less environment. A multi-station apparatus may be used such that each station, or one or more stations, are set to different temperatures, which may be utilized to enable efficient modification and removal. In some embodiments, the apparatus is configured to switch pressures, increase or decrease pressure between operations, or operate at the same pressure throughout the process. In some embodiments, modification and removal are performed in the same station. In some embodiments, the stations are configured to have modification and removal gases introduced into the chamber through a showerhead. Further examples are described below with respect to Figures 4-9.

[0124] FIG. 4 illustrates generally one embodiment of a process station 400 that may be used to deposit materials using atomic layer deposition (ALD) and / or chemical vapor deposition (CVD), both of which may be plasma enhanced. In various disclosed embodiments, the process station 400 may be used to etch materials by atomic layer etching. For simplicity, the process station 400 is illustrated as a stand-alone process station having a process chamber body 402 for maintaining a low pressure environment. However, it will be understood that multiple process stations 400 may be included in a common process tool environment. Additionally, it will be understood that in some embodiments, one or more hardware parameters of the process station 400 (including those described in detail below) may be programmatically adjusted by one or more computer controllers.

[0125] The process station 400 is in fluid communication with a reactant delivery system 401 for delivering process gases to a distribution showerhead 406. The reactant delivery system 401 includes a mixing vessel 404 for blending and / or conditioning the process gases delivered to the showerhead 406. One or more mixing vessel inlet valves 420 can control the introduction of process gases to the mixing vessel 404. Similarly, a showerhead inlet valve 405 can control the introduction of process gases to the showerhead 406.

[0126] Some reactants may be stored in liquid form prior to vaporization and after delivery to the process station. For example, hydrogen fluoride may be vaporized. For example, the embodiment of FIG. 4 includes a vaporization point 403 for vaporizing the liquid reactant delivered to the mixing vessel 404. In some embodiments, the vaporization point 403 may be a heated vaporizer. The reactant vapor generated from such a vaporizer may condense in the downstream delivery piping. Exposure of incompatible gases to the condensed reactant may generate small particles. These small particles may clog the piping, interfere with the operation of valves, or contaminate the substrate. Some approaches to address these issues involve cleaning and / or evacuating the delivery piping to remove residual reactants. However, cleaning the delivery piping may increase the cycle time of the process station and reduce the throughput of the process station. Thus, in some embodiments, the delivery piping downstream of the vaporization point 403 may be heat traced. In some examples, the mixing vessel 404 may also be heat traced. In one non-limiting example, the piping downstream of vaporization point 403 has an elevated temperature profile ranging from approximately 100° C. to approximately 150° C. at mixing vessel 404.

[0127] In some embodiments, the reactant liquid may be vaporized in a liquid injector. For example, the liquid injector may inject pulses of liquid reactant into the carrier gas stream upstream of the mixing vessel. In one scenario, the liquid injector may vaporize the reactant by flashing the liquid from high pressure to low pressure. In another scenario, the liquid injector may atomize the liquid into dispersed microdroplets that are subsequently vaporized in a heated delivery pipe. It will be appreciated that small droplets may vaporize faster than larger droplets, reducing the delay between liquid injection and full vaporization. The faster the vaporization, the shorter the length of piping downstream from the vaporization point 403 may be. In one scenario, the liquid injector may be attached directly to the mixing vessel 404. In another scenario, the liquid injector may be attached directly to the showerhead 406.

[0128] In some embodiments, a liquid flow controller can be provided upstream of the vaporization point 403 to control the mass flow rate of the liquid vaporized and delivered to the process station 400. For example, the liquid flow controller (LFC) can include a thermal mass flow meter (MFM) located downstream of the LFC. The plunger valve of the LFC can then be adjusted in response to a feedback control signal provided by a proportional integral derivative (PID) controller in electrical communication with the MFM. However, it may take more than a second to stabilize the liquid flow using feedback control. This may extend the dosing time of the liquid reactant. Therefore, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, the LFC can be dynamically switched from the feedback control mode to the direct control mode by disabling the sensing tube and the PID controller of the LFC.

[0129] The showerhead 406 distributes process gases toward the substrate 412. Exemplary process gases include, but are not limited to, hydrogen fluoride, nitrogen trifluoride, and boron trichloride. In the embodiment illustrated in FIG. 4, the substrate 412 is shown positioned beneath the showerhead 406 and resting on a pedestal 408. The pedestal may be an electrostatic chuck. The pedestal may be heated to a temperature of about 150° C. to about 500° C., or about 200° C. to about 400° C. It will be appreciated that the showerhead 406 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to the substrate 412.

[0130] In some embodiments, a micro-volume 407 is located below the showerhead 406. Performing processes in a micro-volume rather than the full volume of the process station can reduce exposure and purge times to reactants, reduce time to change process conditions (e.g., pressure, temperature, etc.), limit exposure of the process station robot to process gases, etc. Exemplary micro-volume sizes include, but are not limited to, volumes from 0.1 liters to 2 liters. This micro-volume also impacts productivity throughput. While the deposition rate per cycle is reduced, cycle time is simultaneously reduced. In some cases, the latter effect is effective enough to improve the overall throughput of the module for a given target thickness of the film.

[0131] In some embodiments, the pedestal 408 can be raised or lowered to expose the substrate 412 to the micro-volume 407 and / or to change the volume of the micro-volume 407. For example, during a substrate transfer phase, the pedestal 408 can be lowered to allow the substrate 412 to be loaded onto the pedestal 408. During a deposition process phase, the pedestal 408 can be raised to position the substrate 412 within the micro-volume 407. In some embodiments, the micro-volume 407 can completely surround the substrate 412 as well as a portion of the pedestal 408, creating a region of high flow impedance during the deposition process.

[0132] Optionally, the pedestal 408 may be lowered and / or raised during a portion of the deposition process to adjust the process pressure, reactant concentration, etc., within the micro-volume 407. In one scenario in which the process chamber body 402 remains at base pressure during the deposition process, the micro-volume 407 can be evacuated by lowering the pedestal 408. Exemplary ratios of micro-volume to process chamber volume include, but are not limited to, volume ratios of 1:2000 to 1:10. It will be appreciated that in some embodiments, the height of the pedestal can be programmatically adjusted by a suitable computer controller.

[0133] In another scenario, adjusting the height of the pedestal 408 may allow the plasma density to be changed during plasma operation in the modification operation of the thermal ALE process. At the end of the process step, the pedestal 408 may be lowered to allow removal of the substrate 412 from the pedestal 408 during another substrate transfer step.

[0134] While the exemplary micro-volume variations described herein refer to a height-adjustable pedestal, it will be understood that in some embodiments, the position of the showerhead 406 can be adjusted relative to the pedestal 408 to vary the volume of the micro-volume 407. Further, it will be understood that the vertical position of the pedestal 408 and / or the showerhead 406 may be varied by any suitable mechanism within the scope of the present disclosure. In some embodiments, the pedestal 408 may include a rotation axis for rotating the orientation of the substrate 412. It will be understood that in some embodiments, one or more of these exemplary adjustments may be implemented programmatically by one or more suitable computer controllers.

[0135] In some embodiments, the processing chamber of FIG. 400 does not use plasma for the thermal ALE and therefore does not have plasma-related equipment. In some other embodiments, plasma may be used or the reactor may have such plasma-related equipment. For example, as shown in FIG. 4, the showerhead 406 and pedestal 408 are in electrical communication with an RF power source 414 and a matching network 416 to power the plasma. In some embodiments, the plasma energy can be controlled by controlling one or more of the process station pressure, gas concentration, RF source power, RF source frequency, and plasma power pulse timing. For example, the RF power source 414 and the matching network 416 can be operated at any suitable power to form a plasma having a desired composition of radical species. Examples of suitable powers are included above. Similarly, the RF power source 414 can provide RF power of any suitable frequency. In some embodiments, the RF power source 414 can be configured to control high and low frequency RF power sources independently of each other. Exemplary low frequency RF frequencies can include, but are not limited to, frequencies between 50 kHz and 2000 kHz. Exemplary high frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz. It will be appreciated that any suitable parameters may be discretely or continuously adjusted to provide plasma energy for surface reactions. In one non-limiting example, the plasma power may be intermittently pulsed to reduce ion bombardment at the substrate surface compared to a continuously powered plasma.

[0136] In some embodiments, the plasma can be monitored in-situ by one or more plasma monitors. In one scenario, the plasma power can be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, the plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters can be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, OES sensors can be used in a feedback loop to provide programmatic control of the plasma power. It will be appreciated that in some embodiments, other monitors can be used to monitor the plasma and other process characteristics. Such monitors can include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0137] In some embodiments, the plasma may be controlled via input / output control (IOC) sequence instructions. In one example, instructions for setting plasma conditions for a plasma process stage may be included in a corresponding plasma activation recipe stage of a deposition process recipe. In some cases, the process recipe stages may be arranged in sequence such that all instructions for a deposition process stage are executed simultaneously with that process stage. In some embodiments, instructions for setting one or more plasma parameters may be included in a recipe stage preceding a plasma process stage. For example, a first recipe stage may include instructions for setting flow rates of an inert gas and / or a reactant gas, instructions for setting a plasma generator to a power set point, and a time delay instruction for the first recipe stage. A second subsequent recipe stage may include instructions for enabling the plasma generator, and a time delay instruction for the second recipe stage. A third recipe stage may include instructions for disabling the plasma generator, and a time delay instruction for the third recipe stage. It will be understood that these recipe stages may be further subdivided and / or repeated in any suitable manner within the scope of the present disclosure.

[0138] In some deposition processes, the plasma strike lasts for several seconds or more in duration. In certain implementations, much shorter plasma strikes may be used. These may be on the order of 10 ms to 1 second, typically about 20 to 80 ms, with 50 ms being a specific example. Such very short RF plasma strikes require very rapid stabilization of the plasma. To achieve this, the plasma generator may be configured such that the impedance match is pre-set to a specific voltage while allowing the frequency to vary. Conventionally, high frequency plasmas are generated at an RF frequency of about 13.56 MHz. In various embodiments disclosed herein, the frequency is allowed to vary to values ​​different from this standard value. By allowing the frequency to vary while fixing the impedance match to a predetermined voltage, the plasma can be stabilized much more quickly, which may be important when using very short plasma strikes associated with certain deposition cycles.

[0139] In some embodiments, the pedestal 408 may be temperature controlled via a heater 410. In some embodiments, the heater 410 may be the same as the heater unit described above and shown in FIGS. 5-7, such as a heater unit including multiple LEDs used to heat the wafer. Additionally, in some embodiments, pressure control for the process station 400 may be provided by a butterfly valve 418. As shown in the embodiment of FIG. 4, the butterfly valve 418 throttles the vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control for the process station 400 may also be adjusted by varying the flow rate of one or more gases introduced to the process station 400.

[0140] Although FIG. 4 is illustrated as a single station, it will be understood that a processing chamber may have multiple such stations sharing a gas delivery system or other equipment. For example, as shown in FIGS. 8 and 9, chambers 804, 806, 902, and 904 include four processing stations. Each station may include any of the features described with respect to the single stations of FIGS. 4-7. The stations in chambers 804 and 902 may be used for etching, and the stations in chambers 806 and 904 may be used for depositing material onto wafers. For example, each station in chambers 804 and 902 may be used to perform thermal etching, such as thermal ALE, on a wafer held on a wafer holder, such as a pedestal, at a particular process station, and similarly, each station in chambers 806 and 904 may be used to perform deposition, such as ALD and thermal ALD, on a wafer held on a wafer holder at a particular process station. Other similar multi-station processing apparatuses may have a greater or lesser number of processing stations depending on the implementation and, for example, the desired level of parallel wafer processing, size / space constraints, cost constraints, etc.

[0141] For some process chambers, such as deposition chambers 806 and 904 of FIGS. 8 and 9, respectively, RF subsystems 890 and 990 can generate and deliver RF power to integrated circuit fabrication chambers 806 and 904 via radio frequency input ports. In certain embodiments, integrated circuit fabrication chambers 806 and 904 can include input ports in addition to the radio frequency input ports. Thus, integrated circuit fabrication chambers 806 and 904 can utilize eight RF input ports. In certain embodiments, stations 882A-D and 982A-D of integrated circuit fabrication chambers 806 and 904 can each utilize first and second input ports, where the first input port can deliver signals having a first frequency and the second input port can deliver signals having a second frequency. In some embodiments, stations such as stations 882A-D and 982A-D can utilize three or more input ports, where each input port can deliver signals having a different frequency. In some embodiments, multiple RF generators may be used. The use of dual frequencies can result in enhanced plasma characteristics. In various embodiments, multiple electrodes may be in the substrate support, and in some embodiments, an additional electrode may be in the edge ring.

[0142] As mentioned above, a system controller can be used in the tools described herein to control process conditions during etching and / or deposition. For example, the controller (829 in FIG. 8 and 929 in FIG. 9) typically includes one or more memory devices and one or more processors. The controller 829 can control all of the activities of the tools 800 and / or 900. In some implementations, the controller 829 and / or 929 is part of a system, which may be part of the examples described above. Such systems can include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (wafer pedestals, gas flow systems, etc.). These systems may be integrated with electronics to control system operations before, during, and after processing of a semiconductor wafer or substrate.

[0143] The controller is configured to implement any of the techniques described above. For example, referring to tool 800 of FIG. 8 or tool 900 of FIG. 9 and the technique of FIG. 2, in some embodiments, controller 829 and / or 929 is configured to cause the substrate heating unit to bring (i.e., heat) a wafer positioned on the substrate support feature to a first temperature and cause the process gas unit to flow a first process gas to the wafer. As described above, the first process gas is configured to modify one or more surface layers of material on the wafer by chemisorption, in some embodiments without the use of plasma, while the wafer is maintained at the first temperature. The controller can be further configured to cause the process gas unit to flow a second process gas or boron trichloride onto the substrate as described herein and remove the modified layer of material. The controller is further configured to cause the wafer transfer unit, including any of the robot arms, to transport the wafer between any of the processing stations, to control pressure units 816 and 916, which may include one or more vacuum pumps, and to control the pressure in the tool and chamber.

[0144] Although the subject matter disclosed herein has been particularly described with respect to the illustrated embodiments, it will be understood that various changes, modifications, and adaptations can be made based on this disclosure and are intended to be within the scope of the invention. It is to be understood that the description is not limited to the disclosed embodiments, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the scope of the claims.

[0145] The present disclosure includes the apparatus provided above and herein below. Referring now to FIG. 5, an example of a substrate processing chamber for etching materials according to the present disclosure is shown. Although a particular substrate processing chamber is shown and described, the methods described herein may be performed on other types of substrate processing systems. In various embodiments, a suitable apparatus or chamber for processing a particular disclosed embodiment includes one or more of the following components: anodized chamber body, anodized top plate, anodized liner, ceramic or anodized aluminum pedestal, heatable delivery lines for delivering boron trichloride, high nickel content stainless steel low pressure components, and a yttria coating.

[0146] 5 illustrates an exemplary apparatus 520 for semiconductor processing according to disclosed embodiments, including thermal atomic layer etching, which includes a chamber 522, a process gas unit 524, a substrate heating unit 526, and a substrate cooling unit 528. The processing chamber 522 has chamber walls 530 that at least partially bound and define a chamber interior 532 (which may be considered a plenum volume).

[0147] The process gas unit 524 is configured to flow a process gas, which may include liquids and / or gases, such as reactants, modifying, transforming, or removing molecules, over a substrate 534 in the chamber interior 532. The process gas unit 524 also includes one or more flow features 542, such as holes, nozzles (two of which are shown), or showerheads, configured to flow a first process gas over the substrate 534. The one or more flow features 542 can be positioned above, below, to the sides, or combinations thereof within the chamber interior 532, such as, for example, the walls, top, and bottom of the processing chamber. The process gas unit 524 may include a mixing vessel for blending and / or conditioning the process gases delivered to the chamber interior 532. One or more mixing vessel inlet valves can control the introduction of the process gases into the mixing vessel.

[0148] The process gas unit 524 can include a first process gas source 536, a first process liquid source 538, a vaporization point (not shown) where the first liquid can be vaporized into a gas, and a carrier gas source 540. Some reactants can be stored in liquid form before vaporization and after delivery to the chamber 522. The first process gas can include chlorine or fluorine, which in some embodiments are configured to modify one or more layers of material on the substrate without the use of a plasma, and the second process gas can include a compound having boron and chlorine, such as boron trichloride, as described above, onto the wafer in the second processing chamber.

[0149] In some implementations, the vaporization point may be a heated liquid injection module. In some other implementations, the vaporization point may be a heated vaporizer. In some other implementations, the vapor may be generated by applying a vacuum over a container containing the liquid reagent. In still other implementations, the vaporization point may be removed from the process station. In some implementations, a liquid flow controller (LFC) may be provided upstream of the vaporization point to control the mass flow rate of the liquid to be vaporized and delivered to the chamber interior 532. The carrier gas source 540 includes one or more carrier gases or liquids that may be flowed with the process gas, which may be an inert gas such as N2, Ar, Ne, He. The apparatus 520 may also include a vacuum pump 533 configured to pump the chamber interior to a low pressure, for example, a vacuum having a pressure of 1 mTorr or 10 Torr.

[0150] The chamber interior 532 includes substrate support features 535 configured to support and thermally levitate the substrate 534 within the chamber. The substrate support features 535 may include, for example, clamps, horizontal pins or supports, vertical pins or supports, and semicircular rings that support the substrate 534 in the chamber interior 532. These features are configured to support the substrate 534 such that the thermal mass of the substrate 534 is reduced as much as possible to the thermal mass of the substrate alone. Thus, each substrate support feature 535 may minimize contact with the substrate 534 and may be the minimum number of features required to adequately support the substrate during processing (e.g., to support the weight of the substrate and prevent inelastic deformation of the substrate). For example, the surface area of ​​one substrate support feature 535 in contact with the substrate may be less than about 1%, 0.5%, 0.1%, 0.05%, or 0.01% of the total surface area of ​​the backside of the substrate, and for example, 2, 3, or 4 features may be utilized.

[0151] In one example, the substrate support feature 535 may include two or more vertical pins having a groove that is wound or spiraled along a vertical longitudinal axis and offset at various distances from the longitudinal axis and configured to support a substrate. As the vertical pin rotates along its longitudinal axis and the edge of the substrate is positioned within the groove, the edge of the groove, and therefore the edge of the substrate, moves further away from the longitudinal axis. When multiple vertical pins are used to support a substrate, rotation of the vertical pins causes the groove to apply a support force to the substrate in a direction perpendicular to the longitudinal axis.

[0152] In some embodiments, the chamber 522 may include a wafer support pedestal including substrate lift pins. In some embodiments, the wafer support pedestal is made of ceramic. During thermal ALE processing, the lift pins may support and position the substrate from the pedestal such that there is substantially no transfer of thermal energy between the pedestal and the substrate (e.g., less than 10%, 5%, 1%, 0.5%, or 0.1% of the energy transferred between the two). In some other embodiments, the chamber 522 may not have a pedestal. In some embodiments, an electrostatic chuck (ESC) including a substrate heating unit 526 configured to heat the substrate to a temperature provided herein, such as between about 20° C. and 500° C., may be used.

[0153] The substrate heating unit 526 is configured to heat the substrate to multiple temperatures and maintain such temperatures for, e.g., at least 1 second, 5 seconds, 10 seconds, 30 seconds, 1 minute, 2 minutes, or 3 minutes. In some embodiments, the substrate heating unit 526 is configured to heat the substrate between at least two temperature ranges (a first range is between about 20° C. and 150° C., and a second range is between about 200° C. and 600° C.) and maintain the substrate at a temperature within these ranges for, e.g., at least 1 second, 5 seconds, or 10 seconds. Additionally, in some embodiments, the substrate heating unit 526 is configured to heat the substrate from the first temperature range to the second temperature range in, e.g., less than about 250 milliseconds, 150 milliseconds, 100 milliseconds, or 50 milliseconds.

[0154] In some embodiments, the substrate heating unit 526 is made of ceramic. The substrate heating unit 526 can utilize radiative heating, convective heating, laser heating, plasma heating, solid-to-solid heat transfer (e.g., transferring heat generated by one or more heating elements in a heated electrostatic chuck or pedestal to a substrate supported by or on that chuck or pedestal), or a combination of these items. In the case of radiative heating, the substrate heating unit 526 can be used for radiative light heating, ultraviolet heating, microwave heating, radio frequency heating, and induction heating. For example, the substrate heating unit 526 can include light emitting diodes (LEDs) that emit visible light having wavelengths that can range from 400 nanometers (nm) to 800 nm. This can include, for example, heat lamps, light emitting diodes (e.g., LEDs), ceramic heaters, quartz heaters, or multiple gradient index (GRIN) lenses connected to a light energy source. The GRIN lens is configured to deliver thermal energy (heat or light) to the substrate in a uniform manner from a light energy source, which may be a laser or high intensity light source that transfers thermal energy to the GRIN lens through a conduit, such as a fiber optic cable. The heating elements utilized by the substrate heating unit 526 may be positioned above, below, to the side of the substrate 534, or a combination of positions thereof, and may be positioned inside, outside, or both of the chamber interior 532. In FIG. 5, the heating elements utilized by the substrate heating unit 526 include multiple LEDs 526A positioned both above and below the substrate 534, with a lower heating element positioned inside the chamber interior 532 and an upper heating element positioned outside the chamber interior 532. In some embodiments, for some of the heating elements positioned outside the chamber 522 (which may also be referred to as a "process chamber"), the chamber 522 may have a window 554 that allows radiation to be transferred into the chamber interior 532 and onto the substrate 534. In some embodiments, this window 554 may be an optical grade quartz plate, while in other embodiments it may be a transparent indium tin oxide (ITO) window.In some embodiments, the substrate heating unit 526 includes multiple LEDs 526A and may be positioned only below the substrate 534, which may include the interior of the pedestal or ESC, which may also include a window through which light emitted by the LEDs may pass to reach the backside of the substrate. In various embodiments, the low pressure components downstream of the MFC are made of high nickel content stainless steel made from Hastelloy.

[0155] In the case of solid-to-solid heat transfer, the substrate heating unit 526 can have one or more heating surfaces configured to contact and heat the substrate inside the chamber. In some embodiments, the substrate heating unit 526 can have a heating platen, such as a flat surface or a surface of a substrate pedestal, configured to contact and heat the backside of the substrate. This heating platen may have heating elements, such as heating coils, heating fluids, or radiative heating as described above, that can heat the surface of the heating platen. The substrate can be heated when the backside of the substrate is in direct contact with the heating platen or offset from the heating platen but close enough to receive thermal energy from the heating platen. When this solid-to-solid heat transfer is used to heat the substrate, the substrate is separated from the heating platen when it is cooled. Although some conventional ALE devices may have a substrate pedestal that includes both heating and cooling elements, these devices cannot cycle between temperatures of the thermal ALE quickly (e.g., in less than 250 milliseconds) due to the large thermal mass of the pedestal that is repeatedly heated and cooled. For example, it may take seconds or minutes to heat the pedestal from a first temperature range (e.g., 20°C-100°C) to a second temperature range (e.g., 200°C-500°C), and it may take seconds or minutes to cool the pedestal from the second temperature range to a lower temperature that can cool the substrate to the first temperature range. Thus, after using this solid-to-solid heating technique, the heating platen and substrate are separated from each other, which may be accomplished, for example, by moving the substrate and / or heating platen away from each other. Without this separation, cooling of the thermal mass of both the substrate and heating platen occurs, increasing cooling times and decreasing substrate throughput. In some embodiments, an ESC or pedestal with a substrate heating unit and cooling Peltier elements can allow for fast heating and cooling times (such as about 30 seconds to cool the substrate to the desired temperature). In some embodiments, this can be performed at low pressures, such as less than 1 Torr, including less than 50 mTorr.

[0156] The substrate cooling unit 528 of FIG. 5 is configured to actively cool the substrate. In some embodiments, the substrate cooling unit 528 flows a cooling gas over the substrate 534 to actively cool the substrate 534. The substrate cooling unit 528 can include a cooling fluid source 548 that can include a cooling fluid (gas or liquid) and a cooler 550 that is configured to cool the cooling fluid to a desired temperature, such as, for example, 0° C., −50° C., −100° C., −150° C., −170° C., −200° C., and −250° C. or lower. The substrate cooling unit 528 includes piping and coolant flow features (not shown), e.g., nozzles or holes, configured to flow the coolant fluid into the chamber interior 532. In some embodiments, the fluid may be in a liquid state when flowing into the chamber 522 and may change to a vapor state when it reaches the chamber interior 532, e.g., if the chamber interior 532 is at a low pressure state, e.g., 1 Torr. The cooling fluid may be an inert element, such as nitrogen, argon, helium, etc. In some embodiments, the flow rate of the cooling fluid into the chamber interior 532 may be, for example, at least 10 liters / second, 50 liters / second, 100 liters / second, 150 liters / second, 200 liters / second, 250 liters / second, and 300 liters / second.

[0157] Various factors can increase the ability of the cooling fluid to cool the substrate. It has been discovered through various experiments that the higher the flow rate of the cooling fluid, the faster the substrate will cool. In one exemplary experiment, it was found that flowing a cooling gas at about -196°C over the substrate at a flow rate of 1 liter / second reduced the temperature of the substrate from about 220°C to about 215°C in about 5,000 milliseconds, while flowing the same cooling gas at a flow rate of 10 liters / second reduced the temperature of the substrate from about 220°C to about 195°C in about 5,000 milliseconds. It has also been discovered that the gap between the substrate and the top of the chamber can also affect the cooling of the substrate, with a smaller gap resulting in faster cooling. In one example, it was discovered that a substrate separated from the top of the chamber by a gap of about 50 micrometers was cooled from about 220° C. to about 215° C. in about 5,000 milliseconds using a cooling gas at about −196° C., and a substrate separated from the top of the chamber by a gap of about 5 millimeters was cooled from about 220° C. to about 209° C. in about 5,000 milliseconds using the same cooling gas. Thus, it was discovered that the higher the flow rate and the smaller the gap, the faster the substrate was cooled.

[0158] In some embodiments, the substrate cooling unit 528 can actively cool the substrate 534 using solid-to-solid heat transfer. In some of these embodiments, a cooling platen, such as a flat cooling surface, can be used to contact the bottom of the substrate to cool the substrate. The platen can be cooled by flowing a cooling fluid over, through, or under the platen. When using this solid-to-solid cooling, similar to the solid-to-solid heating described above, the substrate is separated from the cooling platen during heating of the substrate, such as by lifting the substrate away from the cooling platen with lift pins. Without this separation, more cooling would be required to cool the thermal mass of both the substrate and the cooling platen, resulting in increased process time and reduced throughput. In some embodiments, radiative heating of the top of the substrate or plasma heating of the bottom of the substrate can be used in conjunction with solid-to-solid cooling.

[0159] In some embodiments, the substrate cooling unit 528 can use laser cooling to cool the substrate. This can allow for cooling of a substrate that includes thulium molecules on at least the exposed surface of the substrate by utilizing the inverse Navier-Stokes reaction. For example, the temperature of the substrate manifests itself as phonons, and laser cooling releases photons onto the substrate surface that interact with and capture phonons in the thulium, leaving phonons from the thulium at a higher energy level in the substrate. Removal of these phonons reduces the temperature of the substrate. To allow for this laser cooling, thulium can be doped onto the surface of the substrate, and this doping can be incorporated into the techniques listed above, such as after or before an operation such as a removal operation.

[0160] As described above, some embodiments of the apparatus can include a plasma source configured to generate a plasma within the chamber, which can be a capacitively coupled plasma (CCP), an inductively coupled plasma (ICP), a top remote plasma, and a bottom remote plasma.

[0161] In some embodiments, the apparatus described herein may include a controller configured to control various aspects of the apparatus to perform the techniques described herein. For example, in FIG. 5, the apparatus 520 includes a controller 566 (which may include one or more physical or logical controllers) communicatively connected to the processing chamber and controlling some or all of the operation of the processing chamber. The controller 566 may include one or more memory devices 568 and one or more processors 570. In some embodiments, the apparatus includes, for example, a switching system for controlling flow rates and durations, a substrate heating unit, a substrate cooling unit, loading and unloading of the substrate in the chamber, thermal levitation of the substrate, and a process gas unit when the disclosed embodiments are implemented. In some embodiments, the apparatus may have a switching time of up to about 500 ms, or up to about 550 ms. The switching time may depend on the flow chemistry, the selected recipe, the reactor configuration, and other factors.

[0162] In some implementations, the controller 566 is part of an apparatus or system, such an apparatus or system may be part of the examples described above. Such a system or apparatus may include semiconductor processing equipment, including one or more processing tools, one or more chambers, one or more processing platforms, and / or specific processing components (gas flow systems, substrate heating units, substrate cooling units, etc.). These systems may be integrated with electronics for controlling the system operations before, during, and after processing of a semiconductor wafer or substrate. Such electronics may be referred to as a "controller" and may control various components or subparts of one or more systems. The controller 566 may be programmed to control any of the processes disclosed herein depending on the processing parameters and / or type of system. Such processes may include delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, position and motion settings, wafer loading and unloading to and from tools and other transfer tools connected or interlocked with the particular system, and / or wafer loading and unloading to and from load locks.

[0163] Broadly, the controller 566 may be defined as electronic equipment having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operations, enable cleaning operations, enable endpoint measurements, etc. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, i.e., microcontrollers that execute program instructions (e.g., software). The program instructions may be instructions communicated to the controller in the form of various individual settings (or program files) that define operational parameters for performing a particular process on or for a semiconductor wafer or for a system. The operational parameters may, in some embodiments, be part of a recipe defined by a process engineer to accomplish one or more processing operations in the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or wafer dies.

[0164] The controller 566 may in some embodiments be part of, coupled to, or a combination of a computer that is integrated or coupled with the system or otherwise networked to the system. For example, the controller may be in the "cloud" or all or part of a fab host computer system. This allows for remote access of wafer processing. The computer may allow remote access to the system to monitor the current progress of a fabrication operation, review the history of past fabrication operations, review trends or performance criteria from multiple fabrication operations, modify parameters of a current process, set processing operations following a current process, or initiate a new process. In some examples, a remote computer (e.g., a server) may provide process recipes to the system over a network. Such a network may include a local network or the Internet. The remote computer may include a user interface that allows for entry or programming of parameters and / or settings, which are then communicated from the remote computer to the system. In some examples, the controller 566 receives instructions in the form of data. Such data identifies parameters for each processing operation performed during one or more operations. It should be understood that the parameters may be specific to the type of process being performed and the type of tool that the controller is configured to interface with or control. Thus, as discussed above, the controller 566 may be distributed, for example, by having one or more individual controllers networked together and working together toward a common purpose (such as the processes and controls described herein). An example of a distributed controller for such purposes would include one or more integrated circuits on the chamber in communication with one or more integrated circuits located remotely (e.g., at the platform level or as part of a remote computer) and coupled to control the processes in the chamber.

[0165] As described above, depending on the process operation or operations being performed by the equipment, the controller 566 may communicate with one or more other equipment circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, nearby tools, tools located throughout the factory, a main computer, another controller, or tools used for material transport to and from tool locations and / or load ports within a semiconductor manufacturing factory.

[0166] Also as mentioned above, the controller is configured to implement any of the techniques described above. For example, referring to the apparatus 520 of FIG. 5 and the technique of FIG. 2, in some embodiments, the controller 566 is configured to cause the substrate heating unit 526 to bring (i.e., heat) the substrate 534 positioned on the substrate support feature 535 to a first temperature and cause the process gas unit 524 to flow a first process gas to the substrate 534. As mentioned above, the first process gas is configured to modify one or more surface layers of material on the substrate 534 by chemisorption, in some embodiments without the use of plasma, while the substrate is maintained at the first temperature. The controller 566 can be further configured to cause the process gas unit to flow a second process gas onto the substrate 534 as described herein and remove the modified layer of material. Some implementations include a controller 566 that deposits one or more layers of encapsulation material onto the substrate 534 as provided herein.

[0167] As mentioned above, some etches performed herein may be temperature controlled features of the processing chamber, such as the sidewalls, top, and / or bottom of the processing chamber, as well as the showerhead and gas delivery system. FIG. 6 illustrates a cross-sectional side view of an exemplary apparatus according to disclosed embodiments. As described in more detail below, the apparatus 600 is capable of rapidly and precisely controlling the temperature of a substrate, including performing thermal etching operations. The apparatus 600 includes a processing chamber 602, a pedestal 604 having a substrate heater (not shown) and a plurality of substrate supports 608 configured to support a substrate 618, and a gas distribution unit 610.

[0168] The processing chamber 602 includes sidewalls 612A, a top 612B, and a bottom 612C that at least partially define a chamber interior 614, which can be considered a plenum volume. As described herein, in some embodiments, it may be desirable to actively control the temperature of the chamber walls 612A, top 612B, and bottom 612C to prevent unwanted condensation on their surfaces. Some new semiconductor processing operations flow vapors, such as water and / or alcohol vapors, over a substrate, which adsorbs onto the substrate, but may also undesirably adsorb onto the interior surfaces of the chamber. This can result in unwanted deposition and etching on the interior chamber surfaces, damaging the chamber surfaces, and causing substrate defects by flaking particles onto the substrate. To reduce and prevent unwanted condensation on the interior chamber surfaces, the temperatures of the chamber walls, top, and bottom may be maintained at temperatures that do not cause condensation of chemicals used in the processing operations.

[0169] This active temperature control of the chamber surfaces can be achieved by heating the chamber walls 612A, top 612B, and bottom 612C using heaters. As shown in FIG. 6, the chamber heater 616A is positioned on the chamber wall 612A and configured to heat the chamber wall 612A, the chamber heater 616B is positioned on the top 612B and configured to heat the top 612B, and the chamber heater 616C is positioned on the bottom 612C and configured to heat the bottom 612C. The chamber heaters 616A-616C may be resistive heaters configured to generate heat when a current flows through a resistive element. The chamber heaters 616A-616C may also be fluid conduits through which a heat transfer fluid, such as a heating fluid that may include heated water, can flow. In some cases, the chamber heaters 616A-616C may be a combination of both a heating fluid and a resistive heater. The chamber heaters 616A-616C are configured to generate heat to bring the inner surfaces of each of the chamber walls 612A, top 612B, and bottom 612C to a desired temperature, which may range from about 40° C. to about 150° C., including, for example, about 80° C. to about 130° C., about 90° C., or about 120° C. It has been discovered that under some conditions, water and alcohol vapors do not condense on surfaces maintained at or above about 90° C.

[0170] The chamber walls 612A, top 612B, and bottom 612C may also be constructed of various materials that can withstand the chemicals used in the processing techniques. These chamber materials may include, for example, aluminum, anodized aluminum, aluminum with a polymer such as plastic, metal or metal alloy with a yttria coating, metal or metal alloy with a zirconia coating, and metal or metal alloy with an aluminum oxide coating, and in some cases the materials of the coating may be blended or layers of combinations of different materials, such as alternating layers of aluminum oxide and yttria, or aluminum oxide and zirconia. In some embodiments, the chamber includes an anodized aluminum liner. These materials are configured to withstand the chemicals used in the processing techniques, such as anhydrous HF, water vapor, methanol, isopropyl alcohol, chlorine, fluorine gas, nitrogen gas, hydrogen gas, helium gas, and mixtures thereof.

[0171] The apparatus 600 may also be configured to perform processing operations at or near a vacuum, such as from about 0.1 Torr to about 100 Torr, or from about 20 Torr to about 200 Torr, or from about 0.1 Torr to about 10 Torr, which may include a vacuum pump 684 configured to pump the chamber interior 614 to a low pressure, such as a vacuum having a pressure of from about 0.1 Torr to about 100 Torr, including from about 0.1 Torr to about 10 Torr, and from about 20 Torr to about 200 Torr, or from about 0.1 Torr to about 10 Torr.

[0172] Various features of the pedestal 604 will now be described. The pedestal 604 includes a substrate heater 622 (encircled by a dashed rectangle in FIG. 6) having a plurality of LEDs 624 configured to emit visible light having wavelengths between 400 nm and 800 nm, including 450 nm. The heater LEDs emit this visible light to the backside of the substrate to heat the substrate. Visible light having wavelengths between about 400 nm and 800 nm can quickly and efficiently heat a silicon wafer to ambient temperatures, e.g., from about 20° C. to about 600° C., because silicon absorbs light in this range. In contrast, radiative heating, including infrared radiation, may not effectively heat silicon at temperatures up to about 400° C., because silicon tends to be transparent to infrared radiation at temperatures below about 400° C. Conventional "hot plate" heaters, which rely on solid-to-solid heat transfer between a substrate and a heating platen, such as a pedestal having a heating coil, have relatively slow heating and cooling rates, resulting in non-uniform heating that can be caused by substrate warping and inconsistent contact with the heating platen. For example, it may take several minutes to heat a conventional pedestal to a desired temperature and to heat it from a first temperature to a second, higher temperature, as well as to cool the pedestal to a lower temperature.

[0173] The heater's LEDs may be arranged, electrically connected, and electrically controlled in various ways. Each LED may be configured to emit visible blue light and / or visible white light. In certain embodiments, white light (generated using a wavelength range in the visible portion of the EM spectrum) is used. In some semiconductor processing operations, white light can reduce or prevent unwanted thin film interference. For example, some substrates have backside films that reflect different light wavelengths in varying amounts, resulting in non-uniform and potentially inefficient heating. Using white light can reduce this unwanted reflection variation by averaging out the thin film interference across the broad visible spectrum provided by white light. In some cases, it may be advantageous to use visible non-white light, such as blue light with a wavelength of 450 nm, to provide a single or narrow band of wavelengths depending on the material at the backside of the substrate, and to provide more efficient, powerful, and directed heating of some substrates that may absorb narrow band wavelengths than white light.

[0174] Various types of LEDs can be used. Examples include chip-on-board (COB) LEDs or surface-mounted diode (SMD) LEDs. For SMD LEDs, the LED chip may be fused to a printed circuit board (PCB) that may have multiple electrical contacts that allow control of each diode on the chip. For example, a single SMD chip is typically limited to having three diodes (e.g., red, blue, or green) that may be individually controllable to produce different colors. SMD LED chips may range in size from 2.8×2.5 mm, 3.0×3.0 mm, 3.5×2.8 mm, 5.0×5.0 mm, and 5.6×3.0 mm. For COB LEDs, each chip may have four or more diodes, such as nine, twelve, dozens, hundreds, or more, printed on the same PCB. COB LED chips typically have one circuit and two contacts regardless of the number of diodes, thereby providing a simple design and efficient monochromatic applications. The ability and performance of the LEDs to heat the substrate can be measured by the watts of heat emitted by each LED, which may contribute directly to heating the substrate.

[0175] FIG. 7 illustrates a top view of a substrate heater with a plurality of LEDs. The substrate heater 622 includes a printed circuit board (PCB) 626 and a plurality of LEDs 624, some of which are labeled. The illustrated plurality includes approximately 1,300 LEDs. External connections 628 are connected by traces to provide power to the plurality of LEDs 624. As shown in FIG. 7, the LEDs may be arranged along multiple arcs radially offset from a center 630 of the substrate heater 622 by different radii, and in each arc, the LEDs may be equally spaced from one another. For example, one arc 632 is a portion of a circle with a radius R that is surrounded by a partially shaded dotted shape, includes 16 LEDs 624, and extends around the center 630. The 16 LEDs 624 can be considered to be equally spaced from one another along this arc 632.

[0176] In some embodiments, the plurality of LEDs may include at least about 1,000 LEDs, including, for example, more than about 1,200, 1,500, 2,000, 3,000, 4,000, 5,000, or 6,000 LEDs. Each LED may be configured to use 4 watts or less at 100% power, including, in some cases, 3 watts at 100% power and 1 watt at 100% power. The LEDs may be arranged in and electrically connected to individually controllable zones to allow for temperature adjustment and fine tuning across the substrate. In some cases, the LEDs may be grouped into at least 20, for example, independently controllable zones, including, for example, at least about 25, 50, 75, 80, 85, 90, 95, or 100 zones. The zones may allow for radial and azimuthal (i.e., angular) temperature adjustment. The zones may be arranged in a defined pattern, such as a rectangular grid, a hexagonal grid, or other suitable pattern to generate a desired temperature profile. The zones may also have various shapes, such as squares, trapezoids, rectangles, triangles, ovals, ellipses, circles, annuli (e.g., rings), partial annuli (i.e., annular sectors), arcs, segments, and sectors centered on the center of the heater and having a radius equal to or less than the full radius of the PCB of the substrate heater. These zones can adjust the temperature at multiple locations across the wafer to create a more uniform temperature distribution, as well as a desired temperature profile, such as a higher temperature around the edge of the substrate than the center of the substrate. Independent control of these zones may also include the ability to control the power output of each zone. For example, each zone may have at least 15, 20, or 25 adjustable power outputs. In some cases, each zone has one LED, allowing each LED to be individually controlled and adjusted, which can result in a more uniform heating profile on the substrate. Thus, in some embodiments, each LED of the multiple LEDs in the substrate heater may be individually controllable.

[0177] In certain embodiments, the substrate heater 622 is configured to heat the substrate to multiple temperatures and maintain each such temperature for various durations. These durations may include the following non-limiting examples: at least about 1 second, at least about 5 seconds, at least about 10 seconds, at least about 30 seconds, at least about 60 seconds, at least about 90 seconds, at least about 120 seconds, at least about 150 seconds, or at least about 180 seconds. The substrate heater may be configured to heat the substrate to, for example, about 50°C to 150°C, including about 130°C, or about 50°C to 600°C, including about 150°C to 350°C. The substrate heater may be configured to maintain the substrate at a temperature within these ranges for various durations, including the following non-limiting examples: at least about 1 second, at least about 5 seconds, at least about 10 seconds, at least about 30 seconds, at least about 60 seconds, at least about 90 seconds, at least about 120 seconds, at least about 150 seconds, or at least about 180 seconds. Additionally, in some embodiments, the substrate heater 622 is configured to heat the substrate to any temperature within these ranges, for example, in less than about 60 seconds, less than about 45 seconds, less than about 30 seconds, or less than about 15 seconds. In certain embodiments, the substrate heater 622 is configured to heat the substrate at one or more heating rates, such as, for example, at least about 0.1° C. / sec to at least about 20° C. / sec.

[0178] The substrate heater can increase the temperature of the substrate by having the LED emit visible light at one or more power levels, including at least about 80%, at least about 90%, at least about 95%, or at least about 100% power. In some embodiments, the substrate heater is configured to emit at about 10W to 4000W, including at least about 10W, at least about 30W, at least about 0.3 kilowatts (kW), at least about 0.5kW, at least about 2kW, at least about 3kW, or at least about 4kW. The apparatus is configured to provide about 0.1kW to 9kW of power to the pedestal, and a power source, not shown, is connected to the substrate heater through the pedestal. During the temperature increase, the substrate heater may operate at a high power and at a lower power level (including, for example, about 5W to about 0.5kW) to maintain the temperature of the heated substrate.

[0179] In some embodiments, the substrate heater may also include a pedestal cooler thermally connected to the LEDs such that heat generated by the LEDs may be transferred from the LEDs to the pedestal cooler. This thermal connection is such that heat may be conducted from the LEDs to the pedestal cooler along one or more heat flow paths between these components. In some cases, the pedestal cooler is in direct contact with one or more elements of the substrate heater, and in other instances, other conductive elements, such as a thermally conductive plate (e.g., including metal), are interposed between the substrate heater and the pedestal cooler. Referring back to FIG. 8 , the substrate heater includes a pedestal cooler 636 in direct contact with a bottom of the PCB 626. Heat is configured to flow from the LEDs to the PCB 626 and to the pedestal cooler 636. The pedestal cooler 636 also includes a plurality of fluid conduits 638 and is configured to allow a heat transfer fluid, such as water, to flow through the fluid conduits 638 to receive heat and thereby cool the LEDs in the substrate heater 622. The fluid conduit 638 may be connected to a reservoir and pump (not shown) located outside the chamber. In some cases, the pedestal cooler may be configured to flow chilled water, such as at about 5°C to 20°C.

[0180] As provided herein, it may be advantageous to actively heat the exterior surface of the processing chamber 602. In some cases, it may be advantageous to heat the exterior surface of the pedestal 604 to prevent unwanted condensation and deposition on its exterior surface as well. As shown in FIG. 6, the pedestal 604 may further include a pedestal heater 644 on the inside of the pedestal 604 configured to heat the exterior surface of the pedestal 604, including its side 642A and bottom 642B. The pedestal heater 644 may include one or more heating elements, such as one or more resistive heating elements, and a fluid conduit configured to have a heated fluid flow therethrough. In some cases, both the pedestal cooler and the pedestal heater may have fluid conduits fluidly connected to each other such that the same heat transfer fluid may flow to both the pedestal cooler and the pedestal heater. In these embodiments, the fluid may be heated to between 50° C. and 130° C., including between about 90° C. and 120° C.

[0181] The pedestal may also include a window that protects the substrate heater including the multiple LEDs from damage caused by exposure to the process chemicals and pressures used during the processing operations. As shown in FIG. 6, a window 650 may be positioned over the substrate heater 622 and sealed to the sidewall 649 of the pedestal 604 to form a plenum volume within the pedestal that is fluidly isolated from the chamber interior. This plenum volume may also be considered the interior of the bowl 646. The window may be composed of one or more materials that are optically transparent to the visible light emitted by the LEDs, including light having wavelengths in the range of 400 nm to 800 nm. In some embodiments, the material may be quartz, sapphire, quartz with a sapphire coating, or calcium fluoride (CaF). The window may also have no holes or openings in its interior. In some embodiments, the heater may have a thickness of 15 to 30 mm, including 20 mm and 25 mm.

[0182] As shown in FIG. 6, the substrate support 608 of the pedestal 604 is configured to support the substrate 618 above and offset from the window 650 and the substrate heater 622. In certain embodiments, the temperature of the substrate can be rapidly and precisely controlled by thermally levitating or thermally isolating the substrate in the chamber. Heating and cooling of the substrate targets both the thermal mass of the substrate and the thermal mass of other items in contact with the substrate. If the substrate is in thermal contact with a large object, for example, the entire backside of the substrate rests on a large surface of a pedestal or electrostatic chuck, as in many conventional etching apparatus, this object acts as a heat sink for the substrate which affects the ability to precisely control the substrate temperature and reduces how quickly the substrate heats and cools. It is therefore desirable to position the substrate so that a minimum of thermal mass is heated and cooled. The thermal levitation is configured to position the substrate so that it has minimal thermal contact (including direct and radiative) with other objects in the chamber.

[0183] Thus, the pedestal 604 is configured, in some embodiments, to support the substrate 618 by thermally levitating or thermally isolating the substrate in the chamber interior 614. The multiple substrate supports 608 of the pedestal 604 are configured to support the substrate 618 such that the thermal mass of the substrate 618 is reduced as much as possible to the thermal mass of the substrate 618 alone. Each substrate support 608 can have a substrate support surface 620 that provides minimal contact with the substrate 618. The number of substrate supports 608 may range from at least three, e.g., at least six or more. The surface area of ​​the support surface 620 may also be the minimum area required to adequately support the substrate during processing operations (e.g., to support the weight of the substrate and prevent inelastic deformation of the substrate). In some embodiments, the surface area of ​​a support surface 620 may be, for example, less than about 0.1%, less than about 0.075%, less than about 0.05%, less than about 0.025%, or less than about 0.01%.

[0184] The substrate support is also configured to prevent the substrate from contacting other elements of the pedestal, including the surface of the pedestal and features below the surface. The substrate 618 is also offset from the substrate heater 622 (measured from the top surface of the substrate heater 622, which in some cases may be the top surface of the LEDs 624) by a distance that can affect many aspects of the heating of the substrate 618.

[0185] As described, the substrate supports 608 are configured to support the substrate 618 over the window. In some embodiments, these substrate supports are stationary and fixed in place and may not be lift pins or support rings. In some embodiments, at least a portion of each substrate support 608, including the support surface 620, may be constructed of a material that is transparent to at least the light emitted by the LEDs 624. This material may be quartz or sapphire, in some cases. The transparency of these substrate supports 608 may allow visible light emitted by the LEDs of the substrate heater 622 to pass through the substrate supports 608 and reach the substrate 618, so that the substrate supports 608 do not block this light and the substrate 618 can be heated within the area where it is supported. This may provide more uniform heating of the substrate 618 than using a substrate support that includes a material that is opaque to visible light. In some other embodiments, the substrate supports 608 may be constructed of an opaque material, such as zirconium dioxide (ZrO2).

[0186] Referring back to FIG. 6, in some embodiments, the pedestal is also configured to move vertically. This may include moving the pedestal to allow a gap 686 between the faceplate 676 of the gas distribution unit 610 and the substrate 618 to range from 2 mm to 70 mm. As provided in more detail below, moving the pedestal vertically may allow active cooling of the substrate and faster cycle times for processing operations including flowing and purging of gases due to the low volume created between the gas distribution unit 610 and the substrate 618. This movement may also allow for the creation of a small process volume between the substrate and the gas distribution unit, which can result in smaller purge and process volumes, thus reducing purge and gas transfer times and increasing throughput.

[0187] The gas distribution unit 610 is configured to flow process gases over the substrate 618 in the chamber interior 614, which may include liquids and / or gases, such as reactants, modifying, transforming, or removing molecules. As seen in FIG. 6, the gas distribution unit 610 includes one or more fluid inlets 670 fluidly connected to one or more gas sources 672 and / or one or more vapor sources 674. In some embodiments, the gas lines and mixing chamber may be heated to prevent unwanted condensation of vapors or gases flowing therethrough. These lines may be heated to at least about 40° C., at least about 80° C., at least about 90° C., at least about 120° C., at least about 130° C., or at least about 150° C. The one or more vapor sources may include one or more sources of gas and / or liquid to be vaporized. Vaporization may be a direct injection vaporizer, a flow-over vaporizer, or both. The gas distribution unit 610 also includes a faceplate 676 that includes a number of through-holes 678 that fluidly connect the gas distribution unit 610 with the chamber interior 614. These through-holes 678 are fluidly connected to one or more fluid inlets 670 and further extend through a front surface 677 of the faceplate 676, which is configured to face the substrate 618. In some embodiments, the gas distribution unit 610 may be considered a top plate, and in some other embodiments, may be considered a showerhead.

[0188] The through-holes 678 may be configured in a variety of ways to deliver a uniform flow of gas onto the substrate. In some embodiments, the through-holes may all have the same outer diameter, such as about 0.03 inches to 0.05 inches, including 0.04 inches (1.016 mm). The faceplate through-holes may also be positioned across the faceplate to create a uniform flow from the faceplate.

[0189] Referring back to FIG. 6, the gas distribution unit 610 may also include a unit heater 680 thermally connected to the faceplate 676, such that heat may be transferred between the faceplate 676 and the unit heater 680. The unit heater 680 may include fluid conduits through which a heat transfer fluid may flow. As above, the heat transfer fluid may be heated, for example, to a temperature range of about 20° C. to 120° C. In some cases, the unit heater 680 may be used to heat the gas distribution unit 610 and prevent unwanted condensation of vapors and gases, and in some such examples, this temperature may be at least about 90° C. or 120° C.

[0190] In some embodiments, the gas distribution unit 610 may include a second unit heater 682 configured to heat the faceplate 676. The second unit heater 682 may include one or more resistive heating elements, fluid conduits for flowing a heated fluid, or both. The use of two heaters 680 and 682 in the gas distribution unit 610 may enable various heat transfers within the gas distribution unit 610. This may include using the first and / or second unit heaters 680 and 682 to heat the faceplate 676 to provide a temperature controlled chamber, as described above, to reduce or prevent unwanted condensation on elements of the gas distribution unit 610.

[0191] The apparatus 600 may also be configured to cool the substrate. This cooling may include flowing a cooling gas over the substrate, moving the substrate close to the faceplate to allow heat transfer between the substrate and the faceplate, or both. Actively cooling the substrate allows for more precise temperature control and faster transitions between temperatures, thereby reducing processing time and improving throughput. In some embodiments, a first heater unit 680 flowing a heat transfer fluid through a fluid conduit may be used to cool the substrate 618 by transferring heat transferred from the substrate 618 away from the faceplate 676. The substrate 618 may thus be cooled by being positioned in close proximity to the faceplate 676, such as by a gap 686 of 5 mm or 2 mm or less, such that heat at the substrate 618 is transferred radiatively to the faceplate 676 and transferred away from the faceplate 676 by the heat transfer fluid in the first unit heater 680. The faceplate 676 may therefore be considered a heat sink for the substrate 618 for cooling the substrate 618 .

[0192] In some embodiments, the apparatus 600 may further include a cooling fluid source 673, which may include a cooling fluid (gas or liquid) and a cooler (not shown) configured to cool the cooling fluid to a desired temperature, such as, for example, at least about 90° C., at least about 70° C., at least about 50° C., at least about 20° C., at least about 10° C., at least about 0° C., at least about −50° C., at least about −100° C., at least about −150° C., at least about −190° C., at least about −200° C., or at least about −250° C. or less. The apparatus 600 includes piping that delivers the cooling fluid to the one or more fluid inlets 670 and a gas distribution unit 610 configured to flow the cooling fluid over the substrate. In some embodiments, the fluid may be in a liquid state when flowed into the processing chamber 602 and in a vapor state when it reaches the chamber interior 614, for example, when the chamber interior 614 is at a low pressure, such as, for example, about 0.1 Torr to 10 Torr, or about 0.1 Torr to 100 Torr, or about 20 Torr to 200 Torr, as described above. The cooling fluid may be an inert element, such as nitrogen, argon, or helium. In some cases, the cooling fluid may include or have only a non-inert element or mixture, such as hydrogen gas. In some embodiments, the flow rate of the cooling fluid into the chamber interior 614 may be, for example, at least about 0.25 liters / minute, at least about 0.5 liters / minute, at least about 1 liter / minute, at least about 5 liters / minute, at least about 10 liters / minute, at least about 50 liters / minute, or at least about 100 liters / minute. In certain embodiments, the apparatus may be configured to cool the substrate at one or more cooling rates, such as at least about 5° C. / sec, at least about 10° C. / sec, at least about 15° C. / sec, at least about 20° C. / sec, at least about 30° C. / sec, or at least about 40° C. / sec.

[0193] In some embodiments, the apparatus 600 may actively cool the substrate by both moving the substrate near the faceplate and flowing a cooling gas over the substrate. In some cases, active cooling may be more effective by flowing a cooling gas while the substrate is in close proximity to the faceplate. The effectiveness of the cooling gas may also depend on the type of gas used.

[0194] The apparatus provided herein can thus rapidly heat and cool the substrate. FIG. 9 provides an exemplary temperature control sequence. At time 0, the substrate is at approximately 20 or 25° C., and the LEDs of the substrate heater provided herein emit visible light having a wavelength of 400 nm to 800 nm, raising the substrate temperature to approximately 400° C. in approximately 30 seconds. This heating was accomplished using 1 kW to 2 kW of heating power, provided by an approximately 9 kW power supply to the substrate heater. From approximately 30 seconds to approximately 95 seconds, the substrate heater 622 held the substrate at 400° C. using a lower power, such as 0.3 to approximately 0.5 kW of heating power, provided by an approximately 2 kW power supply. From approximately 30 to 60 seconds, the substrate was actively cooled using both a cooling gas (e.g., hydrogen or helium) flowed over the substrate and heat transfer to the faceplate. Once cooled, the substrate heater heated the substrate to maintain its temperature at approximately 70° C. using approximately 10-30 W of heating power provided by a power supply of approximately 100 W. A variety of processing techniques can use this type of sequence once or repeatedly to process the substrate.

[0195] In some embodiments, the apparatus 600 may include a mixing plenum to blend and / or condition the process gases for delivery before reaching the fluid inlet 670. One or more mixing plenum inlet valves may control the introduction of the process gases into the mixing plenum. In some other embodiments, the gas distribution unit 610 may include one or more mixing plenums within the gas distribution unit 610. The gas distribution unit 610 may also include one or more annular channels fluidly connected to the through-holes 678 to evenly distribute received fluids to the through-holes 678 to provide a uniform flow onto the substrate.

[0196] The apparatus 600 includes a controller 631, which may be the same as the controller 631 and may include one or more physical or logical controllers communicatively coupled to the processing chambers and capable of controlling some or all of the operation of the processing chambers and performing any of the processes described herein. The controller 631 may include one or more memory devices 633 and one or more processors 635.

[0197] Wafer transfer is further described with reference to FIG. 8, which illustrates a first exemplary processing apparatus according to disclosed embodiments. Additional features of the tool 800 are described in more detail below, where various features related to some of the described techniques are described. The tool 800 includes a first processing chamber 802, a second processing chamber 804, and a third processing chamber 806. In some implementations, the first processing chamber 802 is configured to perform an etching operation, such as RIE or other ion-assisted etching, on the wafer, and the second processing chamber 804 is configured to perform a thermal etch, including a thermal ALE. The second processing chamber 804 also includes multiple processing stations, namely, four stations 880A-880D, each capable of processing a wafer. The first and second processing chambers 802 and 804 may be considered as etching chambers. The third processing chamber 806 is configured to perform deposition on the wafer and may be considered as a deposition chamber. The third processing chamber 806 also includes multiple processing stations, namely, four stations 882A-D, each capable of processing a wafer. The second and third processing chambers 804 and 806 may be considered a multi-station processing chamber.

[0198] The tool 800 also includes a wafer transfer unit, configured to transport one or more wafers within the tool 800. For example, after a wafer is etched in the first processing chamber 802, the wafer transfer unit can transfer the wafer from the first processing chamber 802 to a second processing chamber 804, where a thermal etch as described herein can be performed on the one or more wafers. Following this thermal etch in the second processing chamber 804, the wafer transfer unit can transfer the one or more wafers from the second processing chamber 804 to a third processing chamber 806, where one or more layers of encapsulating material can be deposited on the one or more wafers.

[0199] 8, the wafer transfer unit includes a first robot arm unit 808 in a first wafer transfer module 810 and a second robot arm unit 812 in a second wafer transfer module 814. The first robot arm unit 808 is configured to transfer wafers between the first processing chamber 802 and the second robot arm unit 812, and the second robot arm unit 812 is configured to transfer wafers between the first robot arm unit 808, the second processing chamber 804, and the third processing chamber 806. In one embodiment, each robot arm unit 808 and 812 may have one arm, and in another embodiment, each may have two arms, with each arm having an end effector to pick substrates for transfer. An atmospheric transfer module (ATM) 822, for example a front end robot 820 in an equipment front end module (EFEM), can be used to transfer substrates from a cassette or front opening unified pod (FOUP) 824 to the airlock 818.

[0200] Each of the first and second wafer transfer modules may be a vacuum transfer module (VTM). An airlock 818, also known as a loadlock or transfer module, is shown and may be individually optimized to perform various fabrication processes. The tool 800 also includes a pressure unit 816 configured to reduce the pressure of the tool 800 to a vacuum or low pressure, for example, about 1 mTorr to about 10 Torr, and maintain the tool 800 at this pressure. This includes maintaining the first, second, and third processing chambers 802-1006, the first wafer transfer module 810, and the second robot arm unit 812 at a vacuum or low pressure.

[0201] As the wafer is transferred throughout the tool, it may be in an environment that is maintained at vacuum or low pressure. For example, as the wafer is transferred from the first processing chamber 802 to the first wafer transfer module 810 to the second wafer transfer module 814 to the second processing chamber 804, the wafer is exposed to and maintained at vacuum or low pressure and is not exposed to atmospheric pressure. Similarly, as the wafer is transferred from the second processing chamber 804 to the second wafer transfer module 814 to the third processing module 806, the wafer is maintained at vacuum or low pressure and is not exposed to atmospheric pressure.

[0202] In a further example, the substrate is placed in one of the FOUPs 824 and the front-end robot 820 transfers the substrate from the FOUP 824 to the aligner, which allows the substrate to be properly centered before being etched, deposited on, or otherwise processed. After being aligned, the substrate is moved by the front-end robot 820 to the airlock 818. The airlock module has the ability to accommodate the environment between the ATM and the VTM, so the substrate can be moved between the two pressure environments without being damaged. From the airlock 818, the substrate is moved by the first robot arm unit 808 through the first wafer transfer module 810 or the VTM 810 to the first processing chamber 802. To accomplish this substrate movement, the first robot arm unit 808 uses an end effector for each of its arms.

[0203] In some embodiments using the tool 800 of FIG. 8, an etching operation may be performed in multiple processing chambers. For example, an etching operation such as RIE or other ion-assisted etching may be performed in processing chamber 802, and a thermal etch such as thermal ALE may be performed in a different processing chamber, such as a second processing chamber 804. The use of two different etch processing chambers may allow for the use of different etching techniques on the wafer. For example, a thermal atomic layer etch may be performed in the first processing chamber 802, and a thermal etch cleaning operation may be performed in the second processing chamber 804.

[0204] In some embodiments, instead of using RIE etching or other ion-assisted etching to remove material from the substrate surface, thermal etching may be used to etch the material. The techniques for thermal etching of the material may be the same as those provided above, except that a cleaning operation may not be necessary because RIE or ion-assisted etching is not performed. Following the thermal etching, the wafer may be transferred to a deposition chamber where an encapsulation material is deposited thereon.

[0205] Some thermal etches provided herein may include etching multiple layers, such as etching multiple layers of material simultaneously. This may include multiple layers located in a stack of materials. For example, a wafer may have multiple trenches, holes, or vias, each with multiple layers of material and sidewalls with different geometries. Materials may be deposited in these trenches, holes, or vias to form various devices, and due to the isotropic nature of the thermal etches described herein, materials may be etched in various structures.

[0206] Various apparatuses may be used to perform the thermal etching. For example, in the tool 800 of FIG. 8, the second processing chamber 804 may be used for this thermal etching, and the third processing chamber 806 may be used for the deposition of the encapsulation material. In another example, an apparatus having two processing chambers may be used. FIG. 9 illustrates a second exemplary processing apparatus according to the disclosed embodiments. The tool 900 includes a first processing chamber 902 and a second processing chamber 904. This tool 900 does not include the tool 800 of FIG. 8. The first processing chamber 902 includes a number of processing stations, namely, four stations 980A-980D, each capable of processing a wafer. The first processing chamber 902 is configured to perform a thermal etching operation on the wafer, including thermal etching such as thermal ALE of a material. The second processing chamber 904 is configured to perform deposition on the wafer and may be considered a deposition chamber. The second processing chamber 904 also includes a number of processing stations, namely, four stations 982A-D, each capable of processing a wafer. The first and second processing chambers 902 and 904 may be considered a multi-station processing chamber. The processing chambers 902 and 904 may, in some embodiments, be the same as the processing chambers 804 and 806 of FIG.

[0207] The tool 900 also includes a wafer transfer unit configured to transport one or more wafers within the tool 900. Additional features of the tool 900 are described in more detail below, where various features related to some of the described techniques are described. In the illustrated example, the wafer transfer unit includes a first robot arm unit 908 in a first wafer transfer module 910 and a second robot arm unit 912 in a second wafer transfer module 914, which may be considered as front-end equipment modules (EFEMs) configured to receive containers for wafers, such as a front-opening unified module (FOUP) 916. The first robot arm unit 908 is configured to transport wafers between the first processing chamber 902 and the second processing chamber 904, and between the second robot arm unit 912. The second robot arm unit 912 is configured to transport wafers between the FOUP and the first robot arm unit 908. After the wafer is etched using a thermal etch, such as thermal ALE, in the first processing chamber 902, a wafer transfer unit can transfer the wafer from the first processing chamber 902 to a second processing chamber 904, where one or more layers of encapsulating material can be deposited on the wafer or wafers.

[0208] Similar to above, the first transfer module 910 may be a vacuum transfer module (VTM). An airlock 920, also known as a loadlock or transfer module, is shown and may be individually optimized to perform various fabrication processes. The tool 900 also includes a FOUP 916 configured to reduce the pressure of the tool 900 to a vacuum or low pressure, for example, about 1 mTorr to about 10 Torr, and maintain the tool 900 at this pressure. This includes maintaining the first and second processing chambers 902 and 904, as well as the first wafer transfer module 910, at a vacuum or low pressure. The second wafer transfer module 914 may be at a different pressure, such as atmospheric pressure. Thus, as the wafer is transferred throughout the tool 900, the wafer is maintained at a vacuum or low pressure. For example, as the wafer is transferred from the first processing chamber 902 to the first wafer transfer module 910 to the second processing chamber 904, the wafer is maintained at a vacuum or low pressure and is not exposed to atmospheric pressure. In a further example, a substrate is placed in one of the FOUPs 918, and the second robot arm unit 912 or front-end robot transfers the substrate from the FOUP 918 to an aligner, which allows the substrate to be properly centered before being etched, deposited on, or otherwise processed. After being aligned, the substrate is moved by the second robot arm unit 912 to the airlock 920. The airlock module has the ability to accommodate the environment between the ATM and the VTM, so the substrate can be moved between the two pressure environments without being damaged. From the airlock 920, the substrate is moved by the first robot arm unit 908 through the first wafer transfer module 910 or VTM 910 to the first processing chamber 902. To accomplish this substrate movement, the first robot arm unit 908 uses end effectors on each of its arms.

[0209] experiment Experiment 1 Experiments were conducted with 20 cycles of atomic layer etch exposures at 60 mTorr using a substrate temperature of 250 °C. Blanket wafers containing hafnium oxide, aluminum oxide, and indium gallium zinc oxide (IGZO) were exposed to boron trichloride with hydrogen fluoride, and boron trichloride without hydrogen fluoride. Blanket wafers containing hafnium oxide, aluminum oxide, and indium gallium zinc oxide were exposed to dimethylaluminum chloride (DMAC). The etch rate per cycle using boron trichloride was greater than the etch rate of DMAC for hafnium oxide and IGZO, and the etch rate per cycle using boron trichloride was less than the etch rate of DMAC for aluminum oxide. Aluminum oxide and hafnium oxide were not substantially etched using boron trichloride alone. IGZO was slightly etched using boron trichloride alone, but the etch rate was roughly an order of magnitude less than that using HF / BCl3 (Figure 10).

[0210] Experiment 2 Experiments were conducted at 275°C and 110 mTorr with 5, 10, 20, and 40 cycles of atomic layer etch exposure. Blanket wafers containing hafnium oxide, aluminum oxide, silicon, silicon dioxide, silicon nitride, titanium nitride, and tungsten were exposed to hydrogen fluoride and dimethylaluminum chloride (DMAC) in cyclic ALE. Etch volumes were measured after 5, 10, 20, and 40 cycles and are graphed in FIG. 11A. Blanket wafers containing hafnium oxide, aluminum oxide, silicon, silicon dioxide, silicon nitride, titanium nitride, and tungsten were exposed to boron trichloride in cyclic ALE. Etch volumes were measured after 5, 10, 20, and 40 cycles and are graphed in FIG. 11B.

[0211] Using boron trichloride, greater etching was achieved for aluminum oxide at ALEs of 5, 10, 20, and 40 cycles. Using boron trichloride, relatively similar etching was achieved for hafnium oxide, but such results also demonstrated that it is possible to use boron trichloride during etching. Etching with boron trichloride was also effective for several other materials as shown.

[0212] Table 1 summarizes the etch rates for ALE with DMAC vs. BCl3. Table 2 summarizes the etch per cycle and selectivity to hafnium oxide for ALE with DMAC vs. BCl3. [Table 1] [Table 2]

[0213] conclusion In this application, the terms "semiconductor wafer," "wafer," "substrate," "wafer substrate," and "partially fabricated integrated circuit" may be used interchangeably. Those skilled in the art will appreciate that the term "partially fabricated integrated circuit" may refer to a silicon wafer at any of the many stages of integrated circuit fabrication. Wafers or substrates used in the semiconductor device industry typically have diameters of 200 mm, or 300 mm, or 450 mm. The following detailed description assumes that certain disclosed embodiments are implemented on wafers. However, certain disclosed embodiments are not so limited. Workpieces may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other workpieces that may utilize the present invention include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micromechanical devices, and the like. Certain disclosed embodiments may also relate to recycling certain materials from waste mixtures. For example, in some embodiments, certain disclosed embodiments may be used to remove certain precious metals without substantially removing other materials.

[0214] Although the foregoing embodiments have been described in some detail for clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Thus, the present embodiments should be considered as illustrative rather than restrictive, and the embodiments should not be limited to the details set forth herein.

Claims

1. 1. A method for processing a wafer, comprising: providing a wafer to a processing chamber, the wafer having an oxygen-containing material; exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on the surface of the wafer; exposing the modified oxygen-containing layer to boron trichloride to remove the modified layer from the surface of the wafer.

2. 1. A method for processing a wafer, comprising: providing a wafer to a processing chamber, the wafer having an oxygen-containing material; exposing the oxygen-containing material to a halogen-containing gas to form a modified oxygen-containing layer on the surface of the wafer; exposing the modified oxygen-containing layer to a boron and chlorine-containing gas to remove the modified oxygen-containing layer from the surface of the wafer.

3. 3. The method of claim 1 or 2, The method, wherein exposing the modified oxygen-containing layer is performed in a plasma-free environment.

4. 3. The method of claim 1 or 2, The method, wherein exposing the modified oxygen-containing layer causes volatile oxychlorides to form, ligand exchange to occur, or both.

5. 3. The method of claim 1 or 2, The method, wherein exposing the oxygen-containing material to the halogen-containing gas and exposing the modified oxygen-containing layer are performed in alternating pulses with atomic layer etching.

6. 6. The method according to any one of claims 1 to 5, The method, wherein the oxygen-containing material is a metal oxide.

7. 7. The method of claim 6, The method wherein the metal oxide comprises a metal selected from the group consisting of aluminum, silicon, germanium, antimony, indium, zirconium, selenium, tin, gallium, zinc, molybdenum, hafnium, tellurium, and combinations thereof.

8. 8. The method according to any one of claims 1 to 7, The method wherein the oxygen-containing material is selected from the group consisting of zirconium oxide, hafnium oxide, and hafnium zirconium oxide.

9. 1. A method for processing a wafer, comprising: providing a wafer into a processing chamber, the wafer having a material to be etched; exposing the material to be etched to a halogen-containing gas to form a modified layer on the surface of the wafer; exposing the modified layer to a boron and chlorine containing gas in a plasma-free environment to remove the modified layer from the surface of the wafer.

10. 1. A method for processing a wafer, comprising: providing a wafer to a processing chamber, the wafer having a metal oxide; exposing the metal oxide to hydrogen fluoride or nitrogen trifluoride to form a modified metal oxide layer on the surface of the wafer; exposing the modified metal oxide layer to boron trichloride in a plasma-free environment to remove the modified layer from the surface of the wafer.

11. 1. A method for processing a wafer, comprising: providing a wafer to a processing chamber, the wafer having a tungsten-free material; exposing the etched tungsten-free material to a fluorine-containing gas to form a modified tungsten-free layer on the surface of the wafer; exposing the modified tungsten-free layer to a non-pyrophoric chlorine-containing gas in a plasma-free environment to remove the modified tungsten-free layer from the surface of the wafer.

12. 1. An apparatus for semiconductor processing, comprising: a first processing station having a first processing chamber including a first interior, a first wafer support configured to support a wafer in the first interior, and a first wafer heating unit configured to heat the wafer supported by the first wafer support; 1. A process gas unit comprising: flowing a first chemical species comprising fluorine onto the wafer at the first processing station in the first processing chamber; a process gas unit configured to flow boron trichloride onto the wafer at the first processing station within the first processing chamber; a controller, providing a wafer to the first processing station within the first processing chamber, the wafer having a layer of chalcogenide material; causing the first wafer heating unit to heat the wafer to a first temperature; a controller having instructions configured to modify a surface of a material on the wafer by causing the process gas unit to flow the first chemical species onto the wafer at the first processing station of the first processing chamber to produce a modified layer while the wafer is at the first temperature, and to etch the material on the wafer by removing the modified layer without the use of a plasma by causing the process gas unit to flow the boron trichloride onto the wafer at the first processing station of the first processing chamber; An apparatus comprising:

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