Directional metal electrode unit, and preparation method and application thereof
The oriented metal electrode unit with a crystalline structure on amorphous SiO2 substrates addresses the challenge of integrating crystalline metal electrodes into CMOS circuits, improving device performance and enabling applications in spin electronic devices and ferroelectric tunnel devices.
Patent Information
- Application Number
- JP2024153492
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-07-07
- Filing Date
- 2024-09-05
- Publication Date
- 2025-01-21
AI Technical Summary
The challenge in semiconductor devices is obtaining crystalline metal electrodes on amorphous SiO2 passivation layers, which is necessary for integration into silicon circuits like CMOS, as amorphous metals have defects and poor performance.
An oriented metal electrode unit is formed on an amorphous SiO2 substrate with a buffer layer containing Ta, Cr, TiN, TaN, or MgO, followed by a seed layer of BN, Cu, Fe, Pd, or Pt, and a metal electrode layer with a (001) crystal orientation, ensuring matching lattice constants.
This approach allows for the formation of highly crystalline metal electrodes on amorphous substrates, enhancing device performance and enabling integration into CMOS circuits and applications in spin electronic devices, magnetic memory devices, and ferroelectric tunnel devices.
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Abstract
Description
[Technical field]
[0001] The present invention relates to the field of semiconductor device technology, and in particular to an oriented metal electrode unit and its manufacturing method and application. [Background technology]
[0002] In most semiconductor devices, metals are usually amorphous because they are only considered as electrodes for their electrical conductivity and stability, but certain devices, such as MRAM and single-chip epitaxial spin-on electron devices, require metal electrodes with high crystallinity due to the large amount of defects present in amorphous materials.
[0003] For more widespread application, semiconductor devices need to be integrated with silicon circuits such as CMOS, but the top layer of CMOS is usually amorphous SiO2 passivation layer, so it is still a challenge to get crystalline metal electrodes on the amorphous SiO2 passivation layer for better performance. Summary of the Invention
[0004] In order to overcome the above technical deficiencies, the objective of the present invention is to provide an oriented metal electrode unit and its manufacturing method and application, which solves the problem that the performance of the crystalline metal electrode obtained on the amorphous SiO2 layer in the conventional semiconductor device is poor.
[0005] The present invention discloses an oriented metal electrode unit,
[0006] A Si substrate covered with an amorphous SiO2 layer;
[0007] a buffer layer covered with the SiO2 layer and containing Ta, Cr, TiN, TaN, MgO or CrN;
[0008] A layer covering the buffer layer, comprising A3BN, where A=Cu or Fe, B=Pd or Pt, or Mn x N 1-xa seed layer where 0 < x < 1, and
[0009] a metal electrode layer manufactured based on the seed layer and having a (001) crystal orientation, and
[0010] the seed layer and the metal electrode layer have a matching lattice constant, characterized by an oriented metal electrode unit.
[0011] Preferably, a CMOS circuit is disposed on the Si substrate.
[0012] Preferably, the metal electrode layer contains Pd and Pt.
[0013] Preferably, the thickness of the Si substrate and the amorphous SiO2 layer is 1 to 5000 nm.
[0014] Preferably, the roughness of the amorphous SiO2 layer is less than 5 nm.
[0015] Preferably, the thickness of the buffer layer is 2 to 100 nm.
[0016] The thickness of the seed layer is 2 to 200 nm.
[0017] The thickness of the metal electrode layer is 10 to 500 nm.
[0018] The present invention further provides a method for manufacturing an oriented metal electrode unit, which is used to manufacture the oriented metal electrode according to any one of the above items, and includes a step of manufacturing an amorphous SiO2 layer on a Si substrate,
[0019] a step of manufacturing a buffer layer containing Ta, Cr, TiN, TaN, or MgO on the amorphous SiO2 layer,
[0020] a step of manufacturing a seed layer containing A3BN or Mn x N 1-x where A = Cu or Fe, B = Pd or Pt, and 0 < x < 1 on the amorphous SiO2 layer,
[0021] and forming a metal electrode layer with a (001) crystal orientation on the seed layer.
[0022] Preferably, the growth temperatures of the buffer layer and the seed layer are both below 450°C.
[0023] Preferably, the buffer layer and the seed layer are produced using magnetron sputtering, atomic layer epitaxy, pulsed laser deposition or molecular beam epitaxy.
[0024] The present invention further provides an application of the oriented metal electrode unit, which is any one of the oriented metal electrode units manufactured by any one of the manufacturing methods, and is applied as a crystalline electrode in electronic devices, and the electronic devices include spin electronic devices, memories, magnetic memory elements and ferroelectric tunnel elements.
[0025] Compared with the prior art, the above technical solutions have the following beneficial effects:
[0026] The oriented metal electrode unit and its manufacturing method and application provided by the present application form an oriented metal electrode unit comprising a substrate (Si or Si including CMOS), an amorphous SiO2 layer, a buffer layer, a seed layer and a crystalline metal electrode layer, among which the metal electrode layer has the buffer layer and seed layer as the lower layer, and the buffer layer and seed layer are formed by sputtering or epitaxially growing metal, nitride or oxide, and the metal electrode is crystallized in the (001) direction, thereby obtaining a highly crystalline metal electrode on the amorphous substrate, which forms part of a spin electronic device as a crystalline electrode, and is applied to electronic devices such as spin valves, tunnel magnetic devices, MRAM, SOT-MRAM and ferroelectric tunnel devices. [Brief description of the drawings]
[0027] [Figure 1]FIG. 1 is a structural schematic diagram of an embodiment of the oriented metal electrode unit of the present invention and its manufacturing method and application.
[0028] [Diagram 2] FIG. 2 is an X-ray diffraction diagram of a metal electrode unit manufactured using a certain substrate, a buffer layer, a seed layer and a metal electrode layer in Example 2 of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0029] [Diagram 3] FIG. 3 is an X-ray diffraction diagram of a metal electrode unit manufactured with another substrate, buffer layer, seed layer and metal electrode layer in the second embodiment of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0030] [Figure 4] FIG. 4 is an X-ray diffraction diagram of a metal electrode unit manufactured with another substrate, buffer layer, seed layer and metal electrode layer in the second embodiment of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0031] [Diagram 5] FIG. 5 is an X-ray diffraction diagram of a metal electrode unit manufactured with another substrate, buffer layer, seed layer and metal electrode layer in the second embodiment of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0032] [Figure 6] FIG. 6 is an X-ray diffraction diagram of a metal electrode unit manufactured with another substrate, buffer layer, seed layer and metal electrode layer in the second embodiment of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0033] [Figure 7] FIG. 7 is an X-ray diffraction diagram of a metal electrode unit manufactured with another substrate, buffer layer, seed layer and metal electrode layer in the second embodiment of the oriented metal electrode unit and its manufacturing method and application of the present invention.
[0034] [Figure 8] FIG. 8 is a flow chart of the second embodiment of the oriented metal electrode unit and the manufacturing method and application thereof according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0035] The advantages of the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.
[0036] DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. Where the following description refers to the accompanying drawings, unless otherwise indicated, like numerals in different accompanying drawings refer to the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. On the contrary, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as set forth in the appended claims.
[0037] The terms used in this disclosure are used only for the purpose of describing certain embodiments and are not intended to limit the disclosure. As used in this disclosure and the appended claims, the singular forms "a," "the," and "said" are also intended to include the plural forms unless the context clearly indicates otherwise. The term "and / or" as used herein should be understood to refer to and include any or all possible combinations of one or more associated listed items.
[0038] It should be understood that although the terms first, second, third, etc. are used in this disclosure to describe various types of information, the information is not limited to these terms. These terms are used only to distinguish between the same types of information. For example, the first information may be referred to as the second information, and similarly, the second information may be referred to as the first information, without departing from the scope of this disclosure. Depending on the context, the word "for example" as used herein may be interpreted as "when" or "when" or "based on a determination."
[0039] In describing the present invention, it should be understood that the directions or positional relationships indicated by the terms "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "lower", "inner", "outer" and the like are based on the orientations or positional relationships shown in the accompanying drawings, but are intended to facilitate and simplify the description of the present invention, and do not necessarily indicate or imply that the indicated devices or elements have a specific orientation, structure and operation in a specific orientation, and this should not be understood as limiting the present invention.
[0040] In the description of the present invention, unless otherwise specified or limited, it should be noted that the terms "attached", "connected" and "connected" should be broadly understood, for example, they may be mechanical connection or electrical connection, internal communication between two elements, direct connection, or indirect connection via an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms based on the specific situation.
[0041] In the following description, suffixes such as "module", "component" or "unit" are used to represent elements, but these are merely for the purpose of facilitating the description of the present invention and do not have any specific meaning in themselves. For this reason, "module" and "component" may be used interchangeably.
[0042] Example 1: The present invention discloses an oriented metal electrode unit, which obtains a highly crystalline metal electrode on an amorphous substrate, thereby realizing a wide range of applications in supercapacitors, memory devices, field effect transistors, MEMS, etc., see FIG. 1 for details.
[0043] A Si substrate covered with an amorphous SiO2 layer, optionally having a CMOS circuit disposed on the Si substrate, and a CMOS circuit may be integrated into the oriented metal electrode unit for application in the semiconductor device.
[0044] A buffer layer covered by the SiO2 layer, including but not limited to Ta (tantalum), Cr (chromium), TiN (titanium nitride), TaN (tantalum nitride), MgO (magnesium oxide), or CrN (chromium nitride).
[0045] A seed layer covering the buffer layer, including A3BN, where A = Cu (copper) or Fe (iron), B = Pd (palladium) or Pt (platinum), or Mn x N 1-x including, where 0 < x < 1, and not limited to these.
[0046] A metal electrode layer, manufactured based on the seed layer and having a (001) crystal orientation.
[0047] The seed layer and the metal electrode layer have matching / similar (within a preset error range) lattice constants.
[0048] Based on the above structure, in this embodiment, the oriented metal unit is composed of a substrate (Si or Si including CMOS), an amorphous SiO2 layer, a buffer layer, a seed layer, and a metal electrode layer. The metal electrode layer uses the buffer layer and the seed layer as the lower layers. Based on the above buffer layer and seed layer, the metal electrode may crystallize in the (001) direction, thus obtaining a metal electrode with high crystallinity on an amorphous (i.e., the above SiO2) substrate.
[0049] Based on the above structure, preferably, the metal electrode layer includes Pd and Pt, which may correspond to the above seed layer. Since an oriented metal electrode is formed, other materials for the metal electrode may be formed for the rest.
[0050] Furthermore, in the oriented metal electrode unit provided by this embodiment, the thickness of the Si substrate and the amorphous SiO2 layer is 1-5000nm, and the roughness of the amorphous SiO2 layer is less than 5nm, that is, the roughness of the substrate surface is kept small and the buffer layer thereon is more closely connected. The thickness of the buffer layer is 2-100nm, the thickness of the seed layer is 2-200nm, and the thickness of the metal electrode layer is 10-500nm, and the buffer layer and the seed layer are the layers below the metal electrode layer and are thinner than the metal electrode layer, which forms a metal electrode layer with a specific crystal orientation and at the same time realizes the application of the oriented metal electrode unit.
[0051] For example, the amorphous SiO2 layer formed on the Si substrate may be realized by thermal oxidation, chemical vapor deposition (CVD, PECVD) or natural oxidation, and the buffer layer and seed layer may be formed by sputtering or deposition, specifically including but not limited to sputtering, PLD, ALD or MBE growth, and finally a metal electrode layer with a (001) crystal orientation is formed based on the growth of the buffer layer and seed layer, so as to form an oriented metal electrode unit in this embodiment, which can be used to form a magnetic tunnel junction (MTJ) or other spin electronic device (the spin electronic device includes but is not limited to a field effect transistor, a memory device, a tunnel junction, a magnetoelectric coupling device, a switchable photovoltaic element, a spin valve and a ferroelectric device).
[0052] In the second embodiment, the present invention further provides a method for manufacturing an oriented metal electrode unit, which is used to manufacture the oriented metal electrode according to any one of the first embodiment, as shown in FIG.
[0053] Step S10 of producing an amorphous SiO2 layer on a Si substrate;
[0054] In this embodiment, an amorphous SiO2 layer is formed on a Si substrate, which may be formed by thermal oxidation or vapor deposition, so that the following buffer layer and seed layer are fabricated on the amorphous silicon substrate to form an oriented metal electrode. It should be noted that since the above electrode structure is based on amorphous SiO2, CMOS circuits can be optionally integrated directly on it.
[0055] Step S20: fabricating a buffer layer on the amorphous SiO2 layer, where the buffer layer comprises Ta, Cr, TiN, TaN or MgO;
[0056] Specifically, by way of example, the buffer layer may be formed using sputtering or deposition of a material including, but not limited to, Ta, Cr, TiN, TaN, or MgO, and as described above, the thickness of the buffer layer is 2-100 nm, specifically, the growth temperature during the manufacture of the buffer layer is all lower than 450° C., and the buffer layer is produced with a predetermined crystal orientation and crystal distribution.
[0057] A seed layer is formed on the buffer layer, the seed layer being made of A3BN or Mn x N 1-x A=Cu or Fe, B=Pd or Pt, 0 <x<1であるステップS30と、
[0058] Specifically, the seed layer may also be formed by sputtering or deposition, with a thickness of 2 to 200 nm, and a growth temperature lower than 450°C, so that the seed layer is grown with a (001) crystal orientation, and the metal electrode of the subsequent metal electrode layer is crystallized in the (001) direction, and the lattice constants of both are similar (matching), i.e., similar crystal distribution, which facilitates the manufacture of an oriented metal electrode layer in the following steps.
[0059] Step S40: fabricating a metal electrode layer with a (001) crystal orientation on the buffer layer.
[0060] Specifically, based on the above-mentioned buffer layer and seed layer, an oriented (i.e., (001) crystal orientation) metal electrode layer is grown and formed on the lower layer of the metal electrode layer, thereby achieving a metal electrode with excellent performance and high crystallinity on an amorphous substrate.
[0061] Specifically, the buffer layer and the seed layer may be manufactured using deposition methods including, but not limited to, magnetron sputtering, atomic layer epitaxy (ALD), pulsed laser deposition (PLD) or molecular beam epitaxy (MBE), and other conventional deposition methods may also be used as long as they can realize the formation of the above-mentioned oriented metal electrode layer.
[0062] The present embodiment provides a manufacturing method for forming an oriented metal electrode unit including a substrate (Si or Si including CMOS), an amorphous SiO2 layer, a buffer layer, a seed layer and a crystalline metal electrode layer, in which the metal electrode layer has a buffer layer and a seed layer as the lower layer, and the buffer layer and the seed layer are formed by sputtering or epitaxially growing the above-mentioned metals, nitrides, and oxides, and the metal electrode is crystallized in the (001) direction to form the above-mentioned metal electrode layer, thereby obtaining a metal electrode with high crystallinity on the amorphous substrate.
[0063] For example, please refer to the X-ray diffraction patterns in Figures 2 to 7. Figure 2 is an X-ray diffraction pattern based on an oriented metal electrode unit formed of a substrate of silicon + 180 nm SiO2, a buffer layer of Ta, a seed layer of Cu3PdN, and a metal electrode layer of Pt. Figure 3 is an X-ray diffraction pattern based on an oriented metal electrode unit formed of a substrate of silicon + 180 nm SiO2, a buffer layer of Cr, a seed layer of MnN, and a metal electrode layer of Pt. Figure 4 is an X-ray diffraction pattern based on an oriented metal electrode unit formed of a substrate of silicon + 180 nm SiO2, a buffer layer of Cr, a seed layer of MnN, and a metal electrode layer of Pt. SiO2, a buffer layer of TiN, a seed layer of MnN, and a metal electrode layer of Pt are used as the x-ray diffraction diagrams based on an oriented metal electrode unit. FIG. 5 is a spectrum based on an oriented metal electrode unit formed of a substrate of silicon + 180 nm SiO2, a buffer layer of TaN, a seed layer of Cu3PdN, and a metal electrode layer of Pt. FIG. 6 is an x-ray diffraction diagram based on an oriented metal electrode unit formed of a substrate of silicon + 180 nm SiO2, a buffer layer of MgO, a seed layer of MnN, and a metal electrode layer of Pt. FIG. 7 is an x-ray diffraction diagram based on an oriented metal electrode unit formed of a substrate of silicon + native oxide layer SiO2, a buffer layer of TaN, a seed layer of MnN, and a metal electrode layer of Pt. As is clear from all of FIG. 2-FIG. 7, a highly crystalline metal electrode oriented in the (001) direction can be formed.
[0064] In embodiment 3, the present invention further provides an application of an oriented metal electrode unit, the oriented metal electrode being any one of the oriented metal electrodes in embodiment 1 manufactured by any one of the manufacturing methods in embodiment 2, and being used in electronic devices as a crystalline electrode, the electronic devices include spin electronic devices, memory, magnetic memory elements and ferroelectric tunnel elements, specifically, all electrode structures are based on amorphous SiO2 and can be directly integrated into CMOS. The spin electronic devices include but are not limited to field effect transistors, memory devices, tunnel junctions, magnetoelectric coupling devices, switchable photovoltaic elements, spin valves and ferroelectric devices, and can be widely applied in the fields of supercapacitors, memory devices, field effect transistors, MEMS and the like.
[0065] It should be noted that the embodiments of the present invention have excellent implementability and do not limit the present invention in any manner. Those skilled in the art can use the technical content disclosed above to make changes or modifications to equivalent effective embodiments. However, within the scope of the technical solution of the present invention, any changes or equivalent changes and modifications to the above embodiments based on the technical substance of the present invention all fall within the scope of the technical solution of the present invention.
Claims
1. In the oriented metal electrode unit, Amorphous SiO ２ a Si substrate covered with a layer; The SiO ２ a buffer layer comprising Ta, Cr, TiN, TaN, MgO or CrN, the buffer layer being covered by the layer; Covering the buffer layer, A ３ BN, where A=Cu or Fe, B=Pd or Pt, or Mn ｘ N １－ｘ a seed layer, where 0<x<1; a metal electrode layer produced on the basis of said seed layer and having a (001) crystal orientation, The seed layer and the metal electrode layer have the same lattice constant.
2. A CMOS circuit is disposed on the Si substrate.
2. The oriented metal electrode unit according to claim 1 .
3. The metal electrode includes Pd and Pt.
2. The oriented metal electrode unit according to claim 1 .
4. The Si substrate and amorphous SiO ２ The layer thickness is between 1 and 5000 nm.
2. The oriented metal electrode unit according to claim 1 .
5. The amorphous SiO ２ The roughness of the layer is less than 5 nm.
2. The oriented metal electrode unit according to claim 1 .
6. The thickness of the buffer layer is 2 to 100 nm; The seed layer has a thickness of 2 to 200 nm; The thickness of the metal electrode layer is 10 to 500 nm; 2. The oriented metal electrode unit according to claim 1 .
7. A method for producing an oriented metal electrode unit, comprising the steps of: Amorphous SiO on Si substrate ２ Manufacturing a layer; The amorphous SiO ２ A buffer layer is fabricated on the layer, the buffer layer comprising Ta, Cr, TiN, TaN or MgO, a seed layer is fabricated on the buffer layer, the seed layer being A ３ BN or Mn ｘ N １－ｘ where A=Cu or Fe, B=Pd or Pt, and 0<x<1; and forming a metal electrode layer having a (001) crystal orientation on the seed layer.
8. The growth temperatures of the buffer layer and the seed layer are both less than 450° C.; The method according to claim 1 .
9. Manufacture the buffer layer, seed layer by magnetron sputtering, atomic layer epitaxy, pulsed laser deposition or molecular beam epitaxy; The method according to claim 1 .
10. The oriented metal electrode unit is applied as a crystal electrode in electronic devices, the electronic devices including spin electronic devices, memories, magnetic memory elements and ferroelectric tunneling devices.
2. An application of the oriented metal electrode unit, characterized in that: