Photoelectric conversion device and apparatus

Abstract

To provide a technique advantageous for improving sensitivity with a simpler configuration.SOLUTION: A photoelectric conversion device comprises: a semiconductor layer including a photoelectric conversion element; a wiring structure; and a contact plug connecting to each other the semiconductor layer and a wiring pattern arranged on a wiring layer closest to the semiconductor layer, of wiring layers included in the wiring structure. A light reflecting layer through which the contact plug penetrates is arranged between the wiring layer and the semiconductor layer. The light reflecting layer includes a periodic structure in which a first layer formed of a dielectric substance or a semiconductor, and a second layer formed of a dielectric substance or a semiconductor different from the first layer, are periodically laminated.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a photoelectric conversion device and an apparatus. [Background technology]

[0002] Patent Document 1 shows that in a photoelectric conversion element using an avalanche photodiode (APD), a reflective metal layer is arranged on a wiring structure arranged on the surface opposite to the light incident surface so as to overlap the APD. According to Patent Document 1, the sensitivity can be improved by reflecting light that cannot be absorbed by the semiconductor layer back to the semiconductor layer at the reflective metal layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-112594 A Summary of the Invention [Problem to be solved by the invention]

[0004] Patent Document 1 shows that a reflective metal layer connected to the cathode of the APD and a wiring pattern connected to the anode of the APD are arranged on different wiring layers to ensure a withstand voltage between the reflective metal layer and the wiring pattern connected to the anode. Meanwhile, a contact plug connecting the anode of the APD and the wiring pattern passes through the wiring layer in which the reflective metal layer is arranged. Therefore, it is necessary to arrange the reflective metal layer and the contact plug in consideration of the withstand voltage between the reflective metal layer and the contact plug, which may complicate the design.

[0005] An object of the present invention is to provide a technique that is advantageous for achieving improved sensitivity with a simpler structure. [Means for solving the problem]

[0006] In view of the above problems, a photoelectric conversion device according to an embodiment of the present invention is a photoelectric conversion device comprising a semiconductor layer having a photoelectric conversion element, a wiring structure, and a contact plug connecting the semiconductor layer to a wiring pattern arranged in a wiring layer among the wiring layers included in the wiring structure that is closest to the semiconductor layer, wherein a light reflective layer through which the contact plug passes is arranged between the wiring layer and the semiconductor layer, and the light reflective layer has a periodic structure in which a first layer composed of a dielectric or a semiconductor and a second layer composed of a dielectric or a semiconductor different from the first layer are periodically stacked. Effect of the Invention

[0007] According to the present invention, it is possible to provide a technique that is advantageous for achieving improved sensitivity with a simpler structure. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a photoelectric conversion device according to an embodiment of the present invention. [Diagram 2] 2 is a diagram showing an example of the configuration of a pixel array of the photoelectric conversion device of FIG. 1; [Diagram 3] FIG. 2 is a block diagram showing a configuration example of the photoelectric conversion device in FIG. 1. [Figure 4] FIG. 2 is a circuit diagram showing an example of the configuration of a pixel of the photoelectric conversion device in FIG. [Diagram 5] 5 is a diagram for explaining an example of the operation of the pixel in FIG. 4. [Figure 6] 2 is a cross-sectional view showing an example of the configuration of a pixel of the photoelectric conversion device shown in FIG. 1. [Figure 7] 7 is a plan view showing a configuration example of the pixel between A-A' in FIG. 6. [Figure 8] 7 is a plan view showing an example of the configuration of the pixel between BB' in FIG. 6. [Figure 9] 7 is a plan view showing a configuration example of the pixel between CC' in FIG. 6. [Figure 10] 7 is a graph showing the reflectance versus the change in film thickness in the light-reflecting layer of the pixel in FIG. 6. [Figure 11] 7 is a graph showing reflectance versus change in refractive index in the light-reflecting layer of the pixel in FIG. 6. [Figure 12] FIG. 7 is a cross-sectional view showing a modification of the pixel in FIG. [Figure 13] FIG. 13 is a plan view showing a configuration example between BB' in FIG. [Figure 14] FIG. 1 is a diagram showing an example of the configuration of a camera incorporating a photoelectric conversion device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.

[0010] First, a configuration common to each embodiment described below will be described with reference to FIGS. 1 to 5. FIG. 1 is a diagram showing a configuration example of a photoelectric conversion device 100. The photoelectric conversion device 100 may be configured by stacking two substrates, a sensor substrate 411 and a circuit substrate 421, and electrically connecting them. That is, the photoelectric conversion device 100 may be a stacked device. The sensor substrate 411 includes a semiconductor layer 300 in which a plurality of pixels 150 are arranged, a wiring structure 310, and the like, as described later. The circuit substrate 421 includes a semiconductor layer having circuits such as a signal processing circuit 253 for processing signals output from the pixels 150, a wiring structure, and the like. The photoelectric conversion device 100 may be configured by stacking a semiconductor layer of the circuit substrate 421, a wiring structure of the circuit substrate 421, a wiring structure of the sensor substrate 411, and a semiconductor layer 300 of the sensor substrate 411 in this order. The photoelectric conversion device 100 may be a so-called back-illuminated photoelectric conversion device in which light is incident from the side of the semiconductor layer 300 of the sensor substrate 411 opposite to the side on which the wiring structure 310 is disposed.

[0011] In the following, the sensor substrate 411 and the circuit substrate 421 are described as being diced chips, but are not limited to chips. For example, the sensor substrate 411 and the circuit substrate 421 may be configured by stacking wafers. The sensor substrate 411 and the circuit substrate 421 may be stacked in the wafer state and then diced, or may be chipped (divided) from the wafer state and then stacked and bonded to each chip.

[0012] A pixel region 412 including a plurality of pixels 150 is disposed on the sensor substrate 411. A circuit region 422 that processes signals detected in the pixel region 412 is disposed on the circuit substrate 421.

[0013] 2 is a diagram showing an example of the arrangement of the sensor substrate 411. Pixels 150 each having a photoelectric conversion element 120 such as an avalanche photodiode (APD) are arranged in a two-dimensional array in a plan view to form a pixel region 412. The pixels 150 are typically pixels for generating an image. However, when the photoelectric conversion device 100 is used as a Time of Flight (ToF) type sensor or the like, the pixels 150 do not necessarily need to be used for generating an image. In other words, the pixels 150 may be configured to measure the time when light arrives and the amount of light.

[0014] Fig. 3 is a diagram showing a configuration example of the circuit board 421. The circuit board 421 includes a signal processing circuit 253 that processes charges photoelectrically converted by the photoelectric conversion element 120 shown in Fig. 2, a readout circuit 262, a control pulse generating circuit 265, a horizontal scanning circuit 261, a signal line 263, a vertical scanning circuit 260, and the like. The signal processing circuit 253 shown in Fig. 3 may be arranged so as to correspond to each of the pixels 150 shown in Fig. 2. In this case, the pixels 150 (photoelectric conversion element 120) and the signal processing circuit 253 may be electrically connected via a connection wiring provided for each pixel 150.

[0015] The vertical scanning circuit 260 receives a control pulse supplied from a control pulse generating circuit 265, and supplies the control pulse to each pixel 150. The vertical scanning circuit 260 can include logic circuits such as a shift register and an address decoder.

[0016] The signals output from the pixels 150 are processed by a signal processing circuit 253. A counter, a memory, and the like can be provided in the signal processing circuit 253. The count value counted by the counter can be held as a digital value in the memory.

[0017] The horizontal scanning circuit 261 inputs a control pulse for sequentially selecting each column to the signal processing circuit 253 in order to read out a signal from the memory of the signal processing circuit 253 corresponding to each pixel 150 in which a digital signal is held. A signal is output to the signal line 263 from the signal processing circuit 253 corresponding to the pixel 150 selected by the vertical scanning circuit 260 for the selected column. The signal output to the signal line 263 is output to a recording unit or a signal processing unit outside the photoelectric conversion device 100 via the output circuit 264.

[0018] The arrangement of the pixels 150 in the pixel region 412 shown in Fig. 2 is not limited to a two-dimensional array. The pixels 150 may be arranged one-dimensionally. The function of the signal processing circuit 253 does not necessarily need to be provided for each pixel 150 (photoelectric conversion element 120). For example, one signal processing circuit 253 may be shared by a plurality of pixels 150 (photoelectric conversion elements 120) and signal processing may be performed sequentially.

[0019] 2 and 3, in the orthogonal projection onto the pixel region 412, a plurality of signal processing circuits 253 may be arranged in a region overlapping the pixel region 412. In addition, the vertical scanning circuit 260, the horizontal scanning circuit 261, the readout circuit 262, the output circuit 264, the control pulse generating circuit 265, and the like may be arranged so as to overlap between the end of the sensor substrate 411 and the end of the pixel region 412. In other words, the sensor substrate 411 has the pixel region 412 and a non-pixel region arranged around the pixel region 412. In this case, the vertical scanning circuit 260, the horizontal scanning circuit 261, the readout circuit 262, the output circuit 264, and the control pulse generating circuit 265 may be arranged in a region overlapping the non-pixel region.

[0020] 4 is an example of a block diagram including an equivalent circuit focusing on one pixel 150 (photoelectric conversion element 120). In FIG. 4, the photoelectric conversion element 120 including the APD 201 is provided on a sensor substrate 411, and the other components are provided on a circuit substrate 421.

[0021] The APD 201 generates charge pairs according to the incident light by photoelectric conversion. An electric potential VL is supplied to the anode of the APD 201. An electric potential VH higher than the electric potential VL supplied to the anode is supplied to the cathode of the APD 201. A reverse bias voltage that causes the APD 201 to perform avalanche multiplication is supplied to the anode and cathode. By supplying such a reverse bias voltage, the electric charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0022] When a reverse bias voltage is supplied to the APD201, there are two modes: a Geiger mode in which the potential difference (voltage) between the anode and cathode is greater than the breakdown voltage, and a linear mode in which the potential difference between the anode and cathode is close to or less than the breakdown voltage. An APD operated in the Geiger mode is called a Single Photon Avalanche Diode (SPAD). For example, the potential VL is −30 V, and the potential VH is 1 V. The APD201 may be operated in either the linear mode or the Geiger mode.

[0023] The quench element 202 is connected between a power supply that supplies a potential VH and the APD 201. The quench element 202 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 201 (quench operation). The quench element 202 also has a function of returning the voltage supplied to the APD 201 to a voltage (VH-VL) by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation).

[0024] The signal processing circuit 253 can include a waveform shaping circuit 210, a counter circuit 211, and a selection circuit 212. In this specification, the signal processing circuit 253 may include any one of the waveform shaping circuit 210, the counter circuit 211, and the selection circuit 212.

[0025] The waveform shaping circuit 210 shapes the potential change of the cathode of the APD 201 obtained when a photon is detected, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping circuit 210. In the configuration shown in Fig. 4, an example is shown in which one inverter is used as the waveform shaping circuit 210. However, the present invention is not limited to this, and a circuit in which a plurality of inverters are connected in series may be used as the waveform shaping circuit 210, or another circuit having a waveform shaping effect may be used.

[0026] The counter circuit 211 counts the pulse signal output from the waveform shaping circuit 210 and holds the count value. When a control pulse pRES is supplied from the vertical scanning circuit 260 via a driving line 213, the signal held in the counter circuit 211 is reset.

[0027] A control pulse pSEL is supplied to the selection circuit 212 from the vertical scanning circuit 260 shown in Fig. 3 via the drive line 214 shown in Fig. 4, and switches between electrical connection and non-connection between the counter circuit 211 and the signal line 263. The selection circuit 212 includes, for example, a buffer circuit for outputting a signal.

[0028] A switching element such as a transistor may be disposed between the quench element 202 and the APD 201, or between the photoelectric conversion element 120 and the signal processing circuit 253, so that the electrical connection can be switched. Similarly, the supply of the potential VH or the potential VL to the photoelectric conversion element 120 may be electrically switchable using a switching element such as a transistor.

[0029] In the present embodiment, the counter circuit 211 is disposed in the signal processing circuit 253. However, the present invention is not limited to this, and the photoelectric conversion device 100 may acquire the pulse detection timing by using a time-to-digital conversion circuit (TDC) and a memory instead of the counter circuit 211. In this case, the generation timing of the pulse signal output from the waveform shaping circuit 210 is converted into a digital signal by the TDC. A control pulse pREF (reference signal) is supplied to the TDC from the vertical scanning circuit 260 via a drive line in order to measure the timing of the pulse signal. The TDC acquires, as a digital signal, a signal obtained by converting the input timing of the signal output from each pixel 150 via the waveform shaping circuit 210 into a relative time based on the control pulse pREF.

[0030] 5(a) and 5(b) are diagrams that show the relationship between the operation of the APD 201 and the output signal. Fig. 5(a) is a diagram that shows the APD 201, the quench element 202, and the waveform shaping circuit 210 shown in Fig. 4. Here, the input side of the waveform shaping circuit 210 is nodeA, and the output side is nodeB. Fig. 5(b) shows the waveform changes of nodeA and nodeB.

[0031] From time t0 to time t1, a potential difference (voltage) of potential VH-potential VL is applied to the APD 201. When a photon is incident on the APD 201 at time t1, avalanche multiplication occurs in the APD 201, an avalanche multiplication current flows through the quench element 202, and the potential of nodeA drops. When the voltage drop amount becomes larger and the potential difference applied to the APD 201 becomes smaller, the avalanche multiplication of the APD 201 stops as shown at time t2, and the potential level of nodeA does not drop by more than a certain value. After that, from time t2 to time t3, a current that compensates for the voltage drop from the potential VL flows through nodeA, and at time t3, nodeA is stabilized to the original potential level. At this time, the part of the output waveform at nodeA that exceeds a certain threshold is shaped by the waveform shaping circuit 210 and output as a signal to nodeB.

[0032] The arrangement of the signal line 263, the readout circuit 262, and the output circuit 264 is not limited to the configuration shown in Fig. 3. For example, the signal line 263 may be arranged to extend in the row direction (horizontal direction in Fig. 3), and the readout circuit 262 may be arranged at the end of the signal line 263.

[0033] Next, the configuration of the pixel 150 arranged on the sensor substrate 411 will be described in detail. FIG. 6 is a cross-sectional view showing a configuration example of one pixel 150 among the multiple pixels 150 arranged in the pixel region 412 of the photoelectric conversion device 100. FIG. 6 shows a cross section of the sensor substrate 411, and the circuit substrate 421 arranged below the wiring structure 310 is omitted. FIG. 7 is a plan view taken along line A-A' in FIG. 6. FIG. 8 is a plan view taken along line B-B' in FIG. 6. FIG. 9 is a plan view taken along line C-C' in FIG. 6. In this embodiment, the photoelectric conversion element 120 arranged in the pixel 150 will be described as an avalanche photodiode (APD), but is not limited thereto, and may be a photodiode formed using a normal PN junction or PIN junction.

[0034] As shown in FIG. 6, the pixel 150 arranged in the photoelectric conversion device 100 includes a semiconductor layer 300 including a photoelectric conversion element 120, a wiring structure 310, and a contact plug 107 that connects the semiconductor layer 300 to a wiring pattern 108 arranged in the wiring layer 118 that is the closest to the semiconductor layer 300 among the wiring layers 118 and 119 included in the wiring structure 310. Furthermore, the pixel 150 includes a light reflecting layer 112 through which the contact plug 107 penetrates, between the wiring layer 118 and the semiconductor layer 300. The light reflecting layer 112 includes a periodic structure in which a layer 105 made of a dielectric or a semiconductor and a layer 106 made of a dielectric or a semiconductor different from the layer 105 are periodically stacked. That is, the light reflecting layer 112 may include a combination of two or more sets of layers 105 and layers 106. Therefore, the light reflecting layer 112 may have a four-layer structure or more. 6, the light reflecting layer 112 has a six-layer structure including a combination of three sets of layers 105 and layers 106. However, the light reflecting layer 112 is not limited thereto, and may have eight or more layers.

[0035] The pixel 150 may include a microlens 101. The wiring structure 310 includes wiring patterns 108 and 109 arranged in an interlayer insulating film 111. In the configuration shown in FIG. 6, the wiring structure 310 includes two wiring layers 118 and 119 including the wiring patterns 108 and 109, but the wiring structure 310 may include one wiring layer or three or more wiring layers. Between the wiring layer 118, 119 included in the wiring structure 310 that is closest to the semiconductor layer 300 and the light reflecting layer 112, an insulating layer 110 through which the contact plug 107 penetrates is provided. The pixels 150 are separated by a pixel separating section 102.

[0036] The semiconductor region 103 and the semiconductor region 104 constitute a photoelectric conversion element 120. Between the semiconductor region 103 and the wiring layer 118 in which the wiring pattern 108 is arranged, the light reflecting layer 112 in which the layers 105 and 106 are periodically laminated is arranged. As described above, the semiconductor layer 300 (semiconductor regions 103, 104) and the wiring pattern 108 arranged in the wiring layer 118 closest to the semiconductor layer 300 are electrically connected by the contact plug 107. The contact plug 107 is formed to penetrate the light reflecting layer 112 and the insulating layer 110. Therefore, the thickness of the light reflecting layer 112 is equal to or less than the height of the contact plug 107.

[0037] With the above-mentioned configuration, the light incident from the microlens 101 passes through the semiconductor region 103, and avalanche multiplication of photocharges due to single photons occurs in the semiconductor region 104 formed adjacent to the semiconductor region 103. In addition, the light not absorbed by the semiconductor layer 300 is reflected by the light reflecting layer 112 before reaching the wiring pattern 108, and again enters the semiconductor layer 300. Therefore, the sensitivity of the photoelectric conversion device 100 is improved. In addition, the light not absorbed by the semiconductor layer 300 is reflected by the light reflecting layer 112, which is closer to the semiconductor layer 300 than the wiring patterns 108 and 109. Therefore, stray light, which is light incident on the pixel 150 and is reflected by the wiring pattern 108 or the wiring pattern 109 arranged at a position deeper than the light reflecting layer 112, and enters the adjacent pixel 150, is suppressed.

[0038] When the photoelectric conversion element 120 is a SPAD element using an APD as in this embodiment, the surface of the semiconductor layer 300 opposite to the light incident surface (the surface on which the microlens 101 is arranged) can be a flat surface on which no elements such as transistors are arranged. Therefore, it is possible to form the light reflecting layer 112 on the flat semiconductor layer 300, and the light reflection efficiency can be improved.

[0039] Next, the configuration of the light reflecting layer 112 will be described. The layers 105 and 106 are layers with different refractive indices. Here, the layer 106 will be described as having a higher refractive index than the layer 105. The difference in refractive index between the layers 105 and 106 may be, for example, 0.6 or more, or 0.8 or more. Furthermore, the difference in refractive index between the layers 105 and 106 may be 1.0 or more. Here, the refractive index indicates the refractive index for light with a wavelength of 633 nm.

[0040] For example, the layer 105 may be a layer mainly composed of silicon oxide. The refractive index of silicon oxide is about 1.45 to 1.46. Alternatively, the layer 105 may be made of a fluoride having a low refractive index, such as magnesium fluoride. On the other hand, the layer 106 may be a layer having a refractive index of 2.3 or more. The layer 106 may include at least one of cerium oxide, niobium oxide, titanium oxide, zinc sulfide, amorphous silicon, and amorphous germanium. For example, the layer 106 may be amorphous silicon. The refractive index of amorphous silicon is about 3.4 to 3.6, for example. In this case, the amorphous silicon may contain hydrogen of 10 atom % or more. Alternatively, the layer 106 may be amorphous germanium. The refractive index of amorphous germanium is about 4, for example. In this case, the amorphous germanium may contain hydrogen of 10 atom % or more.

[0041] Silicon oxide, amorphous silicon, and amorphous germanium used in the layers 105 and 106 of the light reflecting layer 112 may contain hydrogen, although it depends on the film formation conditions. Hydrogen bonds to dangling bonds present on the surface of the semiconductor layer 300 using silicon, thereby reducing the surface state density. The reduction in surface state density reduces the dark count rate (DCR), which is an index of noise, and the noise characteristics of the photoelectric conversion device 100 may be improved. When a reflective metal layer is disposed close to the semiconductor layer as in the structure shown in Patent Document 1, a part of the interlayer insulating film on which the reflective metal layer is disposed is replaced with a reflective metal layer that does not contain hydrogen. Also, hydrogen is less likely to be supplied from the interlayer insulating film that is farther from the semiconductor layer than the reflective metal layer. In contrast, in the structure shown in FIG. 6, hydrogen can be efficiently supplied from the light reflecting layer 112 to the semiconductor layer 300. Silicon oxide, amorphous silicon, and amorphous germanium containing hydrogen may be formed by, for example, a CVD method or a sputtering method.

[0042] Similar to layer 105, insulating layer 110 may be a layer mainly composed of silicon oxide. Interlayer insulating film 111 constituting wiring structure 310 may contain at least one of silicon oxide and a material having a lower dielectric constant than silicon oxide. Therefore, layer 106 may have a higher refractive index than insulating layer 110. Layer 106 may have a higher refractive index than interlayer insulating film 111.

[0043] The light reflecting layer 112 composed of the layer 105 and the layer 106 will be further described. The central wavelength of the light reflected by the light reflecting layer 112 is set to λ [nm]. The central wavelength of the reflected light may be the wavelength at which the reflectance is the highest in the light reflecting layer 112. In addition, when there is an area with a reflectance of 100%, the central wavelength of the reflected light is the central wavelength of the area with a reflectance of 100%. In this case, the layers 105 and 106 may be adjusted so that the optical film thickness is λ / 4. The optical film thickness is the product of the refractive index and the physical film thickness. For example, the layer 105 is made of silicon oxide with a refractive index of 1.45, the layer 106 is made of amorphous silicon with a refractive index of 3.6, and the central wavelength is 940 nm. In this case, the light reflecting layer 112 can be designed with the thickness of the layer 105 being (940 [nm] / 4) / 1.45≈162 [nm] and the thickness of the layer 106 being (940 [nm] / 4) / 3.6≈65 [nm]. In the configuration shown in Fig. 6, the light reflecting layer 112 may be configured as follows, from the semiconductor layer 300 side: silicon oxide: 162 nm / amorphous silicon: 65 nm / silicon oxide: 162 nm / amorphous silicon: 65 nm / silicon oxide: 162 nm / amorphous silicon: 65 nm. In this way, since the layer 106 has a higher refractive index than the layer 105, the thickness of the layer 105 can be designed to be thicker than the thickness of the layer 106.

[0044] 10 shows the results of a simulation of the reflectance for light with a wavelength of 940 nm when the thicknesses of layers 105 and 106 are simultaneously changed within a range of ±10%. It can be seen that within a ±10% range of thickness variation, a reflectance of 98% or more is obtained for light with a wavelength of 940 nm. Therefore, assuming that the thickness of layer 105 is T1 [nm], the refractive index of layer 105 is N1, the thickness of layer 106 is T2 [nm], and the refractive index of layer 106 is N2, N1×T1×0.9≦λ / 4≦N1×T1×1.1 N2×T2×0.9≦λ / 4≦N2×T2×1.1 The layer 105 and the layer 106 may be formed so as to satisfy the above.

[0045] 11 shows the results of a simulation of the reflectance for light with a wavelength of 940 nm when the refractive index of layer 106 is changed. Layer 105 is made of silicon oxide (refractive index 1.45). It can be seen that in order to obtain a reflectance of 90% or more, layer 106 needs a refractive index of 2.3 or more, as described above.

[0046] The light reflecting layer 112 has the above-mentioned configuration. As a result, even if the light incident on the pixel 150 of the photoelectric conversion device 100 cannot be completely absorbed by the semiconductor layer 300, the light can be reflected by the light reflecting layer 112 to the semiconductor layer 300, thereby improving the sensitivity. In this case, there is no need to consider the withstand voltage between the reflective metal layer and the contact plug as shown in Patent Document 1, and the sensitivity can be improved by a simple structure in which the layers 105 and 106 are stacked. In addition, silicon oxide containing hydrogen, amorphous silicon, or amorphous germanium can be arranged as the layers 105 and 106 between the wiring layer 118, which is the closest to the semiconductor layer 300 among the wiring layers 118 and 119 included in the wiring structure 310, and the semiconductor layer 300. Thereby, the noise characteristics of the photoelectric conversion device 100 can be improved. As a result, a photoelectric conversion device 100 with higher performance is realized.

[0047] Fig. 12 is a cross-sectional view showing a modified example of pixel 150 arranged in photoelectric conversion device 100 shown in Fig. 6. In Fig. 12, similar to Fig. 6, a cross section of sensor substrate 411 is shown, and circuit substrate 421 arranged below wiring structure 310 is omitted. Fig. 13 is a plan view taken along line BB' in Fig. 12.

[0048] In the configurations shown in FIGS. 6 to 9, the layer 105 and the layer 106 are in contact with the contact plug 107. However, when forming the contact plug 107, it may be difficult to form a through hole penetrating the layer 105 and the layer 106. For example, the conditions for etching the layer 105 may be significantly different from the conditions for etching the layer 106. In this regard, as shown in FIGS. 12 and 13, the contact plug 107 may penetrate a region where a part of the layer 106 is removed. In other words, the layer 105 is in contact with the contact plug 107, and as shown in FIG. 13, the layer 106 surrounds the contact plug 107, but the layer 105 is disposed between the layer 106 and the contact plug 107. Other configurations may be the same as those shown in FIGS. 6 to 9, and therefore description thereof will be omitted here.

[0049] For example, the layer 105 and the layer 106 are formed on the semiconductor layer 300, and then the region of the layer 106 where the contact plug 107 is to be formed in a later step is etched. After etching the layer 106, the next layer 105 is formed. These steps may be repeated to form the light reflecting layer 112. After forming the light reflecting layer 112 and the insulating layer 110, a through hole in which the contact plug 107 is disposed is formed. Thereby, the through hole can be formed by etching the layer 105 and the insulating layer 110 made of, for example, silicon oxide. Thereby, the process of forming the through hole in which the contact plug 107 is disposed becomes easier, and for example, an improvement in yield can be realized.

[0050] An application example of the photoelectric conversion device 100 according to the above embodiment will be described below. Fig. 14 is a schematic diagram of an equipment EQP equipped with the photoelectric conversion device 100. Fig. 14 shows a camera as an example of the equipment EQP. Here, the concept of a camera includes not only an equipment whose main purpose is to capture images, but also an equipment that auxiliary has a capture function (for example, a mobile terminal such as a smartphone, or a personal computer).

[0051] The photoelectric conversion device 100 may be a semiconductor chip with a stacked structure in which a pixel region 412 is provided. The photoelectric conversion device 100 is accommodated in a semiconductor package PKG as shown in Fig. 14. The package PKG may include a base on which the photoelectric conversion device 100 is fixed, a cover such as glass facing the photoelectric conversion device 100, and a conductive connection member such as a bonding wire or bump that connects a terminal provided on the base to a terminal provided on the photoelectric conversion device 100. The equipment EQP may further include at least one of an optical system OPT, a control device CTRL, a processing device PRCS, a display device DSPL, and a memory device MMRY.

[0052] The optical system OPT forms an image on the photoelectric conversion device 100, and may be, for example, a lens, a shutter, or a mirror. The control device CTRL controls the operation of the photoelectric conversion device 100, and may be, for example, a semiconductor device such as an ASIC. The processing device PRCS processes a signal output from the photoelectric conversion device 100, and may be, for example, a semiconductor device such as a CPU or an ASIC. The display device DSPL may be an EL display device or a liquid crystal display device that displays image data obtained by the photoelectric conversion device 100. The memory device MMRY is a magnetic device or a semiconductor device that stores image data obtained by the photoelectric conversion device 100. The memory device MMRY may be a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN has a moving part or a propulsion part such as a motor or an engine. The mechanical device MCHN in the camera can drive parts of the optical system OPT for zooming, focusing, and shutter operation. In the device EQP, the image data output from the photoelectric conversion device 100 is displayed on the display device DSPL, or transmitted to the outside by a communication device (not shown) included in the device EQP. For this reason, the device EQP may include a memory device MMRY and a processing device PRCS.

[0053] A camera incorporating the photoelectric conversion device 100 can be used as a surveillance camera, or an on-board camera mounted on transportation equipment such as automobiles, railroad cars, ships, aircraft, or industrial robots. In addition, a camera incorporating the photoelectric conversion device 100 can be used not only in transportation equipment but also in a wide range of equipment that uses object recognition, such as an intelligent transport system (ITS).

[0054] The disclosure of this specification includes the following photoelectric conversion devices and instruments.

[0055] (Item 1) A photoelectric conversion device comprising: a semiconductor layer including a photoelectric conversion element; a wiring structure; and a contact plug connecting a wiring pattern disposed in a wiring layer that is closest to the semiconductor layer among wiring layers included in the wiring structure to the semiconductor layer, a light reflecting layer through which the contact plug penetrates is disposed between the wiring layer and the semiconductor layer; The photoelectric conversion device is characterized in that the light reflecting layer has a periodic structure in which a first layer made of a dielectric or a semiconductor and a second layer made of a dielectric or a semiconductor different from the first layer are periodically stacked.

[0056] (Item 2) 2. The photoelectric conversion device according to item 1, wherein the first layer contains silicon oxide.

[0057] (Item 3) 3. The photoelectric conversion device according to item 1 or 2, wherein the second layer contains at least one of cerium oxide, niobium oxide, titanium oxide, zinc sulfide, amorphous silicon, and amorphous germanium.

[0058] (Item 4) the second layer comprises amorphous silicon or amorphous germanium; 4. The photoelectric conversion device according to any one of items 1 to 3, wherein the amorphous silicon or the amorphous germanium contains 10 atom % or more of hydrogen.

[0059] (Item 5) the second layer has a higher refractive index than the first layer, 5. The photoelectric conversion device according to any one of items 1 to 4, wherein the first layer is thicker than the second layer.

[0060] (Item 6) 6. The photoelectric conversion device according to any one of items 1 to 5, wherein the second layer has a refractive index of 2.3 or more.

[0061] (Item 7) When the central wavelength of light reflected by the light reflecting layer is λ [nm], the thickness of the first layer is T1 [nm], the refractive index of the first layer is N1, the thickness of the second layer is T2 [nm], and the refractive index of the second layer is N2, N1×T1×0.9≦λ / 4≦N1×T1×1.1 N2×T2×0.9≦λ / 4≦N2×T2×1.1 7. The photoelectric conversion device according to any one of items 1 to 6, wherein the above-mentioned condition is satisfied.

[0062] (Item 8) an insulating layer through which the contact plug penetrates is disposed between the wiring layer and the light reflecting layer; 8. The photoelectric conversion device according to any one of items 1 to 7, wherein the second layer has a refractive index higher than that of the insulating layer.

[0063] (Item 9) 9. The photoelectric conversion device according to item 8, wherein the insulating layer contains silicon oxide.

[0064] (Item 10) 10. The photoelectric conversion device according to any one of items 1 to 9, wherein the second layer has a refractive index higher than that of an interlayer insulating film that constitutes the wiring structure.

[0065] (Item 11) 11. The photoelectric conversion device according to item 10, wherein the interlayer insulating film contains at least one of silicon oxide and a material having a dielectric constant lower than that of silicon oxide.

[0066] (Item 12) 12. The photoelectric conversion device according to any one of items 1 to 11, wherein the thickness of the light reflecting layer is equal to or smaller than the height of the contact plug.

[0067] (Item 13) 13. The photoelectric conversion device according to any one of items 1 to 12, wherein the photoelectric conversion element includes an avalanche photodiode.

[0068] (Item 14) 14. The photoelectric conversion device according to any one of items 1 to 13, wherein the first layer and the second layer are in contact with the contact plug.

[0069] (Item 15) the first layer is in contact with the contact plug; 14. The photoelectric conversion device according to any one of items 1 to 13, wherein the first layer is disposed between the second layer and the contact plug.

[0070] (Item 16) A photoelectric conversion device according to any one of items 1 to 15, A processing device that processes a signal output from the photoelectric conversion device; An apparatus comprising:

[0071] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0072] 100: photoelectric conversion device, 105, 106: layers, 107: contact plugs, 108, 109: wiring patterns, 112: light reflecting layer, 112, 118, 119: wiring layers, 300: semiconductor layer, 310: wiring structure

Claims

1. A photoelectric conversion device comprising: a semiconductor layer including a photoelectric conversion element; a wiring structure; and a contact plug connecting a wiring pattern disposed in a wiring layer included in the wiring structure that is closest to the semiconductor layer, to the semiconductor layer, a light reflecting layer through which the contact plug penetrates is disposed between the wiring layer and the semiconductor layer; A photoelectric conversion device characterized in that the light reflecting layer has a periodic structure in which a first layer made of a dielectric or a semiconductor and a second layer made of a dielectric or a semiconductor different from the first layer are periodically stacked.

2. The photoelectric conversion device according to claim 1 , wherein the first layer includes silicon oxide.

3. 2. The photoelectric conversion device according to claim 1, wherein the second layer contains at least one of cerium oxide, niobium oxide, titanium oxide, zinc sulfide, amorphous silicon, and amorphous germanium.

4. the second layer comprises amorphous silicon or amorphous germanium; 2. The photoelectric conversion device according to claim 1, wherein the amorphous silicon or the amorphous germanium contains 10 atom % or more of hydrogen.

5. The second layer has a higher refractive index than the first layer, 2. The photoelectric conversion device according to claim 1, wherein the first layer is thicker than the second layer.

6. 2. The photoelectric conversion device according to claim 1, wherein the second layer has a refractive index of 2.3 or more.

7. When the central wavelength of light reflected by the light reflecting layer is λ [nm], the thickness of the first layer is T1 [nm], the refractive index of the first layer is N1, the thickness of the second layer is T2 [nm], and the refractive index of the second layer is N2, N1×T1×0.9≦λ / 4≦N1×T1×1.1 N2×T2×0.9≦λ / 4≦N2×T2×1.1 2. The photoelectric conversion device according to claim 1, wherein the above formula is satisfied.

8. an insulating layer through which the contact plug penetrates is disposed between the wiring layer and the light reflecting layer; The photoelectric conversion device according to claim 1 , wherein the second layer has a refractive index higher than that of the insulating layer.

9. The photoelectric conversion device according to claim 8 , wherein the insulating layer contains silicon oxide.

10. 2. The photoelectric conversion device according to claim 1, wherein the second layer has a refractive index higher than that of an interlayer insulating film that constitutes the wiring structure.

11. 11. The photoelectric conversion device according to claim 10, wherein the interlayer insulating film contains at least one of silicon oxide and a material having a dielectric constant lower than that of silicon oxide.

12. 2. The photoelectric conversion device according to claim 1, wherein the thickness of the light reflecting layer is equal to or smaller than the height of the contact plug.

13. 2. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion element includes an avalanche photodiode.

14. The photoelectric conversion device according to claim 1 , wherein the first layer and the second layer are in contact with the contact plug.

15. the first layer is in contact with the contact plug; 2. The photoelectric conversion device according to claim 1, wherein the first layer is disposed between the second layer and the contact plug.

16. The photoelectric conversion device according to claim 1 , A processing device that processes a signal output from the photoelectric conversion device; An apparatus comprising:

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