Semiconductor device and manufacturing method thereof

A semiconductor device with rounded corners and laminated barrier metal design addresses issues of inadequate coverage and peeling in existing methods, enabling smoother contact plug formation and improved semiconductor device quality.

JP2025014624APending Publication Date: 2025-01-30MINEBEA POWER SEMICON DEVICE INC
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Patent Information

Application Number
JP2023117329
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-07-19
Publication Date
2025-01-30

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Abstract

To provide a semiconductor device, in which flattening based on a contact plug is easy and coverage of barrier metal at a corner part of an insulation film is good, and manufacturing method thereof.SOLUTION: A semiconductor device 1 comprises: a semiconductor layer 2; a silicide layer 3 that is provided on the semiconductor layer 2; a first insulation film 4 that is provided on the semiconductor layer 2 and has an opening 4A; a second insulation film 5 that is provided on a sidewall of the opening 4A; a barrier metal 6 that is provided on the first insulation film 4, a corner part 8 of the second insulation film 5, a sidewall of the second insulation film 5, and the silicide layer 3; and a contact plug 7 that fills in a hole generated in the barrier metal 6 due to the opening 4A. The corner part 8 of the second insulation film 5 has a curled shape.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a manufacturing method thereof. [Background technology]

[0002] 2. Description of the Related Art As a technique for connecting an upper electrode and a semiconductor layer through a contact hole while planarizing the upper surface side of a semiconductor device, there is a technique using a contact plug.

[0003] For example, Figures 8 and 9 of Patent Document 1 describe a technology in which a contact hole is formed in an interlayer insulating film provided on a semiconductor substrate (semiconductor layer) by photolithography and etching, then a barrier metal is formed inside and outside the contact hole, then a silicide is formed by heat treatment using RTA (Rapid Thermal Anneal), and then a contact plug is formed. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2016-225512 A Summary of the Invention [Problem to be solved by the invention]

[0005] 12 and 13 are cross-sectional views illustrating the problems involved in the conventional method for manufacturing a semiconductor device.

[0006] As shown in FIG. 12, the semiconductor device 1 has a semiconductor layer 2, a silicide layer 3, a first insulating film 4, an opening 4A (contact hole) provided in the first insulating film 4, a barrier metal 6 composed of a laminated film of a first barrier metal 6A and a second barrier metal 6B, and a contact plug 7.

[0007] When depositing a metal film for forming contact plug 7 by, for example, CVD (Chemical Vapor Deposition), the metal film for forming contact plug 7 cannot be deposited too thick because the possibility of contamination by foreign matter increases if the film thickness is increased. Therefore, as shown in FIG. 12, if the diameter of opening 4A is large, there is a problem that the inside of opening 4A cannot be sufficiently flattened.

[0008] Furthermore, as shown in FIG. 13, when an opening 4A is formed in the first insulating film 4 by photolithography and etching, a corner portion 8 of the first insulating film 4 has an angular shape, which results in poor coverage of the barrier metal 6 formed thereon, and there is a problem that peeling of the barrier metal 6 may occur at the corner portion 8.

[0009] An object of the present invention is to provide a semiconductor device which can be easily planarized by contact plugs and has good coverage of a barrier metal at corners of an insulating film, and a method for manufacturing the same. [Means for solving the problem]

[0010] In order to solve the above-mentioned problems, the semiconductor device of the present invention comprises a semiconductor layer, a silicide layer provided on the semiconductor layer, a first insulating film provided on the semiconductor layer and having an opening, a second insulating film provided on a sidewall of the opening, a barrier metal provided on the first insulating film, a corner portion of the second insulating film, a sidewall of the second insulating film, and on the silicide layer, and a contact plug that fills a hole generated in the barrier metal due to the opening, and is characterized in that the corner portion of the second insulating film has a rounded shape.

[0011] Furthermore, a method for manufacturing a semiconductor device according to the present invention is characterized by comprising: an opening formation step of forming an opening in a first insulating film formed on a semiconductor layer by photolithography and etching; a second insulating film formation step of depositing a second insulating film on the first insulating film and inside the opening, and forming the second insulating film having rounded corners on a sidewall of the opening by etching back; a barrier metal formation step of depositing a barrier metal on the first insulating film, the corners of the second insulating film, the sidewalls of the second insulating film, and on the semiconductor layer inside the opening; a contact plug formation step of forming a contact plug to fill a hole generated in the barrier metal due to the opening; and a silicide layer formation step of forming a silicide layer in at least a part of the semiconductor layer inside the opening after the opening formation step and before the contact plug formation step. Effect of the Invention

[0012] According to the present invention, it is possible to realize a semiconductor device in which planarization by contact plugs is easy and coverage of the barrier metal at the corners of the insulating film is good, and a method for manufacturing the same. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment. [Diagram 2] 3 is a flowchart illustrating a method for manufacturing the semiconductor device according to the first embodiment. [Diagram 3] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 4] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Diagram 5] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 6] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 7] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 8] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 9] 3A to 3C are cross-sectional views illustrating the manufacturing method of the semiconductor device according to the first embodiment. [Figure 10] FIG. 11 is a cross-sectional view of a semiconductor device according to a second embodiment. [Figure 11] 10 is a flowchart illustrating a method for manufacturing a semiconductor device according to a second embodiment. [Figure 12] 1 is a cross-sectional view illustrating a problem in a conventional method for manufacturing a semiconductor device. [Figure 13] 1 is a cross-sectional view illustrating a problem in a conventional method for manufacturing a semiconductor device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing and each embodiment, the same or similar components are designated by the same reference numerals, and duplicated explanations will be omitted. EXAMPLES

[0015] FIG. 1 is a cross-sectional view of a semiconductor device according to a first embodiment.

[0016] The semiconductor device 1 of the first embodiment includes a semiconductor layer 2, a silicide layer 3, a first insulating film 4, a second insulating film 5, a barrier metal 6, and a contact plug .

[0017] The semiconductor layer 2 may be made of, for example, SiC, but is not limited to this and may be made of Si or the like.

[0018] The silicide layer 3 has a role of reducing the contact resistance. The silicide layer 3 may be made of, for example, Ni silicide, but is not limited thereto, and may be made of, for example, Ti silicide.

[0019] The first insulating film 4 is provided on the semiconductor layer 2. The first insulating film 4 plays the role of an interlayer insulating film. The first insulating film 4 may be made of, for example, SiO2, but is not limited to this and may be made of other insulating films. The first insulating film 4 is preferably a single film. The first insulating film 4 has an opening 4A which is a contact hole. The opening 4A may be formed by, for example, photolithography and etching.

[0020] The second insulating film 5 is provided on the side wall of the opening 4A. This allows the diameter of the opening 4A to be reduced, making it easier to planarize the surface by the contact plug 7. The second insulating film 5 also has a rounded corner 8. This allows the coverage of the barrier metal 6 at the corner 8 to be improved, and the peeling of the barrier metal 6 at the corner 8 to be suppressed. The second insulating film 5 of the side wall having the rounded corner 8 can be formed by etch-back. This allows the second insulating film 5 to be formed in a self-aligned manner without adding a photomask used in photolithography. The second insulating film 5 can be made of, for example, SiO2, but is not limited to this, and other insulating films may be used.

[0021] The barrier metal 6 is provided on the first insulating film 4, the corner portion 8 of the second insulating film 5, the sidewall of the second insulating film 5, and on the silicide layer 3. The barrier metal 6 can be, for example, a laminated film composed of a first barrier metal 6A on the lower layer side and a second barrier metal 6B on the upper layer side. For example, Ti can be used as the first barrier metal 6A, and TiN can be used as the second barrier metal 6B, but this is not limited thereto. For example, Ta can be used as the first barrier metal 6A, and TaN can be used as the second barrier metal 6B. In order to suppress oxidation of the first barrier metal 6A, it is desirable to use a nitride film as the second barrier metal 6B. However, this is not limited thereto, and the barrier metal 6 may be a laminated film of three or more layers, or a single layer film.

[0022] The contact plug 7 fills a hole formed in the barrier metal 6 due to the opening 4A. Planarization is possible by the contact plug 7. The contact plug 7 may be made of, for example, W (tungsten), but is not limited to this, and other metals may be used.

[0023] The semiconductor device 1 of Example 1 further has an upper electrode (not shown) on the barrier metal 6 and the contact plug 7. This makes it possible to connect the upper electrode and the semiconductor layer 2 through the contact hole while planarizing the upper surface side.

[0024] According to this embodiment, it is possible to realize a semiconductor device 1 in which planarization by the contact plugs 7 is easy and the coverage of the barrier metal 6 at the corner portions 8 of the insulating film is excellent.

[0025] In this embodiment, the silicide layer 3 is provided on the entire inside of the opening 4A, and is also provided under the second insulating film 5. This makes it possible to further reduce the contact resistance compared to the case where the silicide layer 3 is provided only under the barrier metal 6.

[0026] Fig. 2 is a flow chart for explaining the method for manufacturing the semiconductor device of Example 1. Fig. 3 to Fig. 9 are cross-sectional views for explaining the method for manufacturing the semiconductor device of Example 1.

[0027] Step S1 is an opening formation step, which is a step of forming an opening 4A in a first insulating film 4 formed on a semiconductor layer 2 by photolithography and etching, as shown in FIG.

[0028] Step S2 is a silicide layer forming step, which is a step of forming a silicide layer 3 on the entire surface of the semiconductor layer 2 inside the opening 4A, as shown in Fig. 3. Specifically, for example, Ni is deposited by sputtering, Ni silicide is formed by a first annealing, the Ni is removed by wet etching, and a second annealing is performed, whereby Ni silicide can be formed as the silicide layer 3 at the bottom of the opening 4A.

[0029] Step S3 is a second insulating film forming process, which is a process in which a second insulating film 5 is deposited on the first insulating film 4 and inside the opening 4A as shown in Fig. 5, and the second insulating film 5 having rounded corners 8 is formed on the sidewall of the opening 4A by etching back as shown in Fig. 6. Specifically, for example, SiO2 is deposited on the entire surface by CVD, and etched back by anisotropic etching to form a sidewall made of the second insulating film 5.

[0030] 7, a barrier metal 6 is deposited on the first insulating film 4, on the corners 8 of the second insulating film 5, on the sidewalls of the second insulating film 5, and on the semiconductor layer 2 inside the opening 4A (corresponding to the silicide layer 3 provided on the semiconductor layer 2 in this embodiment). Specifically, for example, a laminated film of Ti and TiN is deposited on the entire surface by sputtering.

[0031] Step S5 is a contact plug formation process, which is a process for forming contact plug 7 to fill the inside of the hole generated in barrier metal 6 due to opening 4A. Specifically, as shown in Fig. 8, W (tungsten) is deposited over the entire surface by CVD to fill the inside of the contact hole, and as shown in Fig. 9, the W (tungsten) layer outside the contact hole is removed by etch-back and planarized. EXAMPLES

[0032] FIG. 10 is a cross-sectional view of a semiconductor device according to the second embodiment.

[0033] The semiconductor device 1 of the second embodiment is different from that of the first embodiment in that the silicide layer 3 is provided only under the barrier metal 6. Such a silicide layer 3 can be manufactured by forming the barrier metal 6 and then forming a silicide with the barrier metal 6 as the silicide layer 3 by, for example, performing RTA after the barrier metal 6 is formed.

[0034] FIG. 11 is a flow chart illustrating a method for manufacturing a semiconductor device according to the second embodiment.

[0035] The difference from Example 1 is that instead of the silicide layer formation step (step S2) (see FIG. 2) of Example 1, which is performed after the opening formation step (step S1) and before the second insulating film formation step (step S3), a silicide layer formation step (step S2') is performed after the barrier metal formation step (step S4) and before the contact plug formation step (S5), as shown in FIG. 11.

[0036] The silicide layer forming process of step S2′ is a process of forming a silicide with the barrier metal 6 as the silicide layer 3. Specifically, for example, RTA is performed to form Ti silicide, which is a silicide with the barrier metal 6, as the silicide layer 3.

[0037] According to this embodiment, the process performed in step S2 in the first embodiment, for example, the process of depositing Ni by sputtering, forming Ni silicide by the first annealing, and removing Ni by wet etching, can be omitted.

[0038] In consideration of Examples 1 and 2, the silicide layer formation process (step S2 or step S2') may be a process of forming a silicide layer 3 in at least a portion of the semiconductor layer 2 inside the opening 4A after the opening formation process (step S1) and before the contact plug formation process (step S5).

[0039] In Example 1, the silicide layer formation process (step S2) is a process of forming a silicide layer 3 on the entire surface of the semiconductor layer 2 inside the opening 4A after the opening formation process (step S1) and before the second insulating film formation process (step S3).

[0040] In addition, in the second embodiment, the silicide layer forming step (step S2′) is a step of forming a silicide with a barrier metal 6 as a silicide layer 3 after the barrier metal forming step (step S4) and before the contact plug forming step (step S5).

[0041] Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each embodiment may be combined and applied. [Explanation of symbols]

[0042] 1 Semiconductor device 2. Semiconductor layer 3 Silicide layer 4. First insulating film 4A aperture 5 Second insulating film 6 Barrier Metal 6A First Barrier Metal 6B Second Barrier Metal 7 Contact plug 8 Corner section

Claims

1. A semiconductor layer; a silicide layer provided on the semiconductor layer; a first insulating film provided on the semiconductor layer and having an opening; a second insulating film provided on a side wall of the opening; a barrier metal provided on the first insulating film, on corners of the second insulating film, on a sidewall of the second insulating film, and on the silicide layer; a contact plug for filling a hole generated in the barrier metal due to the opening, The semiconductor device according to claim 1, wherein the corners of the second insulating film are rounded.

2. In claim 1, 4. The semiconductor device according to claim 1, wherein the rounded corners of the second insulating film are formed by etching back.

3. In claim 1, The semiconductor device according to claim 1, wherein the silicide layer is also provided under the second insulating film.

4. In claim 1, The semiconductor device is characterized in that the silicide layer is a silicide with the barrier metal.

5. In claim 1, The semiconductor device is characterized in that the barrier metal is a laminated film of two or more layers.

6. In claim 1, 4. A semiconductor device comprising: a first insulating film formed of a single film;

7. an opening forming step of forming an opening in a first insulating film formed on the semiconductor layer by photolithography and etching; a second insulating film forming step of depositing a second insulating film on the first insulating film and inside the opening, and forming the second insulating film having rounded corners on a side wall of the opening by etching back; a barrier metal forming step of depositing a barrier metal on the first insulating film, on corners of the second insulating film, on sidewalls of the second insulating film, and on the semiconductor layer inside the opening; a contact plug forming step of forming a contact plug to fill a hole formed in the barrier metal due to the opening; a silicide layer forming step of forming a silicide layer on at least a portion of the semiconductor layer inside the opening, the silicide layer being formed after the opening forming step and before the contact plug forming step.

8. In claim 7, a second insulating film forming step of forming a second insulating film on the first insulating film formed on the first insulating film formed on the second insulating film formed on the first ...

9. In claim 7, a contact plug forming step of forming a contact plug on the contact layer and a silicide layer formed on the contact plug;

Citation Information

Patent Citations

  • Semiconductor device manufacturing method

    JP2016225512A