Power supply control device and power supply device

Abstract

To secure a phase margin of a feedback control circuit in a wide frequency band.SOLUTION: A power supply control device 1 controls an output transistor M0 of a power supply device X which generates an output voltage VOUT from an input voltage VIN. The power supply control device 1 includes a feedback control circuit 10 which generates a drive signal V2 of the output transistor M0 so that a feedback voltage VFB corresponding to the output voltage VOUT matches a predetermined reference voltage VREF; a current detection circuit 20 which detects an output current IOUT flowing through the output transistor M0 and generates a current detection signal DET; and a phase constant adjustment circuit 30 which autonomously adjusts a phase constant of the feedback control circuit 10 according to the current detection signal DET.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates to a power supply control device and a power supply device using the same. [Background technology]

[0002] 2. Description of the Related Art Power supply devices (such as linear power supplies and switching power supplies) that generate an output voltage from an input voltage have conventionally been widely used.

[0003] As an example of the related art, Patent Document 1 can be mentioned. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2023-082312 A

[0005] [overview] In the power supply control device used in the conventional power supply device, there is room for improvement in the phase margin of the feedback control circuit.

[0006] For example, a power supply control device according to the present disclosure is configured to control an output transistor of a power supply device that generates an output voltage from an input voltage, and includes a feedback control circuit configured to generate a drive signal for the output transistor so that a feedback voltage corresponding to the output voltage matches a predetermined reference voltage, a current detection circuit configured to detect an output current flowing through the output transistor and generate a current detection signal, and a phase constant adjustment circuit configured to autonomously adjust the phase constant of the feedback control circuit in response to the current detection signal. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing a first embodiment (comparative example) of a power supply device. [Diagram 2] FIG. 2 is a diagram showing a second embodiment of the power supply device. [Diagram 3] FIG. 3 is a diagram showing the relationship between the output current and the phase margin. [Figure 4] FIG. 4 is a diagram showing the phase characteristic and the gain characteristic of the feedback control circuit. [Diagram 5] FIG. 5 is a diagram illustrating a first example of a phase constant adjustment circuit. [Figure 6] FIG. 6 is a diagram showing a second example of the phase constant adjustment circuit. [Figure 7] FIG. 7 is a diagram illustrating a third example of the phase constant adjustment circuit. [Figure 8] FIG. 8 is a diagram illustrating a fourth example of the phase constant adjustment circuit. [Figure 9] FIG. 9 is a diagram illustrating a fifth example of the phase constant adjustment circuit. [Figure 10] FIG. 10 is a diagram illustrating a sixth example of the phase constant adjustment circuit. [Figure 11] FIG. 11 is a diagram illustrating a seventh example of the phase constant adjusting circuit. [Figure 12] FIG. 12 is a diagram illustrating a first example of a current detection circuit. [Figure 13] FIG. 13 is a diagram illustrating a second example of the current detection circuit. [Figure 14] FIG. 14 is a diagram illustrating a third example of the current detection circuit.

[0008] [Detailed Description] <Power supply device (first embodiment)> FIG. 1 is a diagram showing a first embodiment of a power supply device (corresponding to a comparative example to be compared with a second embodiment described later). A power supply device X of this embodiment generates a desired output voltage VOUT from an input voltage VIN. The power supply device X may be, for example, an LDO [low drop out] regulator. With reference to this diagram, the power supply device X includes an output transistor M0 and a power supply control device 1.

[0009] The output transistor M0 is connected between an application terminal of the input voltage VIN and an application terminal of the output voltage VOUT. The output transistor M0 may be a PMOSFET [P-channel type metal oxide semiconductor field effect transistor]. In this case, the source of the output transistor M0 is connected to the application terminal of the input voltage VIN. The drain of the output transistor M0 is connected to the application terminal of the output voltage VOUT. The gate of the output transistor M0 is connected to the application terminal of the drive signal V2. The output transistor M0 connected in this manner has an on-resistance value linearly controlled in response to the drive signal V2.

[0010] The power supply control device 1 is a semiconductor integrated circuit device (so-called power supply control IC [integrated circuit]) that controls the output transistor M0. In this figure, the output transistor M0 is integrated in the power supply control device 1. However, the output transistor M0 may be externally attached to the power supply control device 1.

[0011] A feedback control circuit 10 is also integrated into the power supply control device 1. The feedback control circuit 10 generates a drive signal V2 for the output transistor M0 so that a feedback voltage VFB corresponding to the output voltage VOUT coincides with a predetermined reference voltage VREF. Referring to this figure, the feedback control circuit 10 includes a feedback circuit 11, a comparison circuit 12, and an amplifier circuit 13.

[0012] The feedback circuit 11 includes resistors R1 and R2 connected in series between an application end of the output voltage VOUT and a ground end (corresponding to a reference potential end). The resistors R1 and R2 connected in this manner correspond to a voltage dividing resistor that divides the output voltage VOUT to generate a feedback voltage VFB. The feedback circuit 11 may be omitted. That is, the output voltage VOUT may be directly input to the comparison circuit 12 in the subsequent stage as the feedback voltage VFB. The feedback circuit 11 may also be attached externally to the power supply control device 1.

[0013] The comparison circuit 12 generates a control signal V1 according to the difference between the feedback voltage VFB and a predetermined reference voltage VREF. The comparison circuit 12 may include an error amplifier AMP. The error amplifier AMP generates the control signal V1 according to the difference between the feedback voltage VFB input to the inverting input terminal (-) and the reference voltage VREF input to the non-inverting input terminal (+). The reference voltage VREF may be a constant voltage that is not easily affected by the input voltage VIN and the ambient temperature.

[0014] The control signal V1 increases when the feedback voltage VFB is lower than the reference voltage VREF, and decreases when the feedback voltage VFB is higher than the reference voltage VREF. In other words, the control signal V1 increases when the output voltage VOUT is lower than the target value, and decreases when the output voltage VOUT is higher than the target value.

[0015] The amplifier circuit 13 amplifies the control signal V1 to generate the drive signal V2. For example, the amplifier circuit 13 includes a current source CS1 and a transistor M1 (for example, a PMOSFET).

[0016] The gate of the transistor M1 is connected to an application terminal of a control signal V1. The source of the transistor M1 is connected to an application terminal of an input voltage VIN. The drain of the transistor M1 and a first terminal of a current source CS1 are connected to an application terminal of a drive signal V2. The second terminal of the current source CS1 is connected to a ground terminal. The current source CS1 generates a drive current ID13 for the amplifier circuit 13.

[0017] When the control signal V1 falls, the drive signal V2 rises, so the gate-source voltage of the output transistor M0 falls. Therefore, the on-resistance of the output transistor M0 rises, so the output current IOUT flowing through the output transistor M0 falls. As a result, the output voltage VOUT falls.

[0018] Conversely, when the control signal V1 rises, the drive signal V2 falls, and the gate-source voltage of the output transistor M0 rises. Therefore, the on-resistance of the output transistor M0 decreases, and the output current IOUT flowing through the output transistor M0 increases. As a result, the output voltage VOUT rises.

[0019] In general, in a power supply device X (for example, an LDO regulator), the frequency of the pole generated in the output stage of the output transistor M0 moves over a wide range from low to high frequencies depending on the output current IOUT. Therefore, in a configuration where phase compensation is performed using only a fixed phase constant, it is necessary to cover a wide range from light load to heavy load, making it difficult to ensure a phase margin.

[0020] In the following, an embodiment is proposed that can ensure the phase margin of the feedback control circuit 10 over a wide frequency band.

[0021] <Power supply device (second embodiment)> 2 is a diagram showing a second embodiment of the power supply device. The power supply device X of this embodiment is based on the first embodiment (FIG. 1) described above and further includes a current detection circuit 20 and a phase constant adjustment circuit 30.

[0022] The current detection circuit 20 detects the output current IOUT flowing through the output transistor M0 and generates a current detection signal DET. For example, the current detection signal DET may be a binary signal or a multi-value signal whose logic level (voltage value or current value) changes depending on the result of comparing the output current IOUT with a predetermined threshold value Ith.

[0023] The phase constant adjustment circuit 30 autonomously adjusts the phase constant of the feedback control circuit 10 (at least one of the feedback circuit 11, the comparison circuit 12, and the amplifier circuit 13) in response to the current detection signal DET. Note that the target of the phase constant adjustment will be described in detail later with specific examples.

[0024] 3 is a diagram showing the relationship between the output current IOUT and the phase margin. The solid line PM1 shows the behavior when the phase constant is autonomously adjusted (= the behavior of the second embodiment). On the other hand, the dashed line PM2 shows the behavior when the phase constant is not autonomously adjusted (= the behavior of the first embodiment).

[0025] As shown in this figure, autonomous adjustment (optimization) of the phase constant is performed in response to the output current IOUT, so that the phase margin in the light load region (in this figure, the load region where the output current IOUT is smaller than the threshold value Ith) can be improved.

[0026] 4 is a diagram showing the phase and gain characteristics of the feedback control circuit 10. The solid lines P1 and G1 show the phase and gain waveforms when autonomous adjustment of the phase constant is performed. On the other hand, the dashed lines P2 and G2 show the phase and gain waveforms when autonomous adjustment of the phase constant is not performed.

[0027] As shown in this figure, the phase constant is autonomously adjusted according to the output current IOUT, so that, for example, the zero point is shifted to the lower frequency side. Therefore, the phase lift also moves to the lower frequency side. As a result, as shown by the dashed line frame α in this figure, the phase margin is improved (for example, from 17.6 deg to 20.0 deg).

[0028] <Phase constant adjustment circuit (1st example)> 5 is a diagram showing a first example of the phase constant adjustment circuit 30. The phase constant adjustment circuit 30 of the first example adjusts the phase constant of the feedback circuit 11.

[0029] Referring to this figure, the feedback circuit 11 includes capacitors C1 and C2 in addition to the resistors R1 and R2 mentioned above. A first end of the capacitor C1 is connected to a first end of the resistor R1. A second end of the capacitor C1 is connected to a first end of the capacitor C2. A second end of the capacitor C2 is connected to a second end of the resistor R1. The capacitors C1 and C2 can be understood as capacitors for phase compensation connected in parallel to the resistor R1.

[0030] The phase constant adjustment circuit 30 includes a transistor M2 (for example, an NMOSFET [N-channel type MOSFET]). The drain of the transistor M2 is connected to a first terminal of the capacitor C2. The source of the transistor M2 is connected to a second terminal of the capacitor C2. The gate of the transistor M2 is connected to an application terminal of a current detection signal DET. The current detection signal DET may be a binary voltage signal whose voltage value switches between a high level and a low level according to a comparison result between the output current IOUT and a predetermined threshold Ith.

[0031] The transistor M2 functions as a switch element for switching the phase constant of the feedback circuit 11. In accordance with this figure, the transistor M2 is turned on when the current detection signal DET is at a high level. Therefore, both ends of the capacitor C2 are shorted. As a result, only the capacitor C1 is effective as a phase compensation capacitor. On the other hand, the transistor M2 is turned off when the current detection signal DET is at a low level. Therefore, both ends of the capacitor C2 are open. As a result, the series combined capacitance of the capacitors C1 and C2 is effective as a phase compensation capacitor. In this way, the phase constant adjustment circuit 30 may autonomously adjust the capacitance value of the phase compensation capacitor connected in parallel to the resistor R1 (corresponding to a voltage dividing resistor) in response to the current detection signal DET.

[0032] <Phase constant adjustment circuit (2nd example)> 6 is a diagram showing a second example of the phase constant adjustment circuit 30. The phase constant adjustment circuit 30 of the second example adjusts the phase constant of the comparison circuit 12.

[0033] Referring to the figure, the comparison circuit 12 includes, as components of the error amplifier AMP, capacitors C3 and C4, current sources CS2 and CS3, transistors M3 and M4 (e.g., PMOSFET), transistors M5 and M6 (e.g., NMOSFET), and resistors R3 to R6. The phase constant adjustment circuit 30 includes a transistor M7 (e.g., PMOSFET) and transistors M8 to M10 (e.g., NMOSFET).

[0034] A first terminal of the current source CS2 and a source of the transistor M7 are connected to a power supply terminal. A drain of the transistor M7 is connected to a first terminal of the current source CS3. A gate of the transistor M7 is connected to an application terminal of a current detection signal DET. The current detection signal DET may be a binary voltage signal whose voltage value switches to a high level or a low level depending on a comparison result between the output current IOUT and a predetermined threshold Ith. A second terminal of the current source CS3 is connected to a second terminal of the current source CS2. The transistor M7 and the current source CS3 correspond to a first adjustment circuit 31 of the phase constant adjustment circuit 30. In addition, the current sources CS2 and CS3 generate a drive current ID12 (= bias current) of the comparison circuit 12.

[0035] The first terminals of the resistors R3 and R4 are connected to the second terminal of the current source CS2. The second terminal of the resistor R3 is connected to the first terminal of the resistor R5 and the drain of the transistor M8. The source of the transistor M8 is connected to the second terminal of the resistor R5. The second terminal of the resistor R4 is connected to the first terminal of the resistor R6 and the drain of the transistor M9. The source of the transistor M9 is connected to the second terminal of the resistor R6. The gates of the transistors M8 and M9 are connected to an application terminal of the current detection signal DET. The second terminal of the resistor R5 is connected to the source of the transistor M3. The second terminal of the resistor R6 is connected to the source of the transistor M4. The transistors M8 and M9 and the resistors R5 and R6 correspond to the second adjustment circuit 32 of the phase constant adjustment circuit 30. The resistors R3 to R6 correspond to source resistors connected in series to the transistors M3 and M4, respectively.

[0036] A first end of the capacitor C4 is connected to the sources of the transistors M3 and M10. A second end of the capacitor C4 is connected to the first end of the capacitor C3 and the drain of the transistor M10. A gate of the transistor M10 is connected to an application terminal of the current detection signal DET. A second end of the capacitor C3 is connected to the source of the transistor M4. The transistor M10 and the capacitor C4 correspond to the third adjustment circuit 33 of the phase constant adjustment circuit 30.

[0037] The source of the transistor M3 is connected to the second end of the resistor R5. The gate of the transistor M3 is connected to the application end of the reference voltage VREF. The source of the transistor M4 is connected to the second end of the resistor R6. The gate of the transistor M4 is connected to the application end of the feedback voltage VFB. The transistors M3 and M4 correspond to a pair of transistors (= an input stage that receives input at the gate of a PMOSFET) that receive the reference voltage VREF and the feedback voltage VFB, respectively.

[0038] The drain of the transistor M5 is connected to the drain of the transistor M3. The drain of the transistor M6 is connected to the drain of the transistor M4. The gates of the transistors M5 and M6 are connected to the drain of the transistor M6. The sources of the transistors M5 and M6 are connected to the ground terminal.

[0039] In the first adjustment circuit 31, the transistor M7 is controlled to be turned on / off in response to the current detection signal DET. The transistor M7 functions as a switch element that switches the phase constant of the comparison circuit 12. For example, the transistor M7 is turned off when the current detection signal DET is at a high level. As a result, the drive current ID12 is only the output of the current source CS2. On the other hand, the transistor M7 is turned on when the current detection signal DET is at a low level. As a result, the drive current ID12 is the combined output of the current sources CS2 and CS3. In this way, the phase constant adjustment circuit 30 may autonomously adjust the current value of the drive current ID12 flowing through the transistors M3 and M4 in response to the current detection signal DET.

[0040] In the second adjustment circuit 32, the transistors M8 and M9 are controlled to be turned on / off in response to the current detection signal DET. The transistors M8 and M9 function as switch elements for switching the phase constant of the comparison circuit 12. For example, the transistors M8 and M9 are turned on when the current detection signal DET is at a high level. Thus, both ends of the resistors R5 and R6 are shorted. As a result, only the resistors R3 and R4 are enabled as source resistors. On the other hand, the transistors M8 and M9 are turned off when the current detection signal DET is at a low level. Thus, both ends of the resistors R5 and R6 are open. As a result, the series combined resistance of the resistors R3 and R5 and the resistors R4 and R6 is enabled as source resistors. In this way, the phase constant adjustment circuit 30 may autonomously adjust the resistance values ​​of the source resistors connected in series to the transistors M3 and M4 in response to the current detection signal DET. The gain of the error amplifier AMP can be adjusted by adjusting the source resistance.

[0041] In the third adjustment circuit 33, the transistor M10 is controlled to be turned on / off in response to the current detection signal DET. The transistor M10 functions as a switch element for switching the phase constant of the comparison circuit 12. For example, the transistor M10 is turned on when the current detection signal DET is at a high level. Therefore, both ends of the capacitor C4 are shorted. As a result, only the capacitor C3 is enabled as a phase compensation capacitor. On the other hand, the transistor M10 is turned off when the current detection signal DET is at a low level. Therefore, both ends of the capacitor C4 are opened. As a result, the series combined capacitance of the capacitors C3 and C4 is enabled as a phase compensation capacitor. In this way, the phase constant adjustment circuit 30 may autonomously adjust the capacitance value of the phase compensation capacitor connected between the transistors M3 and M4 in response to the current detection signal DET.

[0042] The phase constant adjustment circuit 30 may include only one or two of the first adjustment circuit 31, the second adjustment circuit 32, and the third adjustment circuit 33.

[0043] <Phase constant adjustment circuit (3rd example)> 7 is a diagram showing a third example of the phase constant adjustment circuit 30. As in the second example (FIG. 6) described above, the phase constant adjustment circuit 30 of the third example adjusts the phase constant of the comparison circuit 12. However, the circuit configuration of the comparison circuit 12 is different from that of the second example.

[0044] With reference to this figure, the comparison circuit 12 includes, as components of an error amplifier AMP, capacitors C5 and C6, current sources CS4 and CS5, transistors M11 and M12 (e.g., NMOSFET), transistors M13 and M14 (e.g., PMOSFET), and resistors R7 to R10. The phase constant adjustment circuit 30 includes a transistor M15 (e.g., NMOSFET), transistors M16 and M17 (e.g., PMOSFET), and a transistor M18 (e.g., NMOSFET).

[0045] A first end of the current source CS4 and a source of the transistor M15 are connected to a ground end. A drain of the transistor M15 is connected to a first end of the current source CS5. A gate of the transistor M15 is connected to an application end of a current detection signal DET. The current detection signal DET may be a binary voltage signal whose voltage value switches to a high level or a low level according to a comparison result between the output current IOUT and a predetermined threshold Ith. A second end of the current source CS5 is connected to a second end of the current source CS4. The transistor M15 and the current source CS5 correspond to a first adjustment circuit 34 of the phase constant adjustment circuit 30. In addition, the current sources CS4 and CS5 generate a drive current ID12 (=bias current) of the comparison circuit 12.

[0046] The first terminals of the resistors R9 and R10 and the sources of the transistors M16 and M17 are connected to a power supply terminal. The second terminal of the resistor R9 and the drain of the transistor M16 are connected to a first terminal of the resistor R7. The second terminal of the resistor R7 is connected to the drain of the transistor M11. The second terminal of the resistor R10 and the drain of the transistor M17 are connected to a first terminal of the resistor R8. The second terminal of the resistor R8 is connected to the drain of the transistor M12. The gates of the transistors M16 and M17 are connected to an application terminal of the current detection signal DET. The transistors M16 and M17 and the resistors R9 and R10 correspond to the second adjustment circuit 35 of the phase constant adjustment circuit 30. The resistors R7 to R10 correspond to drain resistors connected in series to the transistors M11 and M12, respectively.

[0047] A first end of the capacitor C6 is connected to the drain of the transistor M11 and the source of the transistor M18. A second end of the capacitor C6 is connected to the first end of the capacitor C5 and the drain of the transistor M18. A gate of the transistor M18 is connected to an application terminal of the current detection signal DET. A second end of the capacitor C5 is connected to the drain of the transistor M12. The transistor M18 and the capacitor C6 correspond to the third adjustment circuit 36 ​​of the phase constant adjustment circuit 30.

[0048] The drain of the transistor M11 is connected to the second end of the resistor R7. The gate of the transistor M11 is connected to the application end of the reference voltage VREF. The drain of the transistor M12 is connected to the second end of the resistor R8. The gate of the transistor M12 is connected to the application end of the feedback voltage VFB. The sources of the transistors M11 and M12 are connected to the first end of the current source CS4. The transistors M11 and M12 correspond to a pair of transistors (= an input stage that receives inputs at the gates of NMOSFETs) that receive the reference voltage VREF and the feedback voltage VFB, respectively.

[0049] The drain of the transistor M13 is connected to the drain of the transistor M11. The drain of the transistor M14 is connected to the drain of the transistor M12. The gates of the transistors M13 and M14 are connected to the drain of the transistor M14. The sources of the transistors M13 and M14 are connected to the power supply terminal.

[0050] In the first adjustment circuit 34, the transistor M15 is controlled to be turned on / off in response to the current detection signal DET. The transistor M15 functions as a switch element that switches the phase constant of the comparison circuit 12. For example, the transistor M15 is turned off when the current detection signal DET is at a low level. As a result, the drive current ID12 is only the output of the current source CS4. On the other hand, the transistor M15 is turned on when the current detection signal DET is at a high level. As a result, the drive current ID12 is the combined output of the current sources CS4 and CS5. In this way, the phase constant adjustment circuit 30 may autonomously adjust the current value of the drive current ID12 flowing through the transistors M11 and M12 in response to the current detection signal DET.

[0051] In the second adjustment circuit 35, the transistors M16 and M17 are controlled to be turned on / off in response to the current detection signal DET. The transistors M6 and M17 function as switch elements for switching the phase constant of the comparison circuit 12. For example, the transistors M16 and M17 are turned on when the current detection signal DET is at a low level. Thus, both ends of the resistors R9 and R10 are shorted. As a result, only the resistors R7 and R8 are enabled as the drain resistance. On the other hand, the transistors M16 and M17 are turned off when the current detection signal DET is at a high level. Thus, both ends of the resistors R9 and R10 are opened. As a result, the series combined resistance of the resistors R7 and R9 and the resistors R8 and R10 is enabled as the drain resistance. In this way, the phase constant adjustment circuit 30 may autonomously adjust the resistance values ​​of the drain resistances connected in series to the transistors M11 and M12 in response to the current detection signal DET. The gain of the error amplifier AMP can be adjusted by adjusting the drain resistance.

[0052] In the third adjustment circuit 36, the transistor M18 is controlled to be turned on / off in response to the current detection signal DET. The transistor M18 functions as a switch element for switching the phase constant of the comparison circuit 12. For example, the transistor M18 is turned on when the current detection signal DET is at a high level. Therefore, both ends of the capacitor C6 are shorted. As a result, only the capacitor C5 is enabled as a phase compensation capacitor. On the other hand, the transistor M18 is turned off when the current detection signal DET is at a low level. Therefore, both ends of the capacitor C6 are opened. As a result, the series combined capacitance of the capacitors C5 and C6 is enabled as a phase compensation capacitor. In this way, the phase constant adjustment circuit 30 may autonomously adjust the capacitance value of the phase compensation capacitor connected between the transistors M11 and M12 in response to the current detection signal DET.

[0053] The phase constant adjustment circuit 30 may include only one or two of the first adjustment circuit 34, the second adjustment circuit 35, and the third adjustment circuit .

[0054] Moreover, the comparison circuit 12 (particularly the error amplifier AMP) is not limited to the circuit configurations shown in FIGS.

[0055] <Phase constant adjustment circuit (4th example)> 8 is a diagram showing a fourth example of the phase constant adjustment circuit 30. The phase constant adjustment circuit 30 of the fourth example adjusts the phase constant of the amplifier circuit 13.

[0056] With reference to this figure, the amplifier circuit 13 includes a capacitor C7 and resistors R11 to R13 in addition to the transistor M1. A first terminal of the capacitor C7 is connected to the drain of the transistor M1 (=the application terminal of the drive signal V2). A second terminal of the capacitor C7 is connected to the first terminal of the resistor R11. A second terminal of the resistor R11 is connected to the first terminal of the resistor R12. A second terminal of the resistor R12 is connected to the first terminal of the resistor R13. A second terminal of the resistor R13 is connected to the gate of the transistor M1 (=the application terminal of the control signal V1). The capacitor C7 and the resistors R11 to R13 can be understood as a capacitor and resistor for phase compensation connected in series between the gate and source of the transistor M1.

[0057] The phase constant adjustment circuit 30 includes transistors M19 to M21 (for example, PMOSFETs). The source of the transistor M21 and the back gates of the transistors M19 to M21 are connected to the source of the transistor M1 (=the application terminal of the input voltage VIN). The source of the transistor M20 is connected to the second terminal of the resistor R13. The gate and drain of the transistor M21 are connected to the source of the transistor M19. The gates of the transistors M19 and M20 are connected to the drain of the transistor M19. The drain of the transistor M19 is connected to the application terminal of the current detection signal DET. Note that the current detection signal DET may be a binary current signal whose current value switches to a high level or a low level (zero value) according to a comparison result between the output current IOUT and a predetermined threshold Ith. The drain of the transistor M20 is connected to the first terminal of the resistor R13.

[0058] The transistor M19 is an element for turning on the transistor M20. In reference to this diagram, when the current detection signal DET flows to the drain of the transistor M19, the gate-source voltage of the transistor M19 rises. As a result, the gate-source voltage of the transistor M20 also rises, so that the transistor M20 turns on.

[0059] The transistor M20 functions as a switch element for switching the phase constant of the amplifier circuit 13. In accordance with this figure, the transistor M20 is turned on when the current detection signal DET is at a high level (= a state in which a current flows through the drain of the transistor M19). Therefore, both ends of the resistor R13 are shorted. As a result, the series combined resistor of the resistors R11 and R12 is effective as a resistor for phase compensation. On the other hand, the transistor M20 is turned off when the current detection signal DET is at a low level (= a state in which no current flows through the drain of the transistor M19). Therefore, both ends of the resistor R13 are open. As a result, the series combined resistor of the resistors R11 to R13 is effective as a resistor for phase compensation. In this way, the phase constant adjustment circuit 30 may autonomously adjust the resistance value of the phase compensation resistor connected between the gate and drain of the transistor M1 in response to the current detection signal DET.

[0060] According to this configuration, the zero point is shifted with respect to the pole generated in the output stage of the output transistor M0, and therefore the phase margin in the low frequency range under light load conditions can be improved.

[0061] The transistor M21 is provided as a means for securing an operating voltage necessary to turn on the transistor M20. In the following description, the on-threshold voltages of the transistors M1 and M19 to M21 are Vth(M1) and Vth(M19) to Vth(M21), respectively.

[0062] When the current detection signal DET flows through the drain of the transistor M19, in order for the transistor M20 to be turned on, the gate voltage of the transistor M20 must drop to or below VIN-Vth(M1)-Vth(M20).

[0063] If the transistor M21 is not provided, even if the current detection signal DET flows to the drain of the transistor M19, the gate voltage of the transistor M20 will only drop to VIN-Vth(M19). Therefore, the transistor M20 will not be turned on. On the other hand, if the transistor M21 is provided, the gate voltage of the transistor M20 will drop to VIN-Vth(M21)-Vth(M19).

[0064] Therefore, when Vth(M21)=Vth(M1) and Vth(M19)=Vth(M20), the gate voltage of the transistor M20 drops to VIN-Vth(M1)-Vth(M20) or less, and the transistor M20 is turned on.

[0065] In view of the above, it is desirable that the transistor M21 is paired with the transistor M1 so that Vth(M21)=Vth(M1) is satisfied, and it is desirable that the transistor M19 is paired with the transistor M20 so that Vth(M19)=Vth(M20) is satisfied.

[0066] If it is necessary to adjust the temperature characteristics of the amplifier circuit 13, two types of elements having different temperature characteristics may be used as the resistors R11 and R12. On the other hand, if priority is given to simplifying the amplifier circuit 13, one of the resistors R11 and R12 may be omitted.

[0067] <Phase constant adjustment circuit (5th example)> 9 is a diagram showing a fifth example of the phase constant adjustment circuit 30. Like the fourth example (FIG. 8) described above, the fifth example of the phase constant adjustment circuit 30 adjusts the phase constant of the amplifier circuit 13. However, the resistors R11 and R12 described above are omitted from the components of the amplifier circuit 13.

[0068] In this configuration, when the transistor M20 is in the on state, the on-resistance value Ron of the transistor M20 is used as an impedance for phase compensation. The on-resistance value Ron of the transistor M20 is much smaller than the resistance value of the resistor R13. Therefore, the combined parallel resistance of the two is approximately equal to the on-resistance value Ron of the transistor M20. In other words, when the current detection signal DET is at a high level (= a state in which a current flows through the drain of the transistor M19), the capacitance value of the capacitor C7 and the on-resistance value Ron of the transistor M20 are effective as a phase constant, and a zero point is created at a frequency corresponding to both of them.

[0069] <Phase constant adjustment circuit (6th example)> Fig. 10 is a diagram showing a sixth example of the phase constant adjustment circuit 30. As with the fourth example (Fig. 8) described above, the sixth example of the phase constant adjustment circuit 30 adjusts the phase constant of the amplifier circuit 13. However, as components of the amplifier circuit 13, the capacitor C7 and resistors R11 to R13 described above are replaced with capacitors C8 and C9 and a resistor R14.

[0070] A first end of the resistor R14 is connected to the drain of the transistor M1 (=the application end of the drive signal V2). A second end of the resistor R14 is connected to a first end of the capacitor C8. A second end of the capacitor C8 is connected to a first end of the capacitor C9. A second end of the capacitor C9 is connected to the gate of the transistor M1 (=the application end of the control signal V1). The capacitors C8 and C9 and the resistor R14 can be understood as a capacitor and resistor for phase compensation connected in series between the gate and source of the transistor M1.

[0071] The phase constant adjustment circuit 30 includes transistors M19 to M21, as in the fourth example (FIG. 8). Focusing only on the changes, the drain of the transistor M20 is connected to the first terminal of the capacitor C9. The source of the transistor M20 is connected to the second terminal of the capacitor C9.

[0072] The transistor M20 functions as a switch element for switching the phase constant of the amplifier circuit 13. In accordance with this figure, the transistor M20 is turned on when the current detection signal DET is at a high level (= a state in which a current flows through the drain of the transistor M19). Therefore, both ends of the capacitor C9 are shorted. As a result, only the capacitor C8 is effective as a phase compensation capacitor. On the other hand, the transistor M20 is turned off when the current detection signal DET is at a low level (= a state in which no current flows through the drain of the transistor M19). Therefore, both ends of the capacitor C9 are open. As a result, the series combined capacitance of the capacitors C8 and C9 is effective as a phase compensation capacitor. In this way, the phase constant adjustment circuit 30 may autonomously adjust the capacitance value of the phase compensation capacitor connected between the gate and drain of the transistor M1 in response to the current detection signal DET.

[0073] <Phase constant adjustment circuit (7th example)> Fig. 11 is a diagram showing a seventh example of the phase constant adjustment circuit 30. In the seventh example of the phase constant adjustment circuit 30, the amplifier circuit 13 is the target for phase constant adjustment, similar to the fourth example (Fig. 8), the fifth example (Fig. 9), and the sixth example (Fig. 10) described above. However, the circuit configuration of the amplifier circuit 13 is modified.

[0074] With reference to this figure, the amplifier circuit 13 includes a current source CS6 in addition to a transistor M1 and a current source CS1. The phase constant adjustment circuit 30 includes a transistor M22. A first terminal of the current source CS1 is connected to the drain of the transistor M1. A second terminal of the current source CS1 is connected to the drain of the transistor M22. A source of the transistor M22 is connected to the ground terminal. A gate of the transistor M22 is connected to an application terminal of a current detection signal DET. The current detection signal DET may be a binary voltage signal whose voltage value switches to a high level or a low level depending on a comparison result between the output current IOUT and a predetermined threshold Ith.

[0075] The transistor M22 functions as a switch element that switches the phase constant of the amplifier circuit 13. For example, the transistor M22 is turned off when the current detection signal DET is at a low level. As a result, the drive current ID13 is only the output of the current source CS1. On the other hand, the transistor M22 is turned on when the current detection signal DET is at a high level. As a result, the drive current ID13 is the combined output of the current sources CS1 and CS6. In this way, the phase constant adjustment circuit 30 may autonomously adjust the current value of the drive current ID13 flowing through the transistor M1 in response to the current detection signal DET.

[0076] The circuit configuration of the seventh example (FIG. 11) can be arbitrarily combined with the circuit configuration of the fourth example (FIG. 8), the fifth example (FIG. 9), or the sixth example (FIG. 10) mentioned above.

[0077] <Current detection circuit (first example)> 12 is a diagram showing a first example of the current detection circuit 20. The current detection circuit 20 of the first example includes a transistor M23 (for example, a PMOSFET), transistors M24 and M25 (for example, an NMOSFET), and a resistor R15.

[0078] The source of the transistor M23 is connected to the application terminal of the input voltage VIN (=the source of the output transistor M0). The gate of the transistor M23 is connected to the application terminal of the drive signal V2 (=the gate of the output transistor M0). The transistor M23 functions as a sense transistor that generates a sense current I1 (∝IOUT) corresponding to the output current IOUT.

[0079] The drain of the transistor M24 is connected to the drain of the transistor M23. The gates of the transistors M24 and M25 are connected to the drain of the transistor M24. The sources of the transistors M24 and M25 are connected to the ground terminal. The drain of the transistor M25 is connected to the application terminal of the current detection signal DET. The transistors M24 and M25 connected in this manner function as a current mirror CM1 that generates a mirror current I2 that is a replica of the sense current I1 (more precisely, a differential current obtained by subtracting the current flowing through the resistor R15 from the sense current I1).

[0080] A first end of the resistor R15 is connected to the drain of the transistor M24. A second end of the resistor R15 is connected to the source of the transistor M24. The resistor R15 corresponds to a switch element that switches the current mirror CM1 between enabled and disabled in response to the sense current I1. In accordance with this diagram, the current mirror CM1 is enabled when the sense current I1 is greater than a predetermined threshold (=Vth(M24) / R15), where Vth(M24) is the on-threshold voltage of the transistor M24.

[0081] The current detection circuit 20 outputs the mirror current I2 as a current detection signal DET. In this manner, the current detection signal DET in this configuration example is a binary current signal whose current value switches between a high level and a low level (=zero value) according to the output current IOUT.

[0082] <Current detection circuit (second example)> 13 is a diagram showing a second example of the current detection circuit 20. The current detection circuit 20 of the second example includes transistors M26 and M27 (for example, PMOSFETs), transistors M28 and M29 (for example, NMOSFETs), and a resistor R16.

[0083] The source of the transistor M26 and the first end of the resistor R16 are connected to the application end of the input voltage VIN (=the source of the output transistor M0). The source of the transistor M27 is connected to the second end of the resistor R16. The gates of the transistors M26 and M27 are connected to the application end of the drive signal V2 (=the gate of the output transistor M0). The drain of the transistor M27 is connected to the application end of the current detection signal DET. The element size ratio of the transistors M26 and M27 may be 1:m (for example, m>1). The transistor M26 functions as a first sense transistor that generates a first sense current I3 (∝IOUT) corresponding to the output current IOUT. The transistor M27 functions as a second sense transistor that generates a second sense current I4 (≦m×I3) corresponding to the output current IOUT.

[0084] The drain of the transistor M28 is connected to the drain of the transistor M26. The gates of the transistors M28 and M29 are connected to the drain of the transistor M28. The sources of the transistors M28 and M29 are connected to the ground terminal. The drain of the transistor M29 is connected to the application terminal of the current detection signal DET. The element size ratio of the transistors M28 and M29 may be 1:n (for example, n<1). The transistors M28 and M29 connected in this manner function as a current mirror CM2 that generates a mirror current I5 (=n×I3) that is a copy of the first sense current I3.

[0085] Incidentally, the second sense current I4 is limited by the resistor R16. Therefore, when the output current IOUT becomes larger than the threshold Ith, the magnitude relationship between the second sense current I4 and the mirror current I5 is reversed. Thus, the current detection circuit 20 outputs a comparison signal V3 whose logic level switches according to the magnitude relationship between the second sense current I4 and the mirror current I5 as a current detection signal DET. For example, the comparison signal V3 becomes a high level (≈VIN) when I4 > I5. On the other hand, the comparison signal V3 becomes a low level (≈GND) when I4 < I5. In this way, the current detection signal DET of this configuration example is a binary voltage signal whose voltage value switches between a high level and a low level according to the output current IOUT.

[0086] <Current Detection Circuit (Third Example)> FIG. 14 is a diagram showing a third example of the current detection circuit 20. The current detection circuit 20 of the third example includes a transistor M30 (e.g., PMOSFET), a resistor R17, and a comparator CMP.

[0087] The source of the transistor M30 is connected to the applied end of the input voltage VIN (= the source of the output transistor M0). The gate of the transistor M30 is connected to the applied end of the drive signal V2 (= the gate of the output transistor M0). The transistor M30 functions as a sense transistor that generates a sense current I6 (∝IOUT) corresponding to the output current IOUT.

[0088] The first end of the resistor R17 is connected to the drain of the transistor M30 (= the applied end of the sense voltage V4). The second end of the resistor R17 is connected to the ground terminal. The resistor R17 corresponds to a current / voltage conversion element that converts the sense current I6 into a sense voltage V4 (= I6 × R17).

[0089] The comparator CMP compares the sense voltage V4 input to the non-inverting input terminal (+) with the threshold voltage V5 input to the inverting input terminal (-) and generates a comparison signal V6. The comparison signal V6 becomes a high level when the sense voltage V4 is higher than the threshold voltage V5. On the other hand, the comparison signal V6 becomes a low level when the sense voltage V4 is lower than the threshold voltage V5.

[0090] The current detection circuit 20 outputs the comparison signal V6 as the current detection signal DET. In this manner, the current detection signal DET in this configuration example is a binary voltage signal whose voltage value switches between a high level and a low level according to the output current IOUT.

[0091] In addition, hysteresis may be applied to the current detection signal DET by switching the resistance value of the resistor R17 in response to the current detection signal DET. In addition, when it is necessary to improve the accuracy of the threshold value Ith compared with the output current IOUT, the resistance value of the resistor R17 may be finely adjusted by trimming or the like.

[0092] <Modification> The PMOSFET and NMOSFET exemplified above may be replaced with pnp-type and npn-type bipolar transistors, respectively. In that case, the gate, source, and drain of the MOSFET are interpreted as the base, emitter, and collector of the bipolar transistor, respectively.

[0093] Furthermore, the autonomous phase constant adjustment technique according to the present disclosure is not limited to linear power supplies, but can be widely applied to all power supply devices that require phase compensation of a feedback control circuit.

[0094] <Additional Notes> The above disclosure will be summarized below.

[0095] For example, a power supply control device according to the present disclosure is configured to control an output transistor of a power supply device that generates an output voltage from an input voltage, and is configured (first configuration) to include a feedback control circuit configured to generate a drive signal for the output transistor so that a feedback voltage corresponding to the output voltage matches a predetermined reference voltage, a current detection circuit configured to detect an output current flowing through the output transistor and generate a current detection signal, and a phase constant adjustment circuit configured to autonomously adjust the phase constant of the feedback control circuit in response to the current detection signal.

[0096] In addition, in the power supply control device of the above first configuration, the feedback control circuit may be configured (second configuration) to include a feedback circuit configured to generate the feedback voltage from the output voltage, a comparison circuit configured to generate a control signal corresponding to the difference between the feedback voltage and the reference voltage, and an amplifier circuit configured to amplify the control signal to generate the drive signal.

[0097] In addition, in the power supply control device of the above second configuration, the feedback circuit may include a voltage dividing resistor that divides the output voltage to generate the feedback voltage, and the phase constant adjustment circuit may be configured to autonomously adjust a capacitance value of a capacitor connected in parallel to the voltage dividing resistor (third configuration).

[0098] Furthermore, in the power supply control device according to the second or third configuration, the comparison circuit may include a pair of transistors receiving the reference voltage and the feedback voltage, respectively, and the phase constant adjustment circuit may be configured (fourth configuration) to autonomously adjust at least one of the current value of the drive current flowing through the pair of transistors, the resistance value of a resistor connected in series to the pair of transistors, and the capacitance value of a capacitor connected between the pair of transistors.

[0099] Furthermore, in a power supply control device according to any one of the second to fourth configurations, the amplifier circuit may include a transistor having a control terminal connected to an application terminal of the control signal and a main electrode connected to an application terminal of the drive signal, and the phase constant adjustment circuit may be configured (fifth configuration) to autonomously adjust at least one of the resistance value of a resistor connected between the control terminal and main electrode of the transistor, the capacitance value of a capacitor connected between the control terminal and main electrode of the transistor, and the current value of the drive current flowing through the transistor.

[0100] In a power supply control device according to any one of the first to fifth configurations above, the current detection circuit may include a sense transistor configured to generate a sense current corresponding to the output current, and a current mirror configured to generate a mirror current that replicates the sense current when the sense current is greater than a threshold value, and may be configured to output the mirror current as the current detection signal (sixth configuration).

[0101] In a power supply control device according to any one of the first to fifth configurations above, the current detection circuit may include a first sense transistor and a second sense transistor configured to generate a first sense current and a second sense current, respectively, corresponding to the output current, a resistor configured to limit the second sense current, and a current mirror configured to generate a mirror current that replicates the first sense current, and may be configured to output a comparison signal between the second sense current and the mirror current as the current detection signal (seventh configuration).

[0102] In a power supply control device according to any one of the first to fifth configurations above, the current detection circuit may include a sense transistor configured to generate a sense current corresponding to the output current, a current / voltage conversion element configured to convert the sense current into a sense voltage, and a comparator configured to compare the sense voltage with a threshold voltage to generate a comparison signal, and may be configured to output the comparison signal as the current detection signal (eighth configuration).

[0103] Also, for example, a power supply device according to the present disclosure has a configuration (ninth configuration) including a power supply control device having any one of the first to eighth configurations and the output transistor.

[0104] In addition, in the power supply device of the 9th configuration, the output transistor may be connected to the application terminal of the input voltage and the application terminal of the output voltage, and the on-resistance value may be linearly controlled in response to the drive signal (10th configuration).

[0105] With a power supply control device according to the present disclosure, it is possible to ensure a phase margin of a feedback control circuit over a wide frequency band.

[0106] <Other> In addition, various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation, in addition to the above-mentioned embodiment. In other words, the above-mentioned embodiment should be considered to be illustrative and not restrictive in all respects. In addition, the technical scope of the present disclosure is defined by the claims, and should be understood to include all modifications that fall within the meaning and scope equivalent to the claims. [Explanation of symbols]

[0107] 1 Power supply control device 10 Feedback control circuit 11 Feedback circuit 12 Comparison circuit 13 Amplification circuit 20 Current detection circuit 30 Phase constant adjustment circuit 31, 34 1st adjustment circuit 32, 35 2nd adjustment circuit 33, 36 Third adjustment circuit AMP Error amplifier C1~C9 Capacitors CM1, CM2 current mirror CMP Comparator CS1~CS6 current source M0 Output Transistor M1~M30 Transistors R1~R17 Resistors X Power supply

Claims

1. 1. A power supply control device configured to control an output transistor of a power supply device that generates an output voltage from an input voltage, a feedback control circuit configured to generate a drive signal for the output transistor such that a feedback voltage corresponding to the output voltage coincides with a predetermined reference voltage; a current detection circuit configured to detect an output current flowing through the output transistor and generate a current detection signal; a phase constant adjustment circuit configured to autonomously adjust a phase constant of the feedback control circuit in response to the current detection signal; A power supply control device comprising:

2. The feedback control circuit includes: a feedback circuit configured to generate the feedback voltage from the output voltage; a comparison circuit configured to generate a control signal corresponding to a difference between the feedback voltage and the reference voltage; an amplifier circuit configured to amplify the control signal to generate the drive signal; The power control device of claim 1 .

3. the feedback circuit includes a voltage dividing resistor that divides the output voltage to generate the feedback voltage; 3. The power supply control device according to claim 2, wherein the phase constant adjustment circuit autonomously adjusts a capacitance value of a capacitor connected in parallel to the voltage dividing resistor.

4. the comparison circuit includes a pair of transistors receiving the reference voltage and the feedback voltage, respectively; 3. The power supply control device according to claim 2, wherein the phase constant adjustment circuit autonomously adjusts at least one of a current value of a drive current flowing through the pair of transistors, a resistance value of a resistor connected in series to the pair of transistors, and a capacitance value of a capacitor connected between the pair of transistors.

5. the amplifier circuit includes a transistor having a control terminal connected to an application terminal of the control signal and a main electrode connected to an application terminal of the drive signal; 3. The power supply control device according to claim 2, wherein the phase constant adjustment circuit autonomously adjusts at least one of a resistance value of a resistor connected between the control end and main electrode of the transistor, a capacitance value of a capacitor connected between the control end and main electrode of the transistor, and a current value of a drive current flowing through the transistor.

6. 2. The power supply control device according to claim 1, wherein the current detection circuit includes a sense transistor configured to generate a sense current corresponding to the output current, and a current mirror configured to generate a mirror current that replicates the sense current when the sense current is greater than a threshold, and outputs the mirror current as the current detection signal.

7. 2. The power supply control device according to claim 1, wherein the current detection circuit includes a first sense transistor and a second sense transistor configured to generate a first sense current and a second sense current, respectively, according to the output current, a resistor configured to limit the second sense current, and a current mirror configured to generate a mirror current that replicates the first sense current, and outputs a comparison signal between the second sense current and the mirror current as the current detection signal.

8. 2. The power supply control device according to claim 1, wherein the current detection circuit includes: a sense transistor configured to generate a sense current corresponding to the output current; a current / voltage conversion element configured to convert the sense current into a sense voltage; and a comparator configured to compare the sense voltage with a threshold voltage to generate a comparison signal, and outputs the comparison signal as the current detection signal.

9. A power supply control device according to any one of claims 1 to 8, the output transistor; A power supply device comprising:

10. 10. The power supply device according to claim 9, wherein the output transistor is connected to an application terminal of the input voltage and an application terminal of the output voltage, and an on-resistance value of the output transistor is linearly controlled in response to the drive signal.

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