Semiconductor device

Abstract

To suppress fluctuation in electric characteristics and improve the reliability, in a semiconductor device having an oxide semiconductor film.SOLUTION: Provided is a semiconductor device having an oxide semiconductor film. The semiconductor device has: a gate electrode; a first insulating film on the gate electrode; an oxide semiconductor film on the first insulating film; a source electrode electrically connected with the oxide semiconductor film; a drain electrode electrically connected with the oxide semiconductor film; a second insulating film provided on the oxide semiconductor film, the source electrode, and the drain electrode; a first metal oxide film on the second insulating film; and a second metal oxide film on the first metal oxide film. The first metal oxide film has at least one metal element the same as that of the oxide semiconductor film. The second metal oxide film has a region mixed with the first metal oxide film.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film and a display device including the semiconductor device. Regarding the device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. Process, Machine, Manufacture, or Composition of Matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices. Silicon is a semiconductor thin film that can be used in transistors. Semiconductor materials, such as silicon, are widely known, but oxide semiconductors are also attracting attention. This has been attracting attention (for example, Patent Document 1).

[0005] In addition, an oxide insulating layer is formed over the oxide semiconductor layer, and oxygen is introduced through the oxide insulating layer. (Addition) and heat treatment are carried out, and hydrogen, moisture, hydroxyl groups, Alternatively, impurities such as hydrides are removed from the oxide semiconductor layer to highly purify the oxide semiconductor layer. A method for manufacturing a semiconductor device using the same has been disclosed (for example, Patent Document 2). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-165529 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-199272 Summary of the Invention [Problem to be solved by the invention]

[0007] When a transistor having an oxide semiconductor film in a channel region is manufactured, Impurities such as hydrogen or moisture mixed into the oxide semiconductor film affect the transistor characteristics. In addition, oxygen vacancies formed in the oxide semiconductor film in the channel region This is problematic because it affects transistor characteristics. For example, When oxygen vacancies are formed in the film, hydrogen bonds to the oxygen vacancies and becomes a carrier supply source. When a carrier source is generated in the oxide semiconductor film in the channel region, the oxide semiconductor film is effectively This causes a change in the electrical characteristics of the transistor, typically a shift in threshold voltage. There is a problem that the electrical characteristics vary among transistors. In the channel region of the oxide semiconductor film, the fewer oxygen vacancies there are, the better. In the channel region, the fewer the oxygen vacancies and impurities such as hydrogen and moisture, the better. Desirable.

[0008] In view of the above problems, one embodiment of the present invention provides a semiconductor device using a transistor including an oxide semiconductor. One of the objectives of the present invention is to suppress fluctuations in electrical characteristics and improve reliability in semiconductor devices. Another embodiment of the present invention is to provide a semiconductor device with reduced power consumption. Another object of one embodiment of the present invention is to provide a novel semiconductor device. Another object of one embodiment of the present invention is to provide a novel display device. This is the end.

[0009] The above description of the problem does not preclude the existence of other problems. The embodiment does not necessarily have to solve all of these problems. Problems other than those mentioned above can be solved by the specification. It is clear from the description of the specification, etc. that the problems other than those mentioned above cannot be extracted from the description of the specification, etc. It is possible to issue it. [Means for solving the problem]

[0010] One embodiment of the present invention is a semiconductor device including an oxide semiconductor film. a gate electrode, a first insulating film on the gate electrode, an oxide semiconductor film on the first insulating film, and an oxide A source electrode electrically connected to the semiconductor film and a drain electrode electrically connected to the oxide semiconductor film are a second insulating film on the oxide semiconductor film, the source electrode, and the drain electrode; a first metal oxide film on the insulating film and a second metal oxide film on the first metal oxide film, The first metal oxide film contains at least one metal element that is the same as that of the oxide semiconductor film. The metal oxide film has a region intermixed with the first metal oxide film.

[0011] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor film, The device includes a first gate electrode, a first insulating film on the first gate electrode, and an oxide film on the first insulating film. a source electrode electrically connected to the oxide semiconductor film; A drain electrode electrically connected to the oxide semiconductor film, the source electrode, and the drain electrode a second insulating film, a first metal oxide film on the second insulating film, and a second metal oxide film on the first metal oxide film. a metal oxide film and a second gate electrode on the second metal oxide film, The second metal oxide film contains at least one metal element identical to that of the first oxide semiconductor film. It has a region where it is mixed with the metal oxide film.

[0012] Another embodiment of the present invention is a semiconductor device including an oxide semiconductor film, The device includes a gate electrode, a first insulating film on the gate electrode, and an oxide semiconductor film on the first insulating film. a second insulating film on the oxide semiconductor film; a first metal oxide film on the second insulating film; and a first a second metal oxide film on the metal oxide film; and a second metal oxide film on the second metal oxide film. a source electrode electrically connected to the second metal oxide film and a second metal oxide film electrically connected to the oxide semiconductor film; and a drain electrode electrically connected to the first metal oxide film. The second metal oxide film has at least one metal element, and the second metal oxide film is mixed with the first metal oxide film. It has an area.

[0013] In the above embodiment, the oxide semiconductor film contains In, Zn, and M (M is Ti, Ga, Y, It is preferable that the above-mentioned element has the above-mentioned element (representing Zr, La, Ce, Nd, Sn or Hf). In this embodiment, the oxide semiconductor film preferably has a crystalline portion, and the crystalline portion preferably has a c-axis orientation. It's nice.

[0014] In the above embodiment, the second insulating film has a thickness of 8.0×1 0 14 pieces / cm 2 It is preferable that the above oxygen molecules are detected.

[0015] In the above embodiment, the first metal oxide film preferably contains In. In an embodiment, the second metal oxide film preferably comprises Al.

[0016] Another embodiment of the present invention is a semiconductor device and a display element according to any one of the above embodiments. Another embodiment of the present invention is a display device including the above display device and a touch sensor. Another aspect of the present invention is a display module having any one of the above aspects. The semiconductor device, the display device, or the display module according to any one of the preceding claims, and an operation key or a button The electronic device has a battery. [Effects of the Invention]

[0017] According to one embodiment of the present invention, a semiconductor device including a transistor including an oxide semiconductor This makes it possible to suppress fluctuations in electrical characteristics and improve reliability. According to one embodiment, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a novel semiconductor device can be provided. According to the embodiment, a novel display device can be provided.

[0018] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. The above will be made clear from the description, drawings, claims, etc. It is possible to extract other effects from the descriptions in the aspects and claims. [Brief explanation of the drawings]

[0019] [Figure 1] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 2] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 3] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 4] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 5] 1A and 1B are a top view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 6] FIG. 1 is a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 7] FIG. 1 is a diagram illustrating a band structure. [Figure 8] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 9] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 10] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 13] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 15] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 16] FIG. 2 is a diagram illustrating a thermal profile during heat treatment in a gas bake furnace. [Figure 17] FIG. 2 is a diagram illustrating a thermal profile during heat treatment in a gas bake furnace. [Figure 18] 1A to 1C are cross-sectional views illustrating one embodiment of a semiconductor device and diagrams illustrating a bonding state of silicon oxide. [Figure 19] Cs-corrected high-resolution TEM image of a cross section of CAAC-OS, and a schematic cross-sectional diagram of CAAC-OS. [Figure 20] Cs-corrected high-resolution TEM image of the CAAC-OS in the plane. [Figure 21] 10A and 10B illustrate structural analyses of a CAAC-OS and a single-crystal oxide semiconductor by XRD. [Figure 22] Electron diffraction pattern of CAAC-OS. [Figure 23] FIG. 1 shows the change in the crystalline part of an In-Ga-Zn oxide due to electron irradiation. [Figure 24] FIG. 2 is a schematic diagram illustrating the inside of a film formation chamber. [Figure 25] 3A and 3B are diagrams illustrating the cross-sectional shape and top surface shape of a pellet. [Figure 26] FIG. 2 is a schematic diagram illustrating the inside of a film formation chamber. [Figure 27] 1A and 1B are a block diagram and a circuit diagram illustrating a display device. [Figure 28] FIG. 1 is a perspective view showing an example of a touch panel. [Figure 29] FIG. 1 is a cross-sectional view showing an example of a display device. [Figure 30] FIG. 1 is a cross-sectional view showing an example of a touch sensor. [Figure 31] FIG. 1 is a cross-sectional view showing an example of a touch panel. [Figure 32] 1A and 1B are a block diagram and a timing chart of a touch sensor; [Figure 33] Circuit diagram of a touch sensor. [Figure 34] FIG. 2 is a diagram illustrating a display module. [Figure 35] 1A to 1C illustrate electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0020] Hereinafter, embodiments will be described with reference to the drawings. It is possible to implement the present invention in various ways without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that various modifications may be made to the details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0021] Also, in the drawings, the size, thickness of layers, or areas are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0022] In addition, in this specification and the like, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second" "the" or "third" can be used as appropriate for explanation. The ordinal numbers listed in the specification do not match the ordinal numbers used to identify an aspect of the present invention. There are cases where this happens.

[0023] In addition, in this specification, the terms "above" and "below" that indicate the position of components are used to indicate the position of components. The positional relationship is used for convenience in describing the structure with reference to the drawings. The relationship between the two components changes depending on the direction in which each component is depicted. The terms are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0024] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device.

[0025] In this specification, a transistor includes a gate, a drain, and a source. It is an element having at least three terminals including a drain (drain terminal, drain Between the drain electrode and the source terminal The semiconductor device has a channel region therein, and a current flows through the drain, the channel region, and the source. In this specification and the like, the channel region is a region where a current mainly flows. The flow area.

[0026] The functions of the source and drain may differ depending on whether transistors with different polarities are used or whether the circuit This may happen when the direction of the current changes during operation. In the specification, the terms source and drain may be used interchangeably. do.

[0027] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "of" is not subject to any particular restrictions as long as it allows the transmission and reception of electrical signals between connected objects. For example, "things that have some kind of electrical action" include electrodes, wiring, and transistors. It has various functions such as switching elements, resistors, inductors, capacitors, etc. This includes elements such as:

[0028] In this specification and the like, a silicon oxynitride film is a film containing more oxygen than nitrogen as a component. A silicon nitride film is a film that contains more nitrogen than oxygen. This refers to a film with a high content of

[0029] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." Alternatively, for example, the term "insulating film" may be changed to "insulating layer" It may be possible to change the term to

[0030] In this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Almost parallel" means that two straight lines are arranged at an angle of between -30° and 30°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, it also includes the case where the angle is between 85° and 95°. This refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0031] (Embodiment 1) In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. explain.

[0032] <Configuration Example 1 of Semiconductor Device> FIG. 1A is a top view of a transistor 100 which is a semiconductor device of one embodiment of the present invention. 1(B) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 1(A). 1(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 1(A). In FIG. 1A, in order to avoid complication, the transistor 100 Some of the components (such as the insulating film that functions as the gate insulating film) are omitted in the illustration. The dashed line X1-X2 direction is the channel length direction of the transistor, and the dashed line Y1-Y2 direction is the The direction of the channel width of a transistor is sometimes called the channel width direction. In the following drawings, some of the components are omitted as in FIG. 1(A). This may be the case.

[0033] The transistor 100 includes a conductive film 104 over a substrate 102, which functions as a gate electrode, and a An insulating film 106 on the plate 102 and the conductive film 104, an insulating film 107 on the insulating film 106, and an insulating film The oxide semiconductor film 108 on the film 107 and the source electrode 106 electrically connected to the oxide semiconductor film 108 are The conductive film 112a serving as a gate electrode and the gate electrode electrically connected to the oxide semiconductor film 108 are The transistor 100 also includes a conductive film 112b that functions as a drain electrode. The insulating films 114 and 116 are formed over the oxide semiconductor film 108 and the conductive films 112a and 112b. A metal oxide film 132 on the insulating film 116 and a metal oxide film 134 on the metal oxide film 132 are provided. The metal oxide film 132 contains at least one of the same metal elements as the oxide semiconductor film 108. The metal oxide film 134 also has a region where it is mixed with the metal oxide film 132.

[0034] The insulating film 106 and the insulating film 107 may be referred to as a first insulating film. The insulating film functions as a gate insulating film of a transistor. The second insulating film 16 may be referred to as a second insulating film. It has the function of supplying oxygen to the

[0035] Impurities such as hydrogen and moisture are mixed into the oxide semiconductor film 108 included in the transistor 100. When the oxygen vacancies are formed in the oxide semiconductor film 108, the oxygen vacancies are bonded to the oxygen vacancies, and electrons serving as carriers are generated. When the above-mentioned impurity-induced carriers are generated, the transistor 100 exhibits normally-on characteristics. Therefore, impurities such as hydrogen and moisture in the oxide semiconductor film 108 can be reduced. In addition, reducing oxygen vacancies in the oxide semiconductor film 108 leads to stable transistor characteristics. It is also important to obtain

[0036] Therefore, in the structure of the transistor of one embodiment of the present invention, Excess oxygen is introduced into the insulating films, here, the insulating films 114 and 116 over the oxide semiconductor film 108. Then, oxygen is transferred from the insulating films 114 and 116 into the oxide semiconductor film 108, whereby oxidation The oxygen vacancies in the compound semiconductor film 108 are compensated for.

[0037] However, the oxygen introduced into the insulating films 114 and 116 is In some cases, the oxide semiconductor film 108 is not properly transported due to diffusion to the outside by heat treatment. However, in the semiconductor device of one embodiment of the present invention, the transistor 100 Specifically, metal oxide films 132 and 134 are provided on the insulating film 116 . By using the metal oxide films 132 and 134, the insulating films 114 and 116 can be easily exposed to the outside. The oxygen diffusion can be suppressed. By doing so, it is possible to suppress impurities (e.g., hydrogen, water, etc.) that may enter from the outside. can.

[0038] The insulating films 114 and 116 have a composition different from the stoichiometric composition due to the introduction of excess oxygen. In other words, the insulating films 114 and 115 also have regions containing excess oxygen (oxygen excess regions). The insulating film 114 and the insulating film 116 are capable of releasing oxygen. To provide the excess region, for example, oxygen is introduced into the insulating films 114 and 116 after film formation. Form an excess region.

[0039] The oxygen introduction method is to add acceleration energy to oxygen gas under reduced pressure, specifically ion implantation, ion doping, plasma immersion ion implantation, plasma Furthermore, when oxygen is introduced, if the substrate is heated and processed, the introduced This is preferable because it allows a large amount of oxygen to be introduced. For example, the temperature is preferably higher than room temperature and lower than 350° C. For example, a device that converts oxygen gas into plasma using high-frequency power (such as a plasma etching device) It is preferable to use a plasma ashing device.

[0040] In addition, thermal desorption spectroscopy (TDS) The amount of oxygen released can be measured by measuring the insulating film using spectroscopy. For example, when the insulating films 114 and 116 are measured by thermal desorption spectroscopy, The amount of oxygen molecules released is 8.0 × 10 14 pieces / cm 2 or more, preferably 1.0 × 10 15 pieces / cm 2 More preferably, 1.5 × 10 15 pieces / cm2 That's all. The surface temperature of the membrane in the gas analysis method is 100°C or higher and 700°C or lower, preferably 100°C or higher. The upper limit is 500°C or less.

[0041] In one embodiment of the present invention, in order to form an oxygen excess region in the insulating films 114 and 116, Therefore, a metal oxide film 132 is formed on the insulating film 116, and the metal oxide film 132 is passed through the insulating film 116. Oxygen is introduced into the membranes 114 and 116. Therefore, the metal oxide membrane 132 has a function of allowing oxygen to pass through. It is preferable that oxygen is passed through the metal oxide film 132 to the insulating films 114 and 116. By introducing oxygen, it becomes possible to preferably introduce oxygen into the insulating films 114 and 116. Furthermore, the metal oxide film 132 has the function of suppressing the release of oxygen except when oxygen is introduced. For example, the metal oxide film 132 may contain at least the same metal element as the oxide semiconductor film 108. The configuration may also include:

[0042] When the metal oxide film 132 is formed of a material containing indium, the insulating film 114 Oxygen can be suitably introduced into the metal oxide film 116. Materials containing indium include indium oxides containing tungsten oxide, tungsten oxide, Indium zinc oxide containing stainless steel, indium oxide containing titanium oxide, titanium oxide Indium Tin Oxide (Indium Tin Oxide:I TO), indium zinc oxide, indium tin oxide with silicon (ITSO), etc. The above-mentioned material containing indium is a light-transmitting conductive material. Furthermore, among the above, when ITSO is used as the metal oxide film 132, the unevenness This is preferable because it can be formed with good coverage even on insulating films having the above properties.

[0043] In one embodiment of the present invention, a metal oxide film 134 is provided on the metal oxide film 132 . The metal oxide film 134 prevents oxygen in the insulating films 114 and 116 from diffusing to the outside. , can be further suppressed.

[0044] When the metal oxide film 134 is made of a material containing aluminum, the insulating film 114 , diffusion of oxygen from 116 to the outside, and / or intrusion of impurities (hydrogen, water, etc.) from the outside. The metal oxide film 134 can be made of aluminum. Examples of materials that include aluminum oxide include aluminum oxide.

[0045] The metal oxide film 132 and the metal oxide film 134 have a mixed region. The region where the metal oxide film 132 and the metal oxide film 134 are mixed will be described with reference to FIG. 2. .

[0046] FIG. 2 shows the oxide semiconductor film 108, the insulating films 114 and 116, the metal oxide film 132, and the metal FIG. 10 is a cross-sectional view of the laminated structure of the oxide film 134.

[0047] A mixed region 136 is formed near the interface between the metal oxide film 132 and the metal oxide film 134. The thickness of the mixed region 136 is 1 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less. For example, the metal oxide film 132 is made of a conductive material, and the thickness of the metal oxide film 132 is When 134 is made of an insulating material, by forming the mixed region 136, The conductivity of the metal oxide film 132 can be reduced. By forming the mixed region 136, the metal oxide film 132 is electrically insulated. It becomes possible to do this.

[0048] The mixed region 136 can be formed, for example, by using a sputtering method when forming the metal oxide film 134. The sputtered atoms penetrate into the metal oxide film 132. Alternatively, after forming the metal oxide film 134 on the metal oxide film 132, the metal oxide film 134 can be heated. By performing a treatment (for example, at a temperature of 100° C. or higher and 350° C. or lower), the metal oxide film 132 and the gold A mixed region 136 may be formed near the interface with the metal oxide film 134 due to thermal diffusion. do.

[0049] As described above, by providing the insulating films 114 and 116 over the oxide semiconductor film 108, , oxygen in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108, and the oxide semiconductor film 1 It is possible to compensate for oxygen vacancies formed in the insulating film 116. By providing the oxide films 132 and 134, oxygen in the insulating films 114 and 116 is prevented from diffusing outward. In addition, the metal oxide films 132 and 134 on the insulating film 116 can be prevented from being dispersed. By providing this, it is possible to suppress impurities that may enter from the outside. As a result, oxygen vacancies in the oxide semiconductor film 108 were filled and entry of impurities was suppressed. A novel semiconductor device with high reliability can be provided.

[0050] The components included in the semiconductor device of this embodiment will be described in detail below.

[0051] <Substrate> There is no particular restriction on the material of the substrate 102, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and A fire substrate or the like may be used as the substrate 102. Also, silicon, silicon carbide, etc. Single crystal semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductors such as silicon germanium, etc. It is also possible to apply a conductor substrate, SOI substrate, etc., and semiconductor elements are installed on these substrates. The substrate 102 may be a glass substrate. When using 6th generation (1500mm x 1850mm), 7th generation (1870mm x 2 200mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2 Use of large area substrates such as 10th generation (2950mm x 3400mm) Therefore, a large display device can be manufactured.

[0052] In addition, a flexible substrate is used as the substrate 102, and the transistor 10 is directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100. The release layer is preferably removed from the substrate 102 after a semiconductor device is partially or completely completed thereon. The transistor 100 can be separated and transferred to another substrate. It can also be transferred to substrates with poor thermal properties or flexible substrates.

[0053] <Conductive film> A conductive film 104 that functions as a gate electrode and a conductive film 112 that functions as a source electrode The conductive film 112b functioning as a drain electrode is made of chromium (Cr), copper (C u), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (M o), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), a metal element selected from nickel (Ni), iron (Fe), and cobalt (Co), or The alloys are made of metal elements or alloys that combine the above metal elements. It can be formed.

[0054] The conductive films 104, 112a, and 112b may have a single-layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a titanium film on an aluminum film, Two-layer structure with titanium film laminated on titanium nitride film, two-layer structure with titanium film laminated on titanium nitride film, titanium nitride film Two-layer structure with tungsten film laminated on top, tantalum nitride film or tungsten nitride film Two-layer structure with tungsten film stacked, titanium film and aluminum film stacked on the titanium film. There are three-layer structures, such as a titanium film on top of an aluminum film. Selected from tantalum, tungsten, molybdenum, chromium, neodymium, and scandium Alternatively, an alloy film or a nitride film made by combining two or more of these may be used.

[0055] The conductive films 104, 112a, and 112b are made of indium tin oxide or tungsten oxide. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide A conductive material having light-transmitting properties, such as indium tin oxide doped with silicon oxide, is used. It is also possible.

[0056] The conductive films 104, 112a, and 112b are made of a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. This allows for processing using a wet etching process, which reduces manufacturing costs. It becomes possible.

[0057] <Gate insulating film> The insulating films 106 and 107 functioning as gate insulating films of the transistor 100 are Plasma Enhanced Chemical Vapor Deposition (PECVD) Silicon oxide is deposited by vapor deposition, sputtering, etc. silicon oxide film, silicon nitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film , hafnium oxide film, yttrium oxide film, zirconium oxide film, gallium oxide film, oxide Tantalum film, magnesium oxide film, lanthanum oxide film, cerium oxide film, and neodymium oxide film The insulating films 106 and 107 may each be an insulating layer containing one or more films. Instead of the laminated structure, a single layer insulating film selected from the above materials or an insulating film with three or more layers may also be used.

[0058] Note that the oxide semiconductor film 108, which functions as a channel region of the transistor 100, is in contact with the oxide semiconductor film 108. The insulating film 107 is preferably an oxide insulating film, and the oxide content is in excess of the stoichiometric composition. It is more preferable that the insulating film 1 has a region containing oxygen (an oxygen-excess region). The insulating film 107 is an insulating film capable of releasing oxygen. To provide the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Oxygen may be introduced into the insulating film 107 later to form an oxygen excess region.

[0059] Furthermore, when hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium has a higher dielectric constant than silicon oxide and silicon oxynitride. Compared to the case where silicon oxide is used, the thickness of the insulating film 107 can be made larger, so that the tunnel This reduces the leakage current due to the current flowing through the transistor. Furthermore, hafnium oxide, which has a crystalline structure, can be used to form amorphous structures. Therefore, the off-state current is small. To form a transistor, it is preferable to use hafnium oxide having a crystalline structure. Examples of the crystal structure include monoclinic and cubic crystals. The types are not limited to these.

[0060] In this embodiment, a silicon nitride film is formed as the insulating film 106, and the insulating film 107 The silicon nitride film has a lower dielectric constant than the silicon oxide film. The film thickness required to obtain the same capacitance as a silicon oxide film is large, so The gate insulating film of the transistor 100 contains a silicon nitride film, which makes the insulating film physically thick. Therefore, the decrease in the dielectric strength voltage of the transistor 100 can be suppressed, and further, the dielectric strength can be improved. The edge breakdown voltage can be improved, and electrostatic breakdown of the transistor 100 can be suppressed.

[0061] <Oxide semiconductor film> The oxide semiconductor film 108 is made of In, Zn, and M (M is Ti, Ga, Y, Zr, La, Typically, the oxide semiconductor film 108 has , In-Ga oxide, In-Zn oxide, and In-M-Zn oxide can be used. In particular, it is preferable to use In-M-Zn oxide for the oxide semiconductor film 108.

[0062] When the oxide semiconductor film 108 is an In-M-Zn oxide, the In-M-Zn oxide is deposited. The atomic ratio of the metal elements in the sputtering target used for this purpose is In≧M, Zn≧M. It is preferable that the atomic ratio of the metal elements in such a sputtering target and In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:4.1 are preferred. Note that the atomic ratio of the oxide semiconductor film 108 to be formed is determined by taking the above-mentioned steps as an error. The atomic ratio of metal elements contained in the sputtering target can be varied by ±40%. For example, a sputtering target with an atomic ratio of In:Ga:Zn=4:2 When the oxide semiconductor film 108 is formed using In:Ga:Z, the atomic ratio of the oxide semiconductor film 108 is In:Ga:Z. In some cases, the ratio is around n=4:2:3.

[0063] When the oxide semiconductor film 108 is an In-M-Zn oxide film, the components other than Zn and O are The atomic ratio of In to M in the total is preferably higher than 25 atomic % for In and 75 atomic % for M. atomic %, more preferably In is higher than 34 atomic %, and M is 66 atomic %. less than otomic%.

[0064] The oxide semiconductor film 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more. eV or more, more preferably 3 eV or more. By using a nitride semiconductor, the off-state current of the transistor 100 can be reduced.

[0065] The thickness of the oxide semiconductor film 108 is greater than or equal to 3 nm and less than or equal to 200 nm, preferably less than or equal to 3 nm. The thickness is set to 100 nm or more, and more preferably 3 nm or more and 50 nm or less.

[0066] In addition, as the oxide semiconductor film 108, an oxide semiconductor film with low carrier density is used. For example, the oxide semiconductor film 108 has a carrier density of 1×10 -9 pieces / cm 3 Over 8 x 10 11 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 More than 1×10 11 pieces / cm 3 Not yet less than 1×10 -9 pieces / cm 3 More than 1×10 10 pieces / cm 3 Less than.

[0067] However, the semiconductor characteristics and electrical characteristics (field effect) of the required transistors are not limited to these. It is sufficient to use an appropriate composition depending on the required properties (e.g., the mobility, threshold voltage, etc.). In order to obtain semiconductor characteristics of a transistor, the carrier density and impurity of the oxide semiconductor film 108 are controlled. The material concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. are set appropriately. It is preferable.

[0068] Note that the oxide semiconductor film 108 is formed of an oxide semiconductor having a low impurity concentration and a low density of defect states. By using a conductive film, it is possible to fabricate a transistor with even better electrical characteristics. Here, it is preferable that the impurity concentration is low and the defect level density is low (there is little oxygen vacancy). High purity authentic or substantially high purity authentic High purity authentic or substantially high purity authentic Since the oxide semiconductor film has few carrier generation sources, the carrier density can be reduced. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film can have a threshold voltage of 100 V. The electrical characteristics where the voltage is negative (also called normally on) are rare. In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may also be low. The intrinsic oxide semiconductor film has a significantly small off-state current and a channel width of 1×10 6 in μm Even in a device with a channel length L of 10 μm, the voltage between the source and drain electrodes (drain When the on-state voltage is in the range of 1V to 10V, the off-state current is Below the detection limit, i.e., 1×10 -13 It can achieve a characteristic of A or below.

[0069] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film is provided with a channel. The transistors in which the regions are formed have small fluctuations in electrical characteristics and are highly reliable. Note that charges trapped in the trap states of the oxide semiconductor film are lost. It takes a long time for the charge to dissipate, and it can behave as if it were a fixed charge. A transistor in which a channel region is formed in an oxide semiconductor film with a high density of trap states has Impurities include hydrogen, nitrogen, alkali metals, or Alkaline earth metals, etc.

[0070] Hydrogen contained in the oxide semiconductor film 108 reacts with oxygen that is bonded to metal atoms to form water. At the same time, oxygen vacancies are formed in the lattice from which oxygen has been desorbed (or in the portion from which oxygen has been desorbed). When hydrogen enters an electron vacancy, a carrier electron may be generated. Some of them may combine with oxygen, which bonds with metal atoms, to generate electrons, which act as carriers. Therefore, a transistor using an oxide semiconductor film containing hydrogen has normally-on characteristics. Therefore, it is important to reduce hydrogen as much as possible in the oxide semiconductor film 108. Specifically, the oxide semiconductor film 108 is preferably formed by SIMS (Secondary The hydrogen concentration obtained by ion mass spectrometry (Ion Mass Spectrometry) analysis was x10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 below, More preferably 1 × 10 19 atoms / cm 3 Below, 5 x 10 18 atoms / cm 3 Less than 1 × 10 18 atoms / cm 3 Less than or equal to 5 × 10 17 a toms / cm 3 or less, more preferably 1 × 10 16 atoms / cm 3 The following applies.

[0071] The oxide semiconductor film 108 contains silicon or carbon, which is one of the Group 14 elements. As a result, oxygen vacancies increase in the oxide semiconductor film 108, causing the oxide semiconductor film 108 to become n-type. The concentrations of silicon and carbon in the nitride semiconductor film 108 and the concentration of silicon and carbon in the oxide semiconductor film 108 near the interface with the oxide semiconductor film 108 are The concentration of silicon and carbon in the vicinity (obtained by SIMS analysis) is 2 × 10 18 ato ms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following applies.

[0072] In addition, in the oxide semiconductor film 108, alkali metal or is the concentration of alkaline earth metals, 1×10 18 atoms / cm 3 Below, preferably 2 x 1 0 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When they bond with a conductor, carriers may be generated, increasing the off-state current of the transistor. For this reason, the alkali metal or alkaline earth metal in the oxide semiconductor film 108 It is preferable to reduce the concentration of the genus.

[0073] When nitrogen is contained in the oxide semiconductor film 108, electrons serving as carriers are generated, and As a result, the oxide semiconductor film containing nitrogen is easily converted to n-type. The transistor using the oxide semiconductor film tends to be normally on. In this case, it is preferable that the nitrogen content is reduced as much as possible. For example, The nitrogen concentration is 5×10 18 atoms / cm 3 It is preferable to do the following:

[0074] The oxide semiconductor film 108 may have a non-single-crystal structure, for example. For example, the CAAC-OS, polycrystalline structure, nc-OS, a-like OS, or non- Among non-single crystalline structures, the amorphous structure has the highest defect level density and CAA C-OS has the lowest density of defect states.

[0075] The oxide semiconductor film 108 may have, for example, an amorphous structure. For example, the atomic arrangement is disordered and does not have crystalline components. Or, an oxide with an amorphous structure The film has, for example, a completely amorphous structure and does not have any crystalline portions.

[0076] Note that the oxide semiconductor film 108 may have an amorphous structure, a microcrystalline structure, or a polycrystalline structure. The film may be a mixed film having two or more of the following: a CAAC-OS region, a CAAC-OS region, and a single crystal structure region. The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CA In the case of a single-layer structure having two or more regions, either an AC-OS region or a single-crystal structure region The mixed film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, and the like. a layered structure having two or more of a CAAC-OS region, a CAAC-OS region, and a single-crystal structure region; There may be cases where this is the case.

[0077] <Protective insulating film> The insulating films 114 and 116 function as protective insulating films. The insulating film 114 is an insulating film that can transmit oxygen. The insulating film 114 is formed by removing the oxide semiconductor film 108 when the insulating film 116 is formed later. It also functions as a membrane to mitigate damage to the skin.

[0078] The insulating film 114 has a thickness of 5 nm to 150 nm, preferably 5 nm to 50 Silicon oxide, silicon oxynitride, etc., having a thickness of 1 nm or less can be used.

[0079] Furthermore, it is preferable that the insulating film 114 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 3 x 10 17 spins / cm 3 This is because the insulating film 114 is preferably If the density of defects contained is high, oxygen will be bonded to the defects, and the oxygen in the insulating film 114 will The amount of transmission of light decreases.

[0080] In the insulating film 114, all the oxygen that has entered the insulating film 114 from the outside is Some oxygen does not move to the outside of the insulating film 114 and remains in the insulating film 114. At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, Oxygen may move in the film 114. When the oxide insulating film capable of forming the insulating film 114 is formed, the insulating film 116 and the insulating film 116 are formed on the insulating film 114. The desorbed oxygen can be transferred to the oxide semiconductor film 108 through the insulating film 114. Cut.

[0081] The insulating film 114 is formed using an oxide insulating film with a low density of states due to nitrogen oxides. Note that the density of states due to the nitrogen oxide can be determined by the valence Energy of the top of the electronic band (Ev_os) and energy of the bottom of the conduction band of the oxide semiconductor film The oxide insulating film may be formed between the gate electrode and the gate electrode of the nitride semiconductor layer. Silicon oxynitride film with low emission or aluminum oxynitride film with low nitrogen oxide emission For example, a silicon film or the like can be used.

[0082] In addition, a silicon oxynitride film that emits a small amount of nitrogen oxides can be analyzed by thermal desorption spectroscopy. This membrane releases more ammonia than nitrogen oxides, and typically releases ammonia. The amount of emission is 1×10 18 pieces / cm 3 5x10 or more 19 pieces / cm 3 The following is the case. The amount of monia released is determined when the surface temperature of the membrane is 50°C or higher and 650°C or lower, preferably 50°C or higher and 55°C or lower. The amount released by heating at 0°C or below.

[0083] Nitrogen oxides (NO x , x is more than 0 and not more than 2, preferably 1 or more and not more than 2), typically NO or NO forms a level in the insulating film 114 or the like. Therefore, the nitrogen oxide is located in the energy gap of the insulating film 114 and When the oxide semiconductor film 108 diffuses to the vicinity of the interface, the level is changed to an electron level on the insulating film 114 side. As a result, the trapped electrons may be trapped in the insulating film 114 and the oxide film. Since the electrons remain near the interface of the semiconductor film 108, the threshold voltage of the transistor is shifted in the positive direction. It causes the

[0084] Nitrogen oxide reacts with ammonia and oxygen during heat treatment. The nitrogen oxide contained in the insulating film 116 reacts with the ammonia contained in the insulating film 116 during the heat treatment. Therefore, the nitrogen oxide contained in the insulating film 114 is reduced. Therefore, electrons are less likely to be trapped in the vicinity of the interface between the oxide semiconductor film 106 and the oxide semiconductor film 108.

[0085] By using the oxide insulating film as the insulating film 114, the threshold voltage of the transistor can be reduced. It is possible to reduce the shift in the electrical characteristics of the transistor. can.

[0086] The heat treatment in the manufacturing process of a transistor is typically performed at a temperature of 300° C. or higher but below the substrate distortion point. The insulating film 114 is subjected to the heat treatment, and the spectrum obtained by measuring the ESR at 100 K or less is The first signal has a g value of 2.037 to 2.039, and the second signal has a g value of 2.001 or more. A second signal with a g value of 2.003 or less and a third signal with a g value of 1.964 to 1.966 or less. The split width of the first signal and the second signal, The split width of the second and third signals is approximately 1 / 2 in the X-band ESR measurement. 5mT. The first signal has a g value of 2.037 or more and 2.039 or less, and the second signal has a g value of 2 A second signal between 0.001 and 2.003 and a g-value between 1.964 and 1.966 The total spin density of the third signal is 1×10 18 spins / cm 3 Less than Typically, it is 1×10 17 spins / cm 3 More than 1×10 18 spins / cm 3 Not yet It is full.

[0087] In addition, the g value is between 2.037 and 2.039 in the ESR spectrum below 100K. The first signal has a g value of 2.001 or more and 2.003 or less, and the second signal has a g value of 1 The third signal, between 0.964 and 1.966, is nitrogen oxide (NO x , x is between 0 and 2 Representative examples of nitrogen oxides include: , nitrogen monoxide, nitrogen dioxide, etc. That is, the first a second signal with a g value of 2.001 to 2.003 and a g value of 1.96 The smaller the sum of the spin densities of the third signals, which is between 4 and 1.966, the more oxide It can be said that the content of nitrogen oxides contained in the insulating film is low.

[0088] The oxide insulating film has a nitrogen concentration of 6×10 as measured by SIMS analysis. 20 ato ms / cm 3 The following is the result.

[0089] The substrate temperature is 220°C or higher, or 280°C or higher, or 350°C or higher, and silane and The oxide insulating film is formed by the PECVD method using nitrous oxide and silicon dioxide. A dense and hard film can be formed.

[0090] The insulating film 116 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. The oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition is formed using When heated, some of the oxygen is released. The oxygen content is greater than the stoichiometric value. The oxide insulating film was analyzed by TDS and the amount of released oxygen was 8.0 x 10 1 4 atoms / cm 2 or more, preferably 1.0 × 10 15 atoms / cm 2 That's all The surface temperature of the film during the TDS analysis was 100°C or higher for 7 00°C or lower, preferably 100°C or higher and 500°C or lower.

[0091] The insulating film 116 has a thickness of 30 nm to 500 nm, preferably 50 nm or more. Silicon oxide, silicon oxynitride, etc., of 400 nm or less can be used.

[0092] Furthermore, it is preferable that the insulating film 116 has a small number of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5 x 10 18 spins / cm3 Less than, or even 1×10 18 spins / cm 3 It is preferable that the insulating film 116 has a higher oxide semiconductor content than the insulating film 114. Since it is separated from the insulating film 108, it may have a higher defect density than the insulating film 114.

[0093] In addition, the insulating films 114 and 116 can be made of the same material, so that the insulating film In some cases, the interface between the film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a broken line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. However, the present invention is not limited to this, and may be applied to a single layer structure of either the insulating film 114 or the insulating film 116. You may do so.

[0094] <Metal oxide film> The metal oxide film 132 has a function of allowing oxygen to pass through. Therefore, oxygen can be suitably introduced into the insulating films 114 and 116. Furthermore, the metal oxide film 132 has the function of suppressing the release of oxygen except when oxygen is being introduced.

[0095] The metal oxide film 132 contains at least one metal element that is the same as that of the oxide semiconductor film 108. For example, when the oxide semiconductor film 108 is made of In, Zn, and M (M is Ti, Ga, Y, Zr, In the case where the metal oxide film 132 has a metal oxide layer containing La, Ce, Nd, Sn, or Hf, the metal oxide film 132 is formed of I The metal oxide film 132 includes a conductive film containing In, Zn, or M. It is preferable to use a semiconductor film containing In.

[0096] The metal oxide film 134 has a function of suppressing the release of oxygen and a function of absorbing oxygen, hydrogen, water, alkali metals, The metal oxide film 134 has a function of blocking impurities such as alkaline earth metals. By providing the insulating film 114, 1 The diffusion of oxygen contained in the oxide semiconductor film 106 to the outside and the diffusion of hydrogen, water, and the like from the outside to the oxide semiconductor film 108 It is possible to suppress intrusion and.

[0097] The metal oxide film 134 may be made of aluminum (Al), gallium (Ga), or yttrium It is preferable that the metal oxide film 134 contains Y or Hf. Examples of materials that can be used include aluminum oxide, aluminum oxynitride, and aluminum nitride oxide. Aluminum, gallium oxide, gallium oxide nitride, gallium nitride oxide, yttrium oxide, Yttrium oxide nitride, yttrium oxide nitride, hafnium oxide, hafnium oxide nitride, In particular, the metal oxide film 134 may be made of aluminum oxide. When the insulating film 114 is used, oxygen is diffused to the outside from the oxide semiconductor film 108 and the insulating films 114 and 116. This is preferable because it can prevent hydrogen, water, and the like from entering the oxide semiconductor film 108 from the outside. be.

[0098] The metal oxide film 134 is formed by a sputtering method or an Atomic Layer Deposition (ALD) method. It is preferable to form the film by using the r deposition method.

[0099] Note that various types of films such as the above-mentioned conductive film, insulating film, oxide semiconductor film, and metal oxide film may be used. The deposition methods include sputtering, chemical vapor deposition (CVD), vacuum evaporation, and pulse laser deposition. In addition, the above-mentioned conductive film, insulating film, oxide semiconductor, etc. The methods for forming various films, such as conductive films, include plasma-enhanced chemical vapor deposition (PECVD), thermal CVD (Chemical Vapor Deposition) method or ALD method As an example of the thermal CVD method, MOCVD (Metal Organic Chemical Vapor Deposition) In addition, the above-mentioned introduction method can be used. Coating methods are used to form various films such as conductive films, insulating films, oxide semiconductor films, and metal oxide films. Alternatively, a printing method may be used.

[0100] The thermal CVD method is a film formation method that does not use plasma, so defects can occur due to plasma damage. This has the advantage that no further processing is required.

[0101] In the thermal CVD method, the source gas and oxidant are simultaneously fed into a chamber, and the chamber is heated to atmospheric pressure. Alternatively, a film is formed by reacting the material near or on the substrate under reduced pressure and depositing the material on the substrate. You may go.

[0102] In addition, in the ALD method, the pressure inside the chamber is atmospheric or reduced, and the source gas for the reaction is The gases may be introduced into the chamber in sequence, and the film may be formed by repeating this gas introduction sequence. For example, by switching each switching valve (also called high-speed valve), two or more types of The above source gases are supplied to the chamber in order, and the first An inert gas (argon, nitrogen, etc.) is introduced simultaneously with or after the raw material gas. The second source gas is introduced. When an inert gas is introduced at the same time, the inert gas is It acts as a carrier gas, and even if an inert gas is introduced at the same time as the second source gas is introduced, Alternatively, instead of introducing an inert gas, the first source gas may be discharged by vacuum evacuation. After that, a second source gas may be introduced. The first source gas is adsorbed on the surface of the substrate to form a first layer. The first layer is deposited on the second layer by reacting with the second source gas introduced later. This process is repeated several times while controlling the gas introduction order until the desired thickness is achieved. By doing so, a thin film with excellent step coverage can be formed. The thickness can be precisely adjusted by changing the number of times the sequence is repeated. It is suitable for fabricating miniaturized FETs.

[0103] The ALD method or the thermal CVD method such as the MOCVD method can be used to form the conductive film, insulating film, Various films such as oxide semiconductor films and metal oxide films can be formed. For example, In-Ga When forming a ZnO film, trimethylindium, trimethylgallium, and dimethyl The chemical formula for trimethylindium is In(CH3)3. The chemical formula of trimethylgallium is Ga(CH3)3. The chemical formula is Zn(CH3)2. In addition, it is not limited to these combinations, and trimethyl Triethylgallium (chemical formula Ga(C2H5)3) can also be used instead of gallium. Diethyl zinc (chemical formula Zn(C2H5)2) can also be used instead of dimethyl zinc. Cut.

[0104] For example, when forming a hafnium oxide film using a film forming apparatus that uses ALD, the solvent and liquids containing hafnium precursor compounds (hafnium alkoxides, tetrakisdimethyl The raw material gas is vaporized hafnium amide (such as TDMAH) and acid Two types of gases are used: tetrakisdimethylamide (TDMA) and ozone (O3) as a chlorine gas. The chemical formula for Hf is Hf[N(CH3)2]4. Other materials include tetrahydrofuran, Examples include rakis(ethylmethylamido) hafnium.

[0105] For example, when forming an aluminum oxide film using an ALD film forming device, A liquid containing a catalyst and an aluminum precursor compound (e.g., trimethylaluminum (TMA)) is added. Two types of gases are used: vaporized source gas and H2O as an oxidizing agent. The chemical formula for aluminum is Al(CH3)3. Other liquid materials include Tris( dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2 ,2,6,6-tetramethyl-3,5-heptanedionate).

[0106] For example, when forming a silicon oxide film using a film forming apparatus that uses ALD, Chlorodisilane is adsorbed onto the surface to be coated, removing the chlorine contained in the adsorbed material, and the oxidizing gas (O 2. Nitrous oxide (NO) radicals are supplied to react with the adsorbed material.

[0107] For example, when forming a tungsten film using an ALD deposition system, WF6 The initial tungsten film was formed by sequentially introducing BH gas and BH gas. The tungsten film is formed using B2H6 gas and H2 gas. iH4 gas may also be used.

[0108] For example, an oxide semiconductor film, such as In-Ga-ZnO, can be formed using a film formation device that uses ALD. When forming a film, an In-O layer is formed using In(CH3)3 gas and O3 gas. Then, a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then Z The ZnO layer is formed using n(CH3)2 gas and O3 gas. The order of these layers is The example is not limited to this. In addition, by mixing these gases, an In-Ga-O layer or an In-Zn-O layer can be formed. Alternatively, a mixed compound layer such as a Ga-Zn-O layer may be formed. HO gas obtained by bubbling with an inert gas such as HCl may be used. However, O gas containing no H may be used. It is preferable to use In(C2H5) gas instead of In(CH3)3 gas. 3 gas may be used. Also, Ga(C2H5)3 gas may be used instead of Ga(CH3)3 gas. Alternatively, Zn(CH3)2 gas may be used.

[0109] <Configuration Example 2 of Semiconductor Device> Next, examples of structures different from those of the transistor 100 shown in FIGS. 3(A)(B)(C) will be used for the explanation. Note that the functions described above are the same as those described above. In some cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0110] FIG. 3A is a top view of a transistor 150 which is a semiconductor device of one embodiment of the present invention. 3(B) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 3(A). 3(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 3(A). Correct.

[0111] The transistor 150 includes a conductive film 104 over a substrate 102, which functions as a gate electrode, and a An insulating film 106 on the plate 102 and the conductive film 104, an insulating film 107 on the insulating film 106, and an insulating film The oxide semiconductor film 108 on the film 107, the insulating film 114 on the oxide semiconductor film 108, and the insulating film 114 An insulating film 116 on the film 114, a metal oxide film 132 on the insulating film 116, and a metal oxide film 132 The metal oxide film 134 on the insulating film 114, 116 and the metal oxide film 132, 134 are provided A source electrode electrically connected to the oxide semiconductor film 108 through the opening 141a is formed. The conductive film 112a functions as a conductive film, and the insulating films 114, 116 and the metal oxide films 132, 134 are provided with a conductive film. A drain electrode electrically connected to the oxide semiconductor film 108 through the opening 141b is formed. The metal oxide film 132 is an oxide semiconductor. The metal oxide film 134 contains at least one metal element identical to that of the metal oxide film 108. It has a region where it mixes with the oxide film 132 .

[0112] The transistor 100 shown above has a channel-etched structure, whereas The transistor 150 shown in FIGS. 3A, 3B, and 3C has a channel protection structure. As described above, the semiconductor device of one embodiment of the present invention can be used in both the channel etch type and the channel protection type. The present invention can be applied to the following transistor structures.

[0113] The transistor 150 is a transistor including an oxide semiconductor film, similar to the transistor 100 described above. Since the insulating films 114 and 116 are provided on the insulating film 108, The oxygen contained in the oxide semiconductor film 108 can fill oxygen vacancies in the oxide semiconductor film 108. By providing the metal oxide films 132 and 134 on the insulating film 116, the oxide semiconductor It is possible to suppress impurities that may enter the conductive film 108. It is similar to the transistor 100 and provides the same effects.

[0114] <Configuration Example 3 of Semiconductor Device> Next, a configuration example different from that of the transistor 150 shown in FIGS. 4(A)(B)(C) will be used for the explanation. Note that the functions described above are the same as those described above. In some cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0115] FIG. 4A is a top view of a transistor 160 which is a semiconductor device of one embodiment of the present invention. 4(B) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 4(A). 4(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 4(A). Correct.

[0116] The transistor 160 includes a conductive film 104 over a substrate 102, which functions as a gate electrode, and a An insulating film 106 on the plate 102 and the conductive film 104, an insulating film 107 on the insulating film 106, and an insulating film The oxide semiconductor film 108 on the film 107, the insulating film 114 on the oxide semiconductor film 108, and the insulating film 114 An insulating film 116 on the film 114, a metal oxide film 132 on the insulating film 116, and a metal oxide film 132 As a source electrode electrically connected to the upper metal oxide film 134 and the oxide semiconductor film 108, a conductive film 112a that functions as a drain electrode electrically connected to the oxide semiconductor film 108; The metal oxide film 132 is an oxide semiconductor film. The metal oxide film 134 contains at least one metal element identical to that of the metal oxide film 108. It has an area that blends with the film 132 .

[0117] Note that the transistor 160 is insulated from the transistor 150 shown in FIGS. The shapes of the insulating films 114, 116 and the metal oxide films 132, 134 are different. The insulating films 114 and 116 and the metal oxide films 132 and 134 of the transistor 160 are made of oxide semiconductor. The transistor 15 is provided in an island shape on the channel region of the conductive film 108. It is the same as 0 and has the same effect.

[0118] The transistor 160 is formed of an oxide semiconductor film, similar to the transistor 100 described above. Since the insulating films 114 and 116 are provided on the insulating film 108, The oxygen contained in the oxide semiconductor film 108 can fill oxygen vacancies in the oxide semiconductor film 108. By providing the metal oxide films 132 and 134 on the insulating film 116, the oxide semiconductor Impurities that may enter the conductive film 108 can be suppressed.

[0119] <Configuration Example 4 of Semiconductor Device> Next, examples of structures different from those of the transistor 100 shown in FIGS. 5(A)(B)(C) will be used. Note that the functions described above are the same as those described above. In some cases, the hatch pattern may be the same and no particular reference numeral may be assigned.

[0120] FIG. 5A is a top view of a transistor 170 which is a semiconductor device of one embodiment of the present invention. 5(B) corresponds to a cross-sectional view of the cut surface taken along the dashed line X1-X2 shown in FIG. 5(A). 5(C) is a cross-sectional view taken along the dashed line Y1-Y2 in FIG. 5(A). Correct.

[0121] The transistor 170 includes a conductive film 104 over a substrate 102, which functions as a first gate electrode. an insulating film 106 on the substrate 102 and the conductive film 104; and an insulating film 107 on the insulating film 106. The oxide semiconductor film 108 on the insulating film 107 and the insulating film 108 electrically connected to the oxide semiconductor film 108 The conductive film 112a serving as a source electrode and the oxide semiconductor film 108 the conductive film 112b serving as a drain electrode, the oxide semiconductor film 108, and the conductive film The insulating film 114 on the insulating films 112a and 112b, the insulating film 116 on the insulating film 114, and the insulating film 11 6, a metal oxide film 132 on the metal oxide film 132, and a metal oxide film 134 on the metal oxide film 13 4 and conductive films 120a and 120b on the substrate.

[0122] The transistor 170 is formed of an oxide semiconductor film, similar to the transistor 100 described above. Since the insulating films 114 and 116 are provided on the insulating film 108, The oxygen contained in the oxide semiconductor film 108 can fill oxygen vacancies in the oxide semiconductor film 108. By providing the metal oxide films 132 and 134 on the insulating film 116, the oxide semiconductor Impurities that may enter the conductive film 108 can be suppressed.

[0123] In the transistor 170, the insulating films 114 and 116 and the metal oxide film 132, The gate insulating film 134 functions as a second gate insulating film of the transistor 170. In the transistor 170, the conductive film 120a is used as a pixel electrode for a display device, for example. The conductive film 120a has the following functions: 2, 134, the conductive film 112b is connected to the conductive film 112b through the opening 142c provided in the conductive film 134. In the transistor 170, the conductive film 120b is a second gate electrode (back gate electrode It functions as a

[0124] As shown in FIG. 5C, the conductive film 120b is formed by insulating films 106, 107, 114, and 1 16, and openings 142a and 142b formed in the metal oxide films 132 and 134. The conductive film 120b is connected to the conductive film 104 that functions as the first gate electrode. The same potential as that of the conductive film 104 is applied.

[0125] In this embodiment, openings 142a and 142b are provided, and the conductive film 120b and Although the configuration in which the conductive film 104 is connected has been exemplified, the present invention is not limited to this. Only one of the openings 142a and 142b is formed. The conductive film 104 is connected, or the openings 142a and 142b are not provided, and the conductive film 104 is not connected. The conductive film 120b and the conductive film 104 may not be connected to each other. In the case where the conductive film 104 is not connected, the conductive film 120b and the conductive film 104 are respectively connected to different A potential can be applied.

[0126] As shown in FIG. 5B, the oxide semiconductor film 108 functions as a first gate electrode. and a conductive film 120b that functions as a second gate electrode. The second gate electrode is sandwiched between two conductive films that function as gate electrodes. The length in the channel length direction and the length in the channel width direction of the conductive film 120b that functions as a gate electrode The length is larger than the length of the oxide semiconductor film 108 in the channel length direction and the length of the oxide semiconductor film 108 in the channel width direction. The insulating films 114 and 116 and the metal oxide film 117 are long, and the entire oxide semiconductor film 108 is The conductive film 120b is covered with the conductive film 120b via the gate electrodes 32 and 134. The conductive film 120b functioning as the first gate electrode and the conductive film 104 functioning as the second gate electrode are formed by insulating film 10. 6, 107, 114, 116, and openings 142 provided in the metal oxide films 132 and 134. a and 142b are connected. Therefore, the side surface of the oxide semiconductor film 108 in the channel width direction is , and a second gate electrode is formed via insulating films 114 and 116 and metal oxide films 132 and 134. The conductive film 120b functions as a conductive film.

[0127] In other words, in the channel width direction of the transistor 170, The conductive film 104 that functions and the conductive film 120b that functions as the second gate electrode are gate insulators. The insulating films 106 and 107 function as insulating films, and the insulating film 108 functions as a second gate insulating film. The insulating films 114, 116 and the metal oxide films 132, 134 are connected at openings. and insulating films 106 and 107 which function as gate insulating films and a second gate insulating film. The oxide semiconductor is formed through the insulating films 114 and 116 and the metal oxide films 132 and 134 which function as a semiconductor. It is configured to surround the body membrane 108.

[0128] With such a structure, the oxide semiconductor film 108 included in the transistor 170 The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. The transistor 170 can be electrically surrounded by the electric field of the conductive film 120b. The electric field of the first gate electrode and the second gate electrode causes the oxide film to form a channel region. The device structure of a transistor that electrically surrounds a semiconductor film is called the Surrounded ch This can be called an S-channel structure.

[0129] Since the transistor 170 has an S-channel structure, The conductive film 104 functions as a gate electrode, and the electric field for inducing the channel is effectively applied to the oxide semiconductor. This allows the voltage to be applied to the body membrane 108, improving the current driving capability of the transistor 170. It is possible to obtain high on-current characteristics. It is also possible to increase the on-current. Therefore, it is possible to miniaturize the transistor 170. The conductive film 104 functions as a first gate electrode and the conductive film 105 functions as a second gate electrode. Since the transistor 170 has a structure surrounded by the conductive film 120b, the mechanical strength of the transistor 170 is increased. It can be done.

[0130] <Configuration Example 5 of Semiconductor Device> Next, examples of structures different from those of the transistor 100 shown in FIGS. 6(A)(B)(C)(D) will be used. Note that the same functions as those explained above will be used. If they have the same hatch pattern, they may not be given special symbols.

[0131] 6(A), (B), (C), and (D) show variations of the transistor 100 shown in FIGS. 1(B) and 1(C). FIG.

[0132] The transistor 100A shown in FIGS. 6A and 6B is a transistor having a structure similar to that shown in FIGS. The oxide semiconductor film 108 included in the capacitor 100 has a three-layer structure. The oxide semiconductor film 108 included in the transistor 100A includes an oxide semiconductor film 108a and an oxide semiconductor film 108b. The semiconductor layer 108 includes a nitride semiconductor film 108b and an oxide semiconductor film 108c.

[0133] The transistor 100B shown in FIGS. 6(C) and 6(D) is a transistor having a structure similar to that shown in FIGS. The oxide semiconductor film 108 included in the capacitor 100 has a two-layer structure. The oxide semiconductor film 108 included in the transistor 100B includes an oxide semiconductor film 108b and an oxide semiconductor film 108c. and a nitride semiconductor film 108c.

[0134] Here, the oxide semiconductor films 108a, 108b, and 108c and the oxide semiconductor film 108b The band structure of the insulating film in contact with the insulating film 108c will be described with reference to FIG.

[0135] FIG. 7A shows the insulating film 107, the oxide semiconductor films 108a, 108b, and 108c, and the insulating film 108b. 7B is an example of a band structure in the thickness direction of a laminated structure having an insulating film 114. a stacked structure including the insulating film 107, the oxide semiconductor films 108b and 108c, and the insulating film 114; This is an example of the band structure in the film thickness direction of the structure. The conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, and 108c, and the insulating film 114 The lowest energy level (Ec) is shown.

[0136] 7A, silicon oxide films are used as the insulating films 107 and 114, and oxide semiconductor The metal oxide film 108a is made of metal oxide with an atomic ratio of In:Ga:Zn=1:3:2. The oxide semiconductor film 108b is formed using a metal target. The atomic ratio of the elements was In:Ga:Zn=1:1:1. The oxide semiconductor film 108c is formed by using an oxide semiconductor film having an atomic ratio of metal elements of In: An oxide semiconductor film formed using a metal oxide target with a Ga:Zn=1:3:2 was used. FIG. 1 is a band diagram of the configuration.

[0137] 7B, silicon oxide films are used as the insulating films 107 and 114, and oxide semiconductor The metal oxide film 108b has an atomic ratio of In:Ga:Zn=1:1:1. The oxide semiconductor film 108c is formed using a metal target. The atomic ratio of the elements was In:Ga:Zn=1:3:2. FIG. 1 is a band diagram of a structure using a metal oxide film.

[0138] As shown in FIGS. 7A and 7B, in the oxide semiconductor films 108a, 108b, and 108c, In other words, the energy level at the bottom of the conduction band changes smoothly. In order to have such a band structure, the oxide The interface between the semiconductor film 108a and the oxide semiconductor film 108b or the interface between the oxide semiconductor film 108b and the oxide semiconductor film 108a At the interface with the oxide semiconductor film 108c, defect states such as trap centers and recombination centers are formed. Assume that there are no impurities that would form

[0139] In order to form a continuous junction in the oxide semiconductor films 108a, 108b, and 108c, Each film is deposited using a multi-chamber deposition system (sputtering system) equipped with a lock chamber. It is necessary to continuously stack the layers without exposing them to the air.

[0140] With the structure shown in FIGS. 7A and 7B, the oxide semiconductor film 108b serves as a well. In the transistor using the above stacked structure, the channel region is formed of the oxide semiconductor film 10 It can be seen that it is formed in 8b.

[0141] Note that by providing the oxide semiconductor films 108a and 108c, the oxide semiconductor film 108 This can keep away trap levels that may be formed in b.

[0142] In addition, the trap states are below the conduction band of the oxide semiconductor film 108b which functions as a channel region. The energy level (Ec) of the edge of the electron trap may be farther from the vacuum level, and electrons may be trapped in the trap level. When electrons are accumulated in the trap level, the negative fixed charge This causes a load, and the threshold voltage of the transistor shifts in the positive direction. The trap level is lower than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 108b. It is preferable to configure the trap level so that the electrons are close to the trap level. This makes it difficult for electrons to accumulate, making it possible to increase the on-state current of the transistor. The field effect can increase the mobility.

[0143] In addition, in FIGS. 7A and 7B, the oxide semiconductor films 108a and 108c are oxide semiconductor films. The energy level of the bottom of the conduction band is closer to the vacuum level than the oxide film 108b. The energy level of the conduction band minimum of the semiconductor film 108b and the energy level of the oxide semiconductor films 108a and 108c The difference between the energy level of the conduction band minimum and the energy level of the That is, the oxide semiconductor films 108a and 108c have a valence of 2 eV or less, or 1 eV or less. the difference between the electron affinity of the oxide semiconductor film 108a and the electron affinity of the oxide semiconductor film 108b is 0.15 eV or more, or or 0.5 eV or more and 2 eV or less, or 1 eV or less.

[0144] With such a structure, the oxide semiconductor film 108b serves as a main path for current, and The oxide semiconductor films 108a and 108c function as a channel region. The oxide semiconductor film 108b is formed by using an oxide semiconductor material containing one or more metal elements. Since the oxide semiconductor film 108a is an oxide semiconductor film, the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b, Alternatively, interface scattering occurs at the interface between the oxide semiconductor film 108b and the oxide semiconductor film 108c. Therefore, the movement of carriers is not hindered at the interface, and the transistor The field effect mobility of the silicon dioxide increases.

[0145] In addition, the oxide semiconductor films 108a and 108c function as part of a channel region. In order to prevent this, a material having sufficiently low electrical conductivity is used. 108a and 108c are the electron affinities (the difference between the vacuum level and the energy level at the bottom of the conduction band). is smaller than that of the oxide semiconductor film 108b, and the energy level of the conduction band minimum is Use a material that has a difference (band offset) with the conduction band bottom energy level of 108b In addition, the difference in threshold voltage depending on the magnitude of the drain voltage is suppressed. In order to suppress this, the energy level of the conduction band minimum of the oxide semiconductor films 108a and 108c must be The energy level of the oxide semiconductor film 108b is 0.2 eV lower than the vacuum level. It is preferable to use a material close to the vacuum level, preferably a material close to the vacuum level by 0.5 eV or more.

[0146] In addition, the oxide semiconductor films 108a and 108c do not contain a spinel crystal structure. It is preferable that the oxide semiconductor films 108a and 108c have a spinel crystal structure. When the spinel type crystal structure is contained, the conductive film 112a, 11 The constituent elements of 2b may diffuse into the oxide semiconductor film 108b. When the conductive films 108a and 108c are made of CAAC-OS, which will be described later, the conductive films 112a and 11 This is preferable because it increases the blocking ability of the constituent elements of 2b, for example, copper element.

[0147] The thicknesses of the oxide semiconductor films 108a and 108c are determined by the amount of the constituent elements of the conductive films 112a and 112b. The insulating film has a thickness that is greater than or equal to a thickness that can prevent the insulating film from diffusing into the oxide semiconductor film 108b. The thickness of the oxide semiconductor film 108b is set to be less than the thickness that prevents oxygen from being supplied from the film 114 to the oxide semiconductor film 108b. When the thickness of the oxide semiconductor films 108a and 108c is 10 nm or more, the conductive films 112a and This can prevent the constituent elements of the oxide semiconductor film 112b from diffusing into the oxide semiconductor film 108b. In addition, when the thickness of the oxide semiconductor films 108a and 108c is 100 nm or less, the insulating film 114 , oxygen can be effectively supplied from 116 to the oxide semiconductor film 108b.

[0148] When the oxide semiconductor films 108a and 108c are In-M-Zn oxides, M is Ti. , Ga, Y, Zr, La, Ce, Nd, or Hf in a higher atomic ratio than In. Therefore, the energy gap of the oxide semiconductor films 108a and 108c is increased and the electron affinity is reduced. Therefore, the difference in electron affinity between the oxide semiconductor film 108a and the oxide semiconductor film 108b can be reduced by changing the composition of the element M. In addition, Ti, Ga, Y, Zr, La, Ce, N Since d and Hf are metal elements with strong bonding strength with oxygen, these elements are more highly By having a low atomic ratio, oxygen deficiency is less likely to occur.

[0149] When the oxide semiconductor films 108a and 108c are made of In-M-Zn oxide, Zn and The atomic ratio of In and M excluding O is preferably 50 atomic % In. less than 50 atomic %, M is higher than 50 atomic %, and more preferably In is 25 atomic % The oxide semiconductor films 108a and 108c are made to have a conductivity of less than 100 Å and a conductivity of more than 75 atomic %. A gallium oxide film may be used as the insulating film.

[0150] In addition, when the oxide semiconductor films 108a, 108b, and 108c are made of In-M-Zn oxide, , compared with the oxide semiconductor film 108b, M contained in the oxide semiconductor films 108a and 108c The atomic ratio of the above atoms is typically larger than that of the above atoms contained in the oxide semiconductor film 108b. The atomic ratio is 1.5 times or more, preferably 2 times or more, and more preferably 3 times or more. .

[0151] In addition, when the oxide semiconductor films 108a, 108b, and 108c are made of In-M-Zn oxide, The oxide semiconductor film 108b is formed by mixing In:M:Zn=x1:y1:z1 [atomic ratio] and the oxide semiconductor When the conductor films 108a and 108c have an atomic ratio of In:M:Zn=x2:y2:z2, y2 / x2 is greater than y1 / x1, and preferably y2 / x2 is greater than y1 / x1 by 1. More preferably, y2 / x2 is at least two times larger than y1 / x1, and Preferably, y2 / x2 is three or four times larger than y1 / x1. In the oxide semiconductor film 108b, when y1 is equal to or larger than x1, the oxide semiconductor film 108b It is preferable because it can give stable electrical characteristics to a transistor using y1. When the value is three times or more of 1, the field-effect mobility of the transistor including the oxide semiconductor film 108b is Therefore, it is preferable that y1 is less than three times x1.

[0152] When the oxide semiconductor film 108b is an In-M-Zn oxide, the oxide semiconductor film 108b is formed by In the target used for forming the film, the atomic ratio of the metal elements is In:M:Zn=x1: If y1:z1 、 x1 / y1 is between 1 / 3 and 6, and further between 1 and 6. , z1 / y1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. When z1 / y1 is set to 1 or more and 6 or less, the oxide semiconductor film 108b can be obtained by the CAA method described later. The atomic ratio of the target metal elements is typically I. n:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=3:1 :There are 2nd class.

[0153] When the oxide semiconductor films 108a and 108c are made of an In-M-Zn oxide, the oxide semiconductor In the target used to form the solid films 108a and 108c, the number of atoms of the metal element is If the ratio is In:M:Zn=x2:y2:z2 、 x2 / y2 <x1 / y1であって、z 2 / y2 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. By increasing the atomic ratio of M to indium, the oxide semiconductor films 108a and 108b can be formed. Since it is possible to increase the energy gap of c and reduce the electron affinity, y2 It is preferable that / x2 is 3 or more, or 4 or more. Representative examples are In:M:Zn=1:3:2, In:M:Zn=1:3:4, In: M:Zn=1:3:5, In:M:Zn=1:3:6, In:M:Zn=1:4:2, I n:M:Zn=1:4:4, In:M:Zn=1:4:5, In:M:Zn=1:5:5 etc.

[0154] When the oxide semiconductor films 108a and 108c are made of an In-M oxide, M is divalent gold. By not including metal atoms (e.g., zinc), it has a spinel-type crystal structure. In addition, the oxide semiconductor films 108a and 108c can be formed without any oxide semiconductor. The films 108a and 108c may be, for example, In-Ga oxide films. As the In-Ga oxide, for example, an In-Ga metal oxide target (In:Ga=7 93) by a sputtering method. In order to form the films 108a and 108c by a sputtering method using DC discharge, When M=x:y [atomic number ratio], y / (x+y) is 0.96 or less, preferably 0 It is recommended to set it to .95 or less, for example 0.93.

[0155] Note that the atomic ratios of the oxide semiconductor films 108a, 108b, and 108c are each calculated using an error. The atomic ratios listed above may vary by ±40%.

[0156] In addition, the transistor according to this embodiment can be freely combined with each of the above structures. It is possible to do this.

[0157] <Method 1 for manufacturing semiconductor device> Next, a method for manufacturing the transistor 100, which is a semiconductor device of one embodiment of the present invention, will be described with reference to FIGS. 8 to 10 illustrate a method for manufacturing a semiconductor device. FIG.

[0158] First, a conductive film is formed on the substrate 102, and the conductive film is then subjected to a lithography process and an etching process. The conductive film 104 that functions as a gate electrode is formed by carrying out the process (see FIG. 8(A)). ).

[0159] In this embodiment, a glass substrate is used as the substrate 102, and a conductive film is formed on the substrate 102 to function as a gate electrode. As the conductive film 104, a tungsten film having a thickness of 100 nm is formed by sputtering.

[0160] Next, insulating films 106 and 107 that function as gate insulating films are formed on the conductive film 104. (See Figure 8(B)).

[0161] In this embodiment, a nitride silicon film having a thickness of 400 nm is formed as the insulating film 106 by the PECVD method. A silicon film is formed, and then a silicon oxynitride film having a thickness of 50 nm is formed as the insulating film 107 .

[0162] The insulating film 106 has a stacked structure of silicon nitride films. The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film are three layers. A laminated structure can be used. An example of the three-layer laminated structure is formed as follows: This can be done.

[0163] The first silicon nitride film is formed by, for example, silane at a flow rate of 200 sccm, PE-CV was performed using nitrogen at a flow rate of 100 sccm and ammonia gas at a flow rate of 100 sccm as source gases. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency was generated. If a power of 2000 W is supplied using a frequency power supply and the thickness is formed to be 50 nm, good.

[0164] For the second silicon nitride film, silane at a flow rate of 200 sccm and 2000 sccm The PECVD equipment was operated using nitrogen at a flow rate of 2000 sccm and ammonia gas at a flow rate of 2000 sccm as raw material gases. The pressure in the reaction chamber was controlled to 100 Pa, and a 27.12 MHz high frequency power supply A power of 2000 W may be supplied using a heater to form the film to a thickness of 300 nm.

[0165] The third silicon nitride film was formed using silane at a flow rate of 200 sccm and silane at a flow rate of 5000 sccm. The pressure in the reaction chamber was adjusted to 100 The thickness was measured by controlling the temperature to 50 Pa and supplying 2000 W of power using a 27.12 MHz high frequency power supply. It is sufficient to form it so that the thickness is 50 nm.

[0166] The first silicon nitride film, the second silicon nitride film, and the third silicon nitride film The substrate temperature during the formation can be set to 350°C.

[0167] By forming the insulating film 106 as a three-layered structure of silicon nitride films, for example, the conductive film 10 When a conductive film containing copper (Cu) is used for 4, the following effects are achieved.

[0168] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 104. The second silicon nitride film has the function of releasing hydrogen and functions as a gate insulating film. The third silicon nitride film can improve the breakdown voltage of the insulating film. The hydrogen released from the silicon nitride film is small, and the hydrogen released from the second silicon nitride film is diffused. can be suppressed.

[0169] The insulating film 107 is formed by using a material having a thickness of 100 nm to improve interface characteristics with an oxide semiconductor film 108 to be formed later. Therefore, it is preferable that the insulating film be formed of an insulating film containing oxygen.

[0170] Next, the oxide semiconductor film 108 is formed over the insulating film 107 (see FIG. 8C).

[0171] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn=1: 1:1.2 (atomic ratio)) to form an oxide semiconductor film by sputtering, A mask is formed on the oxide semiconductor film by a lithography process, and the oxide semiconductor film is By processing the oxide semiconductor film 108 into the above region, an island-shaped oxide semiconductor film 108 is formed.

[0172] After the oxide semiconductor film 108 is formed, the substrate is heated at 150° C. or higher and lower than the distortion point of the substrate, preferably at 200° C. A heat treatment may be carried out at a temperature of from 300°C to 450°C, more preferably from 300°C to 450°C. The heat treatment here is one of treatments for purifying the oxide semiconductor film. It is possible to reduce the amount of hydrogen, water, etc. contained in 108. The heat treatment may be performed before the oxide semiconductor film 108 is processed into an island shape.

[0173] The heat treatment on the oxide semiconductor film 108 can be performed using a gas baking furnace, an electric furnace, or RTA (Rapid Thermal Atomic Energy). A RTA device can be used. Therefore, heat treatment can be performed at a temperature above the strain point of the substrate for a short period of time. This makes it possible to reduce the time.

[0174] Note that the heat treatment on the oxide semiconductor film 108 is carried out using nitrogen gas, oxygen gas, or ultra-dry air (Cl Also known as dry air (CDA). CDA is a type of air that contains less than 20 ppm of water. Preferably, the concentration is 1 ppm or less, and more preferably 10 ppb or less, in air.) or a rare gas ( The above-mentioned nitrogen gas, oxygen gas, CD It is preferable that the rare gas does not contain hydrogen, water, etc.

[0175] For example, it is preferable to increase the purity of the nitrogen gas, oxygen gas, or CDA. The purity of nitrogen gas, oxygen gas, or CDA is 6N (99.9999%) or 7N (99.99999%). Also, the dew point of nitrogen gas, oxygen gas, or CDA By using gas that has been highly purified to temperatures below -60°C, preferably below -100°C, oxidation This can prevent moisture and the like from being taken into the compound semiconductor film 108 as much as possible.

[0176] After the oxide semiconductor film 108 is subjected to heat treatment in a nitrogen or rare gas atmosphere, oxygen or As a result, hydrogen and water contained in the oxide semiconductor film 108 are removed. and the like can be desorbed, and oxygen can be supplied to the oxide semiconductor film 108. As a result, the amount of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

[0177] Here, the thermal profile of the gas bake furnace when the oxide semiconductor film 108 is subjected to heat treatment is This will be explained using Figures 16 and 17. Figures 16(A)(B) and 17(A) FIG. 1B is a diagram illustrating the thermal profile during heat treatment in a gas bake furnace.

[0178] 16(A)(B) and 17(A)(B) are graphs showing the temperature at which the desired temperature (here, 450 ° C., hereinafter referred to as the first temperature), and then the temperature is increased to a desired temperature (here, a temperature higher than room temperature). This is a thermal profile in which the temperature is lowered to 150°C or less (hereinafter referred to as the second temperature).

[0179] As shown in FIG. 16A, when the oxide semiconductor film 108 is subjected to heat treatment, two gases The seeds can be used in two steps. For example, in the first step: Nitrogen gas is introduced into the gas bake furnace. Then, the time for raising the temperature to the first temperature is set to 1 hour. After treatment at the first temperature for 1 hour, the temperature is lowered to the second temperature over 1 hour. In the second step, nitrogen gas is switched to a mixture of nitrogen and oxygen. The time required to raise the temperature to the first temperature was set to 1 hour, and after treatment at the first temperature for 1 hour, the second temperature was set to 1 hour. The temperature is lowered to 30°C over 1 hour.

[0180] Alternatively, as shown in FIG. 16B, when the oxide semiconductor film 108 is subjected to heat treatment, It is possible to process the material in one step using two gas species. For example, first, gas bake Nitrogen gas is introduced into the furnace. Then, the time required to raise the temperature to the first temperature is set to 1 hour. After 1 hour of treatment at this temperature, the gas type is switched from nitrogen gas to CDA. After changing the temperature, the treatment is continued for another hour, and then the temperature is lowered to the second temperature over the course of one hour.

[0181] The thermal profile during the heat treatment in the gas bake furnace is as shown in FIG. 16(B). Therefore, the processing time is shorter than the thermal profile of the heat treatment in the gas bake furnace shown in FIG. 16(A). Therefore, it is possible to provide a semiconductor device with improved productivity. Cut.

[0182] Alternatively, as shown in FIG. 17A, when the oxide semiconductor film 108 is subjected to heat treatment, The process can be carried out in two steps using two gas species. For example, the first step is First, nitrogen gas is introduced into the gas bake furnace. Then, when the temperature is increased to the first temperature, After the treatment at the first temperature for 1 hour, the gas type was changed from nitrogen gas to CDA. After switching the gas type, process for another hour, then increase the temperature to the second temperature for another hour. In the second step, the CDA gas is switched to nitrogen gas. The time required to raise the temperature to the first temperature was set to 1 hour, and after treatment at the first temperature for 1 hour, the gas species After switching from nitrogen gas to CDA, the gas was treated for another hour. The temperature is then lowered to the second temperature over one hour.

[0183] Alternatively, as shown in FIG. 17B, when the oxide semiconductor film 108 is subjected to heat treatment, The process can be carried out in two steps using two gas species. For example, the first step is First, nitrogen gas is introduced into the gas bake furnace. Then, when the temperature is increased to the first temperature, After treating at the first temperature for 2 hours with a 1-hour interval, the temperature was lowered to the second temperature over 1 hour. In the second step, the time to raise the temperature to the first temperature is set to 1 hour, and the time to raise the temperature to the first temperature is set to 1 hour. After 2 hours of treatment at 375°C, the gas type is switched from nitrogen gas to CDA. Then, the mixture is treated for an additional 2 hours, and then cooled to the second temperature over 1 hour.

[0184] Note that the thermal profile of the gas bake furnace for the heat treatment on the oxide semiconductor film 108 is as follows: As shown in Figures 16(A)(B) and 17(A)(B), the sample is first heated with nitrogen gas. It is preferable.

[0185] First, the oxide semiconductor film 108 is heated with nitrogen gas to form the oxide semiconductor film 10 Oxygen, which is one of the main components in the oxide semiconductor film 8, reacts with hydrogen that may be present in the oxide semiconductor film 108. The OH groups are then released as H2O from the surface of the oxide semiconductor film 108. That is, hydrogen in the oxide semiconductor film 108 is captured by the initial nitrogen gas. This makes it possible to:

[0186] However, when the oxide semiconductor film 108 is heated using only nitrogen gas, the oxide semiconductor film 10 Since oxygen is released as H2O from the oxide semiconductor film 8, oxygen vacancies are formed in the oxide semiconductor film 108. do.

[0187] Therefore, as shown in Figures 16(A)(B) and 17(A)(B), nitrogen gas and oxygen gas were mixed. By switching to either the mixed gas with fluorine or CDA, the amount of fluorine contained in the gas can be reduced. The oxygen contained in the oxide semiconductor film 108 can compensate for oxygen vacancies in the oxide semiconductor film 108.

[0188] In addition, in FIGS. 16(A)(B) and 17(A)(B), the temperature is stabilized at the desired temperature. After that, the treatment was carried out for 1 or 2 hours, but is not limited to this. For example, in FIG. 17(B), The treatment time with nitrogen gas in the first step shown may be 1 hour or more and 10 hours or less. By increasing the treatment time of the first step shown in FIG. 17(B), the oxide semiconductor film 1 This is preferable because it allows more hydrogen to be desorbed from the 08.

[0189] If necessary, either a mixture of nitrogen gas and oxygen gas or CDA can be used. The baking time with the oxygen gas may be longer, for example, from 1 hour to 10 hours. By increasing the heating time in the atmosphere containing fluorine, the oxide semiconductor film 108 This makes it possible to suitably compensate for oxygen deficiencies.

[0190] In the case where the oxide semiconductor film is formed by a sputtering method, the sputtering gas contains A rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen is appropriately used. In the case of a mixed gas, it is preferable to increase the ratio of oxygen to rare gas. It is also necessary to increase the purity of the sputtering gas. The oxygen gas and argon gas used have a dew point of -60°C or less, preferably -100°C or less. The use of a purified gas makes it possible to take in moisture and the like into the oxide semiconductor film 108. It can be prevented as much as possible.

[0191] In addition, when the oxide semiconductor film 108 is formed by a sputtering method, a sputtering apparatus The chamber is then cooled to remove as much water as possible, which may be an impurity for the oxide semiconductor film 108. To remove the gas, a high vacuum pump (5x1) was used, using an adsorption type vacuum pump such as a cryopump. 0 -7 Pa to 1 x 10 -4 It is preferable to use turbomolecular polymers. A pump and cold trap are combined to remove gases, especially carbon or It is preferable to prevent the backflow of hydrogen-containing gas.

[0192] Next, a source electrode and a drain electrode are formed over the insulating film 107 and the oxide semiconductor film 108. Functional conductive films 112a and 112b are formed (see FIG. 9A).

[0193] In this embodiment, the conductive films 112a and 112b are made of tungsten films having a thickness of 50 nm. A laminated film of the aluminum film having a thickness of 400 nm was formed by sputtering. A mask is formed on the layer film by a lithography process, and the layer film is processed into the desired area. In this embodiment, the conductive films 112a and 112b are formed. However, the present invention is not limited to this. For example, the conductive film 112 a, 112b are tungsten films with a thickness of 50 nm and aluminum films with a thickness of 400 nm. Alternatively, a three-layer structure may be formed by stacking a 100 nm thick titanium film and a 100 nm thick titanium film.

[0194] After the conductive films 112a and 112b are formed, the surface of the oxide semiconductor film 108 (back The cleaning method may be, for example, cleaning with a chemical solution such as phosphoric acid. By performing cleaning using a chemical solution such as phosphoric acid, the surface of the oxide semiconductor film 108 can be cleaned. Remove impurities (such as elements contained in the conductive films 112a and 112b) adhering to the surface. It is possible.

[0195] In the process of forming the conductive films 112a and 112b and / or the cleaning process, A recess may be formed in part of the compound semiconductor film 108.

[0196] Through the above steps, the transistor 100 is formed.

[0197] Next, specifically, the oxide semiconductor film 108 and the conductive film 112 are formed over the transistor 100. Insulating films 114 and 116 functioning as protective insulating films for the transistor 100 are formed on the insulating films 112a and 112b. (See FIG. 9(B)).

[0198] After the insulating film 114 is formed, the insulating film 116 is successively formed without exposure to the air. After the insulating film 114 is formed, it is preferable to control the flow rate, pressure, and temperature of the source gas without exposing the insulating film 114 to the atmosphere. By adjusting one or more of the frequency power and the substrate temperature, the insulating film 116 is continuously formed. The concentration of impurities derived from atmospheric components can be reduced at the interface between the insulating film 114 and the insulating film 116. At the same time, oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108. As a result, the amount of oxygen vacancies in the oxide semiconductor film 108 can be reduced.

[0199] For example, a silicon oxynitride film is formed as the insulating film 114 by using a PECVD method. In this case, the source gas may be a deposition gas containing silicon and an oxidizing gas. It is preferable to use the following gases. Typical examples of deposition gases containing silicon include silane, disilane, and the like. Examples of oxidizing gases include nitrous oxide, nitrous dioxide, etc. In addition, the oxidizing gas is more than 20 times but less than 100 times the deposition gas. The pressure in the treatment chamber is set to less than 100 Pa, preferably 40 times or more and 80 times or less. By using the PECVD method at a pressure of 50 Pa or less, the insulating film 114 contains nitrogen and The insulating film has a small number of defects.

[0200] In this embodiment, the insulating film 114 is formed by heating the substrate 102 at a temperature of 220°C. Silane at a flow rate of 50 sccm and dinitrogen monoxide at a flow rate of 2000 sccm were used as source gases. The pressure in the processing chamber was set to 20 Pa, and the high frequency power supplied to the parallel plate electrodes was set to 13.56 M. Hz, 100W (power density is 1.6 x 10 -2 W / cm 2 ) PECVD method A silicon oxynitride film is formed using the silicon oxynitride film.

[0201] The insulating film 116 is formed by depositing a substrate placed in a vacuum-evacuated processing chamber of a PECVD device. The temperature is maintained at 180°C or higher and 280°C or lower, more preferably 200°C or higher and 240°C or lower. The raw material gas is introduced into the chamber to set the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, and Preferably, the pressure is 100 Pa or more and 200 Pa or less, and 0.17 W is applied to the electrodes provided in the processing chamber. / cm 2 More than 0.5W / cm 2 or less, more preferably 0.25 W / cm 2 Over 0.35 W / cm 2Under the following conditions for supplying high frequency power, silicon oxide film or silicon oxynitride film is formed. Form a con film.

[0202] The conditions for forming the insulating film 116 are as follows: a high frequency voltage of the above power density in a reaction chamber of the above pressure; By supplying power, the decomposition efficiency of the source gas in the plasma increases, and oxygen radicals increase. As the oxidation of the source gas progresses, the oxygen content in the insulating film 116 becomes higher than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is As a result, the stoichiometric amount of oxygen in the film is reduced by the heat treatment in the subsequent process. Oxides that contain more oxygen than the stoichiometric composition and lose some of the oxygen when heated An insulating film can be formed.

[0203] In the step of forming the insulating film 116, the insulating film 114 serves as a protection film for the oxide semiconductor film 108. Therefore, the power density can be reduced while reducing damage to the oxide semiconductor film 108. The insulating film 116 can be formed using high radio frequency power.

[0204] In the film formation conditions for the insulating film 116, a deposition gas containing silicon is mixed with an oxidizing gas. By increasing the flow rate of the gas, it is possible to reduce the number of defects in the insulating film 116. In the ESR measurement, the g value of 2.001, which is due to the dangling bond of silicon, The spin density of the signal is 6×10 17 spins / cm 3 Less than 3 x 10 17 spins / cm 3 Less than or equal to 1.5 × 10 17 spins / cm 3 The following is a missing An oxide insulating layer with fewer defects can be formed, resulting in improved reliability of the transistor. It can be done.

[0205] After the insulating films 114 and 116 are formed, heat treatment may be performed. The nitrogen oxides contained in the insulating films 114 and 116 can be reduced. As a result, part of the oxygen contained in the insulating films 114 and 116 is transferred to the oxide semiconductor film 108. This can reduce the amount of oxygen vacancies in the oxide semiconductor film 108.

[0206] The temperature for the heat treatment of the insulating films 114 and 116 is typically 150° C. or higher and 400° C. or lower. The temperature is preferably 300°C or higher and 400°C or lower, more preferably 320°C or higher and 370°C or lower. Heat treatment is performed under an atmosphere of nitrogen, oxygen, CDA, or rare gas (argon, helium, etc.). It should be noted that the nitrogen, oxygen, ultra-dry air, or rare gas does not contain hydrogen, water, etc. For the heat treatment, a gas bake furnace, an electric furnace, an RTA device, etc. may be used. can.

[0207] In this embodiment mode, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.

[0208] Next, a metal oxide film 132 is formed on the insulating film 116 (see FIG. 9(C)).

[0209] The metal oxide film 132 is a conductive film containing indium or a semiconductor film containing indium. In this embodiment, a sputtering film can be used as the metal oxide film 132. The ITSO film is formed to a thickness of 5 nm using a photolithography system. When the thickness is 1 nm or more and 20 nm or less, or 2 nm or more and 10 nm or less, oxygen can be suitably transmitted. This is also preferable because it can suppress the release of oxygen.

[0210] Next, oxygen 140 is introduced into the insulating films 114 and 116 through the metal oxide film 132. (See Figure 10(A)).

[0211] a method of introducing oxygen 140 into the insulating films 114 and 116 by passing through the metal oxide film 132; Examples of methods include ion doping, ion implantation, and plasma treatment. As a treatment method, oxygen may be excited using microwaves to generate high-density plasma. .

[0212] In addition, when oxygen 140 is introduced, applying a bias voltage to the substrate side effectively reduces the amount of oxygen. The element 140 can be introduced into the insulating films 114 and 116. The bias voltage is For example, an ashing device is used, and the voltage of the bias voltage applied to the substrate side of the ashing device is Power density: 1W / cm 2 More than 5W / cm 2 In addition, oxygen 140 is introduced. The substrate temperature during the process is preferably above room temperature and below 350°C, more preferably between 100°C and 250°C. By setting the following conditions, oxygen can be efficiently introduced into the insulating films 114 and 116.

[0213] In this embodiment, an ashing device is used, and O2 gas is introduced into the ashing device. Then, a bias is applied to the substrate side to introduce oxygen 140 into the insulating films 114 and 116. do.

[0214] By providing the metal oxide film 132 and introducing oxygen, the metal oxide film 132 becomes the insulating film 114, The insulating film 11 functions as a protective film that suppresses oxygen from being released from the insulating film 11. 4, 116 can introduce a lot of oxygen.

[0215] Next, a metal oxide film 134 is formed on the metal oxide film 132, thereby forming the transistor shown in FIG. A star 100 is formed (see FIG. 10(B)).

[0216] The metal oxide film 134 may be a conductive film containing aluminum or an insulating film containing aluminum. For example, a metal oxide film 132 is formed on the metal oxide film 132 by sputtering. Aluminum is deposited as a conductive film, and then the aluminum is subjected to oxygen plasma treatment or or in an oxygen atmosphere, a metal oxide film 134 is formed on the metal oxide film 132. Alternatively, an aluminum oxide film can be formed on the metal oxide film 132 by ALD. By using the method, an aluminum oxide film is formed as an insulating film on the metal oxide film 132. The metal oxide film 134 may be an aluminum oxide film.

[0217] In addition, after the metal oxide films 132 and 134 are formed, a heat treatment is performed to form the insulating films 114 and 116. The excess oxygen contained in the oxide semiconductor film 108 is diffused into the oxide semiconductor film 108. Alternatively, the metal oxide film 132 or the metal oxide film 134 can be filled with the metal oxide film 132 or the metal oxide film 134. By performing thermal deposition on either or both of the insulating films 114 and 116, the excess silicon contained in the insulating films 114 and 116 can be removed. Oxygen is diffused into the oxide semiconductor film 108 to fill oxygen vacancies in the oxide semiconductor film 108. The temperature of the heat treatment that can be performed after the formation of the metal oxide films 132 and 134 can be The temperature is typically 150°C or higher and 400°C or lower, preferably 300°C or higher and 400°C or lower. Preferably, the temperature is 320°C or higher and 370°C or lower.

[0218] Through the above steps, the transistor 100 shown in FIG. 1 can be manufactured.

[0219] <Method 2 for manufacturing semiconductor device> Next, a method for manufacturing the transistor 100 illustrated in FIGS. 1A and 1B, which is a semiconductor device of one embodiment of the present invention, will be described. The modified example will be described with reference to Figs. 11(A), (B), and (C). )(C) is a cross-sectional view illustrating a method for manufacturing a semiconductor device.

[0220] 9B, the insulating films 114 and 116 are doped with halogen elements. 139 is introduced (see Figure 11(A)).

[0221] Examples of halogen elements include fluorine and chlorine. The method of introducing element 139 is to use a gas containing fluorine or a gas containing chlorine to introduce an insulating From above the film 116, a halogen element is introduced by ion doping, ion implantation, or plasma treatment. All we need to do is introduce element 139.

[0222] In addition, examples of fluorine-containing gases include carbon tetrafluoride (CF4) and sulfur hexafluoride (SF 6), nitrogen trifluoride (NF3), trifluoromethane (CHF3), silicon tetrafluoride (SiF 4), perfluorocyclobutane (C4F8), etc. Also, gases containing chlorine Examples of suitable chlorine compounds include chlorine (Cl2), boron trichloride (BCl3), and silicon tetrachloride (SiCl4 ), carbon tetrachloride (CCl4), etc.

[0223] In addition, when introducing halogen element 139, applying a bias voltage to the substrate side is effective. As a result, the halogen element 139 can be introduced into the insulating films 114 and 116. For example, an ashing device is used, and the voltage is applied to the substrate side of the ashing device. The power density of the bias voltage is 1W / cm 2 More than 5W / cm 2 The following is sufficient. The substrate temperature when introducing the element 139 is preferably above room temperature and below 350°C. By setting the temperature at 100° C. or higher and 250° C. or lower, halogen can be efficiently introduced into the insulating films 114 and 116. Elements can be introduced.

[0224] In this embodiment, an ashing device is used to ashing CF4 gas or SF6 gas. By introducing the device into the substrate and applying a bias to the substrate side, the insulating films 114 and 116 The halogen element 139 is introduced.

[0225] By introducing the halogen element 139 from above the insulating film 116, the surface of the insulating film 116 The halogen element can be distributed so that the concentration increases toward the center.

[0226] <Halogen elements in insulating films> Here, the concept of introducing halogen element 139 into insulating films 114 and 116 will be explained. This will be explained with reference to FIG.

[0227] FIG. 18A is a cross-sectional view illustrating an enlarged view of the semiconductor device.

[0228] The insulating film 116 shown in FIG. 18A has a region 145. The region 145 is a region containing a halogen element. In other words, the region near the oxide semiconductor film 108 has a high concentration of halogen. For example, by introducing a halogen element from the surface side of the insulating film 116, Therefore, the halogen element is introduced into the insulating film 11 so that the concentration increases toward the surface of the insulating film 116. When a halogen element is introduced into the oxide semiconductor film 108, Since the oxide semiconductor film 108 may be n-type, as shown in FIG. It is preferable to introduce a halogen element into the insulating film 116 that is separated from the semiconductor film 108. When a halogen element is mixed into the oxide semiconductor film 108, the composition of the oxide semiconductor film 108 The element and the halogen element bond to become stable, so reliability tests (e.g., positive gate BT For example, if fluorine is used as the halogen element, When an In-Ga-Zn oxide is used as the oxide semiconductor film 108, fluorine and In are bonded together. The signal may be stabilized by combining the two.

[0229] <Fluorine-containing silicon oxide> Next, as shown in FIG. 18(A), silicon oxide is used as the insulating film 116, and the silicon oxide is The concept of introducing fluorine as a halogen element into silicon is shown in Figure 18(B)(C)(D) ) will be used in the following explanation.

[0230] Assume silicon oxide (SiO2) with two oxygen atoms per silicon atom. One silicon atom is bonded to four oxygen atoms. One oxygen atom is bonded to two It is bonded to silicon atoms (see Figure 18(B)).

[0231] When two fluorine atoms enter silicon oxide, one bonded to two silicon atoms is broken down. The oxygen atom bond breaks (…Si-O-Si… + 2F → …Si- -O- -S i… + 2F). And, a fluorine atom, a silicon atom whose bond with an oxygen atom has been broken, bonds (…Si- -O- -Si… + 2F → …Si-F F-Si… + O). At this time, the oxygen atom whose bond is broken becomes excess oxygen (see Figure 18(C)).

[0232] Excess oxygen contained in silicon oxide reduces oxygen vacancies in the oxide semiconductor film. Oxygen vacancies in the oxide semiconductor film can become hole traps. The excess oxygen in the capacitor gives the transistor stable electrical characteristics. do.

[0233] In addition, when one fluorine atom and one hydrogen atom are introduced into silicon oxide, one silicon One of the four oxygen atoms bonded to the atom breaks (…Si-O-Si… + F + H → …Si- -O-Si… + F + H). The bond between the oxygen atom and the silicon atom that has broken the bond with the oxygen atom (Si- -O-Si … + F + H → …Si-F -O-Si… + H). The oxygen atom that was bonded to the molecule is bonded to a hydrogen atom, forming a terminal bond (Si-F -O -Si… + H → …Si-F HO-Si…, see Figure 18(D)).

[0234] The hydrogen concentration in the oxide semiconductor film can be reduced by the silicon oxide having hydrogen traps. Note that hydrogen in the oxide semiconductor film becomes an impurity. When hydrogen enters the oxygen vacancy site, electrons that act as carriers can be generated. Therefore, the presence of hydrogen traps in silicon oxide reduces the amount of hydrogen in the channel formation region. As a result, the carrier density can be reduced by the amount of the reduction in carrier density. The threshold voltage of the transistor can be shifted in the positive direction. The electrical characteristics of the transistor can be made closer to normally-off. The energy required for desorption of trapped hydrogen is high. The desorption of the hydrogen is unlikely to occur.

[0235] Thus, the incorporation of fluorine into silicon oxide leads to the generation of excess oxygen and / or Note that reducing oxygen vacancies in the oxide semiconductor film can reduce excess oxygen. When consumed, the silicon oxide will have less oxygen than before the fluorine was introduced. When hydrogen is trapped in the semiconductor film, the hydrogen in the silicon oxide becomes larger than before the fluorine entered. become.

[0236] To give the transistor stable electrical characteristics and bring them closer to those of a normally-off transistor To achieve this, the excess oxygen and hydrogen traps should be in sufficient amounts. It can be seen that the fluorine concentration of the silicon dioxide should be higher than the hydrogen concentration.

[0237] After the introduction of the halogen element 139, the steps shown in FIG. 9(C) and FIG. 10(A) and (B) are carried out. By doing so, it is possible to manufacture a semiconductor device in which the insulating films 114 and 116 contain halogen elements. can.

[0238] By including a halogen element in the insulating films 114 and 116, This is advantageous because it allows the excess oxygen in 6 to be further increased.

[0239] In FIG. 11(A), the halogen element 139 is introduced from above the insulating film 116. However, the method for introducing halogen element 139 is not limited to this, and may be any of the methods shown in FIG. 11(B) or 11(C) may also be used.

[0240] FIG. 11B shows a state in which a halogen element 1 is added after forming the metal oxide film 132 shown in FIG. 9C. 39 is a cross-sectional view of the manufacturing process when introducing 39.

[0241] FIG. 11C shows a state in which a halogen element is added after forming the metal oxide film 134 shown in FIG. 10B. 139 is introduced.

[0242] As shown in FIGS. 11B and 11C, if it is a process after forming the insulating film 116, The halogen element 139 is introduced into the insulating films 114 and 116 by passing through the oxide films 132 and 134. In the manufacturing process shown in FIG. 11B, the metal oxide film 132 may also be formed of a halogen. In the manufacturing process shown in FIG. 11C, the metal oxide film 1 32 and 134 also contain the halogen element 139.

[0243] <Method 3 for manufacturing semiconductor device> Next, a method for manufacturing the transistor 150 illustrated in FIGS. 3A and 3B, which is a semiconductor device of one embodiment of the present invention, will be described. This will be described with reference to Figures 12 and 13. Figures 12 and 13 show the structure of a semiconductor device. 1A to 1C are cross-sectional views illustrating a manufacturing method.

[0244] First, the steps up to the step shown in FIG. 8C are performed, and then the insulating film 107 and the oxide semiconductor film 10 8, insulating films 114 and 116 and a metal oxide film 132 are formed (see FIG. 12(A)).

[0245] Next, oxygen 140 is introduced into the insulating films 114 and 116 through the metal oxide film 132. (See Figure 12(B)).

[0246] Next, a metal oxide film 134 is formed on the metal oxide film 132 (see FIG. 12(C)).

[0247] Next, a mask is formed on the metal oxide film 134 by a lithography process. 116 and the metal oxide films 132 and 134. Note that the openings 141a and 141b reach the oxide semiconductor film 108 (FIG. 13A). reference).

[0248] Next, the oxide semiconductor film 108 and the metal oxide film 109 are formed so as to cover the openings 141a and 141b. A conductive film is formed on the conductive film 134, and a mask is formed on the conductive film by a lithography process. The conductive film is processed into desired regions to form conductive films 112a and 112b (FIG. 13(B)). )reference).

[0249] Through the above steps, the transistor 150 shown in FIG. 3 can be manufactured.

[0250] The transistor 160 shown in FIGS. 4A, 4B, and 4C has an opening 141a, When forming the insulating films 114 and 111b, the insulating films 114 and 111b are formed on the channel region of the oxide semiconductor film 108. It can be fabricated by leaving 6.

[0251] <Method 4 for manufacturing semiconductor device> Next, a method for manufacturing a transistor 170 which is a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 14 and 15. Note that Figs. 14(A)(C) and 15(A)(C) 14(B) is a cross-sectional view of the transistor 170 in the channel length direction during the manufacturing process. 15(B)(D) and 15(B)(D) show the channel of the transistor 170 during the manufacturing process. FIG.

[0252] First, the steps up to the step shown in FIG. 10(B) are carried out (see FIGS. 14(A) and (B)).

[0253] Next, a mask is formed on the metal oxide film 134 by a lithography process. 116 and the metal oxide films 132 and 134 in desired regions. A mask is formed on the metal oxide film 134 by a lithography process, and the insulating films 106 and 107 , 114, 116, and openings 142a, 142b in desired areas of the metal oxide films 132, 134. The opening 142c is formed so as to reach the conductive film 112b. The openings 142a and 142b are formed so as to reach the conductive film 104 ( See Figure 14(C)(D)).

[0254] The openings 142a, 142b and the opening 142c may be formed in the same process. The openings 142a, 142b and the opening 142c may be formed in the same process. When forming the mask, for example, a gray-tone mask or a half-tone mask is used. It is possible.

[0255] Next, a conductive film is formed on the metal oxide film 134 so as to cover the openings 142a, 142b, and 142c. 120 is formed (see FIGS. 15(A) and (B)).

[0256] The conductive film 120 may be made of, for example, indium (In), zinc (Zn), or tin (Sn). In particular, the conductive film 120 may be made of a material containing one selected from the group consisting of: Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide , indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Translucent materials such as indium tin oxide, indium zinc oxide, and indium tin oxide containing silicon oxide In addition, the conductive film 120 can be made of a metal oxide film 132. Using the same type of material is preferable because it reduces manufacturing costs.

[0257] The conductive film 120 can be formed by, for example, a sputtering method. In this embodiment, an ITSO film having a thickness of 110 nm is formed by sputtering. do.

[0258] Next, a mask is formed on the conductive film 120 by a lithography process, and the conductive film 120 is The region is processed to form conductive films 120a and 120b (see FIGS. 15(C) and 15(D)).

[0259] Through the above steps, the transistor 170 shown in FIG. 5 can be manufactured.

[0260] Note that one embodiment of the present invention has been described in this embodiment. In other words, in this embodiment and other embodiments, various As embodiments of the invention have been described, one embodiment of the invention is not limited to a particular embodiment. For example, in one embodiment of the present invention, an oxide semiconductor film is included in a channel region. However, one aspect of the present invention is not limited to this. Therefore, one aspect of the present invention is to provide a method for manufacturing a semiconductor device using silicon, germanium, silicon germanium, silicon carbide, or the like. gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride, organic semiconductors A conductor or the like may also be used.

[0261] As described above, the structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiments. They can be used in combination.

[0262] (Embodiment 2) In this embodiment, a structure of an oxide semiconductor film included in a semiconductor device of one embodiment of the present invention will be described. First, possible structures of the oxide semiconductor film will be described below.

[0263] Oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. can be.

[0264] As a non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned C rystalline Oxide Semiconductor), polycrystalline oxide semiconductor body, nc-OS (nanocrystalline oxide semiconductor tor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous lik oxide semiconductor), and amorphous oxide semiconductor. In addition, as crystalline oxide semiconductors, single-crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, semiconductors, and microcrystalline oxide semiconductors.

[0265] From another point of view, oxide semiconductors are classified into amorphous oxide semiconductors and other crystalline oxides. Crystalline oxide semiconductors are divided into single-crystal oxide semiconductors, CAAC- Examples include OS, polycrystalline oxide semiconductor, and nc-OS.

[0266] The definition of an amorphous structure is generally that it is not fixed in a metastable state and is isotropic. It is known that the bond angle is flexible and the bond is short-range. This can also be described as a structure that has a high degree of order but no long-range order.

[0267] On the other hand, in the case of an essentially stable oxide semiconductor, it is possible to obtain a completely amorphous structure. It cannot be called an oxide semiconductor (isotropic amorphous). The oxide semiconductor is then oxidized to form a completely amorphous structure. However, a-like OS is a semiconductor that can be used in a microscopic area. Although it has a periodic structure, as will be described later, it is an unstable structure. It can be said that this is close to a high-quality oxide semiconductor.

[0268] In this way, amorphous oxide semiconductors, which are defined as being unstable, are, for example, Even if it can become a channel formation region for a transistor, it may not be practical for use as a product. This is also true for a-like OS. In this case, the amorphous oxide semiconductor and a-like OS components are small or absent. It is preferable.

[0269] <caac-os> CAAC-OS is an oxide having multiple crystal parts (also called pellets) aligned along the c-axis. It is one of the semiconductors. CAAC-OS is also called CANC (C-Axis Alignment It can also be called an oxide semiconductor having nanocrystals.

[0270] Transmission Electron Microscope (TEM) A combined analysis image (high resolution) of the bright-field image and diffraction pattern of CAAC-OS was obtained by using a microscope. When observing a high-resolution TEM image, multiple pellets can be confirmed. On the other hand, in high-resolution TEM images, the boundaries between pellets, i.e., grain boundaries, are clearly visible. Therefore, the CAAC-OS crystal grains are not clearly visible. It can be said that the decrease in electron mobility due to magnetic fields is unlikely to occur.

[0271] For example, as shown in FIG. 19(A), a cross section of the CAAC-OS is taken in a direction approximately parallel to the sample surface. A high-resolution TEM image of the surface is observed. The TEM image is observed using the spherical polarization corrector function. Hereafter, high-resolution TEM images using the aberration correction function will be referred to as Cs-corrected high-resolution TEM images. The Cs-corrected high-resolution TEM image can be obtained using, for example, an atomic resolution TEM (ATEM) manufactured by JEOL Ltd. This can be done using an electron microscope such as the JEM-ARM200F.

[0272] Below, we will explain the CAAC-OS observed by TEM. This shows a high-resolution TEM image of a cross section of CAAC-OS observed from a direction roughly parallel to the sample surface. For high-resolution TEM imaging, spherical aberration correction is required. High-resolution TEM image using spherical aberration correction function. This is called a Cs-corrected high-resolution TEM image. Cs-corrected high-resolution TEM images can be obtained, for example, This was performed using an atomic resolution analytical electron microscope, such as the JEM-ARM200F manufactured by JEOL Ltd. It is possible to do so.

[0273] An enlarged Cs-corrected high-resolution TEM image of area (1) in Figure 19(A) is shown in Figure 19(B). From Figure 19(B), it can be seen that the metal atoms are arranged in layers in the pellet. The arrangement of each metal atom layer is determined by the surface on which the CAAC-OS film is to be formed (also referred to as the surface on which the film is to be formed). Or it reflects the unevenness of the top surface and is parallel to the surface on which the CAAC-OS is formed or the top surface.

[0274] As shown in Figure 19(B), CAAC-OS has a characteristic atomic arrangement. ) shows the characteristic atomic arrangement with auxiliary lines. ) the size of each pellet is about 1 nm to 3 nm, and the size of each pellet is about 1 nm to 3 nm. It can be seen that the size of the gap caused by the tilt is about 0.8 nm. The pellets may also be referred to as nanocrystals (nc).

[0275] Here, from the Cs-corrected high-resolution TEM image, the pellet of CAAC-OS on the substrate 5120 is The layout of 5100 is shown diagrammatically as a structure of stacked bricks or blocks. (See Figure 19(D)). The tilt between the pellets observed in Figure 19(C) The area where this occurs corresponds to the area 5161 shown in FIG. 19(D).

[0276] In addition, FIG. 20(A) shows the C of the plane of the CAAC-OS observed from a direction approximately perpendicular to the sample surface. The s-corrected high-resolution TEM images are shown. Regions (1), (2), and (3) in Figure 20(A). ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 20(B), Fig. 20(C), and Fig. 20(D), respectively. As shown in Figure 20(D), Figure 20(B), Figure 20(C) and Figure 20(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0277] Next, C analyzed by X-ray diffraction (XRD) For example, CAAC-O with InGaZnO4 crystals When S is subjected to structural analysis using the out-of-plane method, the results are as shown in Figure 21(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. Since this is attributed to the (009) plane of the ZnO4 crystal, it is believed that the CAAC-OS crystal is c-axis oriented. It can be seen that the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface.

[0278] In addition, in the structural analysis of CAAC-OS using the out-of-plane method, 2θ is 31 In addition to the peak around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks in the vicinity indicate that some of the CAAC-OS crystals do not have a c-axis orientation. The more preferable CAAC-OS is a structure produced by the out-of-plane method. The analysis shows a peak at 2θ around 31°, but no peak at 2θ around 36°.

[0279] On the other hand, in-pla, X-rays are incident on the CAAC-OS from a direction almost perpendicular to the c-axis. When structural analysis is performed using the NE method, a peak appears at 2θ around 56°. This peak is due to I It is attributed to the (110) plane of the nGaZnO4 crystal. In the case of CAAC-OS, 2θ is set to 5 The sample is fixed at approximately 6° and analyzed while rotating around the normal vector of the sample surface (φ axis). Even if a φ scan is performed, no clear peak appears, as shown in Figure 21(B). On the other hand, in the case of a single crystal oxide semiconductor such as InGaZnO4, 2θ is fixed at around 56° and φ When scanned, it is assigned to a crystal plane equivalent to the (110) plane as shown in Figure 21(C). Six peaks are observed. Therefore, from the structural analysis using XRD, CAAC-OS It can be seen that the orientation of the a-axis and b-axis is irregular.

[0280] Next, we will explain the CAAC-OS analyzed by electron diffraction. For CAAC-OS with ZnO4 crystals, the probe diameter is 3 mm from the direction parallel to the sample surface. When an electron beam of 00 nm is incident, a diffraction pattern (selected area transmission) as shown in Figure 22(A) is generated. This diffraction pattern may show InGa The electron diffraction pattern includes spots due to the (009) plane of the ZnO4 crystal. Therefore, the pellets contained in the CAAC-OS have a c-axis orientation, and the c-axis is aligned with the surface on which the film is formed. On the other hand, for the same sample, the direction perpendicular to the sample surface The diffraction pattern when an electron beam with a probe diameter of 300 nm is incident from a certain direction is shown in Fig. 22( As shown in Figure 22(B), a ring-shaped diffraction pattern is observed. Electron diffraction also revealed that the a-axis and b-axis of the pellets contained in CAAC-OS have orientation. It can be seen that the first ring in FIG. 22(B) is made of InGaZnO4 crystals. This is thought to be due to the (010) and (100) planes of the crystal. The second ring in the figure is thought to be due to the (110) plane.

[0281] In addition, the CAAC-OS is an oxide semiconductor with a low density of defect states. Defects include, for example, defects caused by impurities and oxygen vacancies. AC-OS can also be considered an oxide semiconductor with a low impurity concentration. S can also be said to be an oxide semiconductor with few oxygen vacancies.

[0282] Impurities contained in oxide semiconductors can act as carrier traps or as carrier generation sources. In addition, oxygen vacancies in an oxide semiconductor may become carrier traps or By capturing hydrogen, it may become a carrier generation source.

[0283] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon are more oxidative than metal elements that constitute oxide semiconductors. Elements with strong bonding strength with the oxide semiconductor remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0284] In addition, oxide semiconductors with low defect state density (few oxygen vacancies) have low carrier density. Such an oxide semiconductor can be a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low density of defect states. Therefore, the oxide semiconductor is likely to be a highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor. A transistor using AC-OS has electrical characteristics in which the threshold voltage is negative (normal It is also called "on." It is rare for it to become a high-purity intrinsic or substantially high-purity intrinsic Oxide semiconductors have few carrier traps. The charge that is trapped takes a long time to be released and behaves like a fixed charge. Therefore, transistors using oxide semiconductors with high impurity concentrations and high defect state densities are being developed. On the other hand, transistors using CAAC-OS can have unstable electrical characteristics. The resulting transistor has little fluctuation in electrical characteristics and is highly reliable.

[0285] In addition, because the defect density of CAAC-OS is low, the electrons are trapped in the defect states by light irradiation. Therefore, the transistor using CAAC-OS can The electrical characteristics do not change much when exposed to light or ultraviolet light.

[0286] <nc-os> In the high-resolution TEM image, nc-OS has two distinct regions: one where crystals can be confirmed and the other where clear crystals can be confirmed. The crystalline part contained in nc-OS is , often between 1 nm and 100 nm, or between 1 nm and 10 nm. In particular, nanocrystals, which are microcrystals of 1 nm to 10 nm or 1 nm to 3 nm. An oxide semiconductor having the above structure is called an nc-OS. In EM images, the grain boundaries may not be clearly visible. Therefore, we will consider the origin of the pellets in the nc-OS. The crystalline part is sometimes called a pellet.

[0287] nc-OS is a material that can be used in microscopic areas (e.g., areas between 1 nm and 10 nm, especially areas between 1 nm and 10 nm). The atomic arrangement is periodic in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD apparatus using an X-ray beam with a diameter larger than that of the pellet is used for nc-OS. When structural analysis is performed using the out-of-plane method, the crystal plane is shown. In addition, the probe diameter ( For example, electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 50 nm or more. On the other hand, for nc-OS, a halo-like diffraction pattern is observed. Nanobeam electron circuits use electron beams with a probe diameter close to the pellet size or smaller than the pellet. When the nc-OS is subjected to nanobeam electron diffraction, spots are observed. When the light is too bright, a circular (ring-shaped) area of ​​high brightness may be observed. Multiple spots may be observed within a ring-like region.

[0288] In this way, the crystal orientation between the pellets (nanocrystals) is not regular, so nc -OS with RANC (Random Aligned nanocrystals) oxide semiconductors, or NANCs (Non-Aligned Nanocrystals) The semiconductor may also be referred to as an oxide semiconductor having a structure (s).

[0289] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. However, the density of defect states in nc-OS is lower than that in amorphous oxide semiconductors. There is no regularity in the crystal orientation between different pellets in S. Therefore, nc-OS is The defect density is higher than that of AAC-OS.

[0290] <Amorphous oxide semiconductor> Amorphous oxide semiconductors are oxides in which the atomic arrangement within the film is irregular and does not have crystalline parts. An example is an oxide semiconductor that has an amorphous state, such as quartz.

[0291] In amorphous oxide semiconductors, no crystalline parts can be observed in high-resolution TEM images.

[0292] When structural analysis is performed on amorphous oxide semiconductors using an XRD device, out-of-p In the analysis by the Lane method, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductor, a halo pattern is observed. When nanobeam electron diffraction is performed on the specimen, no spots are observed, but a halo pattern is observed. will be done.

[0293] There are various views on amorphous structures. For example, A structure that does not have this property is called a completely amorphous structure. It is sometimes called a structure. It does not have long-range order, but is formed by the most recent A structure that may have order in the range of the nearest neighboring atom or the second nearest neighboring atom is called an amorphous structure. Therefore, according to the strictest definition, there is a small degree of order in the atomic arrangement. An oxide semiconductor having at least An oxide semiconductor having long-range order cannot be called an amorphous oxide semiconductor. Since the CAAC-OS and nc-OS have crystalline portions, for example, they are called amorphous oxides. It cannot be called a semiconductor or a completely amorphous oxide semiconductor.

[0294] <a-like OS> In a-like OS, voids (also called voids) are observed in high-resolution TEM images. In addition, crystals can be clearly seen in high-resolution TEM images. and regions where no crystalline portions can be identified.

[0295] Because of the porosity, the a-like OS has an unstable structure. e OS has an unstable structure compared with CAAC-OS and nc-OS. This shows the structural changes caused by electron irradiation.

[0296] The samples to be irradiated with electrons were a-like OS (referred to as sample A), nc-OS ( Sample B) and CAAC-OS (referred to as sample C) are prepared. The material is also In-Ga-Zn oxide.

[0297] First, high-resolution cross-sectional TEM images of each sample are acquired. It can be seen that all the materials have crystalline parts.

[0298] The crystal part can be determined as follows. For example, the crystal part of InGaZnO4 can be determined as follows. The unit cell has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned along the c-axis. It is known that the structure is layered in the direction of the lattice. is approximately the same as the lattice spacing (also called the d value) of the (009) plane, and this is confirmed by crystal structure analysis. The value of is calculated to be 0.29 nm. Therefore, if the lattice fringe spacing is 0.28 nm or more, The area where the thickness is 0.30 nm or less can be considered as the crystalline part of InGaZnO4. The lattice fringes correspond to the ab plane of the InGaZnO4 crystal.

[0299] Figure 23 shows an example of investigating the average size of the crystal parts (22 to 45 locations) of each sample. However, the length of the lattice fringes mentioned above is the size of the crystal part. It can be seen that the crystalline part of ke OS grows in size according to the cumulative amount of electron irradiation. Specifically, as shown in Figure 23 (1), the initial TEM observation showed a size of about 1.2 nm. The crystal part, which was sized at 4.2 × 10 degrees, has a cumulative irradiation dose of 4.2 × 10 degrees. 8 e - / nm 2 In the case of 2.6 On the other hand, the nc-OS and CAAC-O S is the cumulative electron irradiation dose from the start of electron irradiation of 4.2 × 10 8 e - / nm 2 in the range up to It can be seen that there is no change in the size of the crystal part. As shown in (3), the crystal structure of nc-OS and CAAC-OS was stable regardless of the cumulative electron irradiation dose. The sizes of the particles are approximately 1.4 nm and 2.1 nm, respectively.

[0300] In this way, the growth of crystalline parts can be observed in a-like OS due to electron irradiation. On the other hand, in nc-OS and CAAC-OS, the growth of the crystals by electron irradiation is almost nonexistent. In other words, a-like OS is not seen as nc-OS and CAA. It is clear that the structure is less stable than that of C-OS.

[0301] In addition, due to its porosity, a-like OS is more flexible than nc-OS and CAAC-OS. Specifically, the density of a-like OS is lower than that of a single crystal of the same composition. The density of the nc-OS is 78.6% or more and less than 92.3% of that of the normal crystal. The density of C-OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a crystal density of less than 78%.

[0302] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single-crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 It becomes. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0 g / cm 3 More than 5.9g / cm 3 It will be less than For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] , the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 .

[0303] Note that there may be no single crystal of the same composition. In that case, by combining single crystals with different compositions in a desired ratio, the density corresponding to the single crystal in the desired composition can be estimated . The density corresponding to the single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible . As described above, the oxide semiconductor has various structures and each has various characteristics .

[0304] Note that the oxide semiconductor may be, for example, a laminated film having two or more of an amorphous oxide semiconductor, a-like OS, a microcrystalline oxide semiconductor, and CAAC-OS .

[0305] The semiconductor device according to one aspect of the present invention can be configured using an oxide semiconductor film having any of the above structures .<CAAC-OS Film Formation Method>

[0306] <00!2358>[[ID=!7]] [!END]]

[0307]

[0308]

[0309] As shown in FIG. 24, the substrate 5220 and the target 5230 are arranged to face each otherBetween the substrate 5220 and the target 5230 there is a plasma 5240. The mass 5240 contains ions 5201 formed by ionizing components of the sputtering gas.

[0309] Ions 5201 are accelerated towards target 5230. The pellet 5200, which is a pellet-shaped particle, is peeled off by impacting the At the same time, particles 5203 made of atoms that make up the target 5230 are also peeled off. The spheres 5200 and particles 5203 are charged by receiving a charge in the plasma 5240. do.

[0310] The substrate 5220 has a thin oxide film 5206 already deposited on it. When the particles 5203 reach the oxide thin film 5206, they avoid other pellets 5200. This is because the surfaces of the pellets 5200 are charged to the same polarity (negative in this case). This is due to the repulsive force caused by the substrate 5220 being heated. The deposited pellets 5200 and particles 5203 migrate on the surface of the substrate 5220. Causes a malfunction.

[0311] Therefore, the oxide thin film 5206 on the substrate 5220 and the pellet 5200 are The cross-sectional shape is as shown in (A).

[0312] The pellet 5200 has a shape obtained by cleaving the target 5230. For example, In -M-Zn oxide (M is Ti, Ga, Y, Zr, La, Ce, Nd, Sn or Hf) 25(B) and the top view shape shown in FIG. 25(C) will be obtained.

[0313] <Film formation models of CAAC-OS and nc-OS> Next, the film formation model of CAAC-OS will be described in detail.

[0314] The distance d between the substrate 5220 and the target 5230 (also referred to as the target-substrate distance (T-S distance)) is 0.01 m or more and 1 m or less, preferably 0.02 m or more and 0.5 m or less. The film formation chamber is mostly filled with a film formation gas (for example, oxygen, argon, or a mixed gas containing oxygen at a ratio of 5% by volume or more), and is controlled to be 0.01 Pa or more and 100 Pa or less, preferably 0.1 Pa or more and 10 Pa or less. Here, by applying a voltage of a certain level or more to the target 5230, discharge starts and plasma 5240 is confirmed. In the vicinity of the target 5230, a high-density plasma region is formed by a magnetic field. In the high-density plasma region, ions 5201 are generated by ionization of the film formation gas. The ions 5201 are, for example, cations of oxygen (O + + + +

[0315]

[0316]

[0317] Although not shown in the figure, a heating mechanism may be provided below the substrate 5220.

[0315]

[0316]

[0317] Although not shown in the figure, the target 5230 is adhered to a backing plate.

[0316]

[0317] A plurality of magnets are arranged at positions facing the target 5230 through the backing plate. The sputtering method that uses the magnetic field of the magnets to increase the film formation rate is called the magnetron sputtering method.

[0316]

[0317] ) The target 5230 has a polycrystalline structure having a plurality of crystal grains, and any one of the crystal grains contains a cleavage plane.

[0316] <00024)6> <000)418>

[0317] Ions 5201 generated in the high-density plasma region are attracted to the target 5230 by the electric field. The particles are accelerated and eventually collide with the target 5230. At this time, flat or planar particles are formed from the cleavage plane. The pellet 5200, which is a pellet-shaped sputtered particle, is peeled off. The cross section of the pellet 5200 is 25(B), and the upper surface is as shown in FIG. 25(C). 0 may experience distortion in its structure due to the impact of the collision of ions 5201.

[0318] The pellet 5200 is a flat or pellet-shaped pellet having a triangular, for example, equilateral triangular, plane. Alternatively, the pellet 5200 may have a hexagonal, for example, regular hexagonal, plane. The sputtered particles are in the form of plates or pellets. However, the shape of the pellets 5200 is not limited to triangles or hexagons, for example, when it is a shape made up of multiple triangles For example, a quadrilateral (e.g., a rhombus) is formed by joining two triangles (e.g., an equilateral triangle). ) may also be used.

[0319] The thickness of the pellet 5200 is determined depending on the type of deposition gas. 5200 has a thickness of 0.4 nm or more and 1 nm or less, preferably 0.6 nm or more and 0.8 nm or less. For example, the pellet 5200 has a width of 1 nm or more and 3 nm or less, preferably The thickness shall be between 1.2 nm and 2.5 nm.

[0320] As the pellet 5200 passes through the plasma 5240, its surface becomes negatively or positively charged. For example, when the pellet 5200 is in the plasma 5240, 2- from As a result, the oxygen atoms on the surface of the pellet 5200 become negatively charged. Also, when the pellet 5200 passes through the plasma 5240, The growth occurs when the element M combines with indium, zinc, or oxygen in Zuma 5240. There is a match.

[0321] The pellets 5200 and particles 5203 that have passed through the plasma 5240 are Some of the particles 5203 are small in mass and can be removed by a vacuum pump or other device. It may be discharged to the outside.

[0322] Also, when the particles 5203 have filled the gaps between the pellets 5200, they The CAAC-OS initially has a nanocrystalline structure. The CAAC-OS film formation model has a substrate 522 On the substrate 0, multiple nanocrystalline pellets 5200 are laterally bonded to form a first layer. Then, a new pellet 5200 is deposited on the first layer, forming a second layer. Furthermore, by repeating this process, a structure having multiple laminated layers is formed.

[0323] The deposition pattern of the pellets 5200 also changes depending on the surface temperature of the substrate 5220. For example, if the surface temperature of the substrate 5220 is high, the pellet 5200 may be heated to the surface of the substrate 5220. As a result, pellet 5200 and another pellet 5200 However, the proportion of connections not via particle 5203 increases, resulting in highly oriented CAAC-OS. The surface temperature of the substrate 5220 during the CAAC-OS film formation is 100° C. or higher and 500° C. or lower. ° C. or less, preferably 140° C. or more and less than 450° C., and more preferably 170° C. or more and 400° C. Therefore, when a large-area substrate of the 8th generation or later is used as the substrate 5220, It can be seen that there is almost no warping or the like.

[0324] On the other hand, when the surface temperature of the substrate 5220 is low, the pellet 5200 moves to the surface of the substrate 5220. As a result, pellets 5200 do not pile up. In the case of nc-OS, the pellet 520 0 is negatively charged, the pellets 5200 may be deposited at equal distances. Therefore, although the orientation is low, the presence of a slight regularity makes it possible to form an amorphous oxide semiconductor. It has a denser structure than the body.

[0325] In addition, the gaps between the pellets become extremely small, forming one large pellet. The inside of one large pellet has a single crystal structure. For example, The size of the particles is 10 nm or more and 200 nm or less, 15 nm or more and 100 nm or less when viewed from the top. Alternatively, it may be 20 nm or more and 50 nm or less.

[0326] According to the above-described film formation model, the pellets 5200 are deposited on the surface of the substrate 5220. It is considered that the CAAC-OS film can be formed even when the surface on which the film is formed does not have a crystalline structure. This indicates that the growth mechanism is different from epitaxial growth. In addition, CAAC-OS and nc-OS can be deposited uniformly even on large glass substrates. For example, if the structure of the surface (surface to be formed) of the substrate 5220 is an amorphous structure (for example, non-crystalline), It is possible to form a CAAC-OS film even on a silicon dioxide (crystalline silicon dioxide).

[0327] In addition, even if the surface of the substrate 5220 on which the film is to be formed is uneven, the film is formed along the shape of the uneven surface. It can be seen that let 5200 is arranged.

[0328] The film formation model shown above allows for highly crystalline films to be formed even on a surface with an amorphous structure. Therefore, a CAAC-OS having the desired properties can be obtained.

[0329] As described above, the structures and methods described in this embodiment mode may be appropriately combined with the structures and methods described in other embodiments. They can be used in combination.

[0330] (Embodiment 3) In this embodiment, a display device including a semiconductor device of one embodiment of the present invention will be described with reference to FIG. This will be used to explain.

[0331] <Explanation about the display device> The display device shown in FIG. 27A has a region having pixels of a display element (hereinafter referred to as a pixel portion 502). ) and a circuit section ( hereinafter referred to as a drive circuit section 504), and a circuit having a function of protecting the element (hereinafter referred to as a protection circuit 50 6) and a terminal portion 507. Note that the protection circuit 506 is not provided. That's fine.

[0332] A part or the whole of the driver circuit portion 504 is formed on the same substrate as the pixel portion 502. This makes it possible to reduce the number of parts and terminals. When a part or all of the pixel portion 502 is not formed on the same substrate, the driving circuit A part or the whole of the path portion 504 is COG or TAB (Tape Automated Bearing). It can be implemented by

[0333] The pixel section 502 is arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The display device has a circuit for driving a plurality of display elements (hereinafter referred to as pixel circuit 501), The path section 504 is a circuit (hereinafter referred to as a gate driver) that outputs a signal (scanning signal) for selecting a pixel. 504a), for supplying signals (data signals) for driving the display elements of the pixels. The source driver 504b includes a driving circuit such as the circuit (hereinafter referred to as a source driver 504b).

[0334] The gate driver 504a includes a shift register and the like. A signal for driving the shift register is inputted through the terminal section 507, and a signal for outputting the shift register is outputted. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc. The gate driver 504a receives a scanning signal and outputs a pulse signal. The gate has a function of controlling the potential of the scanning lines GL_1 to GL_X. A plurality of drivers 504a are provided, and the plurality of gate drivers 504a drive the scanning lines GL_1 to Alternatively, the gate driver 504a may control the GL_X by dividing it into the initialization signal However, the gate driver 50 has a function of supplying 4a may also provide other signals.

[0335] The source driver 504b includes a shift register and the like. Through the terminal section 507, signals for driving the shift register as well as the source of the data signal are transmitted. The source driver 504b receives a signal (image signal) that is to be output from the pixel circuit The source driver 504b has a function of generating a data signal to be written to the source driver 501. A data signal is generated in accordance with a pulse signal obtained by inputting a start pulse, a clock signal, etc. The source driver 504b has a function of controlling the output of a data signal. The data lines DL_1 to DL_Y are connected to the data lines DL_2 through DL_Y. Alternatively, the source driver 504b may have a function of supplying an initialization signal. However, the present invention is not limited to this, and the source driver 504b may also supply other signals. It is possible.

[0336] The source driver 504b is configured using, for example, a plurality of analog switches. The source driver 504b sequentially turns on a plurality of analog switches, The image signal can be time-divided and output as a data signal. The source driver 504b may be configured using the same.

[0337] Each of the plurality of pixel circuits 501 is connected to one of the plurality of scanning lines GL to which a scanning signal is applied. A pulse signal is input via the data line DL, and a data signal is given via one of the data lines DL. Each of the pixel circuits 501 is connected to a gate driver 504a controls writing and holding of data of the data signal. The second pixel circuit 501 is connected to a gate driver GL_m (where m is a natural number equal to or less than X) via a scanning line GL_m. A pulse signal is input from 504a, and the data line DL_n ( A data signal is input from the source driver 504b via the input terminal 504a (n is a natural number equal to or less than Y).

[0338] The protection circuit 506 shown in FIG. 27(A) is, for example, a gate driver 504a and a pixel circuit 5 01. Alternatively, the protection circuit 506 is connected to the scanning line GL, which is the wiring between the source driver The data line DL is connected between the driver 504b and the pixel circuit 501. The protection circuit 506 can be connected to the wiring between the gate driver 504a and the terminal section 507. Alternatively, the protection circuit 506 may be formed by wiring between the source driver 504b and the terminal section 507. The terminal section 507 can be connected to a power supply and a line from an external circuit to the display device. This refers to the part where terminals for inputting control signals and image signals are provided.

[0339] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit 506 This is a circuit that brings one wire into electrical continuity with another wire.

[0340] As shown in FIG. 27A, a pixel section 502 and a driver circuit section 504 are provided with a protection circuit 50. 6, ESD (Electro Static Discharge: This can improve the resistance of the display device to overcurrents caused by electrostatic discharges and the like. However, the configuration of the protection circuit 506 is not limited to this. For example, A configuration in which a protection circuit 506 is connected, or a configuration in which the protection circuit 506 is connected to the source driver 504b Alternatively, a configuration in which a protection circuit 506 is connected to the terminal portion 507 may be used. It can also be done as follows.

[0341] In FIG. 27(A), the gate driver 504a and the source driver 504b Therefore, although an example in which the driver circuit portion 504 is formed is shown, the present invention is not limited to this configuration. For example, only the gate driver 504a is formed, and a separately prepared source driver circuit is formed. A substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) is implemented. It may also be configured to be equipped with

[0342] Furthermore, the plurality of pixel circuits 501 shown in FIG. 27(A) may be, for example, a configuration shown in FIG. 27(B). It can be said that:

[0343] The pixel circuit 501 shown in FIG. 27B includes a liquid crystal element 570, a transistor 550, and a capacitor. The transistor 550 may be any of the transistors described in the previous embodiments. can be applied.

[0344] The potential of one of the pair of electrodes of the liquid crystal element 570 is set appropriately according to the specifications of the pixel circuit 501. The orientation state of the liquid crystal element 570 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 570 included in each of the pixel circuits 501. A common potential may be applied to the pair of liquid crystal elements 570 of the pixel circuits 501 in each row. One of the electrodes may be given a different potential.

[0345] For example, a method for driving a display device having the liquid crystal element 570 is to use a TN (Twisted Nematic) Nematic mode, STN (Super-Twisted Nematic) mode Mode, VA (Vertical Alignment) mode, MVA (Multi-D Main Vertical Alignment mode, PVA (Pattern ed Vertical Alignment) mode, IPS (In-Plane-S witching) mode, FFS(Fringe Field Switching) mode, ASM (Axially Symmetric Aligned Micro- cell) mode, OCB (Optically Compensated Biref ringence mode, FLC (Ferroelectric Liquid Cr ystal) mode, AFLC(AntiFerroelectric Liquid Crystal) mode or TBA (Transverse Bend Align) ment) mode may also be used.

[0346] In addition to the above-mentioned driving method, the display device can also be driven by an ECB (Electro Cally Controlled Birefringence mode, PDLC ( Polymer Dispersed Liquid Crystal (PNL) mode C (Polymer Network Liquid Crystal) mode, guest However, there are other liquid crystal elements and their driving methods, including but not limited to the above. A variety of materials can be used.

[0347] In the pixel circuit 501 in the mth row and the nth column, the source electrode or the drain electrode of the transistor 550 One of the electrodes is electrically connected to the data line DL_n, and the other is connected to a pair of electrodes of the liquid crystal element 570. The gate electrode of the transistor 550 is electrically connected to the other of the electrodes of the scan line G. L_m. The transistor 550 can be turned on or off. This provides a function of controlling the writing of data signals.

[0348] One of the pair of electrodes of the capacitor 560 is connected to a wiring to which a potential is supplied (hereinafter, a potential supply line VL ) and the other is electrically connected to the other of the pair of electrodes of the liquid crystal element 570. The value of the potential of the potential supply line VL is set appropriately according to the specifications of the pixel circuit 501. The capacitor 560 functions as a storage capacitor for storing written data.

[0349] For example, in a display device having the pixel circuit 501 of FIG. 27(B), The pixel circuits 501 in each row are sequentially selected by the gate driver 504a shown in FIG. 550 is turned on and data of the data signal is written.

[0350] The pixel circuit 501 in which data has been written is turned off by turning off the transistor 550. By repeating this process for each row, an image can be displayed.

[0351] Furthermore, the plurality of pixel circuits 501 shown in FIG. 27(A) may be, for example, a configuration shown in FIG. 27(C). It can be said that:

[0352] The pixel circuit 501 shown in FIG. 27C includes transistors 552 and 554 and a capacitor 56. 2 and a light-emitting element 572. The transistor described in the above embodiment can be applied to either or both of them.

[0353] One of the source and drain electrodes of the transistor 552 is supplied with a data signal. The transistor 5 is electrically connected to a wiring (hereinafter referred to as a data line DL_n). The gate electrode 52 is connected to a wiring (hereinafter referred to as a scanning line GL_m) to which a gate signal is applied. electrically connected.

[0354] Transistor 552 is turned on or off to transfer the data of the data signal. It has the function of controlling the writing of data.

[0355] One of the pair of electrodes of the capacitor 562 is connected to a wiring to which a potential is applied (hereinafter, a potential supply line VL _a), and the other is electrically connected to the source electrode and drain electrode of the transistor 552. The second electrode is electrically connected to the other of the first and second electrodes.

[0356] The capacitor 562 functions as a storage capacitor for holding written data.

[0357] One of the source electrode and the drain electrode of the transistor 554 is connected to the potential supply line VL_a. Furthermore, the gate electrode of transistor 554 is electrically connected to the It is electrically connected to the other of the source electrode and the drain electrode.

[0358] One of the anode and cathode of the light emitting element 572 is electrically connected to the potential supply line VL_b. The other is electrically connected to the other of the source electrode and drain electrode of the transistor 554. will be done.

[0359] The light emitting element 572 may be, for example, an organic electroluminescence element (also known as an organic EL element). However, the light emitting element 572 is not limited to this. Alternatively, an inorganic EL element made of an inorganic material may be used.

[0360] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. and the other is supplied with a low power supply potential VSS.

[0361] In a display device having the pixel circuit 501 of FIG. 27(C), for example, The pixel circuits 501 in each row are sequentially selected by the gate driver 504a, and the transistors 552 are turned on. The data signal is written by turning it on.

[0362] The pixel circuit 501 to which the data has been written is turned off by turning off the transistor 552. Furthermore, the transistor 554 is held in a holding state in response to the potential of the written data signal. The amount of current flowing between the source electrode and the drain electrode is controlled, and the light emitting element 572 The light is emitted at a brightness that corresponds to the flow rate. By repeating this process row by row, an image can be displayed.

[0363] In this embodiment, the display device includes a liquid crystal element 570 and a light-emitting element. Although the configuration having the element 572 has been illustrated, the display device is not limited to this, and various elements may be used. may have

[0364] The display device may be, for example, a liquid crystal element, an EL element (EL element including organic and inorganic materials, Organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) D, etc.), transistors (transistors that emit light according to the current), electron emitters, electron inductors ink, electrophoretic element, grating light valve (GLV), plasma display ( PDP), display elements using MEMS (microelectromechanical systems) , Digital Micromirror Device (DMD), DMS (Digital Micro Shutter MIRASOL (registered trademark), IMOD (Interference Modulation shutter-type MEMS display elements, optical interference-type MEMS display elements, Using trowetting elements, piezoelectric ceramic displays, and carbon nanotubes In addition to these, it has at least one of an electric or magnetic action. The display medium may have a contrast, brightness, reflectance, transmittance, etc. that change depending on the An example of a display device using electron-emitting elements is a field emission display. FED or SED type flat panel display (SED: Surface-conductive ction Electron-emitter Display). An example of a display device using a device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, Transmissive LCD, Reflective LCD, Direct-view LCD, Projection LCD Examples of display devices using electronic ink or electrophoretic elements include Examples include electronic paper. Semi-transmissive LCD displays and reflective LCD displays are also available. In order to realize the above, a part or all of the pixel electrodes should have a function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. Furthermore, in this case, a memory such as an SRAM may be provided under the reflective electrode. It is also possible to provide a circuit, which can further reduce power consumption. .

[0365] The display method of the display device of this embodiment may be a progressive method or an interleave method. In addition, when displaying color, the color elements controlled by the pixels can be The color is not limited to the three colors of RGB (R stands for red, G stands for green, and B stands for blue). For example, It may be composed of four pixels: a pixel of color 1, a pixel of color 2, a pixel of color 3, and a pixel of color 4 (white). Like a tile array, two colors of RGB make up one color element, and different colors are created by the color element. Alternatively, yellow, cyan, magenta, etc. may be added to RGB. One or more colors may be added. The size of the display area for each dot of the color element is different. However, the disclosed invention is not limited to color display devices, and may be applied to The present invention can also be applied to a display device for displaying a monochrome image.

[0366] Also, backlights for display devices (organic EL elements, inorganic EL elements, LEDs, fluorescent lights, etc.) A white light (W) may be provided in the display device. Also, a colored layer (also called a color filter) may be provided in the display device. As the colored layer, for example, red (R), green (G), blue (B) ), yellow (Y), etc. can be used in combination as appropriate. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a colored layer and a region not having a colored layer, The white light in the region may be directly used for display. By placing the color layer in the display, the decrease in brightness caused by the color layer can be reduced during bright display, and power consumption can be reduced by 2. However, it may be possible to reduce the emission by approximately 100% to 30%. When using optical elements to display full color, R, G, B, Y, and white (W) are By using a self-luminous element, the color layer can be In some cases, power consumption can be further reduced compared to when using a conventional method.

[0367] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0368] (Fourth embodiment) In this embodiment, a display device including a semiconductor device according to one embodiment of the present invention and a display device including the semiconductor device will be described. An electronic device having an input device attached thereto will be described with reference to FIGS.

[0369] <Touch panel explanation> In the present embodiment, an example of an electronic device is a device that combines a display device and an input device. The touch panel 2000 will be described. The case where the .

[0370] 28(A) and (B) are perspective views of the touch panel 2000. In B), representative components of touch panel 2000 are shown for clarity.

[0371] The touch panel 2000 includes a display device 2501 and a touch sensor 2595 (see FIG. 2). 8(B)). The touch panel 2000 also includes a substrate 2510, a substrate 2570, and a substrate The substrate 2510, the substrate 2570, and the substrate 2590 are all However, any one of the substrates 2510, 2570, and 2590 is flexible. Alternatively, one or all of the components may be configured to be non-flexible.

[0372] The display device 2501 has a plurality of pixels on a substrate 2510 and a display device that can supply signals to the pixels. The plurality of wirings 2511 are arranged around the periphery of the substrate 2510. The wire is routed through a cable, part of which forms the terminal 2519. The terminal 2519 is an FPC2509 (1) and electrically connect.

[0373] The substrate 2590 is electrically connected to the touch sensor 2595. The plurality of wirings 2598 are routed around the periphery of the substrate 2590. The terminal is electrically connected to the FPC2509(2). In FIG. 28(B), for clarity, the back side of the substrate 2590 (substrate 2510 The electrodes and wiring of the touch sensor 2595 provided on the surface opposite to the touch sensor 2595 are shown by solid lines. .

[0374] As the touch sensor 2595, for example, a capacitance type touch sensor can be applied. The capacitive type includes a surface type electrostatic capacitance type and a projected type electrostatic capacitance type.

[0375] The projected capacitive type is mainly divided into self-capacitance type and mutual capacitance type, which differ mainly in the driving method. The mutual capacitance method is preferable because it allows simultaneous multi-point detection.

[0376] The touch sensor 2595 shown in FIG. 28(B) is a projected capacitive touch sensor. This is a configuration in which the

[0377] The touch sensor 2595 can detect the proximity or contact of a detection object such as a finger. Various sensors can be applied.

[0378] The projected capacitive touch sensor 2595 has an electrode 2591 and an electrode 2592. The electrode 2591 is electrically connected to one of the plurality of wirings 2598, and the electrode 2592 is It is electrically connected to any other of the plurality of wirings 2598.

[0379] As shown in FIGS. 28(A) and 28(B), the electrodes 2592 are made of a plurality of electrodes repeatedly arranged in one direction. The shape is such that the quadrilaterals are connected at their corners.

[0380] The electrode 2591 is quadrilateral and is repeated in a direction intersecting the direction in which the electrode 2592 extends. are placed.

[0381] The wiring 2594 is electrically connected to the two electrodes 2591 that sandwich the electrode 2592. In this case, it is preferable that the area of ​​the intersection between the electrode 2592 and the wiring 2594 is as small as possible. This reduces the area where no electrodes are provided, reducing variations in transmittance. As a result, the variation in brightness of light passing through the touch sensor 2595 can be reduced. can be done.

[0382] The shapes of the electrodes 2591 and 2592 are not limited to this, and may take various shapes. For example, multiple electrodes 2591 are arranged with as few gaps as possible, and A plurality of electrodes 2592 are provided at intervals so that there is an area where they do not overlap with the electrodes 2591. In this case, a contact between two adjacent electrodes 2592 may be provided. Providing an insulated dummy electrode is preferable because it can reduce the area of ​​the region with different transmittance. .

[0383] The conductive films such as the electrodes 2591, 2592, and wiring 2598, that is, the touch panel Materials that can be used for the wiring and electrodes that make up the filter include indium oxide, tin oxide, and oxide. Examples of the transparent conductive film include a transparent conductive film containing zinc oxide (e.g., ITO). As a material that can be used for the wiring and electrodes that constitute the device, for example, a material with a low resistance value is preferred. Examples include silver, copper, aluminum, carbon nanotubes, graphene, and halogens. Metal halide (such as silver halide) may also be used. Even if metal nanowires (several nanometers in diameter) are used, which are composed of multiple conductors, Alternatively, a metal mesh made of a conductor may be used. Nanowires, Cu nanowires, Al nanowires, Ag mesh, Cu mesh, Al plated For example, Ag nanowires may be used for the wiring and electrodes that make up the touch panel. When using a material with a visible light transmittance of 89% or more and a sheet resistance of 40 Ω / cm 2 End 100Ω / cm 2 The wiring constituting the touch panel can be as follows. Examples of materials that can be used for electrodes include metal nanowires, metal meshes, and carbon nanotubes. Nanotubes and graphene have high transmittance in visible light, so they are used in display elements. Alternatively, the electrode may be used as a pixel electrode or a common electrode.

[0384] <Explanation about the display device> Next, the display device 2501 will be described in detail with reference to Figures 29(A) and 29(B). 9(A) and 9(B) correspond to cross-sectional views taken along the dashed dotted line X1-X2 shown in FIG. 28(B).

[0385] The display device 2501 has a plurality of pixels arranged in a matrix. and a pixel circuit for driving the display element.

[0386] <Configuration using EL elements as display elements> First, a configuration using an EL element as a display element will be described below with reference to FIG. 29(A). In the following description, the case where an EL element that emits white light is applied will be described. However, the EL element is not limited to this. For example, EL elements having different emission colors may be applied so that the colors of the light emitted from the EL elements are different.

[0387] The substrate 2510 and the substrate 2570 are, for example, made of a material having a water vapor permeability of 10 -5 g / (m 2 ·day) or less, preferably 10 -6 g / (m 2 · Flexibility of less than 1 day Alternatively, the thermal expansion coefficient of the substrate 2510 and the thermal expansion coefficient of the substrate 2570 can be adjusted. It is preferable to use a material with a thermal expansion coefficient that is approximately equal to the coefficient of linear expansion of the material. For example, a material with a linear expansion coefficient of 1×10 - 3 / K or less, preferably 5×10 -5 / K or less, more preferably 1×10 -5 / K or less Certain materials may be used advantageously.

[0388] The substrate 2510 is made of an insulating layer 2510a that prevents impurities from diffusing into the EL element, and a flexible The substrate 2510b and the adhesive layer 2 that bonds the insulating layer 2510a and the flexible substrate 2510b together. The substrate 2570 is a laminate having a layer 510c and a layer 510d. and a flexible substrate 2570b. 2570b and an adhesive layer 2570c that bonds them together.

[0389] The adhesive layer 2510c and the adhesive layer 2570c may be made of, for example, polyester or polyolefin. Polyimide, polycarbonate, polyurethane Materials that can be used include tungsten, acrylics, and epoxies.

[0390] In addition, a sealing layer 2560 is provided between the substrate 2510 and the substrate 2570. It is preferable that the refractive index of the sealing material is larger than that of air. When light is extracted to the layer 2560 side, the sealing layer 2560 can also serve as an optical element.

[0391] A sealant may be formed on the outer periphery of the sealing layer 2560. As a result, the area surrounded by the substrate 2510, the substrate 2570, the sealing layer 2560, and the sealant The sealing layer 2560 may have an EL element 2550. It may be filled with an inert gas (nitrogen, argon, etc.). Also, a desiccant may be placed in the inert gas. The sealing material may be, for example, It is preferable to use epoxy resin or glass frit. It is preferable to use a material that is impermeable to moisture and oxygen.

[0392] The display device 2501 shown in FIG. 29(A) includes a pixel 2505. 505 is a light emitting module 2580, an EL element 2550, and a and a transistor 2502t that can supply a 2t functions as a part of the pixel circuit.

[0393] The light emitting module 2580 also includes an EL element 2550 and a colored layer 2567 . The EL element 2550 has a lower electrode, an upper electrode, and an EL element between the lower electrode and the upper electrode. The layer.

[0394] Furthermore, when the sealing layer 2560 is provided on the side from which light is extracted, the sealing layer 2560 has a property of E The L element 2550 and the colored layer 2567 are in contact with each other.

[0395] The colored layer 2567 is located so as to overlap the EL element 2550. A part of the light emitted by 50 passes through the colored layer 2567 and travels to the light emitting module in the direction of the arrow shown in the figure. It is ejected outside of Rule 2580.

[0396] The display device 2501 is also provided with a light-shielding layer 2568 in the light-emitting direction. Layer 2568 is provided to surround colored layer 2567 .

[0397] The colored layer 2567 may have a function of transmitting light in a specific wavelength band. For example, For example, a color filter that transmits light in the red wavelength band, a color filter that transmits light in the green wavelength band, a color filter that transmits light in the blue wavelength band, a color filter that transmits light in the yellow wavelength band, Each color filter can be made of various materials. In this regard, printing methods, inkjet methods, etching methods using photolithography technology, etc. It can be formed by

[0398] The display device 2501 is also provided with an insulating layer 2521. The insulating layer 2521 covers the resistor 2502t and other components. In addition, the insulating layer 2521 has a function of suppressing impurity diffusion. This prevents the reliability of the transistor 2502t and the like from being reduced due to the diffusion of impurities. can be suppressed.

[0399] The EL element 2550 is formed above the insulating layer 2521. The lower electrode of 50 is provided with a partition wall 2528 that overlaps the edge of the lower electrode. A spacer for controlling the distance between the substrate 2510 and the substrate 2570 is formed on the partition wall 2528. You may do so.

[0400] The scan line driver circuit 2504 includes a transistor 2503t, a capacitor 2503c, and The driver circuit and the pixel circuit can be formed on the same substrate in the same process. .

[0401] Moreover, wiring 2511 capable of supplying signals is provided on the substrate 2510 . A terminal 2519 is provided on the wiring 2511. The terminal 2519 is also provided with an FP C2509(1) is electrically connected. FPC2509(1) also transmits video signals, It has the function of supplying clock signals, start signals, reset signals, etc. 509(1) may have a printed wiring board (PWB) attached.

[0402] Note that either one or both of the transistor 2502t and the transistor 2503t The transistor described in the above embodiment may be applied to the transistor. The transistor has a highly purified oxide semiconductor film in which the formation of oxygen vacancies is suppressed. Therefore, the current value in the off state (off current value) can be reduced. This allows for a longer retention time for electrical signals such as This allows the frequency of refresh operations to be reduced, resulting in reduced power consumption. In addition, the transistor used in this embodiment has an effect of suppressing a relatively high electric field. Since effective mobility can be obtained, high speed driving is possible. For example, By using such a transistor in the display device 2501, the switching transistor of the pixel circuit The capacitor and the driver transistor used in the drive circuit can be formed on the same substrate. That is, a semiconductor device formed from a silicon wafer or the like is used as a separate driving circuit. Since there is no need for a pixel circuit, the number of components in the semiconductor device can be reduced. However, by using transistors that can be driven at high speed, high-quality images can be provided. Cut.

[0403] <Configuration using liquid crystal elements as display elements> Next, a configuration using a liquid crystal element as a display element will be explained below with reference to FIG. 29(B). In the following description, a reflective liquid crystal display device that displays by reflecting external light will be described. However, the liquid crystal display device is not limited to this. For example, a light source (backlight , side light, etc.) to make a transmissive liquid crystal display device, or a combination of reflective and transmissive functions. The liquid crystal display device may also have such a function.

[0404] The display device 2501 shown in FIG. 29(B) has the following features in common with the display device 2501 shown in FIG. 29(A). The other configurations are the same as those of the display device 2501 shown in FIG. is.

[0405] A pixel 2505 of a display device 2501 shown in FIG. 29(B) includes a liquid crystal element 2551 and a liquid crystal element and a transistor 2502t capable of supplying power to the transistor 2551.

[0406] The liquid crystal element 2551 has a lower electrode (also called a pixel electrode), an upper electrode, and a and an upper electrode, and a liquid crystal layer 2529 between the lower electrode and the upper electrode. The orientation state of the liquid crystal layer 2529 can be changed by applying a voltage between the electrodes. In addition, a spacer 2530a and a spacer 2530b are provided in the liquid crystal layer 2529. Although not shown in FIG. 29(B), the liquid crystal layer 25 of the upper electrode and the lower electrode An alignment film may be provided on each side in contact with 29.

[0407] The liquid crystal layer 2529 may be a thermotropic liquid crystal, a low molecular weight liquid crystal, a high molecular weight liquid crystal, a high molecular weight liquid crystal, or a high molecular weight liquid crystal. The liquid crystal material can be a dispersion liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. Depending on the conditions, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. In addition, when a liquid crystal display device employs a horizontal electric field method, an alignment film When a liquid crystal exhibiting a blue phase is used, the alignment Since there is no need to provide a film, rubbing treatment is not required. It is possible to prevent electrostatic breakdown caused during the rubbing process, and the liquid crystal display during the manufacturing process This can reduce malfunctions and damage to display devices.

[0408] The spacers 2530a and 2530b are obtained by selectively etching the insulating film. The spacers 2530a and 2530b are spaced apart by a distance between the substrate 2510 and the substrate 2570. The spacers 2530a and 2530b are provided to control the cell gap. The sizes of the particles may be different from each other, and it is preferable that the particles are provided in a columnar or spherical shape. In 29(B), the spacers 2530a and 2530b are provided on the substrate 2570 side. However, the present invention is not limited to this configuration, and the substrate 2510 may be provided thereon.

[0409] The upper electrode of the liquid crystal element 2551 is provided on the substrate 2570 side. An insulating layer 2531 is provided between the electrode and the colored layer 2567 and the light-shielding layer 2568. The edge layer 2531 has the function of flattening the unevenness caused by the colored layer 2567 and the light-shielding layer 2568. The insulating layer 2531 may be, for example, an organic resin film. The lower electrode 2551 functions as a reflective electrode. 501 is a reflection type display that uses external light and reflects it at the lower electrode to display it through the colored layer 2567. In the case of a transmission type liquid crystal display device, a transparent electrode is used as the lower electrode. All that is needed is to give it a function as a pole.

[0410] The display device 2501 shown in FIG. 29(B) also includes an insulating layer 2522. The insulating layer 2522 covers the transistor 2502t and the like. and forming unevenness on the lower electrode of the liquid crystal element. This makes it possible to form irregularities on the surface of the lower electrode. When light is incident on the lower electrode, it becomes possible for the light to be diffusely reflected on the surface of the lower electrode. In the case of a transmission type liquid crystal display device, the above-mentioned unevenness can be provided. It may also be configured so that this is not the case.

[0411] <Explanation about touch sensors> Next, the touch sensor 2595 will be described in detail with reference to FIG. 28(B) along the dashed line X3-X4.

[0412] The touch sensor 2595 includes electrodes 2591 and 2592 arranged in a staggered pattern on a substrate 2590. 2592, an insulating layer 2593 covering the electrodes 2591 and 2592, and the adjacent electrodes 25 91 and a wiring 2594 that electrically connects them.

[0413] The electrode 2591 and the electrode 2592 are formed using a light-transmitting conductive material. Examples of conductive materials having the formula include indium oxide, indium tin oxide, and indium zinc oxide. Conductive oxides such as zinc oxide, zinc oxide, and zinc oxide doped with gallium can be used. A film containing graphene may also be used. The film containing graphene may be, for example, a film-like The graphene oxide film can be formed by reducing the graphene oxide film formed on the substrate. For example, a method of applying heat can be mentioned.

[0414] For example, a film of a light-transmitting conductive material is formed on the substrate 2590 by sputtering. After that, various patterning techniques such as photolithography are used to remove unnecessary parts. , an electrode 2591 and an electrode 2592 can be formed.

[0415] The insulating layer 2593 may be made of a resin such as acrylic or epoxy. In addition to resins with siloxane bonds, silicon oxide, silicon oxynitride, aluminum oxide, Inorganic insulating materials such as rubber can also be used.

[0416] An opening reaching the electrode 2591 is provided in the insulating layer 2593, and a wiring 2594 is adjacent to the opening. The transparent conductive material is used to increase the aperture ratio of the touch panel. Therefore, it can be suitably used for the wiring 2594. A material having higher conductivity than the electrode 2592 is preferable for the wiring 2594 because it can reduce electrical resistance. It can be used appropriately.

[0417] The electrodes 2592 extend in one direction, and a plurality of electrodes 2592 are provided in a stripe pattern. Moreover, the wiring 2594 is provided so as to intersect with the electrode 2592.

[0418] A pair of electrodes 2591 is provided with one electrode 2592 sandwiched therebetween. A pair of electrodes 2591 are electrically connected.

[0419] The plurality of electrodes 2591 are arranged in a direction that is not necessarily perpendicular to one electrode 2592. The angle does not have to be 0 degrees, and may be greater than 0 degrees but less than 90 degrees.

[0420] The wiring 2598 is electrically connected to the electrode 2591 or the electrode 2592. A part of the wiring 2598 functions as a terminal. The wiring 2598 is made of, for example, aluminum. Aluminum, gold, platinum, silver, nickel, titanium, tungsten, chromium, molybdenum, iron, Use of metal materials such as ballast, copper, or palladium, or alloy materials containing such metal materials. can be done.

[0421] An insulating layer covering the insulating layer 2593 and the wiring 2594 is provided, and the touch sensor 2595 may be protected.

[0422] The connection layer 2599 electrically connects the wiring 2598 and the FPC 2509(2). .

[0423] The connection layer 2599 is made of an anisotropic conductive film (ACF). conductive film) and anisotropic conductive paste (ACP) Conductive Paste) can be used.

[0424] <Touch panel explanation> Next, details of the touch panel 2000 will be described with reference to FIG. (A) corresponds to a cross-sectional view taken along the dashed dotted line X5-X6 shown in FIG. 28(A).

[0425] The touch panel 2000 shown in FIG. 31(A) is the same as the display device 250 described in FIG. 29(A). 1 and the touch sensor 2595 described in FIG. 30 are bonded together.

[0426] The touch panel 2000 shown in FIG. 31(A) has the same configuration as that described in FIG. 29(A). , an adhesive layer 2597 and an anti-reflective layer 2569 .

[0427] The adhesive layer 2597 is provided in contact with the wiring 2594. The substrate 2590 is attached to the substrate 2570 so that the sensor 2595 overlaps the display device 2501. The adhesive layer 2597 is preferably transparent. The material 597 can be a thermosetting resin or an ultraviolet curing resin. For example, Acrylic resin, urethane resin, epoxy resin, or siloxane resin may be used. This can be done.

[0428] The anti-reflection layer 2569 is provided at a position overlapping the pixel. For example, a circular polarizer can be used.

[0429] Next, for a touch panel having a different configuration from that shown in FIG. 31(A), FIG. 31(B) This will be used to explain.

[0430] FIG. 31(B) is a cross-sectional view of the touch panel 2001. The panel 2001 is a touch panel 2000 shown in FIG. 31(A) and a display device 2501. The location of the touch sensor 2595 is different. Here, the different configurations are explained in detail. The description of the touch panel 2000 is cited for the parts where a similar configuration can be used.

[0431] The colored layer 2567 is located below the EL element 2550. The L element 2550 emits light to the side where the transistor 2502t is provided. As a result, a part of the light emitted by the EL element 2550 passes through the colored layer 2567 and is reflected by the light emitting element 2550 in the direction of the arrows shown in the figure. The light is emitted to the outside of the light emitting module 2580 in the direction of the mark.

[0432] The touch sensor 2595 is provided on the substrate 2510 side of the display device 2501. .

[0433] The adhesive layer 2597 is between the substrate 2510 and the substrate 2590 and is in contact with the display device 2501. Stick the Chisensor 2595 together.

[0434] As shown in FIGS. 31(A) and 31(B), the light emitted from the light emitting element is incident on the upper and lower surfaces of the substrate. The injection may be performed in either one or both directions.

[0435] <Explanation of how to drive the touch panel> Next, an example of a method for driving a touch panel will be described with reference to FIG.

[0436] FIG. 32(A) is a block diagram showing the configuration of a mutual capacitance type touch sensor. In (A), a pulse voltage output circuit 2601 and a current detection circuit 2602 are shown. In FIG. 32(A), the electrodes 2621 to which the pulse voltage is applied are designated as X1-X6, and the change in current The electrodes 2622 for detecting the change are shown as Y1-Y6, each with six wires. In addition, FIG. 32(A) shows a capacitance formed by overlapping an electrode 2621 and an electrode 2622. 2603. The electrodes 2621 and 2622 are interchangeable in function. It may be possible.

[0437] The pulse voltage output circuit 2601 is a circuit for applying pulses to the X1-X6 wirings in sequence. When a pulse voltage is applied to the wiring of X1-X6, the voltage that forms the capacitance 2603 An electric field is generated between the electrodes 2621 and 2622. The electric field generated between the electrodes is By using the change in the mutual capacitance of the capacitance 2603, the proximity of the object to be detected or A contact can be detected.

[0438] The current detection circuit 2602 detects the change in the mutual capacitance of the capacitor 2603 and the change in the wirings Y1 to Y6. This is a circuit for detecting changes in current. The wiring of Y1-Y6 detects the proximity of the object to be detected, Or, if there is no contact, the detected current value will not change, but the proximity of the object to be detected, or When the mutual capacitance decreases due to contact, a decrease in the current value is detected. The detection may be performed using an integrating circuit or the like.

[0439] Next, FIG. 32(B) shows the input voltage of the mutual capacitance type touch sensor shown in FIG. 32(A). The timing chart of the output waveform is shown in FIG. 32(B). In FIG. 32(B), when the object to be detected is not detected ( Two cases are shown: when the object is detected (touched) and when the object is not detected (touched). For the wiring of Y1-Y6, the waveform is shown as a voltage value corresponding to the detected current value. There are.

[0440] A pulse voltage is applied to the wires X1-X6 in order, and the The waveform in the Y6 wiring changes. When there is no proximity or contact of the object to be detected, X1-X6 The waveforms of Y1-Y6 change uniformly according to the change in the voltage of the wiring. Or, at the contact point, the current value decreases, and the corresponding voltage waveform also changes. do.

[0441] In this way, by detecting the change in mutual capacitance, the proximity or contact of the object to be detected can be detected. It is possible.

[0442] <Sensor circuit explanation> In addition, in FIG. 32(A), only a capacitor 2603 is provided at the intersection of the wiring as a touch sensor. Although the configuration of a passive touch sensor has been shown, an active touch sensor having a transistor and a capacitor may also be used. One of the sensor circuits included in the active type touch sensor may be An example is shown in Figure 33.

[0443] The sensor circuit shown in FIG. 33 includes a capacitor 2603, a transistor 2611, and a transistor 2612 and a transistor 2613.

[0444] A signal G2 is applied to the gate of the transistor 2613, and a signal G3 is applied to either the source or the drain of the transistor 2613. A voltage VRES is applied, and the other is connected to one electrode of the capacitor 2603 and the transistor 2611 The transistor 2611 has a source and a drain electrically connected to the gate of the transistor 2611. The source or drain of the transistor 2612 is electrically connected to the voltage VS The transistor 2612 receives a signal G1 at its gate and a signal S at its source or The other electrode of the drain is electrically connected to the wiring ML. The other electrode of the capacitor 2603 is connected to a voltage VS S is given.

[0445] Next, the operation of the sensor circuit shown in Fig. 33 will be described. First, the signal G2 is When a potential is applied to turn on the transistor 2613, the gate of the transistor 2611 is turned on. A potential corresponding to the voltage VRES is applied to the node n to which the signal G2 is connected. When a potential that turns off the transistor 2613 is applied, the potential of the node n Retained.

[0446] Next, the mutual capacitance of the capacitor 2603 changes when a detection object such as a finger approaches or touches the sensor. As a result, the potential of the node n changes from VRES.

[0447] The read operation applies a potential to the signal G1 that turns on the transistor 2612. The current flowing through the transistor 2611 in accordance with the potential of the node n, that is, the current flowing through the wiring ML By detecting this current, the proximity or contact of the object to be detected can be detected. This can be done.

[0448] The transistor 2611, the transistor 2612, and the transistor 2613 are In particular, the transistor 2613 can be applied to the transistor shown in the above embodiment. By using the transistor described in this embodiment, the potential of the node n can be maintained for a long period of time. This allows the node n to be supplied with VRES again (refresh operation). ) can be reduced in frequency.

[0449] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done.

[0450] (Embodiment 5) In this embodiment, a display module and an electronic device including a semiconductor device according to one embodiment of the present invention will be described. This will be explained with reference to FIGS. 34 and 35.

[0451] <Explanation about the display module> The display module 8000 shown in FIG. 34 includes an upper cover 8001 and a lower cover 8002. Between them, touch panel 8004 connected to FPC8003 and Display panel 8006, backlight 8007, frame 8009, printed circuit board 801 0, has battery 8011.

[0452] The semiconductor device of one embodiment of the present invention can be used for the display panel 8006, for example.

[0453] The upper cover 8001 and the lower cover 8002 are connected to the touch panel 8004 and the display panel The shape and dimensions can be changed as needed to fit the size of the 8006.

[0454] The touch panel 8004 is a resistive or capacitive touch panel. The display panel 8006 can be used by overlapping it with the opposing substrate (sealing substrate). It is also possible to provide the display panel 8 with a touch panel function. It is also possible to provide an optical sensor in each pixel of 006 to make it an optical touch panel.

[0455] The backlight 8007 has a light source 8008. In FIG. Although the configuration in which the light source 8008 is disposed on the base 8007 has been illustrated, the present invention is not limited to this. For example, a light source 8008 is arranged at the end of a backlight 8007, and a light diffusion plate is further used. In addition, when a self-luminous light emitting element such as an organic EL element is used, or when a reflective In the case of a flat panel or the like, the backlight 8007 may not be provided.

[0456] The frame 8009 has a function of protecting the display panel 8006 and also a function of preventing the movement of the printed circuit board 8010. It also functions as an electromagnetic shield to block electromagnetic waves generated by the operation of the The frame 8009 may also function as a heat sink.

[0457] The printed circuit board 8010 includes a power supply circuit, a signal circuit for outputting a video signal and a clock signal. The power supply circuit is provided with a signal processing circuit. Alternatively, the power source may be a battery 8011 provided separately. This can be omitted if a commercial power source is used.

[0458] In addition, the display module 8000 includes components such as a polarizing plate, a retardation plate, and a prism sheet. It may also be provided in addition.

[0459] <Electronic device instructions> 35(A) to 35(G) are diagrams showing electronic devices. These electronic devices are A body 9000, a display unit 9001, a speaker 9003, operation keys 9005 (power switch, includes an operation switch), a connection terminal 9006, a sensor 9007 (force, displacement, position, speed, Acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electricity Measures field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared It may have a microphone 9008, etc.

[0460] The electronic devices shown in FIGS. 35A to 35G can have various functions. For example, functions to display various information (still images, videos, text images, etc.) on the display, Touch panel function, calendar, date or time display function, various software ( It has the function of controlling processing by using a program, wireless communication function, and various functions using wireless communication function. Functions for connecting to computer networks, transmitting various data using wireless communication functions, or receiving the program or data recorded on the recording medium, and It is possible to have a function to display the information on the display unit. The functions that the electronic device shown in the figure can have are not limited to these, and it may have various functions. Although not shown in FIGS. 35(A) to 35(G), the electronic device may include: The electronic device may have a plurality of display units. The function to take pictures, take videos, and save the images to a recording medium (external or built-in to the camera) ), and the function of displaying the captured image on the display unit. Although not shown in FIGS. 35(A) to 35(G), the electronic device may be provided with an antenna or the like. The device may also have a wireless communication function.

[0461] The electronic devices shown in FIGS. 35(A) to 35(G) will be described in detail below.

[0462] FIG. 35(A) is a perspective view showing a mobile information terminal 9100. The display portion 9001 is flexible. The display unit 9001 can be incorporated along the screen. It is equipped with a touch panel, and can be operated by touching the screen with a finger or a stylus. By touching the icon displayed on the display 9001, the application can be started. can.

[0463] 35(B) is a perspective view showing a portable information terminal 9101. For example, the device has one or more functions selected from a telephone, a notebook, an information viewing device, etc. Specifically, it can be used as a smartphone. Although the speaker 9003, the connection terminal 9006, the sensor 9007, etc. are omitted in the illustration, It can be installed in the same position as the mobile information terminal 9100 shown in FIG. The information terminal 9101 can display text and image information on multiple surfaces. For example, Three operation buttons 9050 (also called operation icons or simply icons) are displayed on the display unit 900. 9051 shown in a dashed rectangle can be displayed on one side of the display unit 90. 01. An example of the information 9051 is an e-mail A display that notifies you of incoming calls, SNS (social networking services), etc. , subject of email or SNS, sender name of email or SNS, date and time, time, The remaining battery level, received signal strength, etc. Or, the location where information 9051 is displayed Instead of the information 9051, operation buttons 9050 or the like may be displayed.

[0464] 35(C) is a perspective view showing a portable information terminal 9102. The portable information terminal 9102 is , and has the function of displaying information on three or more surfaces of the display unit 9001. An example is shown in which information 9053 and information 9054 are displayed on different sides. The user of the portable information terminal 9102 stores the portable information terminal 9102 in the breast pocket of his / her clothes. In this state, the display (information 9053 in this case) can be confirmed. The telephone number or name of the caller is displayed in a position that can be observed from above the mobile information terminal 9102. The user can view the display without taking the mobile information terminal 9102 out of his pocket. You can check the call and decide whether to accept it or not.

[0465] 35(D) is a perspective view showing a wristwatch-type portable information terminal 9200. The 9200 is suitable for mobile phone calls, e-mail, document browsing and writing, music playback, and internet communications. It is possible to run various applications such as computer games. The display surface of the display unit 9001 is curved, and the display is performed along the curved display surface. In addition, the portable information terminal 9200 can perform short-distance wireless communication according to a communication standard. For example, by communicating with a wireless headset, handset The mobile information terminal 9200 also has a connection terminal 9006. It has a connector and can directly exchange data with other information terminals. Charging can also be performed via the connection terminal 9006. It may also be possible to supply power wirelessly without going through 6.

[0466] 35(E), (F), and (G) are perspective views showing a foldable portable information terminal 9201. FIG. 35(E) is a perspective view of the portable information terminal 9201 in an unfolded state, and FIG. (F) shows the mobile information terminal 9201 being changed from one of the unfolded state and the folded state to the other. 35(G) is a perspective view of the portable information terminal 9201 in a folded state. The portable information terminal 9201 is highly portable when folded, and is easily portable when unfolded. When the display is turned on, the seamless, wide display area provides excellent visibility of the display. The display unit 9001 of the display device 01 is made up of three housings 9000 connected by hinges 9055. The two housings 9000 are supported by the hinge 9055. This allows the portable information terminal 9201 to be reversibly transformed from an unfolded state to a folded state. For example, the portable information terminal 9201 can be bent with a radius of curvature of 1 mm or more and 150 mm or less. It can be done.

[0467] The electronic device described in this embodiment has a display unit for displaying some information. However, the semiconductor device of one embodiment of the present invention can also be applied to electronic devices that do not have a display portion. In addition, in the display portion of the electronic device described in this embodiment, flexibility can be achieved. and a configuration in which a display can be performed along a curved display surface or a foldable display. However, the present invention is not limited to this, and the display may be made on a non-flexible, flat surface. This may also be configured as follows.

[0468] The structure described in this embodiment mode may be used in appropriate combination with structures described in other embodiments. can be done. [Explanation of symbols]

[0469] 100 transistors 100A transistor 100B transistor 102 Circuit Board 104 Conductive film 106 insulating film 107 Insulating film 108 Oxide semiconductor film 108a Oxide semiconductor film 108b Oxide semiconductor film 108c Oxide semiconductor film 112a Conductive film 112b Conductive film 114 insulating film 116 Insulating film 120 Conductive film 120a Conductive film 120b Conductive film 132 Metal oxide film 134 Metal oxide film 136 Mixed area 139 Halogens 140 Oxygen 141a opening 141b opening 142a opening 142b opening 142c opening 145 areas 150 transistors 160 transistors 170 transistors 501 pixel circuit 502 pixel section 504 Drive circuit section 504a Gate Driver 504b source driver 506 Protection circuit 507 Terminal section 550 transistors 552 transistor 554 Transistor 560 Capacitor 562 Capacitor 570 Liquid Crystal Devices 572 Light-emitting element 2000 touch panel 2001 Touch Panel 2501 Display device 2502t transistor 2503c Capacitive element 2503t transistor 2504 Scanning line driver circuit 2505 pixels 2509 FPC 2510 board 2510a Insulating layer 2510b flexible substrate 2510c adhesive layer 2511 Wiring 2519 terminal 2521 Insulation layer 2522 Insulation layer 2528 Bulkhead 2529 Liquid crystal layer 2530a spacer 2530b spacer 2531 Insulation layer 2550 EL element 2551 Liquid crystal element 2560 Sealing layer 2567 Colored layer 2568 Light blocking layer 2569 Anti-reflection layer 2570 board 2570a Insulating layer 2570b flexible substrate 2570c adhesive layer 2580 Light Emitting Module 2590 board 2591 Electrode 2592 Electrode 2593 Insulation Layer 2594 Wiring 2595 Touch Sensor 2597 Adhesive layer 2598 Wiring 2599 Connection Layer 2601 Pulse voltage output circuit 2602 Current detection circuit 2603 Capacity 2611 Transistor 2612 transistor 2613 Transistor 2621 Electrode 2622 Electrode 5100 pellets 5120 board 5161 area 5200 pellets 5201 AEON 5203 particles 5206 Oxide thin film 5220 board 5230 Target 5240 Plasma 8000 Display Module 8001 Top cover 8002 Lower cover 8003 FPC 8004 Touch Panel 8005 FPC 8006 Display Panel 8007 Backlight 8008 light source 8009 Frame 8010 Printed Circuit Board 8011 Battery 9000 chassis 9001 Display section 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Operation button 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9100 Mobile Information Terminal 9101 Mobile Information Terminal 9102 Mobile Information Terminal 9200 Mobile Information Terminal 9201 Mobile Information Terminal

Claims

[Claim 1] A semiconductor device including an oxide semiconductor film, The semiconductor device includes: A gate electrode; a first insulating film on the gate electrode; the oxide semiconductor film on the first insulating film; a source electrode electrically connected to the oxide semiconductor film; a drain electrode electrically connected to the oxide semiconductor film; a second insulating film on the oxide semiconductor film, the source electrode, and the drain electrode; a first metal oxide film on the second insulating film; a second metal oxide film on the first metal oxide film; The first metal oxide film is the oxide semiconductor film has at least one metal element identical to that of the oxide semiconductor film; The second metal oxide film is The first metal oxide film has a region that is mixed with the first metal oxide film. A semiconductor device comprising:

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