Semiconductor device

Abstract

To provide a semiconductor device that performs startup control or the like of a PWM circuit and has a compact circuit scale.SOLUTION: A semiconductor device includes: a plurality of PWM circuits that output pulse width control signals; a control circuit that performs start-up control for starting up each of the plurality of PWM circuits and halt control for halting each of the plurality of PWM circuits; and a signal output circuit to which a plurality of pulse signals that are generated discretely within a specific period of time and a first pulse width control signal output from a first PWM circuit of the plurality of PWM circuits are input, and which outputs at least a start-up signal for starting up a second PWM circuit of the plurality of PWM circuits different from the first PWM circuit when the first pulse width control signal is output after elapse of a certain period of time after the first pulse signal among the plurality of pulse signals.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] Patent Document 1 discloses a control circuit that outputs a plurality of pulse width modulation (PWM) signals. The output of each PWM signal is controlled by a counter that is matched to the operation of a basic PWM from a CPU (microcomputer). For example, the CPU outputs the basic PWM signal as is, thereby outputting a first PWM signal. For the second to fourth PWM signals (PWM2 to 4), a rising or falling pulse with a delayed period is generated by a counter that uses the rising or falling edge of the basic PWM from the CPU as a reset trigger, and the pulse is input to a flip-flop circuit, thereby outputting pulse width modulation signals PWM2 to 4 with a delayed phase. In this way, in the conventional technology, a plurality of PWM signals can be controlled by the basic PWM signal from the CPU and the counter. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 9-331696 Summary of the Invention [Problem to be solved by the invention]

[0004] Here, in the conventional technology having a function of linking a microcomputer and a PWM circuit and linking a plurality of PWM circuits, the start control and stop control of the PWM signal, that is, the activation control and stop control of the PWM circuit, can be executed by using an external free vibration signal as a trigger. However, when executing the start control and stop control by using an external free vibration signal as a trigger, when the timing of a pulse signal generated a certain time after a specific pulse signal among a plurality of pulse signals included in the free vibration signal is captured and the PWM circuit is operated, it is necessary to input a signal for setting the waiting time, which is the certain time, a so-called waiting time signal, to the microcomputer and set the waiting time. In this case, a circuit for generating the waiting time signal is required outside the microcomputer, so that the circuit scale of the integrated circuit including the microcomputer and the circuit may become large. As described above, the conventional technology has room for improvement in suppressing the circuit scale of a semiconductor device that performs the activation control of the PWM circuit.

[0005] In consideration of the above circumstances, an object of the present disclosure is to provide a semiconductor device capable of suppressing the circuit scale of a semiconductor device that performs startup control of a PWM circuit, etc. [Means for solving the problem]

[0006] In order to solve the above problems, a semiconductor device according to the present disclosure includes a plurality of PWM circuits that output pulse width control signals, a control circuit that performs start control to start each of the plurality of PWM circuits and stop control to stop each of the plurality of PWM circuits, and a signal output circuit that inputs a plurality of pulse signals that are generated discretely within a specific period and a first pulse width control signal output from a first PWM circuit among the plurality of PWM circuits, and when the first pulse width control signal is output after a certain period has elapsed since the first pulse signal among the plurality of pulse signals, outputs at least a start signal to start a second PWM circuit, different from the first PWM circuit, among the plurality of PWM circuits. Effect of the Invention

[0007] According to the present disclosure, it is possible to provide a semiconductor device that can reduce the circuit scale of a semiconductor device that performs startup control of a PWM circuit, etc. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing a configuration of a semiconductor device according to a first embodiment of the present disclosure. [Diagram 2] FIG. 2 is a timing chart for explaining the operation of the semiconductor device according to the first embodiment. [Diagram 3] FIG. 3 is a diagram showing a configuration of a semiconductor device according to a comparative example. [Figure 4] 10 is a timing chart for explaining an operation of a semiconductor device according to a comparative example. [Diagram 5] FIG. 5 is a diagram showing a configuration of a semiconductor device according to a second embodiment of the present disclosure. [Figure 6] FIG. 6 is a timing chart for explaining the operation of the semiconductor device according to the second embodiment of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment will be described with reference to the drawings. Note that the same or similar reference numerals are used to designate the same functions or configurations, and the description thereof will be omitted as appropriate.

[0010] [First embodiment] 1 is a diagram showing a configuration of a semiconductor device according to a first embodiment of the present disclosure. The semiconductor device 100-1 may include a control circuit 20, a plurality of PWM circuits 11 to 11n, a command circuit 4, and a signal output circuit .

[0011] (Control circuit) The control circuit 20 may be interpreted as a part of a circuit for controlling the start and stop timing of other PWM circuits other than the specific PWM circuit by using the output of the specific PWM circuit among the multiple PWM circuits 11 to 11n. n may be interpreted as a natural number of 1 or more, and the same applies below.

[0012] Specifically, the control circuit 20 may be interpreted as a circuit that performs start control to start each of the multiple PWM circuits and stop control to stop each of the multiple PWM circuits.

[0013] More specifically, the control circuit 20 may include a plurality of start control circuits 21 to 2n each of which performs start control of the PWM circuit, and a plurality of stop control circuits 31 to 3n each of which performs stop control of the PWM circuit.

[0014] Start control (i.e., activation control of the PWM circuit) can be executed by a start command from the software instruction circuit 4. Stop control (i.e., stop control of the PWM circuit) can be executed by a stop command from the software instruction circuit 4.

[0015] The start control circuit 21 may start the PWM circuit 11 when a pulse signal that is a free oscillation signal from the external trigger circuit 200 is input. The free oscillation signal may be interpreted as a plurality of pulse signals that are generated discretely within a specific period. The free oscillation signal may be interpreted as a plurality of pulse signals that are generated at a fixed or irregular period. The free oscillation signal may be interpreted as a pulse signal output from the external trigger circuit 200 that is provided outside the semiconductor device 100-1. The free oscillation signal may be interpreted as a trigger output from the external trigger circuit 200, that is, an external trigger that is generated at a fixed or irregular period.

[0016] The stop control circuit 31 may stop the PWM circuit 11 that is running when a pulse signal that is a free oscillation signal is input from the external trigger circuit 200.

[0017] The start control circuit 22 may start the PWM circuit 12 when a pulse signal, which is a free oscillation signal, is input from the external trigger circuit 200 .

[0018] The stop control circuit 32 may stop the running PWM circuit 12 when a pulse signal that is a free oscillation signal is input from the external trigger circuit 200.

[0019] The start control circuit 2n may start the PWM circuit 1n when a pulse signal, which is a free oscillation signal, is input from the external trigger circuit 200.

[0020] When a pulse signal that is a free oscillation signal is input from the external trigger circuit 200, the stop control circuit 3n may stop the running PWM circuit 1n.

[0021] (PWM circuit) Each of the PWM circuits 11 to 11n includes a counter unit and an output control unit that generates a PWM waveform. The counter unit counts a certain time T from the timing when a signal is input to the start control circuit, and the output control unit outputs a PWM signal when the time has elapsed.

[0022] (signal output circuit 50) The signal output circuit 50 may be considered as part of a circuit for using the output of a particular PWM circuit among the multiple PWM circuits 11 to 11n to control the start and stop timing of other PWM circuits other than the particular PWM circuit.

[0023] The signal output circuit 50 may input the outputs of, for example, the first PWM circuit and the second PWM circuit out of the multiple PWM circuits 11 to 11n to a logical product circuit, and input the result of the logical product to a start control circuit and a stop control circuit that control the starting and stopping of the multiple PWM circuits other than the first PWM circuit.

[0024] Specifically, the signal output circuit 50 may input the output of the first PWM circuit to a first input terminal A of the AND circuit, and input either the output of a PWM circuit other than the first PWM circuit or a pulse signal from the external trigger circuit 200 to a second input terminal B of the AND circuit. The result of this AND may be input to a start control circuit and a stop control circuit that control the start and stop of multiple PWM circuits other than the first PWM circuit.

[0025] More specifically, the signal output circuit 50 may include a selector 61, a selector 62, a selector 6n, a logical product circuit 51, a logical product circuit 52, and a logical product circuit 5n.

[0026] The selector 61 receives the pulse signal from the external trigger circuit 200, the output from the PWM circuit 12, and the output from the PWM circuit 1 n, and outputs one of these to the AND circuit 51.

[0027] The AND circuit 51 receives the output from the PMW circuit 11 and the output selected by the selector 61, and inputs the result of the AND to the start control circuit 22, the stop control circuit 32, the start control circuit 2n, and the stop control circuit 3n.

[0028] The selector 62 receives the pulse signal from the external trigger circuit 200, the output from the PWM circuit 11, and the output from the PWM circuit 1 n, and outputs one of these to the AND circuit 51.

[0029] The AND circuit 52 receives the output from the PMW circuit 12 and the output selected by the selector 62, and inputs the result of the AND to the start control circuit 21, the stop control circuit 31, the start control circuit 2n, and the stop control circuit 3n.

[0030] The selector 6n receives the pulse signal from the external trigger circuit 200, the output from the PWM circuit 11, and the output from the PWM circuit 12, and outputs one of these to the AND circuit 5n.

[0031] The logical product circuit 5n receives the output from the PMW circuit 1n and the output selected by the selector 6n, and inputs the logical product result to the start control circuit 21, the stop control circuit 31, the start control circuit 22, and the stop control circuit 32.

[0032] In this way, the signal output circuit 50 can control the start and stop of PWM circuits other than the specific PWM circuit by inputting the output of the specific PWM circuit and the output of another PWM circuit other than the specific PWM circuit or an external trigger.

[0033] Next, the operation of the semiconductor device 100-1 according to the first embodiment will be described with reference to Fig. 2. Fig. 2 is a timing chart for explaining the operation of the semiconductor device according to the first embodiment. In Fig. 2, from the top, a free oscillation signal which is an external trigger, the output of the PWM circuit 11, the input of the start control circuit 22, and the output of the PWM circuit 12 are shown. At time t1, of the multiple free oscillation signals (pulse signals) shown in Fig. 2, the first pulse signal P1 in time series is input to the start control circuit 21 and the selector 61. The multiple free oscillation signals may be interpreted as pulse signals which are generated discretely in a specific period TA.

[0034] At time t2, after a certain period of time T has elapsed since time t1, the output of the PWM circuit 11 changes from OFF to ON. The certain period of time T may be interpreted as a waiting time. The waiting time may be set using the output of the PWM circuit 11. Specifically, the counter section of the PWM circuit 11 counts the certain period of time T from the timing when the first pulse signal P1 is input to the start control circuit 21, and when that period of time has elapsed, the output control section of the PWM circuit 11 outputs a PWM signal, that is, changes the output of the PWM circuit 11 from OFF to ON.

[0035] At time t3, a certain period of time T after time t2, when the third pulse signal P3 in the chronological order is input to the start control circuit 21 and the selector 61, the logical product of the output of the PMW circuit 11 and the output of the selector 61 is established, i.e., becomes true, and the logical product circuit 51 inputs a high-level pulse to the start control circuit 22.

[0036] The pulse signal P3 may be interpreted as a signal generated a certain period of time after the first pulse signal, which is the pulse signal P1, and the output of the PWM circuit 11 may be interpreted as a first pulse width control signal. A high-level pulse may be interpreted as a start signal for starting a second PWM circuit that is different from the first PWM circuit.

[0037] The signal output circuit 50 may output the activation signal when, after the first pulse width control signal is output, a second pulse signal of the multiple pulse signals is input a certain period after the first pulse signal.

[0038] As a result, at time t4, the PWM circuit 12 outputs a PWM signal, that is, the output of the PWM circuit 12 changes from OFF to ON.

[0039] In this way, according to the semiconductor device 100-1 of the present disclosure, by passing the output of the PWM circuit 11 and a free vibration signal (external trigger) through the AND circuit 51, it is possible to input the waveform of the free vibration signal after a certain period of time to the start control circuit 22 of the PWM circuit 12.

[0040] In addition, when stopping the PWM circuit 11, the signal output circuit 50 may stop the first PWM circuit (e.g., the PWM circuit 11) by stopping the output of the startup signal when the third pulse signal of the multiple pulse signals is input a certain period after the second pulse signal.

[0041] Fig. 3 is a diagram showing the configuration of a semiconductor device according to a comparative example. The semiconductor device 100A shown in Fig. 3 does not include the signal output circuit 50 shown in Fig. 1. The semiconductor device 100A executes start control and stop control by using an external free vibration signal as a trigger.

[0042] Specifically, a free vibration signal output from a free vibration signal circuit 202 provided outside the semiconductor device 100A and a waiting time signal output from a waiting time signal circuit 201 provided outside the semiconductor device 100A are input to a logical product circuit 203. The logical product circuit 203 inputs a high-level pulse to the external trigger circuit 200 when a logical product of these outputs is established.

[0043] Fig. 4 is a timing chart for explaining the operation of the semiconductor device according to the comparative example. In Fig. 4, from the top, a free oscillation signal which is an external trigger, a waiting time signal, an external trigger (i.e., the output from the AND circuit 203 to the external trigger circuit 200), and an output from the PWM circuit 12 are shown.

[0044] At time t1, of the multiple free vibration signals (pulse signals) output from the free vibration signal circuit 202 shown in FIG.

[0045] At time t2, a certain time T after time t1, the wait time signal changes from OFF to ON. The certain time T may be interpreted as the wait time. The wait time signal may be interpreted as a signal that changes from 0 to 1 after the certain time T has elapsed since the generation of the pulse signal P1.

[0046] At time t3 after a certain time T has elapsed from time t2, when the third pulse signal P3 in the chronological order is input to the AND circuit 203, the AND circuit 51 inputs a high-level pulse to the external trigger circuit 200 because the logical AND of the output of the wait time signal and the pulse signal P3 is established, i.e., becomes true. As a result, at time t4, the start control circuit 22 starts up the PMW circuit 12. That is, the PMW circuit 12 outputs a PWM signal.

[0047] However, the semiconductor device 100A requires a wait time signal circuit 201 that generates a wait time signal in order to execute start control and stop control by using a free vibration signal from outside the semiconductor device 100A as a trigger. Therefore, the circuit size of an integrated circuit including the semiconductor device 100A and the wait time signal circuit 201 may become large.

[0048] (Action and effect) According to the semiconductor device 100-1 of the present disclosure, when a signal after a certain time of the free vibration waveform is used as a trigger, a signal for starting a specific PWM circuit can be generated without providing a waiting time signal circuit 201 or the like in the circuitry of the semiconductor device 100-1, thereby making it possible to prevent an increase in circuit size.

[0049] [Second embodiment] Fig. 5 is a diagram showing the configuration of a semiconductor device according to a second embodiment of the present disclosure. The semiconductor device 100-2 according to the second embodiment differs from the semiconductor device 100-1 shown in Fig. 1 in that the semiconductor device 100-2 according to the second embodiment includes a signal output circuit 50A in addition to the signal output circuit 50 shown in Fig. 1. Note that, in Fig. 5, the signal output circuit 50 shown in Fig. 1 is omitted for the sake of simplicity.

[0050] 5 illustrates the signal output circuit 50A that receives the outputs of the PWM circuits 13 and 14, but the semiconductor device 100-1 may include the signal output circuit 50A that receives the outputs of the PWM circuits 13 and 14.

[0051] The selector 83 receives the output from the PWM circuit 14 and outputs the output to the AND circuit 73 .

[0052] The AND circuit 73 receives the output from the PMW circuit 13 and the output from the selector 83, and inputs the result of the AND to the start control circuit 21.

[0053] The selector 84 receives the output from the PWM circuit 13 and outputs the output to the AND circuit 74 .

[0054] The AND circuit 74 inverts the output from the PMW circuit 14 and inputs it thereto, and also inputs the output from the AND circuit 74 . The result of the AND is input to the start control circuit 31 .

[0055] In this way, so that the outputs of AND circuit 73 and AND circuit 74 do not change at the same timing, signal output circuit 50A distributes the outputs of AND circuit 73 and AND circuit 74 to different PWM circuits, that is, start control circuits 21 and 22 related to PWM circuits (PWM circuits 11 and 12) other than PWM circuits 13 and 14 that output PWM signals to AND circuit 73 and AND circuit 74. This allows PWM circuits 11 and 12 to operate exclusively and synchronously.

[0056] Fig. 6 is a timing chart for explaining the operation of the semiconductor device according to the second embodiment of the present disclosure. In Fig. 6, from the top, the output of PWM circuit 11, the output of PWM circuit 12, the output of PWM circuit 13, the output of PWM circuit 14, the output of AND circuit 73, and the output of AND circuit 74 are shown.

[0057] When a start command is output from the command circuit 4 at time t1, the PWM circuit 13 is started. When the PWM circuit 13 is started, the PWM circuit 14 is started at time t2 according to the configuration according to the first embodiment.

[0058] The output of the PWM circuit 13 is input to a logical product circuit 73 and a logical product circuit 74. The output of the PWM circuit 14 is input to the logical product circuit 73 and is also inverted and input to the logical product circuit 74. As a result, the output of the logical product circuit 73 is input to the start control circuit 21, and the PWM circuit 11 is started at time t3.

[0059] When the PWM circuit 13 outputs the next H-level signal, the PWM circuit 14 stops at time t4. When the PWM circuit 14 is stopped, the output of the PWM circuit 14 becomes L-level. This causes the output of the AND circuit 74 to become H-level, and the output of the AND circuit 74 starts the PWM circuit 12 at time t5.

[0060] In this way, since the outputs of AND circuit 73 and AND circuit 74 do not change simultaneously, the outputs of AND circuit 73 and AND circuit 74 are distributed to start control circuits 21 and 22 associated with different PWM circuits.

[0061] (Action and effect) According to the semiconductor device 100-2 of the present disclosure, the signal output circuit 50A outputs the result of a logical AND between the output of a first PWM circuit (e.g., PWM circuit 13) and the output of a second PWM circuit (e.g., PWM circuit 14) as a start-up signal for starting a third PWM circuit (e.g., PWM circuit 11) among the multiple PWM circuits, and outputs the result of a logical AND between the output of the first PWM circuit and an inverted value of the output of the second PWM circuit as a start-up signal for starting a fourth PWM circuit (e.g., PWM circuit 12) among the multiple PWM circuits.

[0062] This allows a plurality of PWM circuits to operate exclusively in synchronization by utilizing the outputs of AND circuit 73 and AND circuit 74. In the second embodiment, it is possible to operate a plurality of different PWM circuits exclusively in synchronization by simply changing the setting values ​​inside semiconductor device 100-2 without changing the circuit configuration of the first embodiment.

[0063] In addition, the following supplementary notes are provided in relation to the above description.

[0064] Appendix 1: A plurality of PWM circuits for outputting pulse width control signals; a control circuit that performs start control for starting each of the plurality of PWM circuits and stop control for stopping each of the plurality of PWM circuits; A plurality of pulse signals that are discretely generated within a specific period and a first pulse width control signal output from a first PWM circuit among the plurality of PWM circuits are input, a signal output circuit that outputs at least an activation signal for activating a second PWM circuit, which is different from the first PWM circuit, among the plurality of PWM circuits, when the first pulse width control signal is output after a certain period has elapsed from a first pulse signal among the plurality of pulse signals; A semiconductor device comprising: Note 2: 2. The semiconductor device according to claim 1, wherein the signal output circuit outputs the startup signal when a second pulse signal of the plurality of pulse signals is input a certain period after the first pulse signal is output after the first pulse width control signal is output. Note 3: 3. The semiconductor device according to claim 2, wherein the signal output circuit stops the first PWM circuit by stopping output of the startup signal when a third pulse signal of the plurality of pulse signals is input a certain period after the second pulse signal. Note 4: The signal output circuit includes: outputting a result of a logical AND between the output of the first PWM circuit and the output of the second PWM circuit as a start signal for starting a third PWM circuit among the plurality of PWM circuits; The semiconductor device according to claim 1, wherein the result of a logical product of the output of the first PWM circuit and an inverted value of the output of the second PWM circuit is output as a start-up signal for starting a fourth PWM circuit among the plurality of PWM circuits. [Explanation of symbols]

[0065] 11, 12, 13, 14, 1n PWM circuit 20 Control circuit 21, 22, 23 Start control circuit 31, 32, 33 Stop control circuit 4 Software instruction circuit 50, 50A signal output circuit 51, 52, 53, 5n, 73, 74 AND circuit 61, 62, 6n, 83, 84 selectors 200 External trigger circuit 100-1, 100-2, 100A Semiconductor Device 201 Time signal circuit 202 Free Vibration Signal Circuit 203 AND Circuit

Claims

1. A plurality of PWM circuits each outputting a pulse width control signal; a control circuit that performs start control for starting each of the plurality of PWM circuits and stop control for stopping each of the plurality of PWM circuits; A plurality of pulse signals that are discretely generated within a specific period and a first pulse width control signal output from a first PWM circuit among the plurality of PWM circuits are input, a signal output circuit that outputs at least a start signal for starting a second PWM circuit, which is different from the first PWM circuit, among the plurality of PWM circuits when the first pulse width control signal is output after a certain period of time has elapsed since the first pulse signal among the plurality of pulse signals; A semiconductor device comprising:

2. 2. The semiconductor device according to claim 1, wherein the signal output circuit outputs the activation signal when, after the first pulse width control signal is output, a second pulse signal of the plurality of pulse signals is input a certain period after the first pulse signal.

3. 3. The semiconductor device according to claim 2, wherein the signal output circuit stops output of the start-up signal when a third pulse signal of the plurality of pulse signals is input a certain period after the second pulse signal, thereby stopping the first PWM circuit.

4. The signal output circuit includes: outputting a result of a logical AND between the output of the first PWM circuit and the output of the second PWM circuit as a start signal for starting a third PWM circuit among the plurality of PWM circuits; 2. The semiconductor device according to claim 1, wherein a result of a logical AND between the output of said first PWM circuit and an inverted value of the output of said second PWM circuit is output as a start-up signal for starting a fourth PWM circuit of said plurality of PWM circuits.

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