Semiconductor device

Abstract

To increase the reliability of a semiconductor device including a circuit, in which the wrong operation of the circuit is prevented.SOLUTION: A semiconductor device includes a first transistor, a second transistor, a load, and a wire that has a function to supply a power supply potential to the load. A semiconductor layer of the first transistor includes an oxide semiconductor. A semiconductor layer of the second transistor includes an oxide semiconductor. A source and a drain of the first transistor are electrically connected to the wire. To a first gate of the first transistor, a reference potential is supplied. To a source and a drain of the second transistor, the reference potential is supplied. A first gate of the second transistor is electrically connected to the wire. The semiconductor layer of the first transistor includes a region overlapping with the wire. The semiconductor layer of the second transistor includes a region overlapping with the wire.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of the invention disclosed in the present specification etc. relates to an object, a method, or a manufacturing method. Alternatively, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition of matter.

[0003] In this specification and the like, a semiconductor device generally refers to anything that can function by utilizing semiconductor characteristics. Thus, semiconductor elements such as transistors and diodes, and circuits including semiconductor elements are semiconductor devices. Furthermore, display devices, light-emitting devices, lighting devices, electro-optical devices, imaging devices, communication devices, electronic devices, and the like may include semiconductor elements and semiconductor circuits. Thus, display devices, light-emitting devices, lighting devices, electro-optical devices, imaging devices, communication devices, and electronic devices may also be called semiconductor devices. [Background technology]

[0004] Mobile information terminals such as smartphones and tablet terminals are becoming more and more popular. Along with the popularity of mobile information terminals, various communication standards have been established. For example, the LTE-Advanced standard, also known as the fourth generation mobile communication system (4G), has begun operation.

[0005] In recent years, with the development of information technology such as the Internet of Things (IoT), the amount of data handled by information terminals is increasing. In addition, there is a demand for improved communication speeds for electronic devices such as information terminals.

[0006] In order to accommodate various information technologies such as IoT, a new communication standard called the fifth generation mobile communication system (5G) is being considered, which will achieve faster communication speeds, more simultaneous connections, and shorter latency than 4G. 5G will use communication frequencies in the 3.7 GHz, 4.5 GHz, and 28 GHz bands.

[0007] Semiconductor devices compatible with 5G will be manufactured using semiconductors that use one type of element, such as Si, as the main component, or compound semiconductors that use multiple types of elements, such as Ga and As, as the main components. In addition, oxide semiconductors, a type of metal oxide, are attracting attention.

[0008] In oxide semiconductors, c-axis aligned crystalline (CAAC) structures and nanocrystalline (nc) structures, which are neither single crystal nor amorphous, have been found (see Non-Patent Documents 1 and 2).

[0009] Non-Patent Documents 1 and 2 disclose techniques for manufacturing a transistor using an oxide semiconductor having a CAAC structure. [Prior art documents] [Non-patent literature]

[0010] [Non-Patent Document 1] S. Yamazaki et al., “Research, Development, and Application of Crystalline Oxide Semiconductor,” SID Symposium Digest of Technical Papers, 2012, volume 43, issue 1, pp.183-186 [Non-Patent Document 2] S. Yamazaki et al., “Properties of crystalline In-Ga-Zn-oxide semiconductor and its transistor characteristics,” Japanese Journal of Applied Physics, 2014, volume 53, Number 4S, pp.04ED18-1-04ED18-10 Summary of the Invention [Problem to be solved by the invention]

[0011] In integrated circuits that handle digital signals, such as high-frequency circuits, high-frequency noise components can flow through the power lines, which can easily cause the integrated circuit to malfunction or become unstable. In particular, in portable electronic devices such as mobile phones and tablet devices, where there is a high demand for low power consumption, integrated circuits operate at a low power supply voltage, so even slight voltage fluctuations can easily cause malfunctions.

[0012] In view of the above, an object of one embodiment of the present invention is to prevent malfunction of a circuit and to improve the reliability of a semiconductor device using the circuit. Another object of one embodiment of the present invention is to reduce the power consumption of a circuit or a semiconductor device.

[0013] Another object of one embodiment of the present invention is to prevent an increase in the layout area of ​​a circuit even if a means for bypassing the noise component is provided in the circuit in order to prevent the noise component from flowing into a power supply line, or to achieve miniaturization of a semiconductor device using the circuit.

[0014] Another object of one embodiment of the present invention is to provide a novel semiconductor device.

[0015] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these will become apparent from the description of the specification, drawings, claims, etc., and can be extracted. [Means for solving the problem]

[0016] One embodiment of the present invention is a semiconductor device including a transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the transistor includes an oxide semiconductor, a source and a drain of the transistor are electrically connected to the wiring, a reference potential is supplied to a first gate of the transistor, and the semiconductor layer of the transistor has a region overlapping with the wiring.

[0017] One embodiment of the present invention is a semiconductor device including a transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the transistor includes an oxide semiconductor, a reference potential is supplied to a source and a drain of the transistor, a first gate of the transistor is electrically connected to the wiring, and the semiconductor layer of the transistor has a region overlapping with the wiring.

[0018] One embodiment of the present invention is a semiconductor device including a transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the transistor includes an oxide semiconductor, a first gate of the transistor has a region overlapping with a second gate of the transistor through the semiconductor layer of the transistor, a source and a drain of the transistor are electrically connected to the wiring, a reference potential is supplied to the first gate of the transistor and the second gate of the transistor, and the semiconductor layer of the transistor has a region overlapping with the wiring.

[0019] One embodiment of the present invention is a semiconductor device including a transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the transistor includes an oxide semiconductor, a first gate of the transistor has a region that overlaps with a second gate of the transistor through the semiconductor layer of the transistor, a reference potential is supplied to a source and a drain of the transistor, the first gate of the transistor and the second gate of the transistor are electrically connected to the wiring, and the semiconductor layer of the transistor has a region that overlaps with the wiring.

[0020] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the first transistor includes an oxide semiconductor, a semiconductor layer of the second transistor includes an oxide semiconductor, a source and a drain of the first transistor are electrically connected to the wiring, a reference potential is supplied to a first gate of the first transistor, a reference potential is supplied to a source and a drain of the second transistor, a first gate of the second transistor is electrically connected to the wiring, the semiconductor layer of the first transistor has a region overlapping with the wiring, and the semiconductor layer of the second transistor has a region overlapping with the wiring.

[0021] One embodiment of the present invention includes a first transistor, a second transistor, a load, and a wiring having a function of supplying a power supply potential to the load, in which a semiconductor layer of the first transistor includes an oxide semiconductor, a semiconductor layer of the second transistor includes an oxide semiconductor, a first gate of the first transistor has a region overlapping with a second gate of the first transistor through the semiconductor layer of the first transistor, and the first gate of the second transistor has a region overlapping with a second gate of the second transistor through the semiconductor layer of the second transistor. a source and a drain of the first transistor are electrically connected to the wiring, a reference potential is supplied to a first gate of the first transistor and a second gate of the first transistor, a reference potential is supplied to a source and a drain of the second transistor, a first gate of the second transistor and a second gate of the second transistor are electrically connected to the wiring, a semiconductor layer of the first transistor has a region overlapping with the wiring, and a semiconductor layer of the second transistor has a region overlapping with the wiring. Effect of the Invention

[0022] According to one embodiment of the present invention, a malfunction of a circuit can be prevented, and the reliability of a semiconductor device using the circuit can be improved. According to one embodiment of the present invention, low power consumption of a circuit or low power consumption of a semiconductor device can be realized. According to one embodiment of the present invention, an increase in the layout area of ​​a circuit can be prevented, or a semiconductor device using the circuit can be reduced in size. According to one embodiment of the present invention, a novel semiconductor device can be provided.

[0023] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all of these effects. Note that effects other than these will become apparent from the description of the specification, drawings, claims, etc., and can be extracted. [Brief description of the drawings]

[0024] [Figure 1] Fig. 1A is a diagram showing a configuration example of a circuit according to an embodiment of the present invention, and Fig. 1B is a diagram showing a configuration example of a capacitive part of a circuit according to an embodiment of the present invention. [Diagram 2] 2A to 2C are diagrams illustrating configuration examples of a capacitive portion of a circuit according to one embodiment of the present invention. [Diagram 3] 3A and 3B are diagrams illustrating configuration examples of a capacitive portion of a circuit according to one embodiment of the present invention. [Figure 4] FIG. 4 is a diagram showing a configuration example of a capacitive section of a circuit according to one embodiment of the present invention. [Diagram 5] FIG. 5 is a diagram showing a configuration example of a capacitive section of a circuit according to one embodiment of the present invention. [Figure 6] FIG. 6 is a diagram showing a configuration example of a capacitive section of a circuit according to one embodiment of the present invention. [Figure 7] FIG. 7 is a diagram showing a configuration example of a capacitive section of a circuit according to one embodiment of the present invention. [Figure 8] FIG. 8 is a diagram illustrating an example of a circuit configuration according to one embodiment of the present invention. [Figure 9] FIG. 9 is a diagram illustrating a configuration example of a semiconductor device according to one embodiment of the present invention. [Figure 10] FIG. 10 is a diagram illustrating a configuration example of a capacitive portion of a circuit according to one embodiment of the present invention. [Figure 11] FIG. 11 is a diagram illustrating a configuration example of a capacitive section of a circuit according to one embodiment of the present invention. [Figure 12] FIG. 12 is a diagram illustrating a configuration example of a capacitive portion of a circuit according to one embodiment of the present invention. [Figure 13] FIG. 13 is a diagram illustrating a configuration example of a capacitive portion of a circuit according to one embodiment of the present invention. [Figure 14] FIG. 14 is a diagram illustrating a configuration example of a capacitive portion of a circuit according to one embodiment of the present invention. [Figure 15] FIG. 15 is a diagram illustrating a configuration example of a semiconductor device according to one embodiment of the present invention. [Figure 16] 16A to 16C are diagrams illustrating structures of OS transistors used in the simulation. [Figure 17] FIG. 17 is a diagram showing the simulation results. [Figure 18] Fig. 18A is a diagram for explaining the classification of IGZO crystal structures, Fig. 18B is a diagram for explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 18C is a diagram for explaining the ultrafine electron beam diffraction pattern of a CAAC-IGZO film. [Figure 19] Figure 19A is a top view of a semiconductor wafer, and Figure 19B is an enlarged view of a chip. [Figure 20] Fig. 20A is a flowchart illustrating an example of a process for producing an electronic component, and Fig. 20B is a schematic perspective view of the electronic component. [Figure 21] FIG. 21 is a diagram showing an example of an electronic device. [Figure 22] 22A to 22F are diagrams showing an example of an electronic device. [Figure 23] FIG. 23 is a diagram showing the hierarchical structure of IoT networks and trends in required specifications. [Figure 24] Figure 24 is an image diagram of factory automation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0025] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details of the present invention can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention is not interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and the repeated description will be omitted.

[0026] In addition, the position, size, range, etc. of each component shown in the drawings, etc. may not represent the actual position, size, range, etc. in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc. For example, in an actual manufacturing process, a resist mask, etc. may be unintentionally eroded by a process such as etching, but this may not be reflected in the drawings in order to facilitate understanding.

[0027] In addition, in top views (also called "plan views"), perspective views, and the like, illustration of some components may be omitted in order to make the drawings easier to understand.

[0028] In addition, the terms "electrode" and "wiring" used in this specification and the like do not limit the functionality of these components. For example, an "electrode" may be used as part of a "wiring", and vice versa. Furthermore, the terms "electrode" and "wiring" include cases where multiple "electrodes" or "wirings" are formed integrally.

[0029] In addition, in this specification and the like, a "terminal" in an electric circuit refers to a portion where a current is input or output, a voltage is input or output, or a signal is received or transmitted. Therefore, a part of a wiring or an electrode may function as a terminal.

[0030] In this specification, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below and in direct contact. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0031] In addition, the functions of the source and drain are interchangeable depending on the operating conditions, such as when transistors of different polarities are used or when the direction of current changes during circuit operation, so it is difficult to specify which is the source and which is the drain. For this reason, in this specification, the terms source and drain can be used interchangeably.

[0032] In addition, in this specification, "electrically connected" includes a direct connection and a connection via "something having some electrical action." Here, the "something having some electrical action" is not particularly limited as long as it enables transmission and reception of electrical signals between the connected objects. Therefore, even when it is expressed as "electrically connected," in the actual circuit, there may be no physical connection and only wiring extending therethrough.

[0033] In this specification and elsewhere, "parallel" refers to, for example, a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. This therefore includes cases in which the angle is -5° or more and 5° or less. Furthermore, "perpendicular" and "orthogonal" refer to, for example, a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This therefore includes cases in which the angle is 85° or more and 95° or less.

[0034] In this specification and elsewhere, when referring to counting values ​​and measurement values, terms such as "same," "equal," "uniform," etc. are used, they are intended to include an error of plus or minus 20% unless otherwise expressly stated.

[0035] Furthermore, voltage often refers to the potential difference between a certain potential and a reference potential (for example, ground potential or source potential). Therefore, voltage and potential can often be interchanged. In this specification and the like, unless otherwise specified, voltage and potential can be interchanged.

[0036] Even when written as "semiconductor", for example, if the conductivity is sufficiently low, it has the characteristics of an "insulator". Therefore, it is also possible to use "semiconductor" instead of "insulator". In this case, the boundary between "semiconductor" and "insulator" is ambiguous, and it is difficult to strictly distinguish between the two. Therefore, "semiconductor" and "insulator" described in this specification may be read as interchangeable.

[0037] Furthermore, even when written as "semiconductor", if the conductivity is sufficiently high, it has the characteristics of a "conductor". Therefore, it is also possible to use "semiconductor" in place of "conductor". In this case, the boundary between "semiconductor" and "conductor" is ambiguous, and it is difficult to strictly distinguish between the two. Therefore, "semiconductor" and "conductor" described in this specification may be interchangeable.

[0038] In addition, ordinal numbers such as "first" and "second" in this specification are used to avoid confusion of components, and do not indicate any order or ranking, such as the order of processes or stacking. Even if a term does not have an ordinal number in this specification, an ordinal number may be added in the claims to avoid confusion of components. Even if a term has an ordinal number in this specification, a different ordinal number may be added in the claims. Even if a term has an ordinal number in this specification, the ordinal number may be omitted in the claims.

[0039] In this specification, the term "on state" of a transistor refers to a state in which the source and drain of the transistor can be regarded as being electrically short-circuited (also referred to as a "conductive state"). The term "off state" of a transistor refers to a state in which the source and drain of the transistor can be regarded as being electrically disconnected (also referred to as a "non-conductive state").

[0040] In this specification, the term "on-state current" may refer to a current that flows between a source and a drain when a transistor is on, and the term "off-state current" may refer to a current that flows between a source and a drain when a transistor is off.

[0041] In this specification and the like, high power supply potential VDD (hereinafter also simply referred to as "VDD", "H potential", or "H") refers to a power supply potential that is higher than the low power supply potential VSS (hereinafter also simply referred to as "VSS", "L potential", or "L"). Also, VSS refers to a power supply potential that is lower than VDD. Also, ground potential (also simply referred to as "GND" or "GND potential") can be used as VDD or VSS. For example, when VDD is the ground potential, VSS is a potential lower than the ground potential, and when VSS is the ground potential, VDD is a potential higher than the ground potential.

[0042] In this specification and the like, a gate refers to a gate electrode and a part or the whole of a gate wiring. A gate wiring refers to a wiring for electrically connecting a gate electrode of at least one transistor to another electrode or another wiring.

[0043] In this specification and the like, the source refers to a source region, a source electrode, and a part or all of a source wiring. The source region refers to a region of a semiconductor layer having a resistivity equal to or lower than a certain value. The source electrode refers to a conductive layer connected to a source region. The source wiring refers to a wiring for electrically connecting a source electrode of at least one transistor to another electrode or another wiring.

[0044] In this specification and the like, the drain refers to a part or all of the drain region, the drain electrode, and the drain wiring. The drain region refers to a region of the semiconductor layer whose resistivity is equal to or lower than a certain value. The drain electrode refers to a conductive layer that is connected to the drain region. The drain wiring refers to a wiring for electrically connecting the drain electrode of at least one transistor to another electrode or another wiring.

[0045] In addition, in drawings, etc., in order to make the potential of wiring and electrodes easier to understand, "H" indicating H potential or "L" indicating L potential may be added next to the wiring and electrode. Also, wiring and electrodes where a potential change has occurred may be labeled with "H" or "L" in a box. Also, when a transistor is in an off state, an "x" symbol may be added over the transistor.

[0046] (Embodiment 1) A configuration example of a circuit 10 according to one embodiment of the present invention will be described. FIG 1A illustrates an example of a circuit configuration of the circuit 10 according to one embodiment of the present invention. The circuit 10 illustrated in FIG 1A includes a wiring 100, a capacitor 101 electrically connected to the wiring 100, and a load 103. The wiring 100 has a function of supplying a potential from a power supply (hereinafter referred to as a power supply potential) to the load 103. The load 103 includes various circuits that are driven by the supply of a power supply potential.

[0047] The power supply potential may be provided from a power supply circuit provided within the semiconductor device, or may be provided from outside the semiconductor device to the wiring 100 via a terminal provided on the semiconductor device. Examples of the power supply potential provided to the wiring 100 include a low power supply potential (referred to as VSS) lower than a reference potential (hereinafter referred to as a reference potential) such as a ground potential or a ground potential, and a high power supply potential (referred to as VDD) higher than the reference potential.

[0048] One electrode of the capacitor 101 is electrically connected to a wiring 100, and the other electrode is electrically connected to a wiring 102 to which a reference potential is applied. The capacitor 101 may be a single element or a plurality of elements. FIG 1A illustrates a case where a plurality of capacitors 101 are connected in parallel, and a portion having the plurality of capacitors 101 connected in parallel is illustrated as a capacitor portion 104.

[0049] The capacitor 101 has a function of preventing noise components, which are unnecessary high-frequency signals, from being supplied to the load 103 by discharging the noise components to the wiring 102 when the noise components are input to the wiring 100 together with a power supply potential.

[0050] In one embodiment of the present invention, a transistor is used as the capacitor 101. FIG. 1B shows an example of a circuit configuration of the capacitor 104 in the case where a transistor is applied to the capacitor 101 of the capacitor 104 shown in FIG. 1A. The capacitor 104 shown in FIG. 1B includes one or more capacitors 101a which correspond to one mode of the capacitor 101. The capacitor 101a includes a transistor 105, and a source and a drain of the transistor 105 are electrically connected to each other. In the capacitor 101a, the source and drain of the transistor 105 function as one electrode, and the gate of the transistor 105 functions as the other electrode. FIG. 1B illustrates a case where the source and drain of the transistor 105 are electrically connected to the wiring 100 and the gate of the transistor 105 is electrically connected to the wiring 102.

[0051] A transistor having a channel formation region in a semiconductor film of silicon, germanium, or the like that is amorphous, microcrystalline, polycrystalline, or single crystalline can be used as the transistor 105. When the transistor 105 is formed using a thin film of silicon, the thin film can be made of amorphous silicon manufactured by a vapor phase growth method such as a plasma CVD method or a sputtering method, polycrystalline silicon obtained by crystallizing amorphous silicon by a process such as laser annealing, or single crystal silicon obtained by injecting hydrogen ions or the like into a single crystal silicon wafer to peel off the surface layer.

[0052] As the transistor 105, a transistor having a channel formation region in a semiconductor film containing an oxide semiconductor (OS), which is a type of metal oxide (also referred to as an "OS transistor" or an "OS-FET"). When an OS transistor is used for the capacitor 101a, the capacitance value per area of ​​the capacitor 101a in a plan view can be made higher than when a Si transistor is used for the capacitor 101a. Therefore, in a circuit of the present invention in which an OS transistor is used for the capacitor 101a, an increase in the layout area can be prevented. In addition, a semiconductor device using the circuit can be miniaturized.

[0053] 1B illustrates an example of the capacitor portion 104 in which the source and drain of the transistor 105 are electrically connected to the wiring 100 and the gate of the transistor 105 is electrically connected to the wiring 102, but the connection relationship between the transistor 105, the wiring 100, and the wiring 102 may be reversed from that in FIG 1B. FIG 2A illustrates an example of a circuit configuration of the capacitor portion 104 in which the connection relationship between the transistor 105, the wiring 100, and the wiring 102 is reversed from that in FIG 1B.

[0054] 2A, similarly to the capacitor 104 shown in FIG 1B, a capacitor 101a includes a transistor 105, and a source and a drain of the transistor 105 are electrically connected to each other. FIG 2A illustrates a case where a gate of the transistor 105 is electrically connected to a wiring 100, and a source and a drain of the transistor 105 are electrically connected to a wiring 102.

[0055] In one embodiment of the present invention, the transistor 105 may have two gates (also referred to as a front gate and a back gate) that overlap with each other with a channel formation region therebetween in a cross-sectional view. The two gates may be electrically connected to each other. FIG 2B shows an example of a circuit configuration of the capacitor portion 104 in which the transistor 105 having two gates is used as the capacitor 101a.

[0056] In the capacitor portion 104 shown in FIG. 2B, the capacitor 101a includes a transistor 105, and the transistor 105 has two gates. In the transistor 105, the two gates are electrically connected to each other, and the source and drain are electrically connected to each other. In the capacitor 101a, the source and drain of the transistor 105 function as one electrode, and the two gates of the transistor 105 function as the other electrode. FIG. 2B illustrates a case where the source and drain of the transistor 105 are electrically connected to the wiring 100, and the gate of the transistor 105 is electrically connected to the wiring 102.

[0057] When the transistor 105 having two gates is used as the capacitor 101a, the capacitance per area of ​​the capacitor 101a in a plan view can be made higher than when the transistor 105 having one gate is used as the capacitor 101a. Therefore, when the transistor 105 having two gates is used as the capacitor 101a, an increase in the layout area of ​​the circuit can be prevented. In addition, a semiconductor device using the circuit can be made smaller.

[0058] In addition, when a bulk transistor formed on a semiconductor substrate is used as the transistor 105, the gate of the transistor 105 can be electrically connected to the body of the transistor 105, thereby increasing the capacitance value per area in a planar view of the capacitor 101a, as in the case of a thin-film transistor 105 whose two gates are electrically connected to each other.

[0059] 2B illustrates an example of the capacitor 104 in which the source and drain of the transistor 105 are electrically connected to the wiring 100 and the two gates of the transistor 105 are electrically connected to the wiring 102, but the connection between the transistor 105, the wiring 100, and the wiring 102 may be reversed from that in Fig. 2B. Fig. 2C illustrates an example of a circuit configuration of the capacitor 104 in which the connection between the transistor 105, the wiring 100, and the wiring 102 is reversed from that in Fig. 2B.

[0060] 2B, the capacitor 104 shown in Fig. 2C includes a transistor 105 in a capacitor 101a, and the source and drain of the transistor 105 are electrically connected to each other. Fig. 2C illustrates a case in which two gates of the transistor 105 are electrically connected to the wiring 100, and the source and drain of the transistor 105 are electrically connected to the wiring 102.

[0061] In addition, when the capacitance portion 104 has multiple capacitance elements 101a, the source and drain of the transistor 105 may be electrically connected in all of the capacitance elements 101a as in the capacitance portion 104 shown in Figures 1A and 2B, or a transistor 105 whose source and drain are electrically connected to the wiring 100 and a transistor 105 whose gate is electrically connected to the wiring 100 may be mixed in the capacitance portion 104.

[0062] 3A shows an example of a circuit configuration of the capacitance portion 104 in which a transistor 105 whose source and drain are electrically connected to the wiring 100 and a transistor 105 whose gate is electrically connected to the wiring 100 are mixed in the capacitance portion 104. In FIG. 3A, the transistor 105 whose source and drain are electrically connected to the wiring 100 is shown as transistor 105a, and the transistor 105 whose gate is electrically connected to the wiring 100 is shown as transistor 105b.

[0063] FIG. 3A illustrates an example of a circuit configuration of the capacitance portion 104 in which the transistors 105a and 105b have a front gate and do not have a back gate. However, as shown in FIG. 3B, in the capacitance portion 104, the transistors 105a and 105b may have a front gate and a back gate that are electrically connected to each other.

[0064] The capacitance value of the capacitance formed between the gate and the source and drain of the transistor changes according to the value of the voltage applied between the gate and the source of the transistor. Therefore, as shown in Figures 3A and 3B, when the transistor 105a and the transistor 105b are mixed in the capacitance portion 104, even if the power supply potential of the wiring 100 changes, the capacitance value of the combined capacitance of the entire capacitance portion 104 can be prevented from changing.

[0065] On the other hand, as in the capacitor portion 104 shown in FIG. 1A and FIG. 2B, when the source and drain of the transistor 105 in all the capacitor elements 101a are connected to the wiring 100, or when the gate of the transistor 105 in all the capacitor elements 101a is connected to the wiring 100, the periodicity of the layout pattern of the mask used to manufacture the capacitor portion 104 can be increased. When the periodicity of the layout pattern of the mask is high, shape defects such as partial narrowing of the width of the conductive film, insulating film, semiconductor film, etc. formed by photolithography due to interference of light emitted from an exposure device in the photolithography process using the mask are unlikely to occur. Therefore, it is possible to prevent defects in the shape of the conductive film, insulating film, and semiconductor film after the photolithography process, and the yield in manufacturing the circuit and the semiconductor device using the circuit can be increased.

[0066] In one embodiment of the present invention, the transistor 105 is provided in a region overlapping with the wiring 100 or the wiring 200 in a cross-sectional view. An example of a layout of the capacitor portion 104 shown in FIG. 2B in a plan view is shown in FIG. 5 shows cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. 4. FIGS. 4 and 5 show the case where the transistor 105 is an OS transistor.

[0067] 5, an insulator 516 is stacked over an insulator 514. The transistor 105 is provided over the insulator 514 and the insulator 516.

[0068] The transistor 105 has a conductor 503 arranged so as to be embedded in an insulator 514 and an insulator 516, an insulator 522 arranged on the insulator 516 and the conductor 503, an insulator 524 arranged on the insulator 522, an oxide 530a arranged on the insulator 524, an oxide 530b arranged on the oxide 530a, a conductor 542a and a conductor 542b arranged apart from each other on the oxide 530b, an insulator 545 arranged on the conductor 542a and the conductor 542b, and a conductor 560 arranged on the formation surface of the insulator 545.

[0069] 5, an insulator 544 is preferably arranged to cover the conductor 542a, the conductor 542b, and the conductor 560. The conductor 560 preferably has a conductor 560a on the insulator 545 and a conductor 560b on the conductor 560a. It is also preferable that an insulator 580, an insulator 574, and an insulator 581 are stacked in this order on the insulator 544. The conductor 542a and the conductor 542b function as a source or drain. The conductor 560 functions as a front gate.

[0070] In this specification and other documents, oxide 530a and oxide 530b may be collectively referred to as oxide 530.

[0071] In the conductor 503, the conductor 503a is formed in contact with the inner wall of a recess formed by the openings of the insulator 514 and the insulator 516, and the conductor 503b is formed further inside. Note that in the transistor 105, the conductor 503a and the conductor 503b are stacked, but the present invention is not limited to this. For example, the conductor 503 may have a single layer structure or a stacked structure of three or more layers. The conductor 503 functions as a backgate.

[0072] Conductor 540a, conductor 540b, conductor 541a, and conductor 541b are arranged in openings formed in insulator 522, insulator 524, insulator 544, insulator 580, insulator 574, and insulator 581. Conductor 540a is electrically connected to conductor 542a, and conductor 540b is electrically connected to conductor 542b. Conductor 560 has a region that does not overlap with oxide 530. One of the openings formed in insulator 544, insulator 580, insulator 574, and insulator 581 overlaps with the region, and conductor 541a is electrically connected to conductor 560 through the one of the openings.

[0073] Note that the conductor 503 has a region that does not overlap with the oxide 530. One of the openings formed in the insulators 522, 524, 544, 580, 574, and 581 overlaps with the region, and the conductor 541b is electrically connected to the conductor 503 through one of the openings.

[0074] Further, a conductor 590 and a conductor 592 are arranged over the insulator 581. The conductor 590 is electrically connected to the conductors 540a and 540b, and the conductor 592 is electrically connected to the conductors 541a and 541b. With the above structure, the source and drain of the transistor 105 are electrically connected to each other, and the front gate and back gate of the transistor 105 are electrically connected to each other.

[0075] Note that in one embodiment of the present invention, the back gate and the front gate do not necessarily have to be applied with the same potential. The threshold voltage of the transistor 105 can be controlled by changing the potential applied to the back gate independently of the potential applied to the front gate. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 105 can be made higher than 0 V, thereby reducing the off-state current.

[0076] Furthermore, an insulator 594 is arranged over the insulator 581, the conductor 590, and the conductor 592. Conductor 595a and conductor 595b are arranged in openings formed in the insulator 594. The conductor 595a is electrically connected to the conductor 590, and the conductor 595b is electrically connected to the conductor 592. Furthermore, conductors 597 and 598 are arranged over the insulator 594. The conductor 597 is electrically connected to the conductor 595a, and the conductor 598 is electrically connected to the conductor 595b. The conductor 597 functions as the wiring 100, and the conductor 598 functions as the wiring 102.

[0077] 4 and 5 show examples of the configuration of the capacitance portion 104 shown in Fig. 2B, the capacitance portion 104 shown in Fig. 2C can have the same configuration as that shown in Fig. 4 and 5. However, in the case of the capacitance portion 104 shown in Fig. 2C, the conductor 597 functions as the wiring 102, and the conductor 598 functions as the wiring 100.

[0078] 4 and 5 illustrate the example of the structure in which the oxide 530 of the transistor 105 overlaps with the conductor 597, the oxide 530 of the transistor 105 may overlap with the conductor 598. When the oxide 530 of the transistor 105 overlaps with the conductor 598, the conductor 590 can be extended from a region overlapping with the conductor 597 to a region overlapping with the conductor 598, so that the conductor 540a and the conductor 540b can be electrically connected to the conductor 598 through the conductor 590.

[0079] 4 and 5 illustrate a configuration in which the transistor 105 is arranged below the conductor 597, the transistor 105 may be arranged above the conductor 597. FIG. 6 illustrates an example of a layout in a plan view of the capacitance portion 104 illustrated in FIG. 2B in which the transistor 105 is arranged above the conductor 597. FIG. 7 illustrates cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. 6. FIGS. 6 and 7 illustrate a case in which the transistor 105 is an OS transistor.

[0080] 6 and 7 are different from FIGS. 4 and 5 in that an insulator 512 is arranged under an insulator 514, and a conductor 597 and a conductor 598 are arranged under the insulator 512. In addition to the conductor 541b, a conductor 541c is arranged in openings formed in the insulators 522, 524, 544, 580, 574, and 581 in FIGS. 6 and 7. The conductor 541c is electrically connected to the conductor 590 on the insulator 581. With the above configuration, the source and drain of the transistor 105 are electrically connected to each other.

[0081] 6 and 7, the conductor 504 is embedded in the insulators 512, 514, and 516. The conductor 504 is electrically connected to the conductor 597 disposed below the conductor 504. The conductor 504 is also electrically connected to the conductor 541c disposed above the conductor 504.

[0082] Specifically, in the conductor 504, a conductor 504a is formed in contact with the inner wall of a recess formed by the conductor 597, the opening of the insulator 512, the opening of the insulator 514, and the opening of the insulator 516, and a conductor 504b is formed further inside. The conductor 504 may have a single layer structure or a laminated structure of three or more layers.

[0083] Also, unlike Figures 3 and 4, in Figures 6 and 7, conductor 503 is electrically connected to conductor 598 located below conductor 503 in the openings of insulator 512, in the openings of insulator 514, and in the openings of insulator 516 in areas that do not overlap with oxide 530.

[0084] 4 and 5 or 6 and 7, the transistor 105 is placed in a region overlapping with the conductor 597 having a function as the wiring 100. With the above structure, even if the circuit includes the capacitor portion 104 as shown in FIGS. 1 to 3, an increase in the area of ​​the circuit in a plan view can be prevented. Furthermore, a semiconductor device using the circuit can be miniaturized.

[0085] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0086] (Embodiment 2) Next, a configuration example of the circuit 10 according to one embodiment of the present invention will be described when a common source amplifier 103a is used as the load 103. The circuit 10 illustrated in FIG. 8 includes a common source amplifier 103a, a wiring 100, and a capacitor 104. The common source amplifier 103a includes a matching circuit 127, a matching circuit 128, and a transistor 129. The matching circuit 127 includes an inductor 132 and a capacitor 131. The matching circuit 128 includes an inductor 133 and a capacitor 134.

[0087] In the matching circuit 127, one terminal of the inductor 132 is electrically connected to the wiring 100, and the other terminal is electrically connected to the gate of the transistor 129. In addition, one electrode of the capacitor 131 is electrically connected to the input terminal IN, and the other electrode is electrically connected to the gate of the transistor 129.

[0088] In the matching circuit 128, the inductor 133 has one terminal electrically connected to the wiring 100 and the other terminal electrically connected to one of the source or the drain of the transistor 129. The capacitor 134 has one electrode electrically connected to one of the source or the drain of the transistor 129 and the other electrode electrically connected to the output terminal OUT.

[0089] The other of the source and the drain of the transistor 129 is electrically connected to a wiring 130. The potential applied to the wiring 130 may be the same as the potential applied to the wiring 102.

[0090] A potential is applied to the wiring 100 from a terminal 125. In the circuit 10 according to one embodiment of the present invention, even if a noise component is included in the potential applied from the terminal 125 to the wiring 100, the noise component can be released to the wiring 102 through the capacitor 101 and prevented from being supplied to the common-source amplifier 103a. Furthermore, in one embodiment of the present invention, the capacitor 101 overlaps with a region where the wiring 100 is arranged, thereby making it possible to reduce the size of the circuit 10.

[0091] Next, a configuration example of a semiconductor device 20 using the circuit 10 of one embodiment of the present invention will be described. The semiconductor device 20 illustrated in FIG. 9 includes a DC-DC converter 120, a smoothing circuit 121, and a circuit 10. The circuit 10 includes a wiring 100, a capacitor 104, and a load 103.

[0092] The smoothing circuit 121 includes an inductor 122 and a capacitance element 123. The inductor 122 has one terminal to which a potential output from the DC-DC converter 120 is supplied and the other terminal electrically connected to the wiring 100.

[0093] The potential output from the DC-DC converter 120 has waveform disturbances such as ripples removed by the smoothing circuit 121, and is input to the capacitance unit 104 via the wiring 100. In the semiconductor device 20 according to one aspect of the present invention, noise components corresponding to potential fluctuations that could not be completely removed by the smoothing circuit 121 are allowed to escape to the wiring 102 via the capacitance element 101, and the noise components can be prevented from being supplied to the load 103. In addition, in one aspect of the present invention, the capacitance element 101 is overlapped with the region where the wiring 100 is arranged, thereby making it possible to reduce the size of the semiconductor device 20.

[0094] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0095] (Embodiment 3) In this embodiment, an example of a specific layout of the wiring 100, the wiring 102, and the capacitor portion 104 included in the circuit 10 will be described. Fig. 10 shows an example of a top view of the wiring 100, the wiring 102, and the capacitor portion 104 shown in Fig. 2B. Note that in Fig. 10, various insulators are omitted to clarify the configurations of the wiring 100, the wiring 102, and the capacitor portion 104.

[0096] 10, a conductor 100a functioning as the wiring 100 has a comb-like shape in a plan view. A plurality of conductors 102a to 102j each having a U-shape in a plan view are electrically connected to each other by conductors 150a to 150j disposed in a layer below the conductors 102a to 102j, and the conductors 102a to 102j and the conductors 150a to 150j function as the wiring 102.

[0097] Note that, although FIG. 10 illustrates an example in which the conductors 102a to 102j and the conductors 150a to 150j function as the wiring 102 as a whole, the number of various conductors required to function as the wiring 102 can be set as appropriate.

[0098] In FIG. 10, the convex portion of the conductor 100a and the concave portions of the conductors 102a to 102j are disposed in opposing positions in a plan view, and are further disposed so as to interdigitate with each other with a predetermined gap therebetween.

[0099] An enlarged view of a region 160 surrounded by a dashed line in Fig. 10 is shown in Fig. 11. Cross-sectional views along dashed lines L1-L2, W1-W2, and W3-W4 in Fig. 11 are shown in Fig. 12 to Fig. 14, respectively. Hereinafter, the layout and stacked structure of the wiring 100, the wiring 102, and the capacitor 101 included in the circuit 10 will be described with reference to Fig. 11 to Fig. 14.

[0100] In the region shown in FIG. 11, a plurality of transistors 105t are connected in parallel. Specifically, the sources and drains of the plurality of transistors 105t are electrically connected to each other, and the front gates and back gates are electrically connected to each other. The plurality of transistors 105t connected in parallel can function as one transistor 105. Note that, although FIG. 11 illustrates an example in which the plurality of transistors 105t connected in parallel function as one transistor 105, the one transistor 105t may function as the transistor 105 as it is. In this embodiment, the configuration of the circuit 10 in which the transistor 105t is an OS transistor is illustrated in FIGS. 11 to 14.

[0101] FIG. 12, which corresponds to dashed line L1-L2 in FIG. 11, corresponds to a cross section in the channel length direction of transistor 105t, and FIG. 13, which corresponds to dashed line W1-W2 in FIG. 11, corresponds to a cross section in the channel width direction of transistor 105t.

[0102] First, in the circuit 10 of one embodiment of the present invention, an insulator 512, an insulator 514, and an insulator 516 are stacked in this order. When the transistor 105t is an OS transistor, any of the insulator 512, the insulator 514, and the insulator 516 is preferably formed using a substance that has a barrier property against oxygen or hydrogen.

[0103] In this embodiment, a film having a barrier property that prevents diffusion of hydrogen and impurities is used as the insulator 514. By using a film having a barrier property for the insulator 514, diffusion of hydrogen and impurities from below the insulator 514 to a region where the transistor 105t is provided can be prevented.

[0104] As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, hydrogen diffusion into a semiconductor element having an oxide semiconductor such as the transistor 105t may degrade the electrical characteristics of the semiconductor element. Therefore, a film that suppresses hydrogen diffusion is preferably used as a lower layer of the transistor 105t. Specifically, the film that suppresses hydrogen diffusion is a film that releases a small amount of hydrogen.

[0105] As a film having a barrier property against hydrogen, for example, the insulator 514 is preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0106] In particular, aluminum oxide has a high blocking effect of preventing the permeation of both oxygen and impurities such as hydrogen and moisture, which are factors that cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 105t during and after the manufacturing process of the transistor. In addition, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 105t. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.

[0107] For example, the insulators 512 and 516 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like. By using a material with a relatively low dielectric constant for these insulators, parasitic capacitance between wirings can be reduced. For example, the insulators 512 and 516 can be made of a silicon oxide film, a silicon oxynitride film, or the like.

[0108] In this specification, silicon oxynitride refers to a material having a higher oxygen content than nitrogen, silicon nitride oxide refers to a material having a higher nitrogen content than oxygen, aluminum oxynitride refers to a material having a higher oxygen content than nitrogen, and aluminum nitride oxide refers to a material having a higher nitrogen content than oxygen.

[0109] A conductor (for example, the conductor 503) constituting the transistor 105t is embedded in the insulator 514 and the insulator 516. Note that the conductor 503 can be formed of a single layer or a stack of conductive materials such as a metal material, an alloy material, a metal nitride material, or a metal oxide material. It is preferable to use a high-melting-point material such as tungsten or molybdenum that has both heat resistance and conductivity, and tungsten is preferably used. Alternatively, the conductor 503 is preferably formed of a low-resistance conductive material such as aluminum or copper. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0110] In particular, the conductor 503 in the region in contact with the insulator 514 is preferably a conductor having a barrier property against oxygen, hydrogen, and water. With this structure, the transistor 105t and the region below the transistor 105t can be separated by a layer having a barrier property against oxygen, hydrogen, and water, and diffusion of hydrogen from the region below the transistor 105t to the transistor 105t can be suppressed.

[0111] Above the insulator 516 is provided a transistor 105t.

[0112] Specifically, transistor 105t has a conductor 503 arranged so as to be embedded in insulator 514 and insulator 516, an insulator 522 arranged on insulator 516 and conductor 503, an insulator 524 arranged on insulator 522, an oxide 530a arranged on insulator 524, an oxide 530b arranged on oxide 530a, conductors 542a and 542b arranged apart from each other on oxide 530b, an insulator 580 arranged on conductor 542a and conductor 542b and having an opening formed therein overlapping with conductor 542a and conductor 542b, an insulator 545 arranged on the bottom and side surfaces of the opening, and a conductor 560 arranged on the formation surface of insulator 545.

[0113] It is also preferable that an insulator 544 be disposed between the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b and the insulator 580. It is also preferable that the conductor 560 has a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a. It is also preferable that an insulator 574 be disposed on the insulator 580, the conductor 560, and the insulator 545.

[0114] Note that in the transistor 105t, two layers of the oxide 530a and the oxide 530b are stacked in and around a region where a channel is formed, but the present invention is not limited to this. For example, the oxide 530b may have a single layer structure or a stack structure of three or more layers.

[0115] Although the conductor 560 in the transistor 105t has a two-layer structure, the present invention is not limited to this. For example, the conductor 560 may have a single-layer structure or a stacked structure of three or more layers.

[0116] The conductor 560 is formed so as to be embedded in the opening of the insulator 580 and in the region sandwiched between the conductor 542a and the conductor 542b. The arrangement of the conductor 560, the conductor 542a, and the conductor 542b is selected in a self-aligned manner with respect to the opening of the insulator 580. That is, in the transistor 105t, the gate electrode can be arranged in a self-aligned manner between the source electrode and the drain electrode. Therefore, the conductor 560 can be formed without providing a margin for alignment, so that the area occupied by the transistor 105t can be reduced. This allows the circuit 10 and the semiconductor device using the circuit 10 to be miniaturized and highly integrated.

[0117] Furthermore, since the conductor 560 is formed in a self-aligned manner in the region between the conductor 542a and the conductor 542b, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b, which makes it possible to reduce parasitic capacitance formed between the conductor 560 and the conductor 542a and between the conductor 560 and the conductor 542b.

[0118] The conductor 560 may function as a first gate (also referred to as a front gate) electrode. The conductor 503 may function as a second gate (also referred to as a back gate) electrode. In one embodiment of the present invention, the front gate and the back gate of the transistor 105t are electrically connected to each other, and the front gate and the back gate are also electrically connected to the conductors 102a and 102b that function as the wiring 102. Specifically, as shown in FIG. 11, the conductor 503 is electrically connected to the conductor 161 through the conductor 540c, and the conductor 161 is electrically connected to the conductor 102b through the conductor 540d. The conductor 102b is electrically connected to the conductor 150a through the conductor 540e, and the conductor 150a is electrically connected to the conductor 102a through the conductor 540f. Additionally, conductor 102a is electrically connected to conductor 162 via conductor 540g, and conductor 162 is electrically connected to conductor 560a via conductor 540h.

[0119] The conductor 542a and the conductor 542b each function as a source electrode or a drain electrode. In one embodiment of the present invention, a source electrode and a drain electrode of the transistor 105t are electrically connected to each other and are also electrically connected to a conductor 100a that functions as the wiring 100. Specifically, as shown in FIGS. 11 and 12, the conductor 542a is electrically connected to the conductor 163 through the conductor 540a, and the conductor 542b is electrically connected to the conductor 163 through the conductor 540b. The conductor 163 is electrically connected to the conductor 100a through the conductor 540i, and the conductor 163 is electrically connected to the conductor 100a through the conductor 540j.

[0120] The conductor 503 is arranged to overlap the oxide 530 and the conductor 560. In this manner, when a potential is applied to the conductor 560 and the conductor 503, an electric field generated from the conductor 560 and an electric field generated from the conductor 503 are connected, and a channel formation region formed in the oxide 530 can be covered by the connected electric field.

[0121] In this specification and the like, a structure of a transistor in which a channel formation region is electrically surrounded by an electric field of a pair of gate electrodes (a first gate electrode and a second gate electrode) is referred to as a surrounded channel (S-channel) structure. In one embodiment of the present invention, the surrounded channel (S-channel) structure can increase the capacitance per area in a plan view of the capacitor 101 including the transistor 105t. In particular, by adding a structure in which a pair of gate electrodes are electrically connected to each other to the above structure, the capacitance per area in a plan view can be further increased.

[0122] 4 and 5, the conductor 503 has the conductor 503a formed in contact with the inner wall of a recess formed by the opening of the insulator 514 and the insulator 516, and the conductor 503b formed further inside. Note that in the transistor 105t, the conductor 503a and the conductor 503b are stacked, but the present invention is not limited to this. For example, the conductor 503 may have a single layer structure or a stacked structure of three or more layers.

[0123] The conductor 503a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (a conductive material through which the above impurities are unlikely to permeate). Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) (a conductive material through which the above oxygen is unlikely to permeate). Note that in this specification, the function of suppressing the diffusion of impurities or oxygen refers to the function of suppressing the diffusion of any one or all of the above impurities and / or oxygen.

[0124] For example, the conductor 503a has a function of suppressing the diffusion of oxygen, so that the conductor 503b can be prevented from being oxidized and the conductivity from decreasing.

[0125] In addition, when the conductor 503 also functions as a wiring, it is preferable that the conductor 503b is made of a highly conductive material containing tungsten, copper, or aluminum as a main component.

[0126] The insulator 522 and the insulator 524 function as a second gate insulating film.

[0127] The insulator 524 in contact with the oxide 530 is preferably an insulator containing more oxygen than the oxygen required for the stoichiometric composition. Such oxygen is easily released from the film by heating. In this specification and other documents, oxygen released by heating may be referred to as "excess oxygen." In other words, the insulator 524 preferably has a region containing excess oxygen (also referred to as an "excess oxygen region"). By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies (V O When hydrogen enters the oxygen vacancy in the oxide 530, the defect (hereinafter, V O H) may function as a donor and generate an electron that is a carrier. In addition, some of the hydrogen may bond with oxygen that is bonded to a metal atom to generate an electron that is a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is likely to have normally-on characteristics. Furthermore, hydrogen in an oxide semiconductor is easily moved by stress such as heat or an electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be deteriorated. In one embodiment of the present invention, V in the oxide 530 O It is preferable to reduce H as much as possible and make it high-purity intrinsic or substantially high-purity intrinsic. O In order to obtain an oxide semiconductor in which H is sufficiently reduced, it is important to remove impurities such as moisture and hydrogen from the oxide semiconductor (also called "dehydration" or "dehydrogenation treatment") and to supply oxygen to the oxide semiconductor to compensate for oxygen vacancies (also called "oxygenation treatment"). O By using an oxide semiconductor in which impurities such as H are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0128] Specifically, it is preferable to use an oxide material from which some oxygen is released by heating as an insulator having an excess oxygen region. An oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 18 atoms / cm 3 More than 1.0×10 19 atoms / cm 3 More preferably, 2.0×10 19 atoms / cm 3 More preferably, 3.0×10 20 atoms / cm 3 The oxide film is one having the above-mentioned properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100° C. or more and 700° C. or less, or 100° C. or more and 400° C. or less.

[0129] In addition, the oxide 530 may be brought into contact with the insulator having the excess oxygen region and subjected to one or more of heat treatment, microwave treatment, and RF treatment. By carrying out such treatment, water or hydrogen in the oxide 530 can be removed. For example, a reaction occurs in the oxide 530 that breaks the bond of VoH, in other words, "V O The reaction "H → Vo + H" occurs, and dehydrogenation can be achieved. Some of the hydrogen generated at this time may combine with oxygen to become HO and be removed from the oxide 530 or the insulator in the vicinity of the oxide 530. Some of the hydrogen may also be gettered to the conductor 542a and the conductor 542b.

[0130] In addition, the microwave treatment is preferably performed using, for example, a device having a power source that generates high-density plasma or a device having a power source that applies RF to the substrate side. For example, high-density oxygen radicals can be generated by using a gas containing oxygen and high-density plasma, and the oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or the insulator near the oxide 530 by applying RF to the substrate side. In addition, the pressure of the microwave treatment may be set to 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more. In addition, for example, oxygen and argon are used as gases to be introduced into the microwave treatment device, and the microwave treatment may be performed with an oxygen flow rate ratio (O2 / (O2+Ar)) of 50% or less, preferably 10% to 30%.

[0131] In addition, in a manufacturing process of the transistor 105t, it is preferable to perform heat treatment while the surface of the oxide 530 is exposed. The heat treatment may be performed, for example, at a temperature of 100° C. or higher and 450° C. or lower, more preferably 350° C. or higher and 400° C. or lower. Note that the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing an oxidizing gas at 10 ppm or higher, 1% or higher, or 10% or higher. For example, the heat treatment is preferably performed in an oxygen atmosphere. In this way, oxygen is supplied to the oxide 530 to reduce oxygen deficiencies (V O ) can be reduced. The heat treatment may be performed under reduced pressure. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen after the heat treatment in a nitrogen gas or inert gas atmosphere. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to compensate for the desorbed oxygen. Alternatively, the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in succession to a heat treatment in a nitrogen gas or inert gas atmosphere.

[0132] By subjecting the oxide 530 to oxygen addition treatment, the oxygen vacancies in the oxide 530 can be repaired by the supplied oxygen, in other words, the reaction of "Vo+O→null" can be promoted. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 530, and the hydrogen can be removed as H2O (dehydrated). As a result, the hydrogen remaining in the oxide 530 recombines with the oxygen vacancies to form V O The formation of H can be suppressed.

[0133] When the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.) (the oxygen is less likely to permeate).

[0134] The insulator 522 preferably has a function of suppressing diffusion of oxygen and impurities, so that oxygen contained in the oxide 530 does not diffuse toward the insulator 516. Furthermore, reaction of the conductor 503 with the insulator 524 or oxygen contained in the oxide 530 can be suppressed.

[0135] The insulator 522 is preferably a single layer or a multilayer insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

[0136] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, which are insulating materials having a function of suppressing diffusion of impurities and oxygen (the oxygen is unlikely to permeate through them). As an insulator containing an oxide of one or both of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like. When the insulator 522 is formed using such a material, the insulator 522 functions as a layer that suppresses release of oxygen from the oxide 530 and the intrusion of impurities such as hydrogen into the oxide 530 from the periphery of the transistor 105t.

[0137] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators.

[0138] In addition, the insulator 524 is preferably thermally stable. For example, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In addition, by combining a high-k material insulator with silicon oxide or silicon oxynitride, it is possible to obtain the insulator 524 having a thermally stable layered structure with a high dielectric constant.

[0139] Note that in this embodiment, the transistor 105t has a second gate insulating film having a two-layer structure represented by the insulator 522 and the insulator 524, but the second gate insulating film may have a single-layer structure, a three-layer structure, or a four-layer or more layer structure. In that case, the second gate insulating film is not limited to a stack structure made of the same material and may have a stack structure made of different materials.

[0140] The transistor 105t uses a metal oxide functioning as an oxide semiconductor for the oxide 530 including the channel formation region. For example, a metal oxide such as In-M-Zn oxide (wherein the element M is one or more elements selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, or the like) may be used for the oxide 530.

[0141] The metal oxide functioning as an oxide semiconductor may be formed by a sputtering method or an ALD (Atomic Layer Deposition) method. Note that the metal oxide functioning as an oxide semiconductor will be described in detail in another embodiment.

[0142] The metal oxide that functions as a channel formation region in the oxide 530 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more. In this manner, by using a metal oxide with a wide band gap, the off-state current of the transistor can be reduced.

[0143] The oxide 530 has the oxide 530a below the oxide 530b, and thus can suppress the diffusion of impurities from components formed below the oxide 530a to the oxide 530b.

[0144] The oxide 530 preferably has a stacked structure of a plurality of oxide layers having different atomic ratios of metal atoms. Specifically, the atomic ratio of element M among the constituent elements in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of element M among the constituent elements in the metal oxide used for the oxide 530b. In addition, the atomic ratio of element M to In in the metal oxide used for the oxide 530a is preferably larger than the atomic ratio of element M to In in the metal oxide used for the oxide 530b. In addition, the atomic ratio of In to element M in the metal oxide used for the oxide 530b is preferably larger than the atomic ratio of In to element M in the metal oxide used for the oxide 530a.

[0145] In addition, it is preferable that the energy of the conduction band minimum of the oxide 530a is higher than that of the oxide 530b, or, in other words, it is preferable that the electron affinity of the oxide 530a is smaller than that of the oxide 530b.

[0146] Here, at the junction between the oxide 530a and the oxide 530b, the energy level of the conduction band minimum changes gradually. In other words, it can be said that the energy level of the conduction band minimum at the junction between the oxide 530a and the oxide 530b changes continuously or is a continuous junction. To achieve this, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b.

[0147] Specifically, the oxide 530a and the oxide 530b have a common element other than oxygen as a main component, so that a mixed layer with a low density of defect states can be formed. For example, when the oxide 530b is an In-Ga-Zn oxide, the oxide 530a may be an In-Ga-Zn oxide, a Ga-Zn oxide, or a gallium oxide.

[0148] At this time, the main path of carriers is the oxide 530b. By making the oxide 530a have the above-mentioned structure, the density of defect states at the interface between the oxide 530a and the oxide 530b can be reduced.

[0149] Conductors 542a and 542b functioning as a source electrode and a drain electrode are provided on the oxide 530b. As the conductors 542a and 542b, it is preferable to use a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, an alloy containing the above-mentioned metal elements as a component, an alloy combining the above-mentioned metal elements, or the like. For example, it is preferable to use tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, or the like. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize, or materials that maintain conductivity even when oxygen is absorbed, and are therefore preferable.Furthermore, metal nitride films such as tantalum nitride are preferable because they have barrier properties against hydrogen or oxygen.

[0150] Although the conductor 542a and the conductor 542b have a single-layer structure in this embodiment, they may have a stacked structure of two or more layers. For example, a tantalum nitride film and a tungsten film may be stacked. A titanium film and an aluminum film may be stacked. Alternatively, a two-layer structure in which an aluminum film is stacked on a tungsten film, a two-layer structure in which a copper film is stacked on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is stacked on a titanium film, or a two-layer structure in which a copper film is stacked on a tungsten film may be used.

[0151] In addition, there are three-layer structures in which a titanium film or titanium nitride film is laminated with an aluminum film or copper film on the titanium film or titanium nitride film, and a titanium film or titanium nitride film is further formed thereon, and a three-layer structure in which a molybdenum film or molybdenum nitride film is laminated with an aluminum film or copper film on the molybdenum film or molybdenum nitride film, and a molybdenum film or molybdenum nitride film is further formed thereon, etc. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[0152] In this embodiment, regions 543a and 543b may be formed as low-resistance regions at and near the interface of the oxide 530 with the conductor 542a (or conductor 542b). In this case, the region 543a functions as one of the source region and the drain region, and the region 543b functions as the other of the source region and the drain region. A channel formation region is formed in a region sandwiched between the regions 543a and 543b.

[0153] By providing the conductor 542a (or the conductor 542b) so as to be in contact with the oxide 530, the oxygen concentration in the region 543a (or the region 543b) may be reduced. Also, a metal compound layer containing a metal contained in the conductor 542a (or the conductor 542b) and a component of the oxide 530 may be formed in the region 543a (or the region 543b). In such a case, the carrier density in the region 543a (or the region 543b) increases, and the region 543a (or the region 543b) becomes a low-resistance region.

[0154] The insulator 544 is provided to cover the conductor 542a and the conductor 542b and suppresses oxidation of the conductor 542a and the conductor 542b. In this case, the insulator 544 may be provided to cover the side surface of the oxide 530 and to be in contact with the insulator 524.

[0155] The insulator 544 can be a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, magnesium, etc. Alternatively, the insulator 544 can be silicon nitride oxide, silicon nitride, or the like.

[0156] In particular, it is preferable to use, as the insulator 544, an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). In particular, hafnium aluminate has higher heat resistance than a hafnium oxide film. Therefore, it is preferable because it is less likely to crystallize in a heat treatment in a later process. Note that the insulator 544 is not an essential component when the conductor 542a and the conductor 542b are made of a material having oxidation resistance or when the conductivity does not decrease significantly even when oxygen is absorbed. It may be designed appropriately depending on the desired transistor characteristics.

[0157] The insulator 544 can prevent impurities such as water and hydrogen contained in the insulator 580 from diffusing to the oxide 530b through the insulator 545. The insulator 580 can also prevent the conductor 560 from being oxidized by excess oxygen contained in the insulator 580.

[0158] The insulator 545 functions as a first gate insulating film. Like the insulator 524 described above, the insulator 545 is preferably formed using an insulator that contains excess oxygen and releases oxygen by heating.

[0159] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and silicon oxide having vacancies can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

[0160] By providing an insulator containing excess oxygen as the insulator 545, oxygen can be effectively supplied from the insulator 545 to a channel formation region of the oxide 530b. Similarly to the insulator 524, the concentration of impurities such as water or hydrogen in the insulator 545 is preferably reduced. The thickness of the insulator 545 is preferably 1 nm or more and 20 nm or less.

[0161] Furthermore, in order to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530, a metal oxide may be provided between the insulator 545 and the conductor 560. The metal oxide preferably suppresses oxygen diffusion from the insulator 545 to the conductor 560. By providing a metal oxide that suppresses oxygen diffusion, the diffusion of excess oxygen from the insulator 545 to the conductor 560 can be suppressed. That is, a decrease in the amount of excess oxygen supplied to the oxide 530 can be suppressed. Furthermore, oxidation of the conductor 560 due to the excess oxygen can be suppressed. As the metal oxide, a material that can be used for the insulator 544 can be used.

[0162] The insulator 545 may have a layered structure, similar to the second gate insulating film. As transistors are miniaturized and highly integrated, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by making the insulator that functions as the gate insulating film have a layered structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. In addition, a layered structure that is thermally stable and has a high relative dielectric constant can be obtained.

[0163] The conductor 560 functioning as the first gate electrode has a two-layer structure in this embodiment, but may have a single layer structure or a stacked structure of three or more layers.

[0164] The conductor 560a is preferably made of a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.). When the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to suppress the conductor 560b from being oxidized by the oxygen contained in the insulator 545 and the conductivity from decreasing. As a conductive material having a function of suppressing the diffusion of oxygen, for example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide is preferably used. Also, an oxide semiconductor applicable to the oxide 530 can be used as the conductor 560a. In that case, the conductor 560a can be formed by a sputtering method to reduce the electrical resistance value of the conductor 560a to make it a conductor. This can be called an OC (Oxide Conductor) electrode.

[0165] The conductor 560b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. The conductor 560b also functions as wiring, so it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. The conductor 560b may have a layered structure, for example, a layered structure of titanium or titanium nitride and the above conductive material.

[0166] The insulator 580 is provided on the conductor 542a and the conductor 542b via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, the insulator 580 preferably has silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having voids, or a resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having voids are preferable because they allow for easy formation of an excess oxygen region in a later step.

[0167] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580 from which oxygen is released by heating, oxygen in the insulator 580 can be efficiently supplied to the oxide 530. Note that the concentration of impurities such as water or hydrogen in the insulator 580 is preferably reduced.

[0168] The opening of the insulator 580 is formed to overlap the region between the conductor 542a and the conductor 542b. As a result, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.

[0169] In miniaturizing a semiconductor device, it is necessary to shorten the gate length, but it is also necessary to prevent the conductivity of the conductor 560 from decreasing. If the film thickness of the conductor 560 is increased for that purpose, the conductor 560 may have a shape with a high aspect ratio. In this embodiment, the conductor 560 is provided so as to be embedded in the opening of the insulator 580, so that even if the conductor 560 has a shape with a high aspect ratio, the conductor 560 can be formed without collapsing during the process.

[0170] The insulator 574 is preferably provided in contact with a top surface of the insulator 580, a top surface of the conductor 560, and a top surface of the insulator 545. By forming the insulator 574 by a sputtering method, excess oxygen regions can be provided in the insulator 545 and the insulator 580. This allows oxygen to be supplied from the excess oxygen regions into the oxide 530.

[0171] For example, the insulator 574 can be a metal oxide containing one or more elements selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, and the like.

[0172] In particular, aluminum oxide has high barrier properties and can suppress the diffusion of hydrogen and nitrogen even in a thin film of 0.5 nm to 3.0 nm. Therefore, aluminum oxide formed by sputtering can function as a barrier film against impurities such as hydrogen as well as an oxygen source.

[0173] An insulator 581 functioning as an interlayer film is preferably provided over the insulator 574. Like the insulator 524, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen.

[0174] The conductor 540a and the conductor 540b are arranged in openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544. The conductor 540a and the conductor 540b are provided facing each other with the conductor 560 interposed therebetween.

[0175] Moreover, the conductor 540c is disposed in an opening formed in the insulator 581, the insulator 574, the insulator 580, the insulator 544, the insulator 524, and the insulator 522. The conductor 540h is disposed in an opening formed in the insulator 581 and the insulator 574.

[0176] The conductor 161, the conductor 162, and the conductor 163 are provided over the insulator 581. An insulator 650 is provided over the insulator 581, the conductor 161, the conductor 162, and the conductor 163. The conductor 150a is provided over the insulator 650, and the insulators 651 and 652 are provided over the insulator 650 and the conductor 150a. The insulators 650, 651, and 652 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like. Furthermore, by using a material with a relatively low dielectric constant for these insulators, parasitic capacitance generated between wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulators 650, 651, and 652. Additionally, the insulator 652 may function as a planarizing film that covers the uneven shape underneath.

[0177] 11 and 12, the conductor 100a, the conductor 102a, and the conductor 102b are provided over the insulator 652. An insulator 653 is provided over the conductor 100a, the conductor 102a, and the conductor 102b. As the insulator 653, the insulator used as the insulator 650, the insulator 651, or the insulator 652 may be used.

[0178] Note that the conductor 150a and the conductor 163 have a region where they overlap with each other with the insulator 650 interposed therebetween in a cross-sectional view, and this region functions as a capacitor 600. The conductor 150a is electrically connected to the conductors 102a and 102b which function as the wiring 102, and the conductor 163 is electrically connected to the conductor 100a which functions as the wiring 100. Thus, one electrode of the capacitor 600 is electrically connected to the wiring 100, and the other electrode is electrically connected to the wiring 102.

[0179] 11 and 12, the conductor 100a, the conductor 102a, and the conductor 102b have regions that face each other with an insulator 653 interposed therebetween in a plan view, and these regions function as a capacitor 601. The conductor 100a functions as the wiring 100, and the conductors 102a and 102b function as the wiring 102. Thus, one electrode of the capacitor 601 is electrically connected to the wiring 100, and the other electrode is electrically connected to the wiring 102.

[0180] In the transistor 105, the conductor 560 functioning as a front gate and the conductor 503 functioning as a back gate are electrically connected to the conductor 150a, and the conductors 542a and 542b functioning as source and drain electrodes are electrically connected to the conductor 163. Thus, the capacitor 101a, which corresponds to the capacitance formed between the source and drain of the transistor 105 and the front gate and the back gate, can be regarded as having one electrode electrically connected to the wiring 100 and the other electrode electrically connected to the wiring 102. Thus, in the semiconductor device of this embodiment, the capacitors 600, 601, and 101a are electrically connected between the wiring 100 and the wiring 102, and therefore noise components of the potential applied to the wiring 100 through these capacitors can be removed. The transistor 105, the capacitor 600, and the capacitor 601 forming the capacitor 101a are stacked in order and have overlapping regions. Therefore, in one embodiment of the present invention, it is possible to suppress malfunction of the circuit 10 or a semiconductor device using the circuit 10, while reducing the layout area of ​​the circuit in a planar view, or to reduce the size of a semiconductor device using the circuit.

[0181] Note that, for the conductor 161, the conductor 162, the conductor 163, the conductor 150a, the conductor 100a, the conductor 102a, and the conductor 102b, a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing the above-mentioned element as a component (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film), etc. can be used. Alternatively, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide has been added can also be used.

[0182] In this embodiment, the conductor 161, the conductor 162, the conductor 163, the conductor 150a, the conductor 100a, the conductor 102a, and the conductor 102b are shown to have a single-layer structure, but the present invention is not limited to this structure and may have a stacked structure of two or more layers. For example, a conductor having barrier properties and a conductor having high adhesion to the conductor having high conductivity may be formed between a conductor having barrier properties and a conductor having high conductivity.

[0183] For example, in this embodiment, a tungsten film is used for the conductor 161, the conductor 162, the conductor 163, and the conductor 150a. Also, for example, in this embodiment, a titanium film, a titanium nitride film, an aluminum film, a titanium film, and a titanium nitride film are stacked in this order for the conductor 100a, the conductor 102a, and the conductor 102b.

[0184] The conductor 540d, the conductor 540g, the conductor 540i, and the conductor 540j are arranged in openings formed in the insulators 652, 651, and 650. The conductor 540e and the conductor 540f are arranged in openings formed in the insulators 652 and 651.

[0185] After the transistor 105t is formed, an opening may be formed to surround the transistor 105t, and an insulator having a high barrier property against hydrogen or water may be formed to cover the opening. By surrounding the transistor 105t with the insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 105t may be collectively surrounded by an insulator having a high barrier property against hydrogen or water. When an opening is formed to surround the transistor 105t, for example, an opening reaching the insulator 522 or the insulator 514 may be formed, and the insulator having a high barrier property may be formed to be in contact with the insulator 522 or the insulator 514, which is preferable because it can omit part of the manufacturing process of the transistor 105t. Note that as the insulator having a high barrier property against hydrogen or water, for example, a material similar to that of the insulator 522 or the insulator 514 may be used.

[0186] With this structure, miniaturization or high integration can be achieved in a semiconductor device including a transistor including an oxide semiconductor.

[0187] Examples of the substrate that can be used in the semiconductor device according to one embodiment of the present invention include a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, a metal substrate (e.g., a stainless steel substrate, a substrate having stainless steel foil, a tungsten substrate, a substrate having tungsten foil, etc.), a semiconductor substrate (e.g., a single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a compound semiconductor substrate, etc.), and an SOI (Silicon on Insulator) substrate. A plastic substrate having heat resistance that can withstand the processing temperature of this embodiment may also be used. Examples of the glass substrate include barium borosilicate glass, aluminosilicate glass, aluminoborosilicate glass, and soda-lime glass. In addition, crystallized glass and the like can be used.

[0188] Alternatively, a flexible substrate, a laminated film, a paper containing a fibrous material, or a base film can be used as the substrate. Examples of flexible substrates, laminated films, base films, etc. include the following. For example, there are plastics such as polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), and polytetrafluoroethylene (PTFE). Alternatively, there are synthetic resins such as acrylic. Alternatively, there are polypropylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Alternatively, there are polyamide, polyimide, aramid resin, epoxy resin, inorganic deposition film, and paper. In particular, by manufacturing transistors using a semiconductor substrate, a single crystal substrate, or an SOI substrate, etc., it is possible to manufacture transistors with small variations in characteristics, size, or shape, high current capacity, and small size. When a circuit is constructed using such transistors, it is possible to reduce the power consumption of the circuit or to increase the integration of the circuit.

[0189] Alternatively, a flexible substrate may be used as the substrate, and transistors, resistors, and / or capacitors may be formed directly on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate and the transistors, resistors, and / or capacitors. The peeling layer can be used to separate a semiconductor device from the substrate after a part or whole of the semiconductor device is completed thereon, and transfer the semiconductor device to another substrate. In this case, the transistors, resistors, and / or capacitors can be transferred to a substrate having poor heat resistance or a flexible substrate. For the peeling layer, for example, a laminated structure of an inorganic film of a tungsten film and a silicon oxide film, a structure in which an organic resin film such as polyimide is formed on a substrate, a silicon film containing hydrogen, or the like can be used.

[0190] That is, the semiconductor device may be formed on a certain substrate, and then the semiconductor device may be transferred to another substrate. Examples of substrates onto which the semiconductor device may be transferred include substrates on which the above-mentioned transistors can be formed, as well as paper substrates, cellophane substrates, aramid film substrates, polyimide film substrates, stone substrates, wood substrates, cloth substrates (including natural fibers (silk, cotton, hemp), synthetic fibers (nylon, polyurethane, polyester), or regenerated fibers (acetate, cupra, rayon, regenerated polyester), etc.), leather substrates, or rubber substrates. By using these substrates, it is possible to manufacture semiconductor devices that are flexible, that are not easily broken, that have heat resistance, and that are lightweight or thin.

[0191] By providing a semiconductor device over a flexible substrate, an increase in weight can be suppressed and a semiconductor device that is less likely to be damaged can be provided.

[0192] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0193] (Embodiment 4) In this embodiment, a structure of the transistor 105 of the semiconductor device described in the above embodiment and a transistor that can be used for the load 103 or the like will be described. As an example, a structure in which transistors having different electrical characteristics are stacked will be described. With this structure, the degree of freedom in designing the semiconductor device can be increased. In addition, by stacking transistors having different electrical characteristics, the degree of integration of the semiconductor device can be increased.

[0194] A part of a cross-sectional structure of a semiconductor device is shown in Fig. 15. The semiconductor device shown in Fig. 15 includes a transistor 550 and a transistor 105t. Although Fig. 15 illustrates the transistor 105t shown in Fig. 12, the transistor 105 shown in Figs. 4 and 5 can also be applied. In Fig. 15, the description in the third embodiment can be applied to components denoted by the same reference numerals as those shown in Figs. 10 to 14.

[0195] In FIG. 15, transistor 105t is disposed above transistor 550.

[0196] The transistor 550 is provided over a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor region 313 made of a part of the substrate 311, a low resistance region 314a functioning as a source region or a drain region, and a low resistance region 314b.

[0197] 15 shows a cross-sectional view of the transistor 550 in the channel length direction, in which the upper surface and the side surface in the channel width direction of the transistor 550 of the semiconductor region 313 are covered with the conductor 316 via the insulator 315. By forming the transistor 550 as a fin type in this manner, the effective channel width is increased, thereby improving the on-characteristics of the transistor 550. Furthermore, the contribution of the electric field of the gate electrode can be increased, thereby improving the off-characteristics of the transistor 550.

[0198] The transistor 550 may be either a p-channel type or an n-channel type.

[0199] The region where the channel of the semiconductor region 313 is formed, the region nearby, the low resistance region 314a which becomes the source region or the drain region, and the low resistance region 314b preferably contain a semiconductor such as a silicon-based semiconductor, and more preferably contain single crystal silicon. Alternatively, they may be formed of a material containing Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like. A configuration using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used. Alternatively, the transistor 550 may be a HEMT (High Electron Mobility Transistor) by using GaAs and GaAlAs, or the like.

[0200] The low resistance region 314a and the low resistance region 314b contain, in addition to the semiconductor material applied to the semiconductor region 313, an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron.

[0201] The conductor 316 functioning as the gate electrode can be made of a conductive material such as a semiconductor material, such as silicon, containing an element that imparts n-type conductivity, such as arsenic or phosphorus, or an element that imparts p-type conductivity, such as boron, a metal material, an alloy material, or a metal oxide material.

[0202] Since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both electrical conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as the conductor in a laminated state, and in particular, it is preferable to use tungsten in terms of heat resistance.

[0203] The transistor 550 may be formed using a silicon on insulator (SOI) substrate or the like.

[0204] The SOI substrate may be a SIMOX (Separation by Implanted Oxygen) substrate formed by implanting oxygen ions into a mirror-polished wafer and then heating at high temperature to form an oxide layer at a certain depth from the surface and eliminate defects in the surface layer, or an SOI substrate formed using the Smart Cut method, which cleaves a semiconductor substrate by utilizing the growth of microvoids formed by hydrogen ion implantation through heat treatment, or the ELTRAN method (registered trademark: Epitaxial Layer Transfer). A transistor formed using a single crystal substrate has a single crystal semiconductor in the channel formation region.

[0205] 15 is an example, and the configuration is not limited thereto. An appropriate transistor may be used depending on the circuit configuration and driving method. For example, the transistor used in the load 103 may be an OS transistor having a configuration similar to that of the transistor 105t. In this case, the front gate and the back gate of the transistor do not need to be electrically connected to each other, and the source, the drain, and the back gate of the transistor do not need to be electrically connected to each other. The connection relationship between the electrodes of the transistor used in the load 103 may be determined appropriately according to the configuration of the circuit used in the load 103.

[0206] In addition, in FIG. 15, the insulator 320, the insulator 322, the insulator 324, and the insulator 326 are stacked in this order to cover the transistor 550.

[0207] As the insulators 320, 322, 324, and 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like can be used.

[0208] The insulator 322 may function as a planarizing film that planarizes steps caused by the transistor 550 or the like provided thereunder. For example, the top surface of the insulator 322 may be planarized by planarization treatment using a chemical mechanical polishing (CMP) method or the like to improve the planarity.

[0209] The insulator 324 is preferably a film having a barrier property that prevents diffusion of hydrogen or impurities from the substrate 311, the transistor 550, or the like to a region where the transistor 105t is provided.

[0210] As an example of a film having a barrier property against hydrogen, for example, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 105t, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 105t and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film that releases a small amount of hydrogen.

[0211] The amount of desorption of hydrogen can be analyzed, for example, by using thermal desorption spectrometry (TDS). For example, the amount of desorption of hydrogen from the insulator 324 is calculated as 10×10 hydrogen atoms per area of ​​the insulator 324 when the surface temperature of the film is in the range of 50° C. to 500° C. in the TDS analysis. 15 atoms / cm 2 Less than or equal to 5×10 15 atoms / cm 2 The following is acceptable.

[0212] The insulator 326 preferably has a lower dielectric constant than the insulator 324. For example, the relative dielectric constant of the insulator 326 is preferably less than 4, and more preferably less than 3. For example, the relative dielectric constant of the insulator 326 is preferably 0.7 times or less, and more preferably 0.6 times or less, the relative dielectric constant of the insulator 324. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

[0213] Conductors 328 and 330, which connect to conductor 503, are embedded in insulators 320, 322, 324, and 326. Conductors 328 and 330 function as plugs or wiring. Conductors that function as plugs or wiring may be collectively assigned the same reference numerals to multiple components. In this specification, the wiring and the plug that connects to the wiring may be integral. That is, there are cases where a part of the conductor functions as the wiring, and cases where a part of the conductor functions as the plug.

[0214] As the material for each plug and wiring (conductor 328, conductor 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used in a single layer or a laminated layer. It is preferable to use a high melting point material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is more preferable to use tungsten. Alternatively, it is preferable to form the plug and wiring from a low resistance conductive material such as aluminum or copper. By using a low resistance conductive material, the wiring resistance can be reduced.

[0215] A wiring layer may be provided over the insulator 326 and the conductor 330. For example, in FIG. 15 , an insulator 350, an insulator 352, and an insulator 354 are stacked in this order. A conductor 356 is formed in the insulator 350, the insulator 352, and the insulator 354. The conductor 356 functions as a plug or wiring connected to the transistor 550. Note that the conductor 356 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0216] Note that, for example, the insulator 350 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 356 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is preferably formed in an opening of the insulator 350 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 105t can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 105t can be suppressed.

[0217] Note that, for example, tantalum nitride or the like may be used as a conductor having a barrier property against hydrogen. By stacking tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 550 can be suppressed while maintaining the conductivity of the wiring. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen be in contact with the insulator 350 having a barrier property against hydrogen.

[0218] A wiring layer may be provided over the insulator 354 and the conductor 356. For example, in FIG. 15, an insulator 360, an insulator 362, and an insulator 364 are stacked in this order. A conductor 366 is formed in the insulator 360, the insulator 362, and the insulator 364. The conductor 366 functions as a plug or a wiring. The conductor 366 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0219] Note that, for example, the insulator 360 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 366 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is preferably formed in an opening of the insulator 360 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 105t can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 105t can be suppressed.

[0220] A wiring layer may be provided over the insulator 364 and the conductor 366. For example, in FIG. 15, an insulator 370, an insulator 372, and an insulator 374 are stacked in this order. A conductor 376 is formed in the insulator 370, the insulator 372, and the insulator 374. The conductor 376 functions as a plug or a wiring. The conductor 376 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0221] Note that, for example, the insulator 370 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 376 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is preferably formed in an opening of the insulator 370 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 105t can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 105t can be suppressed.

[0222] A wiring layer may be provided over the insulator 374 and the conductor 376. For example, in FIG. 15, an insulator 380, an insulator 382, ​​and an insulator 384 are stacked in this order. A conductor 386 is formed in the insulator 380, the insulator 382, ​​and the insulator 384. The conductor 386 functions as a plug or a wiring. Note that the conductor 386 can be provided using a material similar to that of the conductor 328 and the conductor 330.

[0223] Note that, for example, the insulator 380 is preferably an insulator having a barrier property against hydrogen, similar to the insulator 324. The conductor 386 preferably includes a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is preferably formed in an opening of the insulator 380 having a barrier property against hydrogen. With this structure, the transistor 550 and the transistor 105t can be separated by a barrier layer, and diffusion of hydrogen from the transistor 550 to the transistor 105t can be suppressed.

[0224] In the above, a wiring layer including the conductor 356, a wiring layer including the conductor 366, a wiring layer including the conductor 376, and a wiring layer including the conductor 386 have been described, but the semiconductor device of this embodiment is not limited to this. There may be three or fewer wiring layers similar to the wiring layer including the conductor 356, or there may be five or more wiring layers similar to the wiring layer including the conductor 356.

[0225] An insulator 510, an insulator 512, an insulator 514, and an insulator 516 are stacked in this order on the insulator 384. Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 is preferably made of a substance that has a barrier property against oxygen or hydrogen.

[0226] For example, the insulator 510 and the insulator 514 are preferably formed using a film having a barrier property that prevents hydrogen or impurities from diffusing from the substrate 311 or a region where the transistor 550 is provided to a region where the transistor 105t is provided. Therefore, a material similar to that of the insulator 324 can be used.

[0227] As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, when hydrogen diffuses into a semiconductor element having an oxide semiconductor such as the transistor 105t, the characteristics of the semiconductor element may deteriorate. Therefore, it is preferable to use a film that suppresses the diffusion of hydrogen between the transistor 105t and the transistor 550. Specifically, the film that suppresses the diffusion of hydrogen is a film that releases a small amount of hydrogen.

[0228] As a film having a barrier property against hydrogen, for example, the insulator 510 and the insulator 514 are preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0229] In particular, aluminum oxide has a high blocking effect of preventing the permeation of both oxygen and impurities such as hydrogen and moisture, which are factors that cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 105t during and after the manufacturing process of the transistor. In addition, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 105t. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.

[0230] 15, a conductor 503 that can function as a back gate of the transistor 105t and the like are embedded in the insulator 510, the insulator 512, the insulator 514, and the insulator 516. FIG 15 illustrates a case in which the conductor 503 is electrically connected to the conductor 328 through the conductor 386, the conductor 376, the conductor 366, the conductor 356, and the conductor 330.

[0231] 15 illustrates the case where an insulator 582 is provided over an insulator 581. The insulator 582 is preferably made of a substance that has a barrier property against oxygen and hydrogen. Therefore, the insulator 582 can be made of a material similar to that of the insulator 514. For example, the insulator 582 is preferably made of a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

[0232] In particular, aluminum oxide has a high blocking effect of preventing the permeation of both oxygen and impurities such as hydrogen and moisture, which are factors that cause fluctuations in the electrical characteristics of a transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 105t during and after the manufacturing process of the transistor. In addition, aluminum oxide can suppress the release of oxygen from the oxide that constitutes the transistor 105t. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 105t.

[0233] 15, an insulator 586 is provided over the insulator 582. The insulator 586 can be formed using a material similar to that of the insulator 320. By using a material with a relatively low dielectric constant for these insulators, parasitic capacitance between wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 586.

[0234] In addition, in FIG. 15, conductors 540a, 540b, 540c, etc. are embedded in insulators 522, 524, 544, 580, 574, 581, 582, and 586.

[0235] The conductor 540a and the conductor 540b function as a plug or a wiring connected to the conductor 163. The conductor 540c functions as a plug or a wiring connected to the conductor 161. The conductors 540a, 540b, and 540c can be formed using a material similar to that of the conductor 328 and the conductor 330.

[0236] After the transistor 105t is formed, an opening may be formed to surround the transistor 105t, and an insulator having a high barrier property against hydrogen or water may be formed to cover the opening. By surrounding the transistor 105t with the insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside. Alternatively, a plurality of transistors 105t may be collectively surrounded by an insulator having a high barrier property against hydrogen or water. When an opening is formed to surround the transistor 105t, for example, an opening reaching the insulator 522 or the insulator 514 may be formed, and the insulator having a high barrier property may be formed to be in contact with the insulator 522 or the insulator 514, which is preferable because it can omit part of the manufacturing process of the transistor 105t. Note that as the insulator having a high barrier property against hydrogen or water, for example, a material similar to that of the insulator 522 or the insulator 514 may be used.

[0237] Subsequently, a conductor 161 and a conductor 163 are provided above the transistor 105t. An insulator 650 is provided over the conductor 161 and the conductor 163, and a conductor 150a is provided over the insulator 650.

[0238] With this structure, miniaturization or high integration can be achieved in a semiconductor device including a transistor including an oxide semiconductor.

[0239] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0240] (Embodiment 5) In this embodiment, the measurement results of the capacitance value (hereinafter, Cgsd) between the gate and the source and drain of an OS transistor versus the gate-source voltage (hereinafter, gate voltage Vgs) and the simulation results of the capacitance value of a Si transistor versus the gate voltage Vgs are described.

[0241] Fig. 16 shows the configuration of an OS transistor 500A used in the measurements. Fig. 16A is a top view of the OS transistor 500A, Fig. 16B is a cross-sectional view taken along dashed line L1-L2 in Fig. 16A, which corresponds to a cross-sectional view of the OS transistor 500A in the channel length direction, and Fig. 16C is a cross-sectional view taken along dashed line W1-W2 in Fig. 16A, which corresponds to a cross-sectional view of the OS transistor 500A in the channel width direction.

[0242] The configuration of the OS transistor 500A can refer to the transistor 105 shown in FIG. 12. Note that while FIG. 12 shows a configuration in which multiple transistors 105 are connected in parallel, in this embodiment, the capacitance value was measured for a single OS transistor 500A shown in FIG. 16. In FIG. 16, the description in the third embodiment can be applied to components denoted by the same reference numerals as those in FIG. 10 to FIG. 14.

[0243] 16 will be described below in terms of differences from the transistor 105 in FIG. 12. The OS transistor 500A in FIG. 16 includes an oxide 546a between the oxide 530b and the conductor 542a, and an oxide 546b between the oxide 530b and the conductor 542b. In the OS transistor 500A in FIG. 16, an oxide 530c1 and an oxide 530c2 are stacked in this order between the insulator 545 and a bottom and side surfaces of an opening in the insulator 580.

[0244] The configurations of the various conductors and insulators that make up the OS transistor 500A are shown in Table 1 below.

[0245] [Table 1]

[0246] In the OS transistor 500A, the source and drain are connected to each other, and the front gate and back gate are connected to each other.

[0247] In addition, SmartSpice by SILVACO was used to calculate the Cgsd of the Si transistor. The Si transistor has a single gate structure with one gate electrode, and the channel length is 60 nm and the channel width is 80 nm. It is also assumed that the Si transistor has a structure in which the source and drain are connected to each other and the gate is connected to the body.

[0248] 17 shows the Cgsd value when the gate voltage Vgs is changed for the OS transistor 500A and the Si transistor. The Cgsd value is normalized by the channel length and the channel width.

[0249] 17, it is found that the Si transistor has a larger Cgsd value than the OS transistor 500A. It is also found that the OS transistor 500A has a larger difference between the Cgsd value when Vgs is lower than the threshold voltage and the Cgsd value when Vgs is higher than the threshold voltage than the Si transistor. Thus, when the OS transistor 500A is used as the capacitive element 101a, by adopting a configuration in which the transistors 105a and 105b are mixed in the capacitive portion 104 as shown in FIG. 3A and FIG. 3B, even if the power supply potential of the wiring 100 varies, the capacitance value of the combined capacitance of the entire capacitive portion 104 can be suppressed from varying, and the capacitance value per area in a plan view of the capacitive element 101a can be increased. By suppressing the variation in the combined capacitance of the entire capacitive portion 104, it is possible to more effectively prevent malfunction of the circuit 10 or the semiconductor device due to noise components even if the power supply potential of the wiring 100 varies. Furthermore, by increasing the capacitance value per area of ​​the capacitor 101a in a plan view, an increase in the layout area of ​​the circuit 10 can be prevented, and a semiconductor device using the circuit 10 can be miniaturized.

[0250] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0251] (Embodiment 6) In this embodiment, an oxide semiconductor, which is a type of metal oxide, will be described.

[0252] The metal oxide preferably contains at least indium or zinc. In particular, it is preferable that the metal oxide contains indium and zinc. In addition to indium and zinc, it is preferable that the metal oxide contains aluminum, gallium, yttrium, tin, etc. In addition, the metal oxide may contain one or more elements selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc.

[0253] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to Fig. 18A. Fig. 18A is a diagram for explaining classification of crystal structures of oxide semiconductors, typically IGZO (metal oxide containing In, Ga, and Zn).

[0254] As shown in FIG. 18A, oxide semiconductors are broadly classified into "Amorphous", "Crystalline", and "Crystal". "Amorphous" includes completely amorphous. "Crystalline" includes c-axis-aligned crystalline (CAAC), nanocrystalline (nc), and cloud-aligned composite (CAC) (excluding single crystal and poly crystal). "Crystalline" excludes single crystal, poly crystal, and completely amorphous. "Crystal" includes single crystal and poly crystal.

[0255] The structure in the bold frame shown in Fig. 18A is an intermediate state between "Amorphous" and "Crystal" and belongs to a new boundary region (new crystalline phase). In other words, this structure is completely different from the energetically unstable "Amorphous" and "Crystal".

[0256] The crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD) spectrum. FIG. 18B shows an XRD spectrum obtained by GIXD (Grazing-Incidence XRD) measurement of the CAAC-IGZO film classified as "Crystalline". The GIXD method is also called the thin film method or the Seemann-Bohlin method. Hereinafter, the XRD spectrum obtained by the GIXD measurement shown in FIG. 18B will be simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in FIG. 18B is in the vicinity of In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 18B is 500 nm.

[0257] As shown in Figure 18B, a peak indicating clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film. Specifically, a peak indicating c-axis orientation is detected near 2θ=31° in the XRD spectrum of the CAAC-IGZO film. Note that, as shown in Figure 18B, the peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity is detected.

[0258] The crystal structure of the film or substrate can be evaluated by a diffraction pattern (also called a nanobeam electron diffraction pattern) observed by nanobeam electron diffraction (NBED). The diffraction pattern of the CAAC-IGZO film is shown in FIG. 18C. FIG. 18C shows a diffraction pattern observed by NBED, which causes an electron beam to be incident parallel to the substrate. The composition of the CAAC-IGZO film shown in FIG. 18C is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In the nanobeam electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0259] As shown in FIG. 18C, multiple spots indicating c-axis orientation are observed in the diffraction pattern of the CAAC-IGZO film.

[0260] <<Structure of oxide semiconductor>> In addition, when focusing on the crystal structure, oxide semiconductors may be classified differently from that shown in FIG. 18A. For example, oxide semiconductors are divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. Examples of non-single-crystal oxide semiconductors include the above-mentioned CAAC-OS and nc-OS. In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, amorphous-like oxide semiconductors (a-like OS), amorphous oxide semiconductors, and the like.

[0261] Here, the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described in detail.

[0262] [CAAC-OS] CAAC-OS is an oxide semiconductor having a plurality of crystalline regions, each of which has a c-axis aligned in a specific direction. The specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface on which the CAAC-OS film is formed, or the normal direction of the surface of the CAAC-OS film. The crystalline region is a region having periodic atomic arrangement. If the atomic arrangement is considered as a lattice arrangement, the crystalline region is also a region with a uniform lattice arrangement. CAAC-OS has a region in which a plurality of crystalline regions are connected in the ab-plane direction, and the region may have distortion. The distortion refers to a portion in which the direction of the lattice arrangement changes between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement in the region in which the plurality of crystalline regions are connected. In other words, CAAC-OS is an oxide semiconductor having a c-axis aligned and no clear orientation in the ab-plane direction.

[0263] Each of the multiple crystalline regions is composed of one or more minute crystals (crystals with a maximum diameter of less than 10 nm). When a crystalline region is composed of one minute crystal, the maximum diameter of the crystalline region is less than 10 nm. When a crystalline region is composed of many minute crystals, the size of the crystalline region may be about several tens of nm.

[0264] In addition, in an In-M-Zn oxide (wherein element M is one or more elements selected from aluminum, gallium, yttrium, tin, titanium, etc.), the CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) in which a layer containing indium (In) and oxygen (hereinafter, In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are stacked. Note that indium and element M are mutually substituted. Thus, the (M, Zn) layer may contain indium. Also, the In layer may contain element M. Note that the In layer may contain Zn. The layered structure is observed as a lattice image in a high-resolution TEM image, for example.

[0265] When the CAAC-OS film is subjected to structural analysis using, for example, an XRD device, a peak indicating c-axis orientation is detected at or near 2θ=31° in out-of-plane XRD measurement using θ / 2θ scan. Note that the position of the peak indicating c-axis orientation (2θ value) may vary depending on the type and composition of the metal elements constituting the CAAC-OS.

[0266] For example, a plurality of bright points (spots) are observed in the electron diffraction pattern of the CAAC-OS film, and the two spots are observed at positions symmetrical to each other with respect to the spot of the incident electron beam that has passed through the sample (also called the direct spot).

[0267] When the crystal region is observed from the specific direction, the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit cell is not necessarily a regular hexagon and may be a non-regular hexagon. The above distortion may have a pentagonal or heptagonal lattice arrangement. In addition, no clear grain boundary can be confirmed in the CAAC-OS even in the vicinity of the distortion. That is, it is found that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is considered to be because the CAAC-OS can tolerate distortion due to the fact that the arrangement of oxygen atoms is not dense in the ab-plane direction and the bond distance between atoms changes due to the substitution of metal atoms.

[0268] A crystal structure in which clear grain boundaries are observed is called a polycrystal. The grain boundaries are likely to become recombination centers and capture carriers, causing a decrease in the on-current of a transistor and a decrease in field effect mobility. Therefore, CAAC-OS in which clear grain boundaries are not observed is one of the crystalline oxides having a crystal structure suitable for a semiconductor layer of a transistor. In order to configure a CAAC-OS, it is preferable to have Zn. For example, In-Zn oxide and In-Ga-Zn oxide are suitable because they can suppress the occurrence of grain boundaries more than In oxide.

[0269] The CAAC-OS is an oxide semiconductor with high crystallinity and no clear crystal grain boundaries. Therefore, it can be said that the CAAC-OS is less susceptible to a decrease in electron mobility due to crystal grain boundaries. In addition, since the crystallinity of an oxide semiconductor can be decreased by the inclusion of impurities or the generation of defects, the CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of an oxide semiconductor having the CAAC-OS are stable. Therefore, an oxide semiconductor having the CAAC-OS is resistant to heat and has high reliability. In addition, the CAAC-OS is stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, the use of the CAAC-OS in an OS transistor can increase the degree of freedom in the manufacturing process.

[0270] [nc-OS] The nc-OS has periodic atomic arrangement in a minute region (for example, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). In other words, the nc-OS has minute crystals. Note that the size of the minute crystals is, for example, 1 nm to 10 nm, particularly 1 nm to 3 nm, and therefore the minute crystals are also called nanocrystals. In addition, the nc-OS does not show regularity in the crystal orientation between different nanocrystals. Therefore, no orientation is seen in the entire film. Therefore, depending on the analysis method, the nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor. For example, when a structure analysis is performed on an nc-OS film using an XRD device, no peak indicating crystallinity is detected in out-of-plane XRD measurement using θ / 2θ scan. In addition, when an nc-OS film is subjected to electron diffraction (also called selected area electron diffraction) using an electron beam with a probe diameter larger than that of nanocrystals (for example, 50 nm or more), a diffraction pattern like a halo pattern is observed. On the other hand, when electron diffraction (also called nanobeam electron diffraction) is performed on an nc-OS film using an electron beam with a probe diameter close to the size of a nanocrystal or smaller than the nanocrystal (for example, 1 nm to 30 nm), an electron diffraction pattern in which multiple spots are observed within a ring-shaped region centered on the direct spot may be obtained.

[0271] [a-like OS] The a-like OS is an oxide semiconductor having a structure between the nc-OS and an amorphous oxide semiconductor. The a-like OS has a void or low-density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS. Moreover, the a-like OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0272] <<Oxide semiconductor structure>> Next, the above-mentioned CAC-OS will be described in detail, with particular reference to the material configuration of the CAC-OS.

[0273] [CAC-OS] CAC-OS is, for example, a material configuration in which elements constituting a metal oxide are unevenly distributed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof. In the following, a state in which one or more metal elements are unevenly distributed in a metal oxide and the regions having the metal elements are mixed in a size range of 0.5 nm to 10 nm, preferably 1 nm to 3 nm, or in the vicinity thereof, is also referred to as a mosaic or patch state.

[0274] Furthermore, CAC-OS is a composite metal oxide in which the first and second regions are mixed together, forming a mosaic structure in which the first regions are distributed throughout the film (also called a cloud structure).

[0275] Here, the atomic ratios of In, Ga, and Zn to the metal elements constituting the CAC-OS in the In-Ga-Zn oxide are represented as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS in the In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. Also, the second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Alternatively, for example, the first region is a region where [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region. Also, the second region is a region where [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.

[0276] Specifically, the first region is a region mainly composed of indium oxide, indium zinc oxide, etc., and the second region is a region mainly composed of gallium oxide, gallium zinc oxide, etc. In other words, the first region can be rephrased as a region mainly composed of In, and the second region can be rephrased as a region mainly composed of Ga.

[0277] In addition, there are cases where a clear boundary between the first region and the second region cannot be observed.

[0278] For example, in the case of a CAC-OS made of In-Ga-Zn oxide, EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX) confirms that a region mainly composed of In (first region) and a region mainly composed of Ga (second region) are unevenly distributed and mixed.

[0279] When CAC-OS is used in a transistor, the conductivity due to the first region and the insulating property due to the second region act in a complementary manner, giving the CAC-OS a switching function (the ability to switch between On and Off). In other words, CAC-OS has a conductive function in some parts of the material, an insulating function in other parts of the material, and the material as a whole functions as a semiconductor. By separating the conductive function from the insulating function, it is possible to maximize both functions. Therefore, by using CAC-OS in a transistor, it is possible to achieve a high on-current (I on ), high field-effect mobility (μ), and high-speed switching operation can be achieved.

[0280] Oxide semiconductors have a variety of structures and have different characteristics. The oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, a CAC-OS, an nc-OS, and a CAAC-OS.

[0281] <Transistor Having Oxide Semiconductor> Next, the case where the oxide semiconductor is used for a transistor will be described.

[0282] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility and high reliability can be realized.

[0283] For the transistor, an oxide semiconductor having a low carrier concentration is preferably used. For example, the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than or equal to 1×10 15 cm -3 Less than 1×10, more preferably 13 cm -3 Less than or equal to 1×10 11 cm -3 Less than 1×10, more preferably 10 cm -3 Less than 1 x 10 -9cm -3 The above is the case. Note that in order to reduce the carrier concentration of an oxide semiconductor film, the impurity concentration in the oxide semiconductor film may be reduced to reduce the density of defect states. In this specification and the like, an oxide semiconductor having a low impurity concentration and a low density of defect states is referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Note that an oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.

[0284] Furthermore, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states, and therefore the density of trap states might also be low.

[0285] In addition, charges trapped in the trap states of an oxide semiconductor take a long time to disappear and may behave as if they are fixed charges. Therefore, a transistor in which a channel formation region is formed in an oxide semiconductor with a high density of trap states may have unstable electrical characteristics.

[0286] Therefore, in order to stabilize the electrical characteristics of a transistor, it is effective to reduce the impurity concentration in the oxide semiconductor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in a nearby film. Examples of impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

[0287] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0288] When an oxide semiconductor contains silicon or carbon, which is one of the group 14 elements, defect levels are formed. For this reason, the concentration of silicon or carbon in the oxide semiconductor and the concentration of silicon or carbon near the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are calculated as 2×10 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm3 The following applies.

[0289] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, defect states may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. For this reason, when the concentration of an alkali metal or an alkaline earth metal in an oxide semiconductor obtained by SIMS is 1×10 18 atoms / cm 3 Less than or equal to 2×10 16 atoms / cm 3 To the following:

[0290] Furthermore, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to have normally-on characteristics. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in an oxide semiconductor obtained by SIMS is set to 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 To the following:

[0291] Furthermore, hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. In addition, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. For this reason, it is preferable to reduce hydrogen in the oxide semiconductor as much as possible. Specifically, when the hydrogen concentration in an oxide semiconductor measured by SIMS is 1×10 20 atoms / cm 3 Less than 1 x 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0292] When an oxide semiconductor in which impurities are sufficiently reduced is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0293] The configurations, structures, methods, and the like described in this embodiment can be used in appropriate combination with the configurations, structures, methods, and the like described in other embodiment modes and examples.

[0294] (Embodiment 7) In this embodiment, an application example of the above-mentioned semiconductor device will be described.

[0295] [Semiconductor wafers, chips] 19A illustrates a top view of a substrate 711 before a dicing process is performed. For example, a semiconductor substrate (also referred to as a "semiconductor wafer") can be used as the substrate 711. A plurality of circuit regions 712 are provided over the substrate 711. The circuit region 712 can include a semiconductor device according to one embodiment of the present invention, a CPU, an RF tag, an image sensor, or the like.

[0296] Each of the multiple circuit regions 712 is surrounded by an isolation region 713. Separation lines (also called "dicing lines") 714 are set at positions overlapping the isolation regions 713. By cutting the substrate 711 along the separation lines 714, chips 715 including the circuit regions 712 can be cut out from the substrate 711. An enlarged view of the chips 715 is shown in FIG. 19B.

[0297] Also, a conductive layer or a semiconductor layer may be provided in the separation region 713. By providing a conductive layer or a semiconductor layer in the separation region 713, ESD that may occur during the dicing process can be mitigated, and a decrease in the yield of the dicing process can be prevented. Generally, the dicing process is performed while pure water in which carbon dioxide gas or the like is dissolved to reduce the resistivity is flowed through the cutting portion for the purpose of cooling the substrate, removing shavings, preventing static electricity, and the like. By providing a conductive layer or a semiconductor layer in the separation region 713, the amount of the pure water used can be reduced. Therefore, the production cost of the semiconductor device can be reduced. Also, the productivity of the semiconductor device can be increased.

[0298] It is preferable to use a material having a band gap of 2.5 eV to 4.2 eV, preferably 2.7 eV to 3.5 eV, for the semiconductor layer provided in the separation region 713. By using such a material, the accumulated charge can be slowly discharged, so that the sudden movement of charge due to ESD can be suppressed, and electrostatic breakdown can be made less likely to occur.

[0299] [Electronic Components] An example of applying chip 715 to an electronic component will be described with reference to Fig. 20. The electronic component is also called a semiconductor package or an IC package. There are multiple standards and names for electronic components depending on the terminal extraction direction and terminal shape.

[0300] The electronic component is completed by combining the semiconductor device shown in the above-described embodiment with components other than the semiconductor device in an assembly process (post-process).

[0301] The post-process will be described with reference to the flow chart shown in Fig. 20A. After the element substrate having the semiconductor device shown in the above embodiment is completed in the pre-process, a "back grinding process" is performed to grind the back surface of the element substrate (the surface on which the semiconductor device is not formed) (step S721). By thinning the element substrate by grinding, warping of the element substrate can be reduced, and electronic components can be made smaller.

[0302] Next, a "dicing process" is performed to separate the element substrate into a plurality of chips (chips 715) (step S722). Then, a "die bonding process" is performed to pick up the separated chips individually and bond them onto a lead frame (step S723). The bonding between the chip and the lead frame in the die bonding process is performed by a method that is appropriate for the product, such as bonding with resin or bonding with tape. Note that the chip may be bonded onto an interposer substrate instead of a lead frame.

[0303] Next, a "wire bonding process" is performed in which the leads of the lead frame and the electrodes on the chip are electrically connected with thin metal wires (step S724). Silver wires or gold wires can be used as the thin metal wires. The wire bonding can be ball bonding or wedge bonding.

[0304] The wire-bonded chip is subjected to an "encapsulation process (molding process)" in which it is encapsulated with epoxy resin or the like (step S725). By carrying out the encapsulation process, the inside of the electronic component is filled with resin, which makes it possible to protect the circuitry built into the chip and the wires connecting the chip and the leads from external mechanical forces, and also reduces deterioration of characteristics (reduced reliability) due to moisture and dust.

[0305] Next, a "lead plating process" is performed to plate the leads of the lead frame (step S726). The plating process prevents the leads from rusting, and allows for more reliable soldering when mounting the leads on a printed circuit board later. Next, a "forming process" is performed to cut and form the leads (step S727).

[0306] Next, a "marking process" is performed in which a printing process (marking) is performed on the surface of the package (step S728).Then, an "inspection process" (step S729) is performed to check whether the external shape is good or not, whether there are any operational defects, etc., and the electronic component is completed (step S729).

[0307] 20B shows a perspective schematic diagram of a completed electronic component. In FIG. 20B, a perspective schematic diagram of a QFP (Quad Flat Package) is shown as an example of an electronic component. Electronic component 750 shown in FIG. 20B has leads 755 and semiconductor device 753. As semiconductor device 753, the semiconductor device shown in the above embodiment or the like can be used.

[0308] 20B is mounted on, for example, a printed circuit board 752. A plurality of such electronic components 750 are combined and electrically connected on the printed circuit board 752 to complete a board on which electronic components are mounted (mounted board 754). The completed mounted board 754 is used in electronic devices and the like.

[0309] [Electronic equipment] Next, examples of electronic devices including the semiconductor device or the electronic component according to one embodiment of the present invention will be described with reference to FIGS.

[0310] Examples of electronic devices using the semiconductor device or electronic component according to one embodiment of the present invention include display devices such as televisions and monitors, lighting devices, desktop or notebook personal computers, word processors, and DVD (Digital Versatile Examples of such devices include image playback devices that play back still or moving images stored in a recording medium such as a portable CD player, a radio, a tape recorder, a headphone stereo, a stereo, a table clock, a wall clock, a cordless telephone handset, a transceiver, a mobile phone, a car telephone, a portable game machine, a tablet terminal, a large game machine such as a pachinko machine, a calculator, a portable information terminal (also called a "mobile information terminal"), an electronic organizer, an electronic book terminal, an electronic translator, a voice input device, a video camera, a digital still camera, an electric shaver, a high-frequency heating device such as a microwave oven, an electric rice cooker, an electric washing machine, an electric vacuum cleaner, a hot water heater, an electric fan, a hair dryer, an air conditioning device such as an air conditioner, a humidifier, a dehumidifier, a dishwasher, a dish dryer, a clothes dryer, a futon dryer, an electric refrigerator, an electric freezer, an electric refrigerator-freezer, a DNA storage freezer, a flashlight, a tool such as a chainsaw, a smoke detector, a medical device such as a dialysis machine, and the like. Further examples include industrial equipment such as emergency lights, traffic lights, belt conveyors, elevators, escalators, industrial robots, power storage systems, and power storage devices for power leveling and smart grids.

[0311] In addition, moving objects propelled by an electric motor using electric power from a power storage device are also included in the category of electronic devices. Examples of the moving objects include electric vehicles (EVs), hybrid vehicles (HEVs) that combine an internal combustion engine and an electric motor, plug-in hybrid vehicles (PHEVs), tracked vehicles in which the tires and wheels of these vehicles are replaced with tracks, mopeds including electrically assisted bicycles, motorcycles, electric wheelchairs, golf carts, small or large ships, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary probes, spaceships, and the like.

[0312] The semiconductor device or electronic component according to one embodiment of the present invention can be used in a communication device or the like built into these electronic devices.

[0313] The electronic device may have sensors (sensors including those that have the function of measuring force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared light), etc.

[0314] Electronic devices can have various functions, such as a function to display various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function to display a calendar, date, or time, a function to execute various software (programs), a wireless communication function, a function to read out programs or data recorded on a recording medium, and the like.

[0315] 21 and 22A to 22F show examples of electronic devices. In FIG. 21, a display device 8000 is an example of an electronic device using a semiconductor device 8004 according to one embodiment of the present invention. Specifically, the display device 8000 corresponds to a display device for receiving a TV broadcast and includes a housing 8001, a display portion 8002, a speaker portion 8003, a semiconductor device 8004, a power storage device 8005, and the like. The semiconductor device 8004 according to one embodiment of the present invention is provided inside the housing 8001. The semiconductor device 8004 can hold control information, a control program, and the like. The semiconductor device 8004 has a communication function, and can cause the display device 8000 to function as an IoT device. The display device 8000 can receive power from a commercial power source and can use power stored in the power storage device 8005.

[0316] The display unit 8002 can be a liquid crystal display device, a light-emitting display device having a light-emitting element such as an organic EL element in each pixel, an electrophoretic display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), an FED (Field Emission Display), or other display device.

[0317] The display device includes all display devices for displaying information, such as display devices for receiving TV broadcasts, display devices for personal computers, display devices for advertisements, and the like.

[0318] In FIG. 21, a stationary lighting device 8100 is an example of an electronic device using a semiconductor device 8103 according to one embodiment of the present invention. Specifically, the lighting device 8100 includes a housing 8101, a light source 8102, a semiconductor device 8103, a power storage device 8105, and the like. FIG. 21 illustrates an example in which the semiconductor device 8103 is provided inside a ceiling 8104 on which the housing 8101 and the light source 8102 are installed; however, the semiconductor device 8103 may be provided inside the housing 8101. The semiconductor device 8103 can hold information such as the light emission luminance of the light source 8102, a control program, and the like. The semiconductor device 8103 has a communication function, and can cause the lighting device 8100 to function as an IoT device. The lighting device 8100 can receive power from a commercial power source and can use power stored in a power storage device.

[0319] Note that although FIG. 21 illustrates an example of a stationary lighting device 8100 provided on a ceiling 8104, the semiconductor device according to one embodiment of the present invention can also be used in a stationary lighting device provided on a surface other than the ceiling 8104, such as a side wall 8405, a floor 8406, or a window 8407, or can also be used in a tabletop lighting device.

[0320] An artificial light source that artificially obtains light using electric power can be used as the light source 8102. Specifically, examples of the artificial light source include discharge lamps such as incandescent lamps and fluorescent lamps, and light-emitting elements such as LEDs and organic EL elements.

[0321] In FIG. 21, an air conditioner including an indoor unit 8200 and an outdoor unit 8204 is an example of an electronic device using a semiconductor device 8203 according to one embodiment of the present invention. Specifically, the indoor unit 8200 includes a housing 8201, an air outlet 8202, a semiconductor device 8203, a power storage device 8205, and the like. FIG. 21 illustrates the case where the semiconductor device 8203 is provided in the indoor unit 8200, but the semiconductor device 8203 may be provided in the outdoor unit 8204. Alternatively, the semiconductor device 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204. The semiconductor device 8203 can hold control information, a control program, and the like for the air conditioner. The semiconductor device 8203 has a communication function, and can cause the air conditioner to function as an IoT device. The air conditioner can receive power from a commercial power source and can use power stored in the power storage device 8205.

[0322] Note that although FIG. 21 illustrates an example of a separate-type air conditioner including an indoor unit and an outdoor unit, the semiconductor device of one embodiment of the present invention can also be used in an integrated air conditioner in which the functions of the indoor unit and the outdoor unit are combined in one housing.

[0323] 21, an electric refrigerator-freezer 8300 is an example of an electronic device including a semiconductor device 8304 according to one embodiment of the present invention. Specifically, the electric refrigerator-freezer 8300 includes a housing 8301, a refrigerator door 8302, a freezer door 8303, a semiconductor device 8304, a power storage device 8305, and the like. In FIG. 21, the power storage device 8305 is provided inside the housing 8301. The semiconductor device 8304 can hold control information and a control program for the electric refrigerator-freezer 8300. The semiconductor device 8304 has a communication function, and can cause the electric refrigerator-freezer 8300 to function as an IoT device. The electric refrigerator-freezer 8300 can receive power from a commercial power source and can use power stored in the power storage device 8305.

[0324] 22A shows an example of a wristwatch-type portable information terminal. The portable information terminal 6100 includes a housing 6101, a display unit 6102, a band 6103, operation buttons 6105, and the like. The portable information terminal 6100 also includes a secondary battery and a semiconductor device or electronic component according to one embodiment of the present invention. By using the semiconductor device or electronic component according to one embodiment of the present invention in the portable information terminal 6100, the portable information terminal 6100 can function as an IoT device.

[0325] 22B shows an example of a mobile phone. A mobile information terminal 6200 includes a display portion 6202 incorporated in a housing 6201, an operation button 6203, a speaker 6204, a microphone 6205, and the like.

[0326] The portable information terminal 6200 also includes a fingerprint sensor 6209 in an area overlapping with the display unit 6202. The fingerprint sensor 6209 may be an organic light sensor. Since fingerprints are different for each person, a fingerprint pattern can be obtained by the fingerprint sensor 6209 to perform personal authentication. Light emitted from the display unit 6202 can be used as a light source for obtaining the fingerprint pattern by the fingerprint sensor 6209.

[0327] The portable information terminal 6200 includes a secondary battery and a semiconductor device or electronic component according to one embodiment of the present invention. When the semiconductor device or electronic component according to one embodiment of the present invention is used in the portable information terminal 6200, the portable information terminal 6200 can function as an IoT device.

[0328] 22C shows an example of a cleaning robot. The cleaning robot 6300 has a display unit 6302 arranged on the top surface of a housing 6301, a plurality of cameras 6303 arranged on the side surface, a brush 6304, an operation button 6305, various sensors, and the like. Although not shown, the cleaning robot 6300 is provided with tires, a suction port, and the like. The cleaning robot 6300 can move by itself, detect dust 6310, and suck up the dust from a suction port provided on the bottom surface.

[0329] For example, the cleaning robot 6300 can analyze an image captured by the camera 6303 and determine the presence or absence of an obstacle such as a wall, furniture, or a step. When an object that may become entangled in the brush 6304, such as a wire, is detected by image analysis, the cleaning robot 6300 can stop rotation of the brush 6304. The cleaning robot 6300 includes a secondary battery and a semiconductor device or electronic component according to one embodiment of the present invention. By using the semiconductor device or electronic component according to one embodiment of the present invention in the cleaning robot 6300, the cleaning robot 6300 can function as an IoT device.

[0330] Fig. 22D shows an example of a robot. The robot 6400 shown in Fig. 22D includes a computing device 6409, an illuminance sensor 6401, a microphone 6402, an upper camera 6403, a speaker 6404, a display unit 6405, a lower camera 6406, an obstacle sensor 6407, and a moving mechanism 6408.

[0331] The microphone 6402 has a function of detecting the user's voice, environmental sounds, etc. The speaker 6404 has a function of emitting sound. The robot 6400 can communicate with the user using the microphone 6402 and the speaker 6404.

[0332] The display unit 6405 has a function of displaying various information. The robot 6400 can display information desired by the user on the display unit 6405. The display unit 6405 may be equipped with a touch panel. The display unit 6405 may also be a removable information terminal, and by installing it in a fixed position on the robot 6400, charging and data transmission / reception are possible.

[0333] The upper camera 6403 and the lower camera 6406 have a function of capturing an image of the surroundings of the robot 6400. In addition, the obstacle sensor 6407 can detect the presence or absence of an obstacle in the moving direction when the robot 6400 moves forward using the moving mechanism 6408. The robot 6400 can recognize the surrounding environment and move safely using the upper camera 6403, the lower camera 6406, and the obstacle sensor 6407. The light-emitting device of one embodiment of the present invention can be used for the display portion 6405.

[0334] The robot 6400 includes a secondary battery and a semiconductor device or electronic component according to one embodiment of the present invention. When the semiconductor device or electronic component according to one embodiment of the present invention is used in the robot 6400, the robot 6400 can function as an IoT device.

[0335] Fig. 22E shows an example of an aircraft. The aircraft 6500 shown in Fig. 22E has a propeller 6501, a camera 6502, a battery 6503, and the like, and has a function of flying autonomously.

[0336] For example, image data captured by the camera 6502 is stored in the electronic component 6504. The electronic component 6504 can analyze the image data and detect the presence or absence of an obstacle when moving. The electronic component 6504 can estimate the remaining battery charge from a change in the storage capacity of the battery 6503. The flying object 6500 includes therein a semiconductor device or electronic component according to one embodiment of the present invention. By using the semiconductor device or electronic component according to one embodiment of the present invention in the flying object 6500, the flying object 6500 can function as an IoT device.

[0337] 22F illustrates an example of an automobile. The automobile 7160 includes an engine, tires, brakes, a steering device, a camera, and the like. The automobile 7160 includes a semiconductor device or electronic component according to one embodiment of the present invention inside. By using the semiconductor device or electronic component according to one embodiment of the present invention in the automobile 7160, the automobile 7160 can function as an IoT device.

[0338] The configurations, structures, methods, and the like shown in this embodiment can be used in appropriate combination with the configurations, structures, methods, and the like shown in other embodiment modes and embodiments.

[0339] (Embodiment 8) A semiconductor device according to one embodiment of the present invention includes a normally-off CPU (also referred to as an "Noff-CPU"), etc. Note that an Noff-CPU is an integrated circuit including a normally-off transistor that is in a non-conducting state (also referred to as an off state) even when a gate voltage is 0 V.

[0340] The Noff-CPU can stop the power supply to circuits in the Noff-CPU that are not required to operate, and put the circuits into a standby state. When the power supply is stopped and the circuits are in a standby state, no power is consumed. Thus, the Noff-CPU can minimize power consumption. The Noff-CPU can also retain information necessary for operation, such as setting conditions, for a long period of time even if the power supply is stopped. To return from the standby state, it is only necessary to resume the power supply to the circuit, and there is no need to rewrite the setting conditions, etc. In other words, high-speed return from the standby state is possible. In this way, the Noff-CPU can reduce power consumption without significantly reducing the operating speed.

[0341] The Noff-CPU can be suitably used in small-scale systems such as IoT terminal devices (also called "endpoint microcomputers") 803 in the IoT field.

[0342] Fig. 23 shows the hierarchical structure of an IoT network and trends in required specifications. In Fig. 23, power consumption 804 and processing performance 805 are shown as required specifications. The hierarchical structure of an IoT network is broadly divided into an upper layer, the cloud field 801, and a lower layer, the embedded field 802. The cloud field 801 includes, for example, servers. The embedded field 802 includes, for example, machines, industrial robots, in-vehicle devices, home appliances, etc.

[0343] The higher the layer, the more the processing performance is required rather than low power consumption. Therefore, in the cloud field 801, high-performance CPUs, high-performance GPUs, large-scale SoCs (System on a Chip), and the like are used. Also, the lower the layer, the more the processing performance is required rather than low power consumption, and the number of devices increases explosively. The semiconductor device according to one embodiment of the present invention can be suitably used for a communication device of an IoT terminal device that requires low power consumption.

[0344] Incidentally, the term "endpoint" refers to a terminal area of ​​the embedded field 802. Devices used as end points include, for example, microcomputers used in factories, home appliances, infrastructure, agriculture, and the like.

[0345] FIG. 24 illustrates an image of factory automation as an application example of an endpoint microcontroller. A factory 884 is connected to a cloud 883 via an Internet line. The cloud 883 is connected to a home 881 and an office 882 via the Internet line. The Internet line may be a wired communication system or a wireless communication system. For example, in the case of a wireless communication system, a semiconductor device according to one embodiment of the present invention may be used in a communication device to perform wireless communication according to a communication standard such as a fourth generation mobile communication system (4G) or a fifth generation mobile communication system (5G). The factory 884 may be connected to a factory 885 and a factory 886 via the Internet line.

[0346] The factory 884 has a master device (control device) 831. The master device 831 has a function of connecting to a cloud 883 and transmitting and receiving information. The master device 831 is also connected to a plurality of industrial robots 842 included in an IoT terminal device 841 via an M2M (Machine to Machine) interface 832. As the M2M interface 832, for example, industrial Ethernet ("Ethernet" is a registered trademark), which is a type of wired communication method, or local 5G, which is a type of wireless communication method, may be used.

[0347] A factory manager can connect to a factory 884 via a cloud 883 from a home 881 or an office 882 and know the operation status, etc. Also, he can check for incorrect or missing items, give instructions on where to put them, measure takt time, etc.

[0348] In recent years, the introduction of IoT into factories, labelled as "smart factories," has been progressing worldwide. Examples of smart factories have been reported in which endpoint microcomputers are used not only for simple inspection and auditing, but also for fault detection and anomaly prediction.

[0349] Small-scale systems such as endpoint microcontrollers often consume little power overall during operation, so the power saving effect of a Noff-CPU during standby operation is significant. On the other hand, in the field of embedded IoT, quick response is sometimes required, and the use of a Noff-CPU makes it possible to achieve high-speed recovery from standby operation.

[0350] The configurations, structures, methods, and the like described in this embodiment can be used in appropriate combination with the configurations, structures, methods, and the like described in other embodiment modes and examples. [Explanation of symbols]

[0351] S721: step, S722: step, S723: step, S724: step, S725: step, S726: step, S727: step, S728: step, S729: step, 10: circuit, 20: semiconductor device, 100: wiring, 100a: conductor, 101: capacitance element, 101a: capacitance element, 102: wiring, 102a: conductor, 102b: conductor, 102c: conductor, 102d: conductor, 102e: conductor, 102f: conductor, 102g: conductor, 102h: conductor, 102i: conductor, 102j: conductor, 103: load, 103a: monsource amplifier, 104: capacitance section, 105: transistor, 105a: transistor, 105b: transistor, 105t: transistor, 120: DCDC converter, 121: smoothing circuit, 122: inductor, 123: capacitance element, 125: terminal, 127: matching circuit, 128: matching circuit, 129: transistor, 130: wiring, 131: capacitance element, 132: inductor, 133: inductor, 134: capacitance element, 150a: conductor, 150b: conductor, 150c: conductor, 150d: conductor, 150e: conductor, 150f: conductor, 150g: conductor, 150h: conductor, 150i: conductor, 150j: conductor, 160: region, 161: conductor, 162: conductor, 163: conductor, 200: wiring, 311: substrate, 313: semiconductor region, 314a: low resistance region, 314b: low resistance region, 315: insulator, 316: conductor, 320: insulator, 322: insulator, 324: insulator, 326: insulator, 328: conductor, 330: conductor, 350: insulator, 352: insulator, 354: insulator, 356: conductor, 360: insulator, 362: insulator, 364: insulator, 366: conductor, 370: insulator, 372: insulator, 37 4: insulator, 376: conductor, 380: insulator, 382: insulator, 384: insulator, 386: conductor, 500A: OS transistor, 503: conductor, 503a: conductor, 503b: conductor, 504: conductor, 504a: conductor, 504b: conductor, 510: insulator, 512: insulator, 514: insulator, 516: insulator, 522: insulator, 524: insulator, 530: oxide, 530a: oxide, 530b: oxide, 530c1: oxide, 530c2: oxide, 540a: conductor, 540b: conductor, 540c: conductor, 540d: conductor, 540e: conductor,540f: conductor, 540g: conductor, 540h: conductor, 540i: conductor, 540j: conductor, 541a: conductor, 541b: conductor, 541c: conductor, 542a: conductor, 542b: conductor, 543a: region, 543b: region, 544: insulator, 545: insulator, 546a: oxide, 546b: oxide, 550: transistor, 560: conductor, 560a: conductor, 560b: conductor, 574: insulator, 580: insulator, 581: insulator, 582: insulator, 586: insulator, 590: conductor, 592: conductor, 594: insulator, 595a: conductor body, 595b: conductor, 597: conductor, 598: conductor, 600: capacitive element, 601: capacitive element, 650: insulator, 651: insulator, 652: insulator, 653: insulator, 711: substrate, 712: circuit area, 713: separation area, 714: separation line, 715: chip, 750: electronic component, 752: printed circuit board, 753: semiconductor device, 754: mounting board, 755: lead, 801: cloud field, 802: field, 803: IoT end device, 804: power consumption, 805: processing performance, 831: master device, 832: interface, 841: IoT end device ,842:Industrial robot,881:Home,882:Office,883:Cloud,884:Factory,885:Factory,886:Factory,6100:Mobile information terminal,6101:Housing,6102:Display unit,6103:Band,6105:Operation button,6200:Mobile information terminal,6201:Housing,6202:Display unit,6203:Operation button,6204:Speaker,6205:Microphone,6209:Fingerprint sensor,6300:Cleaning robot,6301:Housing,6302:Display unit,6303:Camera,6304:Brush,6305:Operation button,6310:Garbage, 6400: robot, 6401: illuminance sensor, 6402: microphone, 6403: upper camera, 6404: speaker, 6405: display unit, 6406: lower camera, 6407: obstacle sensor, 6408: moving mechanism, 6409: computing device, 6500: flying object, 6501: propeller, 6502: camera, 6503: battery, 6504: electronic component, 7160: automobile, 8000: display device, 8001: housing, 8002: display unit, 8003: speaker unit, 8004: semiconductor device, 8005: power storage device, 8100: lighting device, 8101: housing, 8102: light source,8103: semiconductor device, 8104: ceiling, 8105: power storage device, 8200: indoor unit, 8201: housing, 8202: air outlet, 8203: semiconductor device, 8204: outdoor unit, 8205: power storage device, 8300: electric refrigerator-freezer, 8301: housing, 8302: refrigerator door, 8303: freezer door, 8304: semiconductor device, 8305: power storage device, 8405: side wall, 8406: floor, 8407: window,

Claims

1. a transistor, a load, and a wiring having a function of supplying a power supply potential to the load; a semiconductor layer of the transistor includes an oxide semiconductor; The source and drain of the transistor are electrically connected to the wiring, a first gate of the transistor is supplied with a reference potential; A semiconductor device in which a semiconductor layer of the transistor has a region overlapping with the wiring.

2. a transistor, a load, and a wiring having a function of supplying a power supply potential to the load; a semiconductor layer of the transistor includes an oxide semiconductor; A reference potential is supplied to the source and drain of the transistor; a first gate of the transistor is electrically connected to the wiring; A semiconductor device in which a semiconductor layer of the transistor has a region overlapping with the wiring.

Images