Metal oxide film

Abstract

To provide a metal oxide film including a crystal part, a metal oxide film with a highly stable physical property, a metal oxide film with an improved electric characteristic, or a metal oxide film with enhanced field effect mobility.SOLUTION: A metal oxide film having In, M (M is Al, Ga, Y, or Sn), and Zn has a first crystal part and a second crystal part. The first crystal part has c-axis orientation and the second crystal part does not have the c-axis orientation. An existence ratio of the second crystal part is more than that of the first crystal part.SELECTED DRAWING: Figure 25

Description

[Technical field]

[0001] One embodiment of the present invention relates to a metal oxide film and a method for forming the same. Another embodiment of the present invention relates to a semiconductor device including the metal oxide film. The present invention relates to a display device having such a semiconductor device.

[0002] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. The term "semiconductor device" generally refers to a device, and a transistor, a semiconductor circuit, and the like are examples of semiconductor devices. Devices, storage devices, imaging devices, electro-optical devices, power generation devices (thin-film solar cells, organic thin-film solar cells etc.), and electronic devices may include semiconductor devices. [Background technology]

[0003] Oxide semiconductors have been attracting attention as semiconductor materials that can be used for transistors. In Patent Document 1, a plurality of oxide semiconductor layers are stacked, and among the plurality of oxide semiconductor layers, The oxide semiconductor layer serving as a channel contains indium and gallium, and the ratio of indium By making the ratio of gallium larger, the field effect mobility (simply called mobility, or μ FE A semiconductor device is disclosed in which the resistance (which may be called "resistance") is improved.

[0004] In addition, Non-Patent Document 1 states that an oxide semiconductor containing indium, gallium, and zinc is , In 1-x Ga 1+x O3(ZnO) m (x is a number satisfying -1≦x≦1, and m is a natural number) In addition, Non-Patent Document 1 discloses that the compound has a homologous phase represented by the formula: The solid solution range of the homologous phase is disclosed. For example, when m = 1, the solid solution region of the homologous phase is from -0.33 to 0.0 8, and the solid solution region of the homologous phase when m = 2 is x from -0.68 to 0.32. The range is. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2014-7399 A [Non-patent literature]

[0006] [Non-Patent Document 1] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, pp.298-315 Summary of the Invention [Problem to be solved by the invention]

[0007] An object of one embodiment of the present invention is to provide a metal oxide film including a crystal part. An object of the present invention is to provide a metal oxide film having highly stable physical properties. Another object of the present invention is to provide a metal oxide film having improved field effect mobility. Another object of the present invention is to provide a metal oxide film having a high thermal conductivity. Another object of the present invention is to provide a highly reliable semiconductor device including a metal oxide film. One of the objectives of the project is to provide a place where

[0008] Another aspect of the present invention is to provide a metal oxide film that can be formed at a low temperature and has highly stable physical properties. Another object of the present invention is to provide a semiconductor device which can be formed at a low temperature and has high reliability. One of the objectives is to provide the following.

[0009] Alternatively, one aspect of the present invention provides a flexible device including a metal oxide film. This is one of the challenges.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for the present invention to solve all of these problems. Problems other than these may be solved by the present invention. It is possible to extract such information from descriptions such as drawings and claims. [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor device having In, M (wherein M is Al, Ga, Y, or Sn), and Zn. The metal oxide film has a first crystal portion and a second crystal portion, The first crystal portion has a c-axis orientation, and the second crystal portion is a metal oxide having no c-axis orientation. It is a membrane.

[0012] Another aspect of the present invention is a semiconductor device comprising In, M (wherein M is Al, Ga, Y, or Sn), and Z n, the metal oxide film having a first crystal portion and a second crystal portion. the first crystal portion has a c-axis orientation and the second crystal portion does not have a c-axis orientation; The metal oxide film has a higher abundance ratio of the second crystal portion than that of the first crystal portion.

[0013] Another aspect of the present invention is a semiconductor device comprising In, M (wherein M is Al, Ga, Y, or Sn), and Z n, the metal oxide film having a first crystal portion and a second crystal portion. the first crystal portion has a c-axis orientation and the second crystal portion does not have a c-axis orientation; When electron diffraction measurements are performed on a cross section and the electron diffraction pattern of a metal oxide film is observed The electron beam diffraction pattern includes a first region having a diffraction spot due to the first crystal portion, a second region having a diffraction spot caused by a second crystal portion, The integrated intensity of the luminance in the first region is greater than the integrated intensity of the luminance in the second region. do.

[0014] In the above embodiment, the integrated intensity of the luminance in the first region is Preferably, the integral intensity is more than 1 to 40 times, more preferably more than 1 to 1 It is preferably 0 times or less, and more preferably more than 1 times and 3 times or less.

[0015] In the above embodiment, the peak value of the shallow defect level density of the metal oxide film is 5×10 12 cm -2 eV -1 It is preferred to have a region that is less than .

[0016] In the above embodiment, the atomic ratio of In, M, and Zn in the metal oxide film is In:M Zn=4:2:3, and the number of In atoms is about 1:1 with respect to the total number of In, M, and Zn atoms. When the atomic ratio of M is 4, the atomic ratio of Zn is 1.5 or more and 2.5 or less. It is preferable that the number is 2 or more and 4 or less.

[0017] Another embodiment of the present invention is a semiconductor device having a semiconductor film, a gate insulating film, and a gate electrode. A semiconductor device includes a semiconductor film having the above-described metal oxide film.

[0018] Another aspect of the present invention is a metal oxide film according to any one of the above aspects. A display device includes the semiconductor device according to the above embodiment. Effect of the Invention

[0019] According to one aspect of the present invention, a metal oxide film including a crystal part can be provided. It is possible to provide a metal oxide film having high quality. Also, it is possible to provide a novel metal oxide film. According to the present invention, a highly reliable semiconductor device including a metal oxide film can be provided.

[0020] According to another aspect of the present invention, a metal oxide having highly stable physical properties and capable of being formed at low temperatures is provided. Alternatively, a semiconductor device that can be formed at a low temperature and has high reliability can be provided.

[0021] Alternatively, according to one aspect of the present invention, a flexible device including a metal oxide film can be provided. Cut. [Brief description of the drawings]

[0022] [Figure 1] 1A to 1C show cross-sectional TEM images and cross-sectional HR-TEM images of a metal oxide film. [Diagram 2] 2A to 2C show cross-sectional TEM images and cross-sectional HR-TEM images of the metal oxide film. [Diagram 3] 3A to 3C show cross-sectional TEM images and cross-sectional HR-TEM images of the metal oxide film. [Figure 4] 4A to 4C show cross-sectional TEM images and cross-sectional HR-TEM images of the metal oxide film. [Diagram 5] 5A to 5C show cross-sectional TEM images and cross-sectional HR-TEM images of the metal oxide film. [Figure 6] 6A to 6C show cross-sectional TEM images and cross-sectional HR-TEM images of the metal oxide film. [Figure 7]7A to 7C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 8] 8A to 8C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 9] 9A to 9C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 10] 10A to 10C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 11] 11A to 11C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 12] 12A to 12C show the XRD measurement results and the electron beam diffraction pattern of the metal oxide film. [Figure 13] 13A and 13B show the electron diffraction patterns. [Figure 14] FIG. 14 illustrates the line profile of the electron diffraction pattern. [Figure 15] FIG. 15 shows a conceptual diagram illustrating the line profile of an electron beam diffraction pattern, the relative brightness R of the line profile, and the half-width of the spectrum. [Figure 16] 16A1, 16A2, 16B1, and 16B2 show the electron diffraction patterns and intensity profiles. [Figure 17] 17A1, 17A2, 17B1, and 17B2 show the electron diffraction patterns and intensity profiles. [Figure 18] 18A1, 18A2, 18B1, and 18B2 show the electron diffraction patterns and brightness profiles. [Figure 19] FIG. 19 shows the relative brightness estimated from the electron diffraction pattern of the metal oxide film. [Figure 20] 20A and 20B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 21] 21A and 21B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 22]22A and 22B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Diagram 23] 23A and 23B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 24] 24A and 24B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Diagram 25] 25A and 25B show a cross-sectional TEM image of a metal oxide film and a cross-sectional TEM image after image analysis. [Figure 26] 26A to 26C show the results of SIMS measurements of a metal oxide film. [Figure 27] 27A to 27C show the Id-Vg characteristics of the transistor. [Figure 28] 28A and 28B show the on-current and S value of the transistor. [Figure 29] FIG. 29 shows the GBT test results of the transistor. [Diagram 30] 30A to 30C show the Id-Vd characteristics of the transistor. [Diagram 31] FIG. 31 shows the Id-Vg characteristics. [Diagram 32] FIG. 32 shows the Id-Vg characteristics. [Diagram 33] FIG. 33 shows the calculation results of the interface state density. [Diagram 34] 34A and 34B show the Id-Vg characteristics. [Diagram 35] FIG. 35 shows the calculation results of the defect state density. [Diagram 36] FIG. 36 shows the measurement results of CPM. [Figure 37] FIG. 37 shows the measurement results of CPM. [Figure 38] FIG. 38 shows the measurement results of CPM. [Figure 39] 39A to 39C illustrate the range of atomic ratios of an oxide semiconductor film. [Diagram 40] FIG. 40 illustrates the crystallography of InMZnO4. [Diagram 41]FIG. 41 illustrates an energy band in a transistor in which an oxide semiconductor film is used for a channel region. [Diagram 42] 42A to 42C are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 43] 43A to 43C are a top view and a cross-sectional view illustrating a semiconductor device. [Diagram 44] 44A and 44B are cross-sectional views illustrating a semiconductor device. [Diagram 45] 45A and 45B are cross-sectional views for explaining a semiconductor device. [Figure 46] 46A and 46B are cross-sectional views illustrating a semiconductor device. [Figure 47] 47A and 47B are cross-sectional views illustrating a semiconductor device. [Figure 48] 48A and 48B are cross-sectional views illustrating a semiconductor device. [Figure 49] 49A and 49B are cross-sectional views illustrating a semiconductor device. [Figure 50] 50A and 50B are cross-sectional views illustrating a semiconductor device. [Figure 51] 51A and 51B are cross-sectional views illustrating a semiconductor device. [Figure 52] 52A and 52B are cross-sectional views illustrating a semiconductor device. [Figure 53] 53A to 53C each illustrate the band structure. [Figure 54] 54A to 54C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 55] 55A to 55C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 56] 56A to 56C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 57] 57A to 57C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 58] 58A and 58B are cross-sectional views illustrating a semiconductor device. [Figure 59]59A and 59B are cross-sectional views illustrating a semiconductor device. [Figure 60] 60A to 60C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 61] FIG. 61 illustrates a cross section of a semiconductor device. [Figure 62] FIG. 62 illustrates a cross section of a semiconductor device. [Figure 63] FIG. 63 illustrates a cross section of a semiconductor device. [Figure 64] FIG. 64 is a top view showing one embodiment of a display device. [Figure 65] FIG. 65 is a cross-sectional view showing one embodiment of a display device. [Figure 66] FIG. 66 is a cross-sectional view showing one embodiment of a display device. [Figure 67] FIG. 67 is a cross-sectional view showing one embodiment of a display device. [Figure 68] 68A to 68D are cross-sectional views illustrating a method for producing an EL layer. [Figure 69] FIG. 69 is a conceptual diagram for explaining a droplet ejection device. [Figure 70] FIG. 70 is a cross-sectional view showing one embodiment of a display device. [Figure 71] FIG. 71 is a cross-sectional view showing one embodiment of a display device. [Figure 72] 72A to 72C are a top view and a cross-sectional view illustrating a semiconductor device. [Figure 73] FIG. 73 illustrates a cross section of a semiconductor device. [Figure 74] 74A to 74C are block diagrams and circuit diagrams illustrating a display device. [Figure 75] 75A to 75C are circuit diagrams and timing charts illustrating one embodiment of the present invention. [Figure 76] 76A to 76C are graphs and circuit diagrams for explaining one embodiment of the present invention. [Figure 77] 77A and 77B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 78]78A and 78B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 79] 79A to 79E are block diagrams, circuit diagrams, and waveform diagrams illustrating one embodiment of the present invention. [Figure 80] 80A and 80B are a circuit diagram and a timing chart illustrating one embodiment of the present invention. [Figure 81] 81A and 81B are circuit diagrams illustrating one embodiment of the present invention. [Figure 82] 82A to 82C are circuit diagrams illustrating one embodiment of the present invention. [Figure 83] FIG. 83 illustrates the display module. [Figure 84] Figures 84A to 84E illustrate the electronic equipment. [Figure 85] Figures 85A to 85G illustrate the electronic equipment. [Figure 86] 86A and 86B are perspective views illustrating a display device. [Figure 87] FIG. 87 shows an example of a display on the display device in this embodiment. [Figure 88] FIG. 88 shows the results of measuring the XRD spectrum of the sample. [Figure 89] 89A to 89L show the TEM image and electron diffraction pattern of the sample. [Figure 90] 90A to 90C are diagrams illustrating EDX mapping of a sample. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] Hereinafter, the embodiments will be described with reference to the drawings. The present invention may be embodied in various different forms without departing from its spirit and scope. It will be readily understood by those skilled in the art that various modifications and changes may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments.

[0024] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The drawings are merely schematic illustrations and are not limited to the shapes or values ​​shown in the drawings.

[0025] In addition, the ordinal numbers "first," "second," and "third" used in this specification refer to the components of the It should be noted that this is added to avoid confusion and is not intended to limit the numbers.

[0026] In addition, in this specification, the words "above" and "below" indicating the position of the components are used. The positional relationship is used for convenience in describing the drawings. The relationship changes depending on the direction in which each component is depicted. The above words and phrases are not limited to those used above, but can be rephrased appropriately depending on the situation.

[0027] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) A current flows through the drain, the channel region, and the source. In this specification and the like, the channel region refers to a region through which a current mainly flows. The flow area.

[0028] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0029] In addition, in this specification, "electrically connected" means "something that has some kind of electrical effect." This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0030] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0031] In addition, in this specification and the like, the terms "film" and "layer" are interchangeable. For example, the term "conductive layer" can be changed to the term "conductive film." For example, the term "insulating film" may be changed to "insulating layer." It may be possible to change the term to:

[0032] In this specification and the like, unless otherwise specified, the off-state current refers to the current that occurs when a transistor is off. This refers to the drain current when the device is in a non-conducting state (also called a cut-off state). Unless otherwise specified, for n-channel transistors, V is the voltage between the gate and source When gs is lower than the threshold voltage Vth, the gate and source of a p-channel transistor This refers to a state in which the voltage Vgs between the n-channel transistors is higher than the threshold voltage Vth. The off-state current of a transistor is the voltage between the gate and source, Vgs, that is, the threshold voltage, Vt This may refer to the drain current when it is lower than h.

[0033] The off-state current of a transistor may depend on Vgs. The off-state current is I or less if there exists a Vgs value at which the off-state current of the transistor is I or less. The off-state current of a transistor is the current that flows through it in the off-state at a given Vgs. , an off-state at Vgs within a given range or a sufficiently reduced off-current is obtained. In some cases, it may refer to the off-state current at Vgs.

[0034] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs -0.5 V is 1×10 -19 A and Vg The drain current at s = -0.8 V is 1 × 10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of -0.5V to -0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 There are cases where it is said to be A or lower. The drain current of the transistor is 1×10 -22A or less Vgs exists. Therefore, the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0035] In this specification, the off-state current of a transistor having a channel width W is expressed as It is sometimes expressed as the current value that flows per watt. Also, for a given channel width (for example, 1 μm), In the latter case, the unit of the off-state current is current / length. It may be expressed in units with an element (e.g., A / μm).

[0036] The off-state current of a transistor may depend on temperature. Unless otherwise specified, the operating temperature is room temperature, 60°C, 85°C, 95°C, or 125°C. Or, the reliability of a semiconductor device including the transistor may be guaranteed. The temperature at which the transistor is certified, or the temperature at which a semiconductor device or the like that contains the transistor is used (e.g. For example, the off-state current at any one of temperatures from 5° C. to 35° C. The off-state current of the transistor is I or less at room temperature, 60°C, 85°C, 95°C, 125°C, The temperature at which the reliability of a semiconductor device including the transistor is guaranteed, or The temperature at which the semiconductor device containing the transistor is used (for example, any one of 5°C to 35°C) (temperature), there exists a value of Vgs at which the off-state current of the transistor is equal to or less than I. There are cases where it is pointed out.

[0037] The off-state current of a transistor may depend on the voltage Vds between the drain and source In this specification, unless otherwise specified, the off-state current is measured when Vds is 0.1 V, 0.8 V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, or In some cases, it indicates the off-state current at 20 V. In other cases, it indicates the off-state current at 20 V. Vds that guarantees the reliability of semiconductor devices, or semiconductor devices including the transistor The term may also refer to the off-state current at Vds used in the transistor off-state. The current is equal to or less than I when Vds is 0.1V, 0.8V, 1V, 1.2V, 1.8V, 2.5V, 3V, 3.3V, 10V, 12V, 16V, 20V, transistors included Vds that guarantees the reliability of the semiconductor device in which the transistor is used, or Vds used in semiconductor devices, etc., where the off-state current of the transistor is I or less This may refer to the existence of a gs value.

[0038] In the above description of the off-state current, the drain may be read as the source. The current may also refer to the current through the source when the transistor is in the off state.

[0039] In this specification and the like, the term "leak current" may be used to mean the same thing as the "off current." In this specification, the off-state current refers to, for example, the current flowing when a transistor is in an off state. , may refer to the current flowing between the source and drain.

[0040] In this specification, the threshold voltage of a transistor is the threshold voltage of a transistor. This refers to the gate voltage (Vg) when a gate is formed. Specifically, it refers to the threshold voltage of a transistor. Voltage is plotted on the horizontal axis as gate voltage (Vg) and on the vertical axis as the square root of drain current (Id). The line obtained by extrapolating the tangent line with the maximum slope in the simulated curve (Vg-√Id characteristics) is , the gate voltage (Vg Alternatively, the threshold voltage of a transistor can be expressed as the channel length L and the The channel width is W, and the value of Id[A]×L[μm] / W[μm] is 1×10 -9 [A] Sometimes it refers to the gate voltage (Vg) applied to the device.

[0041] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is low enough, the material may have the properties of an insulator. The boundary between "insulators" and "insulators" is unclear, and it may not be possible to strictly distinguish them. In some cases, the term "semiconductor" in the above can be replaced with "insulator." In some cases, the term "insulator" in the specification can be replaced with "semiconductor." In some cases, the term "insulator" in this specification can be rephrased as "semi-insulator." .

[0042] In addition, even when the term "semiconductor" is used in this specification, for example, If the electrical conductivity is high enough, it may have the properties of a "conductor". The boundary between the term "conductor" and the term "electrical conductor" is unclear, and it may not be possible to strictly distinguish between them. In some cases, the term "semiconductor" in the above can be replaced with "conductor." The term "conductor" in the specification etc. may be replaced with "semiconductor" in some cases.

[0043] In this specification, impurities in a semiconductor are elements other than the main components constituting the semiconductor film. For example, an element with a concentration of less than 0.1 atomic percent is an impurity. This causes the formation of DOS (Density of State) in the semiconductor, This can cause problems such as a decrease in carrier mobility and a decrease in crystallinity. When the body has an oxide semiconductor, impurities that change the properties of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, transition elements other than the main components Metals, especially hydrogen (which is also found in water), lithium, sodium, silicon, and phosphide. These include uranyl, phosphorus, carbon, and nitrogen. In the case of oxide semiconductors, for example, impurities such as hydrogen are mixed in. In addition, when the semiconductor contains silicon, the semiconductor may become oxygen deficient. Impurities that change the properties of the body include, for example, oxygen, group 1 elements excluding hydrogen, and group 2 elements. These include the elements of Group 13, Group 15, etc.

[0044] (Embodiment 1) <1-1. Composition of metal oxide film> One embodiment of the present invention is a metal oxide film including two types of crystal parts. The direction of the crystallization of the film is perpendicular to the thickness direction of the film (the direction of the film surface, the surface on which the film is formed, or the direction perpendicular to the surface of the film). In other words, the crystal part has a c-axis orientation. The first crystal part (also called the second crystal part) is a crystal part that does not have a c-axis orientation and is oriented in various directions. In the metal oxide film of one embodiment of the present invention, these two types of crystal parts are mixed.

[0045] In the following, for ease of explanation, the crystal portion having the c-axis orientation is referred to as the first crystal portion. The crystal part that does not have the c-axis orientation is explained separately from the second crystal part, but these are crystallinity and In some cases, there is no difference in the size of the crystals and they cannot be distinguished from each other. Metal oxide films can also be expressed without distinguishing between these.

[0046] For example, the metal oxide film of one embodiment of the present invention has a plurality of crystal parts. At least one of the crystal parts in the film has a c-axis orientation. The proportion of crystal parts not having c-axis orientation among the crystal parts having c-axis orientation is For example, the metal oxide film of one embodiment of the present invention may have a content of In the cross-section in the film thickness direction, multiple crystals were observed in the observation image by a transmission electron microscope. Among the plurality of crystal portions, a second crystal portion that does not have a c-axis orientation has a c-axis orientation. In other words, the metal oxide of one embodiment of the present invention may be observed more frequently than the first crystal portion. The film contains a large proportion of second crystal portions that do not have c-axis orientation.

[0047] By increasing the proportion of the second crystal parts not having the c-axis orientation in the metal oxide film, It has the following excellent effects:

[0048] When there is a sufficient oxygen source near the metal oxide film, the first film having no c-axis orientation The crystal part of 2 can be a diffusion path for oxygen. Therefore, it is necessary to provide sufficient oxygen near the metal oxide film. In the presence of a supply source, a first crystal part having a c-axis orientation is formed through a second crystal part not having a c-axis orientation. This allows oxygen to be supplied to the crystal part of 1, thereby reducing the amount of oxygen vacancies in the metal oxide film. By applying such a metal oxide film to the semiconductor film of a transistor, As a result, it is possible to obtain high reliability and high field effect mobility.

[0049] In addition, the first crystal portion has a specific crystal plane oriented in the thickness direction of the film. In order to achieve this, the metal oxide film including the first crystal portion is subjected to X-ray irradiation in a direction approximately perpendicular to the upper surface of the film. When diffraction (XRD: X-ray Diffraction) measurements are performed, the diffraction angle (2 θ), a diffraction peak originating from the first crystal portion is confirmed. Even if the crystals are in the crystal structure, the X-rays are scattered by the support substrate or the background noise is increased. In some cases, the diffraction peaks may not be clearly visible due to the difference in the diffraction intensity. , which increases in proportion to the presence of the first crystal portion contained in the metal oxide film, It can also be used as an indicator to gauge the crystallinity of the material.

[0050] One method for evaluating the crystallinity of a metal oxide film is electron diffraction. For example, electron diffraction measurement is performed on a cross section to obtain the electron diffraction pattern of the metal oxide film according to one embodiment of the present invention. When the turn is observed, a first region having a diffraction spot due to the first crystal portion and a second region having a diffraction spot due to the first crystal portion are observed. A second region having diffraction spots due to the second crystalline portion is observed.

[0051] The first region having the diffraction spots due to the first crystal portion is a crystal having a c-axis orientation. On the other hand, the second region having a diffraction spot due to the second crystal part is due to the orientation It is derived from crystals that have no orientation or crystals that are randomly oriented in all directions. Therefore, the size of the electron beam used in electron diffraction, i.e., the area of ​​the region to be observed, determines the size of the electron beam. In this specification, the beam diameter of the electron beam is set to 1. Electron diffraction measured at wavelengths between nmΦ and 100 nmΦ is called nanobeam electron diffraction (NBED). This is called Nano Beam Electron Diffraction.

[0052] However, the crystallinity of the metal oxide film of one embodiment of the present invention was evaluated by a method different from NBED. Examples of methods for evaluating the crystallinity of metal oxide films include electron diffraction, X-ray diffraction, and neutron diffraction. Among electron diffraction methods, in addition to the NBED mentioned above, there is also a transmission electron microscope. (TEM:Transmission Electron Microscopy) Scanning Electron Microscopy (SEM) ), Convergent Beam Electron Diffraction (CBED) iffraction), Selected Area Electron Diffraction (SAED) Electron Diffraction) can be suitably used.

[0053] In addition, in NBED, the electron beam diameter is increased (for example, 25 nmΦ or less). Nanobeam electron diffraction (up to 100 nmΦ, or 50 nmΦ to 100 nmΦ) In the pattern, a ring-shaped pattern is observed. The ring-shaped pattern is also radially On the other hand, in NBED, the beam diameter of the electron beam is sufficiently small. In the electron beam diffraction pattern under the condition of minutely reduced size (for example, 1 nmΦ or more and 10 nmΦ or less), At the position of the ring-shaped pattern, a plurality of spots are distributed in the circumferential direction (also called the θ direction). In other words, the ripples observed under conditions where the electron beam diameter is increased may be observed. The ring-like pattern is formed by a collection of the above-mentioned multiple spots.

[0054] <1-2. Evaluation of crystallinity of metal oxide films> Below, we will introduce six samples (samples A1 to A6) on which metal oxide films were formed under different conditions. First, the methods for producing Samples A1 to A6 will be described.

[0055] [Sample A1] Sample A1 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The metal oxide film contains indium, gallium, and zinc. The conditions for forming the oxide film were as follows: the substrate was heated to 170° C. and argon gas was introduced at a flow rate of 140 sccm. The gas and oxygen gas at a flow rate of 60 sccm were introduced into the chamber of the sputtering device, and the pressure was increased to 1000 MPa. The pressure was set to 0.6 Pa, and a metal oxide target ( A 2.5kW AC power was applied to the In:Ga:Zn (atomic ratio: 4:2:4.1). The ratio of the oxygen flow rate to the total gas flow rate may be referred to as the oxygen flow rate ratio. The oxygen flow rate ratio in the preparation condition for sample A1 was 30%.

[0056] [Sample A2] Sample A2 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A2 were as follows: the substrate was heated to 170°C, and the flow rate was 180 s Argon gas at a flow rate of 20 ccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate ratio in the preparation condition of sample A2 was 10%. The conditions other than the amount ratio were the same as those of the sample A1 described above.

[0057] [Sample A3] Sample A3 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A3 were as follows: the substrate was heated to 130°C, and the flow rate was 180 s Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate in the preparation of sample A3 was 10%. Conditions other than the temperature and oxygen flow rate ratio were the same as those for Sample A1 described above.

[0058] [Sample A4] Sample A4 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A4 were as follows: the substrate was heated to 100°C, and the flow rate was 180 s Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate in the preparation of sample A4 was 10%. Conditions other than the temperature and oxygen flow rate ratio were the same as those for Sample A1 described above.

[0059] [Sample A5] Sample A5 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A5 were as follows: the substrate was heated to 70°C, and the flow rate was 180 sc. Argon gas at a flow rate of 20 sccm and oxygen gas at a flow rate of 20 sccm were placed in the chamber of the sputtering device. The oxygen flow rate ratio in the preparation condition of sample A5 was 10%. The conditions other than the substrate temperature and oxygen flow rate were the same as those of the sample A1 described above. .

[0060] [Sample A6] Sample A6 is a sample in which a metal oxide film with a thickness of about 100 nm is formed on a glass substrate. The conditions for forming the metal oxide film of sample A6 were as follows: the substrate was heated at room temperature (for example, 20°C or higher and 30°C or lower). Room temperature is referred to as RT in Table 1 below. A nitrogen gas and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The oxygen flow rate ratio in the manufacturing conditions of sample A6 was 10%. The conditions other than the oxygen flow rate ratio were the same as those for Sample A1 described above.

[0061] Table 1 shows the preparation conditions for samples A1 to A6.

[0062] [Table 1]

[0063] Next, the crystallinity of the samples A1 to A6 prepared as above was evaluated. To evaluate the crystallinity, cross-sectional TEM observation, XRD measurement, and electron diffraction were performed.

[0064] [Cross-sectional TEM observation] 1A to 6C show cross-sectional TEM observation results of samples A1 to A6. 1B is a cross-sectional TEM image of sample A1, and FIGS. 2A and 2B are cross-sectional TEM images of sample A2. 3A and 3B are cross-sectional TEM images of sample A3, and FIGS. 4A and 4B are cross-sectional TEM images of sample A4. 5A and 5B are cross-sectional TEM images of sample A5, and FIGS. 6A and 6B are cross-sectional TEM images of sample A6. This is a cross-sectional TEM image of A6.

[0065] Figure 1C shows a high-resolution transmission electron microscope (HR-TEM) image of the cross section of sample A1. Figure 2C is a cross-sectional HR-TEM image of sample A2. FIG. 3C is a cross-sectional HR-TEM image of sample A3, and FIG. 4C is a cross-sectional HR-TEM image of sample A4. FIG. 5C is a cross-sectional HR-TEM image of sample A5, and FIG. 6C is a cross-sectional HR-TEM image of sample A6. The cross-sectional HR-TEM images were taken using spherical aberration correction (Sphe The spherical aberration corrector function may be used. A high-resolution TEM image using the differential correction function is specifically called a Cs-corrected high-resolution TEM image. Positive high-resolution TEM images were obtained using, for example, an atomic resolution analytical electron microscope (JEM- This can be observed using a device such as ARM200F.

[0066] As shown in FIGS. 1A to 5C, in samples A1 to A5, atoms are arranged in layers in the film thickness direction. In particular, the HR-TEM image shows that the atoms are arranged in layers. In addition, as shown in FIGS. 6A to 6C, in sample A6, the atoms are distributed in the film thickness direction. It is difficult to confirm that the atoms are arranged in layers in the film thickness direction. The proportion of regions oriented in the direction of the lattice was the highest, followed by sample A2, sample A3, sample A4, and sample A5 in that order. It appears that the proportion of regions in which atoms are oriented in layers in the film thickness direction is small.

[0067] [XRD measurement] Next, the XRD measurement results of each sample will be described.

[0068] FIG. 7A shows the XRD measurement results of sample A1, FIG. 8A shows the XRD measurement results of sample A2, and FIG. Fig. 10A shows the XRD measurement results of sample A3, Fig. 10B shows the XRD measurement results of sample A4, and Fig. 11A shows the XRD measurement results of sample A5. FIG. 12A shows the XRD measurement result of sample A5, and FIG. 12B shows the XRD measurement result of sample A6.

[0069] In XRD measurement, the powder method (also called the θ-2θ method), which is a type of out-of-plane method, is used. The θ-2θ method involves changing the incidence angle of the X-rays and This is a method for measuring X-ray diffraction intensity by setting the angle of the detector to the same as the angle of incidence. The X-rays were incident at an angle of about 0.40° from the film surface, and the X-ray diffraction was measured by changing the detector angle. Grazing-Induced Reflection-Resonance (GIXRD) is an out-of-plane method for measuring the strength of Incidence XRD) method (also called thin film method or Seemann-Bohlin method) 7A, 8A, 9A, 10A, 11A, and 12A. In this figure, the vertical axis indicates the diffraction intensity in arbitrary units, and the horizontal axis indicates the angle 2θ.

[0070] As shown in FIGS. 7A, 8A, 9A, and 10A, in samples A1 to A4, A peak in the diffraction intensity is observed around 2θ=31°. On the other hand, as shown in Figs. 11A and 12A As shown in the figure, a diffraction intensity peak was observed near 2θ=31° in samples A5 and A6. The diffraction intensity peak at 2θ=31° is extremely small, or There is no peak in the diffraction intensity around 1°.

[0071] The diffraction angle at which the diffraction intensity peak was observed (around 2θ = 31°) was the same as that of single-crystal InGaZ This coincides with the diffraction angle of the (009) plane in the structure model of nO4. The above peaks are observed in the range from A to A4, which indicates that the c-axis is oriented in the film thickness direction. Hereinafter, it is known that the crystal portion having the c-axis orientation or the first crystal portion is included. In addition, the comparison of the intensities shows that the proportion of crystal parts with c-axis orientation is higher in sample A1 than in sample B1. It can be seen that the sample A5 has the highest value, followed by the sample A2, the sample A3, and the sample A4 in that order. For sample A6, the XRD measurement showed that the crystals had c-axis orientation. It is difficult to judge whether

[0072] From these results, the higher the substrate temperature during film formation and the larger the oxygen flow rate during film formation, This suggests a tendency for the proportion of crystal parts having c-axis orientation to increase.

[0073] [Electron diffraction] Next, the results of electron diffraction measurements of samples A1 to A6 will be described. In the sagittal beam diffraction measurement, the electron beam diffraction pattern is measured when the electron beam is incident perpendicularly on the cross section of each sample. The electron beam diameter was set to two values: 1 nmΦ and 100 nmΦ.

[0074] In electron diffraction, not only the diameter of the incident electron beam but also the thickness of the sample is important. The thicker the thickness, the more information in the depth direction will appear in the electron beam diffraction pattern. Therefore, it is necessary to reduce not only the diameter of the electron beam but also the thickness of the sample in the depth direction. This allows us to obtain information on more localized areas. On the other hand, if the thickness of the sample in the depth direction is If the sample is too thin (for example, if the thickness in the depth direction is 5 nm or less), the information of the very fine area will not be obtained. Therefore, if crystals exist in a very small area, the electric field that can be obtained is The sagittal diffraction pattern may be similar to the electron diffraction pattern of a single crystal. If the purpose is not to analyze a very small area, the thickness of the sample in the depth direction is set to, for example, 10 It is preferable that m is 100 nm or more, typically 10 nm or more and 50 nm or less.

[0075] 7B and 7C show the electron diffraction patterns of sample A1, and FIG. 8B and 8C show the electron diffraction patterns of sample A2. 9B and 9C show the electron beam diffraction patterns of sample A3, and FIGS. 10B and 10C show the electron beam diffraction patterns of sample A4 and sample B5. 11C shows the electron diffraction pattern of sample A4, and 11B and 11C show the electron diffraction patterns of sample A5. The electron diffraction patterns of sample A6 are shown in Figures 12B and 12C, respectively.

[0076] 7B and 7C, 8B and 8C, 9B and 9C, 10B and 10C, and 1 The electron diffraction patterns shown in Figs. 1B and 11C, and 12B and 12C are The contrast of the image data was adjusted so that the lines were clearly visible. 7C, 8B and 8C, 9B and 9C, 10B and 10C, 11B and 11C, and In Figures 12B and 12C, the brightest spot in the center is due to the incident electron beam. It is the center of the electron diffraction pattern (also called the direct spot or transmitted wave). be.

[0077] In addition, as shown in FIG. 7B, when the diameter of the incident electron beam is 1 nmΦ, As multiple spots distributed in a smear are observed, the metal oxide film of sample A1 is extremely fine. It can be seen that multiple small crystal parts with plane orientations in various directions are mixed. In addition, as shown in FIG. 7C, when the diameter of the incident electron beam is set to 100 nmΦ, Diffraction spots from multiple crystals are connected and the brightness is averaged to form a ring-shaped diffraction pattern. In addition, in Fig. 7C, two ring-shaped diffraction patterns with different radii are Here, the diffraction pattern with a small diameter shows what are called the first ring and the second ring. It can be seen that the first ring is brighter than the second ring. In addition, two bright spots (first area) were observed where the first ring overlapped. will be done.

[0078] The radial distance from the center of the first ring is This is almost equal to the radial distance from the center of the diffraction spot of the (009) plane in the The first region is a diffraction spot due to the c-axis orientation.

[0079] In addition, as shown in Figure 7C, a ring-shaped diffraction pattern was observed, which indicates that sample A In the metal oxide film of 1, there are crystal parts oriented in various directions (hereinafter, those having c-axis orientation). In other words, there exists a crystal part not including the first crystal part, or a second crystal part.

[0080] The two first regions are arranged symmetrically with respect to the center point of the electron beam diffraction pattern. Since the degrees of symmetry are similar, it is inferred that the two-fold symmetry is present. The two first regions are diffraction spots due to the c-axis orientation. The direction of the line connecting the region and the center coincides with the direction of the c-axis of the crystal part. Since the c-axis is oriented in the film thickness direction in the metal oxide film of sample A1, It is clear that crystals are present.

[0081] Thus, the metal oxide film of sample A1 is composed of crystalline parts with c-axis orientation and crystalline parts with c-axis orientation. It can be seen that the film is a mixture of crystalline parts having no crystals and crystalline parts not having any crystals.

[0082] 8B and 8C, 9B and 9C, 10B and 10C, 11B and 11C, and The electron beam diffraction patterns shown in Figs. 12B and 12C are similar to those shown in Figs. 7B and 7C. The results are almost the same as those of the folded pattern. However, there are two spots (first one) due to the c-axis orientation. The luminance of the area (area) of the sample A1 is the brightest, followed by the samples A2, A3, A4, A5, and A6. The ratio of crystal parts with c-axis orientation is highest in sample A1. It is suggested that the order of decrease is sample A2, sample A3, sample A4, sample A5, and sample A6. .

[0083] [Method for quantifying the crystallinity of metal oxide films] Next, an example of a method for quantifying the crystallinity of a metal oxide film will be described with reference to FIGS. 13A to 15. explain.

[0084] First, an electron diffraction pattern is prepared (see FIG. 13A).

[0085] In addition, FIG. 13A shows a measurement with a beam diameter of 100 nm for a metal oxide film with a thickness of 100 nm. 13B is a comparison of the electron diffraction pattern shown in FIG. 13A. The electron beam diffraction pattern was obtained by adjusting the contrast.

[0086] In FIG. 13B, there are two clear spots (first area) above and below the direct spot. These two spots (first region) are the structural model of InGaZnO4. The diffraction spots corresponding to the (00l) plane in the figure, i.e., the c-axis oriented crystals, On the other hand, in addition to the first region, there is a region with low brightness approximately concentric with the first region. A ring-shaped pattern (second region) appears overlapping. This is the result of setting the electron beam diameter to 100 nm. By doing so, the strain caused by the structure of the crystal part (second crystal part) not having the c-axis orientation was suppressed. The pots are averaged and formed into a ring.

[0087] Here, the electron beam diffraction pattern shows diffraction spots due to crystal parts having c-axis orientation. The first region having a diffraction spot due to the second crystal portion and the second region having a diffraction spot due to the second crystal portion are overlapped. Therefore, a line profile including the first region and a line profile including the second region are observed. By acquiring and comparing the line profile, it is possible to quantify the crystallinity of the metal oxide film. become.

[0088] First, a line profile including a first region and a line profile including a second region This will be explained with reference to FIG.

[0089] Figure 14 shows the electron beam irradiation on the (100) surface of a structural model of InGaZnO4. The resulting electron diffraction simulation pattern includes regions A-A', B-B', and This is a diagram with auxiliary lines for the area CC'.

[0090] The region A-A' shown in FIG. 14 shows two diffraction patterns caused by the first crystal part having the c-axis orientation. The area B-B' shown in FIG. In the region C-C', a diffraction spot due to the first crystal part having c-axis orientation was observed. The area A-A' and the area B-A' include a straight line passing through the direct spot. The angle at which the area B-B' or the area C-C' intersects is approximately 34°, specifically, 30° or less. 38° or less, preferably 32° or more and 36° or less, and more preferably 33° or more and 35° or less. It should be below.

[0091] The line profile shows a tendency as shown in FIG. 15 depending on the structure of the metal oxide film. Figure 15 shows the image of the line profile for each structure, the relative brightness R, and and the half-width (FWHM) of the spectrum due to the c-axis orientation obtained from the electron diffraction pattern. :Full Width at Half Maximum) is shown in the figure.

[0092] The relative luminance R shown in FIG. 15 is the integral intensity of the luminance in the region A-A' relative to the region B -B' divided by the integral intensity of the luminance in the region C-C' The integrated intensity of the luminance in the areas A-A', B-B', and C-C' is The direct spot that appears in the center and the area caused by the direct spot are The background has been removed.

[0093] By calculating the relative brightness R, the strength of the c-axis orientation can be quantitatively determined. For example, as shown in FIG. 15, in a single crystal metal oxide film, the c-axis orientation of the region A-A' The peak intensity of the diffraction spot due to the first crystal portion having the above property is high, and the regions B-B' and In region C-C', no diffraction spots due to the first crystal part with c-axis orientation are observed. Therefore, the relative luminance R exceeds 1 and becomes extremely large. Also, the relative luminance R is The oxide film is the highest, and only CAAC (more details on CAAC will be described later) and CAAC+ Nanocrystal, nanocrystal metal oxide film, amorphous In particular, the nanocrystals that do not have a specific orientation For a metal oxide film having a crystalline structure and an amorphous metal oxide film, the relative luminance R is 1.

[0094] In addition, the higher the periodicity of the crystal structure, the greater the spatial distribution of the first crystal part with c-axis orientation. The spectrum intensity becomes higher and the half-width of the spectrum becomes smaller. The metal oxide film had the smallest half-width, followed by CAAC only, CAAC+nanocrystal, and The half-width increases in the order of nanocrystal, metal oxide film, and amorphous In the case of a metal oxide film, the half-width is very large, resulting in a profile called a halo.

[0095] [Analysis using line profiles] As described above, the integral intensity of the luminance in the first region is expressed as the integral intensity of the luminance in the second region. The intensity ratio is important information in estimating the proportion of oriented crystal parts. do.

[0096] Therefore, the electron diffraction patterns of the samples A1 to A6 shown above were analyzed using line profiles. The analysis was carried out using the above data.

[0097] The analysis results using the line profile of sample A1 are shown in Figs. 16A1 and 16A2. The analysis results using the line profile of sample A2 are shown in Figures 16B1 and 16B2. The analysis results using the line profile are shown in Figures 17A1 and 17A2. The analysis results using the file are shown in Figures 17B1 and 17B2. The analysis results using the line profile of sample A6 are shown in Figures 18A1 and 18A2. The analysis results are shown in Figures 18B1 and 18B2, respectively.

[0098] FIG. 16A1 shows the electron beam diffraction pattern shown in FIG. 7C in the regions A-A' and B-B'. , and the electron diffraction pattern showing the region C-C′ shown in FIG. 16B1. Electron beam diffraction pattern showing areas A-A', B-B', and C-C' FIG. 17A1 shows the electron beam diffraction pattern of the region A-A' in FIG. 9C. FIG. 17B1 is an electron diffraction pattern showing the regions B-B' and C-C'. The electron diffraction pattern shown in FIG. 10C includes the regions A-A', B-B', and C-C'. FIG. 18A1 is the electron diffraction pattern shown in FIG. 11C. This is an electron diffraction pattern showing the regions A-A', B-B', and C-C'. FIG. 18B1 shows the electron beam diffraction pattern shown in FIG. 12C including the regions A-A', B-B', and 4 is an electron diffraction pattern showing the region C-C'.

[0099] In addition, the regions A-A', B-B', and C-C' are electron beam diffraction patterns. This can be calculated by normalizing the brightness of the direct spot that appears at the center of the This also allows for relative comparisons between samples.

[0100] In addition, when calculating the brightness profile, the brightness caused by inelastic scattering from the sample, etc. Subtracting the components as background allows for more accurate comparisons. Here, the brightness component due to inelastic scattering has a very broad profile in the radial direction. To obtain the image, the brightness of the background may be calculated by linear approximation. The area located on the lower brightness side of the straight line drawn along both sides of the peak is called the background. can be deducted as a bond.

[0101] Here, the area A-A' is calculated from the data after background subtraction using the method described above. The integrated intensity of the luminance in the regions A, B-B', and C-C' was calculated. The integral intensity of the luminance in the region B-B' or the region C The relative luminance R was calculated by dividing the luminance at -C' by the integrated intensity.

[0102] FIG. 19 shows the relative luminance R of the samples A1 to A6. 16B2, 17A2 and 17B2, and 18A2 and 18B2. In the peaks located to the left and right of the direct spot in the file, The integral intensity of the luminance in the region B-B' divided by the integral intensity of the luminance in the region A-A' The integral intensity of the brightness in each region is divided by the integral intensity of the brightness in region C-C'. I did.

[0103] As shown in FIG. 19, the relative luminances R of the samples A1 to A6 are as follows: Relative luminance of sample A1 R=25.00 Relative luminance of sample A2 R=9.55 Relative luminance of sample A3 R=3.04 Relative luminance of sample A4 R=1.60 Relative luminance of sample A5 R=1.32 Relative luminance of sample A6 R=1.05 The above-mentioned relative luminance R was the average value at each of the four positions. The degree of cracking R was highest for sample A1, followed by sample A2, sample A3, sample A4, sample A5, and sample A6. and becomes lower.

[0104] The metal oxide film according to one embodiment of the present invention is used as a semiconductor film in which a channel of a transistor is formed. In the case where the light source is a reflective film, the relative luminance R is more than 1 and not more than 40, preferably more than 1 and not more than 10. It is preferable to use a metal oxide film having a ratio of more than 1 to 3. By using an oxide film as the semiconductor film, the electrical characteristics are highly stable and the gate voltage is low. Therefore, it is possible to achieve both high field effect mobility and high

[0105] <1-3. Crystalline portion abundance> The proportion of crystalline parts in a metal oxide film can be estimated by analyzing cross-sectional TEM images. can.

[0106] First, the method of image analysis will be described. A two-dimensional fast Fourier transform (FFT) was performed on the TEM images. The FFT image is then processed to obtain a periodic image. Then, masking is performed to remove the rest of the range. Then, the two-dimensional inverse Fourier transform (IFFT: Inverse Fast Fourier Transform) transform) to obtain an FFT filtered image.

[0107] This allows a real space image to be obtained in which only the crystal part is extracted. The proportion of the crystalline part can be estimated from the area ratio of the area. The area of ​​the crystal is calculated by subtracting the area of ​​the remaining image from the area of ​​the original image (also called the area of ​​the original image). It is possible to estimate the proportion of the other parts.

[0108] Figure 20A shows a cross-sectional TEM image of sample A1, and Figure 20B shows the cross-sectional TEM image of sample A1. The cross-sectional TEM image of sample A2 is shown in Fig. 21A, and the cross-sectional TEM image of sample A3 is shown in Fig. 21B. 21B shows the images obtained after image analysis of the cross-sectional TEM image of sample A2. FIG. 22A shows a cross-sectional TEM image of sample A3, and FIG. 22B shows a cross-sectional TEM image of sample A3. The cross-sectional TEM image of sample A4 is shown in Fig. 23A, and the cross-sectional TEM image of sample A5 is shown in Fig. 23B. 23B shows the images obtained after image analysis of the cross-sectional TEM image of sample A4. FIG. 24A shows a cross-sectional TEM image of sample A5, and FIG. 24B shows a cross-sectional TEM image of sample A5. The cross-sectional TEM image of sample A6 is shown in Fig. 25A, and the cross-sectional TEM image of sample A7 is shown in Fig. 25B. 25B shows the images obtained after image analysis of the cross-sectional TEM image of sample A6.

[0109] In the image obtained after image analysis, the white areas in the metal oxide film are the oriented regions. The black areas correspond to areas containing crystalline parts with orientation, while the black areas correspond to crystals without orientation. The crystals may correspond to regions containing crystalline parts or parts oriented in various directions.

[0110] From the results shown in FIG. 20B, the area other than the area including the oriented crystal part in sample A1 The proportion of the ZnO content was about 43.1%. The proportion of the area excluding the area containing the crystal part having orientation was approximately 47.1%. From the results shown in B, the ratio of the area excluding the area containing the oriented crystal part in sample A3 The result shown in FIG. 23B indicates that the orientation of sample A4 was achieved. The proportion of the area excluding the crystal part was about 76.5%. The results show that the proportion of the area excluding the area containing the oriented crystal part in sample A5 is approximately 82 0%. In addition, the results shown in FIG. 25B show that the crystals having orientation in sample A6 The proportion of the area excluding the area including the part was approximately 89.5%.

[0111] The ratio of the portion of the metal oxide film excluding the crystalline portion having the orientation estimated in this way is If the content is 5% or more and less than 40%, the metal oxide film is a film with extremely high crystallinity and is acidic. It is preferable because it is difficult to create atomic defects and the electrical properties are very stable. The ratio of the portion excluding the crystal portion having the orientation of 40% or more and less than 100%, preferably 60 % or more and 90% or less, the metal oxide film has a crystal part having orientation and a crystal part having orientation. The mixture of non-crystalline and non-crystalline portions is at an appropriate ratio, which makes it possible to achieve both stable electrical characteristics and high mobility. Cut.

[0112] Here, it is possible to clearly confirm the presence of the TEM in a cross-sectional image or by image analysis of the cross-sectional image. The area excluding the crystal part where the crystal can be grown is called the Lateral Growth Buffer Region. It can also be called ion(LGBR).

[0113] <1-4. Oxygen diffusion into metal oxide films> The following describes the results of evaluating the ease of oxygen diffusion into metal oxide films.

[0114] Here, the following three samples (samples B1 to B3) were prepared.

[0115] [Sample B1] First, a metal film with a thickness of about 50 nm was deposited on a glass substrate in the same manner as in the case of sample A1. An oxide film was formed. Then, a silicon oxynitride film with a thickness of about 30 nm was formed on the metal oxide film. A silicon oxynitride film having a thickness of about 100 nm and a silicon oxynitride film having a thickness of about 20 nm are formed by the proton beam. In the following description, the metal oxide film is referred to as O A silicon oxynitride film may be referred to as a silicon nitride film and a silicon oxide film may be referred to as a silicon nitride film.

[0116] Next, a heat treatment was performed at 350° C. for 1 hour in a nitrogen atmosphere.

[0117] Then, a 5 nm thick In-Sn-Si oxide film was formed by sputtering.

[0118] Subsequently, an oxygen addition process was performed on the silicon oxynitride film. The substrate temperature was set at 40°C and oxygen gas ( 16 O) and oxygen gas with a flow rate of 100 sccm ( 18 O) was introduced into the chamber and the pressure was increased to 15 P a) and a parallel plate was installed in the ashing device so that a bias was applied to the substrate side. An RF power of 4500 W was supplied between the electrodes for 600 seconds. Oxygen gas ( 16 O) is contained at the main component level, so the oxygen addition process To accurately measure the oxygen added, oxygen gas ( 18 O) was used.

[0119] Next, a silicon nitride film having a thickness of about 100 nm was formed by plasma CVD.

[0120] [Sample B2] Sample B2 is a sample prepared under different film formation conditions for the metal oxide film from those of Sample B1. Sample B2 was fabricated by forming a metal oxide film with a thickness of about 50 nm using the same method as Sample A3 described above. The membrane was

[0121] [Sample B3] Sample B3 is a sample prepared under different film formation conditions for the metal oxide film from those of Sample B1. For sample B3, a metal oxide film with a thickness of about 50 nm was formed by the same method as for sample A6 described above. The membrane was

[0122] Through the above steps, samples B1 to B3 were fabricated.

[0123] [SIMS analysis] For samples B1 to B3, SIMS (Secondary Ion Mass Spectroscopy) By ectrometry analysis, 18 The concentration of O was measured. Regarding the condition, the samples B1 to B3 prepared above were not subjected to the heat treatment, and the samples B1 to B3 were The conditions were as follows: heat treatment was performed at 350° C. for 1 hour in a nitrogen atmosphere; and samples B1 to B3 were The three conditions were: 1) heat treatment at 450°C for 1 hour in air; and 2)

[0124] SIMS measurement results are shown in Figures 26A to 26C. 26A to 26C show the analysis results of the region containing I and OS. (SSDP (Substrate Side Depth Profile)-SIM The results of the analysis are shown below.

[0125] In addition, in FIGS. 26A to 26C, the gray dashed lines indicate the profiles under conditions where no heat treatment was performed. The black dashed line is the profile of the heat treatment at 350°C. The solid line indicates the profile under the condition of heat treatment at 450°C.

[0126] In each of samples B1 to B3, 18 O is spreading, and OS During 18 It can be seen that O has diffused to the deepest position in sample B3. 18 O is diffused, and in the order of sample B2, sample B1, 18 O diffusion is shallow In addition, by performing heat treatment at 350℃ and 450℃, the 18 It can be seen that O is diffusing.

[0127] From the above results, it is considered that oriented and non-oriented crystal parts are mixed and that the orientation is not important. A metal oxide film having a low ratio of crystal parts having oxygen permeability is a film through which oxygen easily permeates. It can be confirmed that the film is one in which oxygen easily diffuses. It can be confirmed that oxygen in the GI film diffuses into the OS by performing the treatment.

[0128] The above results indicate that the higher the proportion (density) of oriented crystals, the greater the amount of oxygen in the thickness direction. This indicates that oxygen is less likely to diffuse in the thickness direction, and that the lower the density, the easier it is for oxygen to diffuse in the thickness direction. The ease of oxygen diffusion in metal oxide films can be considered as follows. do.

[0129] A metal oxide that contains a mixture of oriented crystal parts and extremely fine crystal parts that do not have orientation. In the membrane, the non-crystalline region (LGBR) that can be clearly observed in the cross-sectional observation image is the region where oxygen diffuses. Therefore, the area near the metal oxide film is a region where oxygen can easily diffuse, i.e., a diffusion path for oxygen. When there is a sufficient oxygen supply source in the crystalline part having orientation through the LGBR, It is believed that oxygen vacancies in the film can be reduced because oxygen is more easily supplied. .

[0130] For example, an oxide film that easily releases oxygen in contact with a metal oxide film is provided, and then a heat treatment is performed. As a result, the oxygen released from the oxide film is diffused in the thickness direction of the metal oxide film by the LGBR. Then, oxygen is supplied laterally to the oriented crystals via the LGBR. This allows the metal oxide film to be sufficiently oriented in the crystalline portion and in the other regions. As a result, oxygen is distributed throughout the film, and oxygen vacancies in the film can be effectively reduced.

[0131] For example, if there are hydrogen atoms in a metal oxide film that are not bonded to metal atoms, Oxygen atoms may bond to form OH, which may cause immobilization. By doing so, oxygen vacancies (V O) with a hydrogen atom trapped (V O H A certain amount (for example, 1 × 10 17 cm -3 By forming OH, Also, V O H generates carriers, so the carriers are released into the metal oxide film. This creates a metal oxide film with a high carrier density. In addition, oxygen vacancies are also formed during the film formation, but the oxygen vacancies are formed in the same manner as described above. This can be reduced by introducing oxygen through the LGBR as shown in the figure. This allows the formation of a metal oxide film with a relatively high carrier density and sufficiently reduced oxygen vacancies. It can be achieved.

[0132] In addition, the regions other than the crystalline portions having orientation are extremely fine crystals that do not have orientation during film formation. Since the metal oxide film is composed of crystalline regions, no clear crystal grain boundaries are observed. The fine crystal parts are located between a plurality of crystal parts having orientation. By growing laterally due to the heat generated during film formation, the crystals bond with adjacent crystalline parts that have the same orientation. In addition, the fine crystals also function as regions that generate carriers. Metal oxide films having such a structure can be used in transistors to remarkably improve their field effect mobility. It is believed that this can be significantly improved.

[0133] In addition, a metal oxide film is formed, and then an oxide insulating film such as a silicon oxide film is formed on the metal oxide film. In addition, it is preferable to perform a plasma treatment in an oxygen atmosphere. Besides supplying oxygen, the hydrogen concentration can be reduced. For example, during plasma processing At the same time, fluorine remaining in the chamber may also be doped into the metal oxide film. Fluorine exists as negatively charged fluorine atoms and positively charged hydrogen atoms. The electrons bond with the metal oxide through Coulomb forces to generate HF. HF is then absorbed by the metal oxide during the plasma treatment. As a result, the hydrogen concentration in the metal oxide film can be reduced. In addition, during plasma treatment, oxygen atoms and hydrogen are combined and released outside the film as H2O. In some cases, this may be the case.

[0134] Also, a structure in which a silicon oxide film (or a silicon oxynitride film) is laminated on a metal oxide film. Consider the following. Fluorine in the silicon oxide film bonds with hydrogen in the film, forming an electrically neutral HF Since the metal oxide film can exist as a Si-F bond, it does not affect the electrical properties of the metal oxide film. However, this also becomes electrically neutral. Also, HF in the silicon oxide film is It is thought that this will have no effect on the diffusion of

[0135] Due to the above-mentioned mechanism, oxygen vacancies in the metal oxide film are reduced and the metal in the film is It is believed that the reliability can be improved by reducing hydrogen that is not bonded to atomic atoms. In addition, the electrical properties are improved by having the carrier concentration of the metal oxide film be higher than a certain level. It is thought that this is the case.

[0136] <1-5. Electrical characteristics of transistors> In the following, the metal oxide film-containing samples A1, A3, and A6 described above will be described. A transistor was fabricated and its electrical characteristics were measured. The results are now described.

[0137] The transistor structure is shown in FIGS. 44A and 44B in the second embodiment. Here, samples C1 to C3 were fabricated using different semiconductor film formation conditions.

[0138] In addition, each of the samples C1 to C3 has a channel length L of 2 μm and a channel width W of 3 μm. A transistor having a channel length L of 2 μm and a channel width W of 20 μm. A transistor with a channel length L of 3 μm and a channel width W of 50 μm and a A transistor with a channel length L of 6 μm and a channel width W of 5 The sample had a total of five different sizes of transistors, including a 0.0 μm transistor. be.

[0139] [Making a transistor] First, a titanium film having a thickness of 10 nm and a copper film having a thickness of 100 nm were sputtered on a glass substrate. The conductive film was then processed by photolithography. Ta.

[0140] Next, four insulating layers were formed on the substrate and the conductive film. The insulating film was formed in a vacuum using a phase-effect chemical vapor deposition (PECVD) system. Silicon nitride film with a thickness of 50 nm, silicon nitride film with a thickness of 300 nm, silicon nitride film with a thickness of 50 nm A 50 nm thick silicon oxynitride film and a 50 nm thick silicon oxide nitride film were used.

[0141] Next, an oxide semiconductor film is formed over the insulating film and processed into an island shape. The semiconductor layer was formed by the above method. The oxide semiconductor film was formed to a thickness of 40 nm. Successful.

[0142] In Sample C1, the formation conditions of the metal oxide film used for the oxide semiconductor film were the same as those in Sample A1. That is, the substrate temperature was set to 170°C, and the flow rate of argon gas was 140 sccm. 60 sccm of oxygen gas was introduced into the chamber of the sputtering device, and the pressure was At 0.6 Pa, a metal oxide target (I An AC power of 2.5 kW was applied to the sample (atomic ratio of n:Ga:Zn=4:2:4.1). The oxygen flow rate was 30%. The thickness was about 40 nm.

[0143] In Sample C2, the formation conditions of the metal oxide film used for the oxide semiconductor film were the same as those in Sample A3. That is, the substrate temperature was set to 130°C, and the flow rate of argon gas was 180 sccm. The oxygen gas with a flow rate of 20 sccm was introduced into the chamber of the sputtering device, and the pressure was At 0.6 Pa, a metal oxide target (I An AC power of 2.5 kW was applied to the sample (atomic ratio of n:Ga:Zn=4:2:4.1). The oxygen flow rate was 10%. The thickness was about 40 nm.

[0144] In Sample C3, the formation conditions of the metal oxide film used for the oxide semiconductor film were the same as those in Sample A6. That is, the substrate temperature was set at room temperature (RT) and the argon flow rate was set at 180 sccm. A nitrogen gas and oxygen gas at a flow rate of 20 sccm were introduced into the chamber of the sputtering device. The pressure was 0.6 Pa, and a metal oxide target having indium, gallium, and zinc was A 2.5kW AC power was applied to the ZnO-based quartz crystal (In:Ga:Zn=4:2:4.1 [atomic ratio]). The oxygen flow rate was 10%. The thickness was about 40 nm.

[0145] Next, an insulating film was formed on the insulating film and the semiconductor layer. The silicon oxynitride film was formed using a PECVD apparatus.

[0146] Next, a heat treatment was performed. The heat treatment was performed in a mixed gas atmosphere of nitrogen and oxygen for 3 h. The heat treatment was carried out at 50°C for 1 hour.

[0147] Next, openings were formed in desired areas of the insulating film. The etching method was used.

[0148] Next, a 100-nm-thick oxide semiconductor film is formed on the insulating film so as to cover the opening. The oxide semiconductor film was processed into an island shape to form a conductive film. Then, the insulating film in contact with the lower side of the conductive film was processed to form an insulating film.

[0149] The conductive film is a 10-nm-thick oxide semiconductor film, a 50-nm-thick titanium nitride film, and A copper film having a thickness of 100 nm was then formed. The plate temperature was set at 170°C, and oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering equipment. A gold alloy containing indium, gallium and zinc was introduced into the bar at a pressure of 0.6 Pa. Metal oxide target (In:Ga:Zn=4:2:4.1 [atomic ratio]) at 2.5kW The titanium nitride film and the copper film were formed using a sputtering device. Successful.

[0150] Next, plasma treatment was performed from above the oxide semiconductor film, the insulating film, and the conductive film. For the PECVD process, a substrate temperature was set at 220°C, and argon gas and nitrogen gas were used. The reaction was carried out in a mixed gas atmosphere.

[0151] Next, an insulating film was formed over the oxide semiconductor film, the insulating film, and the conductive film. A 100 nm thick silicon nitride film and a 300 nm thick silicon oxynitride film were deposited by PECVD. The layers were formed using a device.

[0152] Next, a mask is formed on the formed insulating film, and an opening is formed in the insulating film using the mask. did.

[0153] Next, a conductive film is formed to fill the opening, and the conductive film is processed into an island shape. A conductive film having a thickness of 100 nm was formed on the insulating film to become the source electrode and the drain electrode. A titanium film with a thickness of 100 nm and a copper film with a thickness of 100 nm were deposited on the substrate using a sputtering device. Formed.

[0154] Next, an insulating film was formed on the insulating film and the conductive film. An acrylic photosensitive resin film was used.

[0155] In this manner, samples C1 to C3 were prepared.

[0156] [Transistor Id-Vg characteristics] Next, the Id-Vg characteristics of the transistors of the samples C1 to C3 fabricated as described above were measured. The d-Vg characteristics were measured for a transistor with a channel length L of 2 μm and a channel width W of 3 μm. did.

[0157] The Id-Vg characteristics of the transistor were measured under the following conditions: The voltage applied to the conductive film that functions as a gate voltage (Vg) and the second gate The voltage applied to the conductive film acting as an electrode (also called Vbg) is set to -10V to +10V. The voltage was changed in steps of 0.25 V to 1 V. The voltage was also applied to the conductive film acting as the source electrode. The voltage applied to the drain electrode (hereinafter referred to as the source voltage (Vs)) is set to 0V (comm). The voltage applied to the conductive film that functions as a drain voltage (hereinafter referred to as drain voltage (Vd)) is set to 0. It was set to 1V or 20V.

[0158] 27A, 27B, and 27C show the Id-Vg characteristics of samples C1, C2, and C3. 27A to 27C, the first vertical axis represents Id(A), The second vertical axis is the field effect mobility (μ FE (cm 2 / Vs) on the horizontal axis and Vg (V) on the horizontal axis, respectively. Represents.

[0159] As shown in FIGS. 27A to 27C, samples C1 to C3 each have good electrical properties. In addition, the field effect mobility is highest in sample C3, followed by samples C2 and C1 in that order. In particular, in the case of sample C3, in the low Vg range (for example, Vg is 5 V or less), The trend is clear.

[0160] That is, in one embodiment of the present invention, a crystal part having orientation and a crystal part not having orientation are A transistor that uses a metal oxide film containing a mixture of metals as a semiconductor layer in which a channel is formed has a high It was confirmed that the device exhibited high field effect mobility. In particular, the device exhibited high field effect mobility under low gate voltage conditions. It was confirmed that the field effect mobility and the drain current were high.

[0161] [Transistor on-current and S value] Next, the channel length L formed in each of the samples C1 to C3 was 2 μm and the channel width W was 20 μm. The on-state current and S value of the transistors are compared. The S value is the ratio of the on-state current between the source electrode and the drain electrode. The gate voltage required to increase the current between the electrodes (subthreshold current) by an order of magnitude. The smaller the S value, the greater the slope of the subthreshold current versus gate voltage. It has excellent switching characteristics.

[0162] FIG. 28A shows the measurement results of the on-state current of the transistor in each sample. The drain current was measured when the gate voltage Vg was set to 10 V and the drain voltage Vd was set to 5 V. FIG. 28B shows the measurement results of the S value of the transistor in each sample.

[0163] As shown in FIG. 28A, the on-state current was the highest in sample C3, followed by sample C2 and sample C1. As shown in FIG. 28B, the S value is the smallest in sample C3, followed by samples C2 and C3. The order of cost increases from C1 to C2.

[0164] From the above results, it is possible to suppress the formation of oxygen by forming a metal oxide film under low temperature and low oxygen flow rate conditions. The improved transparency increases the amount of oxygen that diffuses during the transistor manufacturing process, Defects such as oxygen vacancies in the metal oxide film and at the interface between the metal oxide film and the insulating film are reduced. This effect reduces the density of defect states, resulting in the on-state of the transistor. This suggests that the on-state current will increase significantly.

[0165] In this way, a transistor with improved on-state current can charge and discharge capacitance at high speed. It can be suitably used for switches such as demultiplexer circuits. can be used.

[0166] A demultiplexer circuit is a circuit that divides one input signal into two or more signals and outputs them. A demultiplexer circuit using such transistors is connected to the signal lines of a display device. By arranging it between the driver circuit and the signal line, when the signal line driver circuit is implemented in the form of an IC, It is possible to reduce the number of terminals, enabling faster operation and realizing a display device with a narrow frame. It can be realized.

[0167] <1-6. Gate bias-thermal stress test (GBT test)> Next, the reliability of the samples C1 to C3 was evaluated. The test was a BT test.

[0168] The GBT test conditions in this embodiment are a gate voltage (Vg) of ±30 V and The drain voltage (Vd) and source voltage (Vs) are set to 0V (COMMON), and the stress temperature is The temperature was 60°C, the stress application time was 1 hour, and the measurement environment was a dark environment and a light irradiation environment (white The two environments were: 1) under a constant current of about 10,000 lx and 2) under a constant current of about 10,000 lx. The source and drain electrodes of the capacitor are set to the same potential, and the gate electrode is connected to the source and drain electrodes. A potential different from that of the electrodes was applied for a certain period of time (here, 1 hour).

[0169] In addition, when the potential applied to the gate electrode is higher than the potentials of the source electrode and the drain electrode, The potential applied to the gate electrode is set to 100 V, which is higher than the potential of the source electrode and drain electrode. Therefore, in accordance with the measurement environment, the positive GBT (dark), minus GBT (dark), plus GBT (light exposure), and minus GBT The reliability evaluation was carried out under a total of four conditions: P (light irradiation) and P (dark). BTS (Positive Bias Temperature Stress) Negative GBT (Dark) is NBTS (Negative Bias Tempera ture Stress) and positive GBT (light irradiation) is PBITS (Positive Stress) e Bias Illumination Temperature Stress) and And negative GBT (light irradiation) is NBITS (Negative Bias Illum ination Temperature Stress) below.

[0170] The GBT test results of the samples C1 to C3 are shown in FIG. 29. In FIG. 29, the vertical axis indicates the The amount of change in threshold voltage of the transistor (ΔVth) is shown on the horizontal axis, and the name of each sample is shown on the horizontal axis.

[0171] From the results shown in FIG. 29, the transistors of the samples C1 to C3 were The change in threshold voltage (ΔVth) was within ±2 V. It can be seen that the transistors included in C1 to C3 have high reliability.

[0172] <1-7. Saturation in Id-Vd characteristics> Next, the saturation in the Id-Vd characteristics of the samples C1 to C3 will be described.

[0173] FIG. 30A shows the Id-Vd characteristics of sample C1, and FIG. 30B shows the Id-Vd characteristics of sample C2. The Id-Vd characteristics of sample C3 are shown in Fig. 30C. The transistors formed in the samples C1 to C3 had a channel length L of 3 μm and a channel width W of 3 μm. Dista was used.

[0174] As shown in FIGS. 30A to 30C, the Id-Vd characteristics of samples C1 to C3 are highly saturated. By improving the saturation of the Id-Vd characteristics, for example, The present invention can be suitably used for a driving transistor included in a display device using the same.

[0175] <1-8. Evaluation of shallow defect levels using transistor characteristics> The shallow defect level (sDOS) of metal oxides is a factor that affects the semiconductor properties of metal oxide films. The electrical characteristics of the transistors used as the The density of the interface states is evaluated, and in addition to the density of the interface states, the electrons trapped in the interface states are also measured. Number N trap Considering this, a method for predicting the subthreshold leakage current is We will explain about this.

[0176] Number of electrons trapped in the interface state N trap is, for example, the drain current of a transistor -Measured values ​​of gate voltage (Id-Vg) characteristics and drain current-gate voltage (Id-Vg) The properties can be evaluated by comparing the measured values ​​with the calculated values ​​of the properties.

[0177] Figure 31 shows the calculated results for the source voltage Vs = 0V and the drain voltage Vd = 0.1V. The ideal Id-Vg characteristics obtained by the test and the actually measured Id-Vg characteristics of the transistor are compared. Among the measurement results of the transistor, the 1×1 0 -13 Only values ​​above A are plotted.

[0178] Compared to the ideal Id-Vg characteristics calculated by calculation, the actual Id-Vg characteristics are The change in drain current Id with respect to g becomes gradual. This is because the energy at the bottom of the conduction band ( This is thought to be due to the electrons being trapped in the shallow interface states located near the interface. Here, the Fermi distribution function is used to estimate the trapping in shallow interface states (per unit area , number of electrons per unit energy) N trap By taking into account Density N it can be estimated.

[0179] First, the electrons trapped in the interface trap states were measured using the schematic Id-Vg characteristics shown in FIG. Number of electrons N trap The evaluation method of is explained below. The dashed line shows the trap The dashed line shows the ideal Id-Vg characteristic with no level. The change in gate voltage Vg when it changes from Id2 to Id3 is ΔV id In addition, the solid line indicates the actual The solid line shows the Id-Vg characteristics measured when the drain current changes from Id1 to Id2. The change in gate voltage Vg at ex When the drain current is Id1 and Id2, The potentials at the interfaces of interest are φ it1 , φ it2 The change amount is Δφ it and do.

[0180] In Figure 32, the measured value has a smaller slope than the calculated value, so ΔV ex is always ΔV id Yo At this time, ΔV ex and ΔV id The difference in the number of electrons in the shallow interface states This represents the potential difference required to trap the electron. Amount of change ΔQ trap can be expressed by the following equation (1).

[0181]

number

[0182] C tgis the combined capacitance of the insulator and semiconductor per area. Also, ΔQ trap Is, tiger Number of electrons (per unit area, per unit energy) trap Using this, equation (2) It can also be expressed as follows, where q is the elementary charge.

[0183]

number

[0184] Equation (3) can be obtained by solving equations (1) and (2) simultaneously.

[0185]

number

[0186] Next, the limit Δφ of equation (3) it By taking 0, we can obtain equation (4).

[0187]

number

[0188] That is, by using the ideal Id-Vg characteristics, the measured Id-Vg characteristics, and equation (4), Number of trapped electrons in N trap It is possible to estimate the drain current The relationship between the potential at the interface can be obtained by the above calculation.

[0189] Also, the number of electrons per unit area and unit energy, N trap and the density of interface states N it teeth The relationship is as shown in equation (5).

[0190]

number

[0191] where f(E) is the Fermi distribution function. N obtained from Eq. (4) trap to the formula ( 5) By fitting, N it is determined. This N it Device with The transfer characteristics including Id<0.1pA can be obtained by calculation using a simulator. .

[0192] Next, equation (4) is applied to the measured Id-Vg characteristics shown in FIG. trap Extracted The results are shown by white circles in Figure 33. Here, the vertical axis of Figure 33 is the fraction of the conduction band from the semiconductor's conduction band minimum Ec. The Elmi energy Ef. Looking at the dashed line, we can see that the maximum value is just below Ec. N in Equation (5) it Assuming the tail distribution of equation (6), the following is very likely to occur, as shown by the dashed line in Figure 33. Good for N trap can be fitted, and the fitting parameters are the conduction band edge Trap density N ta =1.67×10 13 cm -2 / eV, characteristic decay energy W ta = A value of 0.105 eV was obtained.

[0193]

number

[0194] Next, the obtained fitting curve of the interface state was calculated using a device simulator. The Id-Vg characteristics were calculated by feedback, as shown in Figures 34A and 34B. Figure 34A shows the calculated results for drain voltages Vd of 0.1 V and 1.8 V. The Id-Vg characteristics and the transistors with drain voltages Vd of 0.1 V and 1.8 V are shown. FIG. 34B shows the Id-Vg characteristics of the drain current in FIG. This is a graph showing Id as a logarithm.

[0195] The curve obtained by calculation and the plot of the actual measured values ​​are almost the same. Therefore, it is considered that the method for calculating the density of shallow defect states is highly reproducible. It can be seen that the above method is quite valid.

[0196] [Evaluation results of shallow defect density] Next, the measured electrical characteristics were compared with the ideal calculated values ​​based on the above method. Therefore, the shallow defect level densities of the previously prepared samples C1 to C3 were measured. For the measurement of the channel length L and the channel width W formed in the samples C1 to C3, the μm transistors were used.

[0197] FIG. 35 shows the results of calculating the shallow defect level density of samples C1 to C3. In all three cases, the peak value of the shallow defect density is 5×10 12 cm -2 eV -1 This indicates that the density of shallow defect states is extremely low. The peak value of the density of shallow defect levels in the film is preferably 5×10 12 cm -2 eV -1 less than 2.5×10 12 cm -2 eV -1 less than 1.5, more preferably ×10 12 cm -2 eV -1 is less than.

[0198] In this way, in the samples C1 to C3, metal oxide films with low defect state density were formed. This is a metal transistor formed under low temperature and low oxygen flow conditions. The oxide film improves oxygen permeability and reduces the amount of oxygen that diffuses during the transistor manufacturing process. As a result, oxygen vacancies in the metal oxide film and at the interface between the metal oxide film and the insulating film increase. It is suggested that this is due to the reduction in defects such as

[0199] <1-9. Evaluation of deep defect levels in metal oxide films by CPM> In the following, we will use the constant photocurrent measurement method (CPM). The deep defect states (dDOS) in metal oxide films were investigated using the dDOS method. The evaluation was carried out.

[0200] In the CPM measurement, the photocurrent value becomes constant when a voltage is applied between two electrodes on the sample. The amount of light irradiated onto the sample surface between the terminals is adjusted so that the absorption coefficient is derived from the amount of light irradiated. In CPM measurement, when a sample has a defect, the defect The absorption coefficient at the energy (converted from wavelength) corresponding to the level present increases. By multiplying the increase in the diffusion coefficient by a constant, the dDOS of the sample can be derived.

[0201] The absorption coefficient curve obtained by CPM measurement shows that the urbach peaks are due to the band tail. By removing the absorption coefficient component called the defect level, the absorption coefficient due to the defect level can be calculated from the following equation: Here, α(E) represents the absorption coefficient at each energy, and α u represents the absorption coefficient due to the Urbach tail.

[0202]

number

[0203] [Preparation of samples for CPM evaluation] In the following, three samples (samples D1 to D3) were prepared and subjected to CPM evaluation.

[0204] First, a metal oxide film was formed on a glass substrate. Sample D1 was prepared in the same manner as Sample A1. A metal oxide film with a thickness of about 100 nm was formed by the method described above. A metal oxide film with a thickness of about 100 nm was formed by the same method. A metal oxide film having a thickness of about 100 nm was formed by the same method as in Sample A6.

[0205] Next, a silicon oxynitride film with a thickness of about 30 nm and a silicon oxynitride film with a thickness of about 100 nm are formed on the metal oxide film. A silicon oxynitride film with a thickness of about 20 nm was formed by plasma CVD. The film was formed by laminating the above layers.

[0206] Thereafter, a heat treatment was performed at 350° C. for 1 hour in a nitrogen atmosphere.

[0207] Next, an oxide semiconductor film having a thickness of 100 nm was formed. The first oxide semiconductor film was formed at a substrate temperature of 170° C. Oxygen gas with a flow rate of 200 sccm was introduced into the chamber of the sputtering device, and the pressure was set to 0 0.6 Pa, and a metal oxide target containing indium, gallium, and zinc (In :Ga:Zn=4:2:4.1 [atomic ratio]) and apply 2.5kW AC power. The second oxide semiconductor film was formed at a temperature of 1000 K under a 1000 K condition. At 70°C, argon gas with a flow rate of 180 sccm and oxygen gas with a flow rate of 20 sccm were The gas was introduced into the chamber of the sputtering device, the pressure was set to 0.6 Pa, and indium and gallium were A metal oxide target having In:Ga:Zn=4:2:4.1[ The film thickness was adjusted to 90 nm under the condition of applying an AC power of 2.5 kW to the film thickness of 100 nm. was formed.

[0208] Thereafter, a heat treatment was carried out at 350° C. for 1 hour in a mixed gas atmosphere of nitrogen and oxygen.

[0209] After that, the oxide semiconductor film was removed by wet etching.

[0210] Next, a silicon oxynitride film was formed. The silicon oxynitride film was formed by using a gas having a flow rate of 10 ... A mixture of 160sccm SiH4 and 4000sccm N2O was used at a pressure of 2 The film was formed by plasma CVD under the conditions of 0.00 Pa, power 1500 W, and substrate temperature 220°C. The thickness of the silicon oxynitride film was about 400 nm.

[0211] Subsequently, an opening was formed in the silicon oxynitride film by photolithography.

[0212] Next, a Ti film with a thickness of about 50 nm and an Al film with a thickness of about 400 nm were deposited by sputtering. A laminated film of a 100 nm thick Ti film was then formed by photolithography. The wire was twisted to form an electrode.

[0213] Thereafter, a heat treatment was performed at 250° C. for 1 hour in a nitrogen atmosphere.

[0214] Through the above steps, samples D1 to D3 were fabricated.

[0215] [CPM evaluation results] Figure 36 shows the CPM measurement results for sample D1, Figure 37 shows the CPM measurement results for sample D2, and Figure 38 shows the CPM measurement results for sample D3. The CPM measurement results of sample D3 are shown in Figs. 36, 37, and 38, respectively. The vertical axis represents the absorption coefficient, and the horizontal axis represents the light energy. The black solid lines shown in the figure represent the absorption coefficient curves of each sample, the dotted lines represent the tangents, and the gray solid lines represent the light The absorption coefficients are shown as optically measured values.

[0216] The value of the Urbach tail of sample D1 estimated from Figure 36 is 68.70 meV. The absorption coefficient obtained by subtracting the absorption coefficient due to the Urbach tail from the absorption coefficient curve, i.e., the deep The absorption coefficient due to defect levels is 1.21×10 -3 cm -1 In addition, Figure 3 The value of the Urbach tail of sample D2 estimated from 7 is 64.46 meV, which is a deep defect. The value of the absorption coefficient due to the depression level is 1.36×10 -3 cm -1 Also, Figure 38 The value of the Urbach tail of sample D3 estimated from the above is 65.83 meV, which is the deep defect The value of the absorption coefficient due to the level is 1.04×10 -3 cm -1 It was.

[0217] From the above results, it is clear that the metal oxide films used in samples D1 to D3 have clear differences in deep defect levels. It can be seen that no difference is observed in the deep defect levels of samples D1 to D3. The reason is that an oxide insulating film is formed in contact with a metal oxide film, and the metal oxide is Since sufficient oxygen was supplied to the oxide film, the oxygen vacancies in the metal oxide film were filled. It is suggested that this is the case.

[0218] <1-10.Metal oxide film formation method> Hereinafter, a method for forming a metal oxide film according to one embodiment of the present invention will be described.

[0219] The metal oxide film of one embodiment of the present invention can be formed by sputtering in an oxygen-containing atmosphere. A film can be formed.

[0220] The substrate temperature during film formation is from room temperature to 150° C., preferably from 50° C. to 150° C. More preferably, the temperature is 100° C. or higher and 150° C. or lower, typically 130° C. By setting the substrate temperature in the above range, it is possible to separate crystalline parts having orientation and crystal parts not having orientation. The ratio of the crystal portion to the crystal portion can be controlled.

[0221] In addition, the flow rate ratio of oxygen (oxygen partial pressure) during film formation is set to 1% or more and less than 33%, preferably 5% or less. More preferably, the ratio is 5% to 20%, and even more preferably, the ratio is 5% to 15%. The oxygen flow rate is preferably set to 10% or less. This allows the film to contain more crystal parts that do not have the crystal structure.

[0222] Therefore, by setting the substrate temperature during film formation and the oxygen flow rate during film formation within the above ranges, the orientation It is possible to obtain a metal oxide film having a mixture of crystalline parts having orientation and crystalline parts not having orientation. In addition, by setting the substrate temperature and oxygen flow rate within the above ranges, it is possible to obtain crystals having orientation. It is possible to control the ratio of the crystalline parts having orientation to the crystalline parts having no orientation.

[0223] The oxide targets that can be used for forming metal oxide films are In-Ga-Z Not limited to n-based oxides, for example, In-M-Zn-based oxides (where M is Al, Ga, Y, or can be applied.

[0224] In addition, a sputtering target including a polycrystalline oxide having a plurality of crystal grains is used, When a metal oxide film containing crystalline parts is formed, the sputtering target that does not contain polycrystalline oxide In comparison with the case where a metal oxide film is used, a crystalline metal oxide film can be obtained more easily.

[0225] The following is a consideration of the mechanism of metal oxide film formation. The target for annealing has a plurality of crystal grains, and the crystal grains have a layered structure. When the crystal grains have an interface that is easily cleaved, the sputtering target is By colliding with the metal, the crystal grains are cleaved, and flat or pellet-shaped sputtering particles are produced. The obtained plate-like or pellet-like sputtered particles may be deposited on a substrate. It is believed that a metal oxide film containing nanocrystals is formed by depositing the metal on the substrate. Heating promotes the bonding or rearrangement of the nanocrystals on the substrate surface. It is believed that this makes it easier to form a metal oxide film containing oriented crystal parts. .

[0226] As described in this embodiment, a metal oxide film is formed by sputtering. However, in the case of forming the metal oxide according to one embodiment of the present invention, the crystallinity can be easily controlled. The method for forming the film is not limited to the above, but may be, for example, a pulsed laser deposition (PLD) method, Plasma enhanced chemical vapor deposition (PECVD), thermal CVD (Chemical Vapor Deposition) eposition) method, ALD (Atomic Layer Deposition) method A thermal CVD method, a vacuum deposition method, etc. may be used. An example of the thermal CVD method is MOCVD (Metal Organic Chemical Vapor Deposition (OCCVD) method is one example. can be.

[0227] <1-11. Composition and structure of metal oxide films> The metal oxide film of one embodiment of the present invention can be applied to a semiconductor device such as a transistor. In the following, a metal oxide film having semiconductor characteristics (hereinafter referred to as an oxide semiconductor film) will be described. This article explains:

[0228] First, the composition of the oxide semiconductor film will be described.

[0229] As described above, the oxide semiconductor film is made of indium (In) and M (M is Al, Ga, It has Y, Sn, or Zn (zinc).

[0230] The element M is aluminum, gallium, yttrium, or tin. In addition to the above, other elements that can be applied to the Germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium , tantalum, tungsten, magnesium, etc. may be used. A combination of two or more of the above elements may be used.

[0231] Next, elements of indium, the element M, and zinc contained in the oxide semiconductor film of one embodiment of the present invention will be described. A preferred range of the electron number ratio will be described with reference to Figures 39A to 39C. The atomic ratio of oxygen is not described in Sections 39C to 39C. The atomic ratios of indium, element M, and zinc are [In], [M], and [Z n].

[0232] In Figures 39A to 39C, the dashed lines indicate [In]:[M]:[Zn]=(1+α):( The line where the atomic ratio of 1-α):1 (-1≦α≦1), [In]:[M]:[Zn]= The line where the atomic ratio is (1+α):(1-α):2, [In]:[M]:[Zn]=( The line where the atomic ratio is 1+α):(1-α):3, [In]:[M]:[Zn]=(1 +α):(1-α):4 atomic ratio line, and [In]:[M]:[Zn]=( This represents the line where the atomic ratio is 1+α):(1-α):5.

[0233] The dashed line indicates the atomic ratio of [In]:[M]:[Zn]=1:1:β (β≧0). The line where the atomic ratio of [In]:[M]:[Zn]=1:2:β is The line where the atomic ratio is 1:3:β, [In]:[M]:[Zn ]=1:4:β atomic ratio line, [In]:[M]:[Zn]=2:1:β atomic ratio line The line with the atomic ratio of [In]:[M]:[Zn]=5:1:β Represents in.

[0234] In addition, the number of atoms of [In]:[M]:[Zn]=0:2:1 shown in FIGS. 39A to 39C An oxide semiconductor film having this ratio or a value close to this ratio is likely to have a spinel crystal structure.

[0235] 39A and 39B show the structure of the oxide semiconductor film of one embodiment of the present invention, in which indium, An example of a preferable range of the atomic ratio of element M and zinc is shown.

[0236] As an example, FIG. 40 shows InMZn where [In]:[M]:[Zn]=1:1:1. Figure 40 shows the crystal structure of InMZ when observed from a direction parallel to the b-axis. The crystal structure of nO4 is shown in FIG. 40. The layer having M, Zn, and oxygen (hereinafter, (M, The metal element in the layer (Zn) represents element M or zinc. In this case, element M and zinc The proportion of lead is equal. The elements M and zinc are interchangeable and the arrangement is random. do.

[0237] Indium and element M can be substituted for each other. Therefore, the elements of the (M, Zn) layer The element M can be replaced with indium and expressed as an (In,M,Zn) layer. In that case, In It has a layered structure with one layer and two (In,M,Zn) layers.

[0238] In addition, indium and the element M can be substituted for each other. Therefore, the element MZnO2 layer M is substituted with indium, In α M 1-α It can also be expressed as ZnO2 layer (0<α≦1) In that case, the InO2 layer is 1 and the In α M 1-α The layered structure has two ZnO layers. In addition, indium in the InO2 layer is substituted for element M, and In 1-α M α O2 layer (0<α≦ 1) In that case, In 1-α M α The O2 layer is 1, while the MZnO2 layer is It has a layered structure of 2.

[0239] In the oxide with the atomic ratio of [In]:[M]:[Zn]=1:1:2, the In layer is 1: The (M,Zn) layer is three. That is, for [In] and [M], [ When the oxide crystallizes, the ratio of the (M,Zn) layer to the In layer increases. increases.

[0240] However, in the oxide, when the number of In layers is 1 and the number of (M, Zn) layers is not an integer, There may be multiple types of layered structures where the number of In layers is 1 and the number of (M, Zn) layers is an integer. For example, For example, when [In]:[M]:[Zn]=1:1:1.5, the In layer is 1, and A layer structure in which the number of (M,Zn) layers is 2 and a layer structure in which the number of (M,Zn) layers is 3 are mixed. In some cases, the structure may become like this.

[0241] For example, when an oxide semiconductor film is formed by a sputtering apparatus, the number of atoms of a target In particular, depending on the substrate temperature during film formation, the target In some cases, the [Zn] of the film may be smaller than the [Zn] of the base.

[0242] In addition, a plurality of phases may coexist in the oxide semiconductor film (for example, two-phase coexistence or three-phase coexistence). For example, the atomic ratio of [In]:[M]:[Zn]=0:2:1 and its neighboring values In terms of atomic ratio, two phases, a spinel type crystal structure and a layered crystal structure, tend to coexist. The atomic ratio of [In]:[M]:[Zn]=1:0:0 and the number of atoms close to that value In this case, the bixbyite-type crystal structure and the layered crystal structure tend to coexist. When multiple phases coexist in a semiconductor film, grain boundaries (grain boundaries) occur between different crystal structures. (also called undaries) may form.

[0243] In addition, by increasing the indium content, the carrier mobility (electron This is because the oxide having indium, element M, and zinc can be used In semiconductor films, the s-orbitals of heavy metals are mainly responsible for carrier conduction, and the inclusion of indium By increasing the percentage, the area of ​​overlap of s orbitals becomes larger, so the indium content The oxide semiconductor film with a high indium content has a higher carryover rate than the oxide semiconductor film with a low indium content. This is because the mobility of the electrons is increased.

[0244] On the other hand, when the contents of indium and zinc in the oxide semiconductor film are low, the carrier mobility Therefore, the atomic ratio of [In]:[M]:[Zn]=0:1:0 and In the atomic ratio having a value close to this (eg, region C shown in FIG. 39C), the insulating property becomes high.

[0245] Therefore, the oxide semiconductor film of one embodiment of the present invention has high carrier mobility and few grain boundaries. It is preferable that the atomic ratio of the layered structure is as shown in region A of FIG. 39A. stomach.

[0246] In addition, in the region B shown in FIG. 39B, [In]:[M]:[Zn]=4:2:3 to 4.1 , and its neighboring values. For example, the atomic ratio [In]:[M]:[ The oxide semiconductor film having the atomic ratio shown in region B includes In particular, this is an excellent oxide semiconductor film having high crystallinity and high carrier mobility.

[0247] Note that the condition for the oxide semiconductor film to have a layered structure is uniquely determined by the atomic ratio. The difficulty of forming a layered structure varies depending on the atomic ratio. Even if the ratio is the same, a layered structure may or may not be formed depending on the formation conditions. Therefore, the illustrated region is a region showing an atomic ratio in which the oxide semiconductor film has a layered structure. , the boundaries between areas A and C are not strict.

[0248] <1-12. Structure of metal oxide films> Next, the structure of a metal oxide film (hereinafter referred to as an oxide semiconductor) will be described.

[0249] Oxide semiconductors can be divided into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide Nanocrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semiconducting ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- amorphous oxide semiconductors and amorphous oxide semiconductors. do.

[0250] From another point of view, the oxide semiconductor is classified into an amorphous oxide semiconductor and a crystalline oxide semiconductor. Crystalline oxide semiconductors are classified into single crystal oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductors, and nc-OS.

[0251] Amorphous structures are generally isotropic and have no inhomogeneous structure, and are characterized by the arrangement of atoms in a metastable state. The positions are not fixed, the bond angles are flexible, and there is short-range order but no long-range order. It is said that there is no such thing.

[0252] That is, a stable oxide semiconductor is transformed into a completely amorphous In addition, the semiconductor is not isotropic (for example, A periodic oxide semiconductor cannot be called a completely amorphous oxide semiconductor. -like OS is not isotropic, but has an unstable structure with voids. In terms of instability, the a-like OS is physically an amorphous oxide semiconductor. Close to.

[0253] [CAAC-OS] First, let me explain about CAAC-OS.

[0254] CAAC-OS is an oxide that has multiple crystal parts (also called pellets) aligned along the c-axis. It is a type of semiconductor.

[0255] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of oxide semiconductors is determined by the presence of impurities. CAAC-OS is designed to prevent impurities and defects from causing degradation. It can also be said to be an oxide semiconductor with few defects (such as oxygen vacancies).

[0256] The impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, and transition metals. For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0257] [nc-OS] Next, we will explain nc-OS.

[0258] The following describes the case where nc-OS is analyzed by XRD. However, when structural analysis was performed using the out-of-plane method, no peaks indicating orientation appeared. That is, the crystals of the nc-OS do not have any orientation.

[0259] The nc-OS is an oxide semiconductor with higher order than an amorphous oxide semiconductor. The nc-OS has a lower density of defect states than the a-like OS and amorphous oxide semiconductors. However, the crystal orientation of nc-OS is not regular among different pellets. Therefore, the nc-OS may have a higher density of defect states than the CAAC-OS.

[0260] [a-like OS] The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. It is a semiconductor.

[0261] A-like OS has porosity or low density areas. Therefore, it is an unstable structure.

[0262] In addition, a-like OS has porosity, so compared with nc-OS and CAAC-OS, Specifically, the density of the a-like OS is lower than that of a single crystal of the same composition. The density of nc-OS and CAAC- The density of the OS is 92.3% or more but less than 100% of the density of a single crystal of the same composition. It is difficult to form a film of an oxide semiconductor having a density of less than 78%.

[0263] For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of single crystal InGaZnO4 with a rhombohedral crystal structure is 6.357 g / cm 3 That is it. For example, in an oxide semiconductor that satisfies the atomic ratio of In:Ga:Zn=1:1:1, The density of a-like OS is 5.0g / cm 3 More than 5.9g / cm 3 Less than For example, in an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:1:1, The density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 More than 6.3g / cm 3 is less than.

[0264] If single crystals of the same composition are not available, single crystals of different compositions may be combined in any ratio. By combining these, it is possible to estimate the density equivalent to a single crystal of a desired composition. The density of a single crystal of a desired composition is calculated based on the ratio of the single crystals of different compositions. However, the density can be estimated by using as few types of single crystals as possible. A combined estimate is preferred.

[0265] As described above, oxide semiconductors have various structures and each structure has various characteristics. The oxide semiconductor may be, for example, an amorphous oxide semiconductor, an a-like OS, or an nc-OS. The film may be a laminated film having two or more of the CAAC-OS and CAAC-OS.

[0266] <1-13. Use of metal oxide film in transistor> Next, a structure in which a metal oxide film (hereinafter referred to as an oxide semiconductor film) is used for a transistor will be described. This article explains:

[0267] Note that by using an oxide semiconductor film for a transistor, for example, Compared with transistors using a silicon-coated panel, it reduces carrier scattering at grain boundaries. Therefore, a transistor with high field effect mobility can be realized. A highly reliable transistor can be realized.

[0268] The oxide semiconductor film of one embodiment of the present invention has a crystal part having orientation and a crystal part not having orientation. The oxide semiconductor film having such crystallinity is a film in which the crystallinity is mixed. It is possible to realize a transistor that has both high field effect mobility and high reliability.

[0269] <1-14. Carrier density of metal oxide films> The carrier density of a metal oxide film (hereinafter, an oxide semiconductor film) will be described below. .

[0270] The factors that affect the carrier density of an oxide semiconductor film include oxygen in the oxide semiconductor film. Examples of the causes include vacancies (Vo) and impurities in the oxide semiconductor film.

[0271] When the number of oxygen vacancies in the oxide semiconductor film increases, hydrogen bonds to the oxygen vacancies (this state is called Vo When the oxide semiconductor film is heated to 1000 V, the density of defect states increases. When the amount of the impurities increases, the density of defect states due to the impurities increases. By controlling the density of defect states in the oxide semiconductor film, the carrier density in the oxide semiconductor film can be controlled. do.

[0272] Here, a transistor in which an oxide semiconductor film is used for a channel region will be considered.

[0273] Suppression of negative shift of the threshold voltage of a transistor or suppression of off-current of a transistor In order to reduce the carrier density of the oxide semiconductor film, it is preferable to reduce the carrier density of the oxide semiconductor film. In the case where the carrier density of the oxide semiconductor film is reduced, impurities in the oxide semiconductor film It is sufficient to lower the impurity concentration and the defect level density. A material with a low density of defect states is called high purity intrinsic or substantially high purity intrinsic. The carrier density of the oxide semiconductor film is 8×1015 cm -3 Less than 1 ×10 11 cm -3 less than 1×10 10 cm -3 Less than 1 x 10 -9 cm -3 That should be enough.

[0274] On the other hand, the improvement of the on-state current of a transistor or the field effect mobility of a transistor In that case, it is preferable to increase the carrier density of the oxide semiconductor film. In order to increase the carrier density of the oxide semiconductor film, the impurity concentration of the oxide semiconductor film is Alternatively, the density of defect states in the oxide semiconductor film may be increased slightly. Alternatively, the band gap of the oxide semiconductor film may be made smaller. In the range where the on / off ratio of the Id-Vg characteristics is obtained, the impurity concentration is slightly high, or An oxide semiconductor film having a high density of defect states or a slightly high density of defect states can be regarded as substantially intrinsic. The electron affinity is large, and the band gap is small, resulting in thermal excitation. The oxide semiconductor film in which the density of trapped electrons (carriers) is increased can be regarded as being substantially intrinsic. In addition, when an oxide semiconductor film having a higher electron affinity is used, the threshold voltage of the transistor is The voltage becomes lower.

[0275] The oxide semiconductor film with the increased carrier density described above is slightly n-type. Therefore, an oxide semiconductor film with an increased carrier density is called a "slightly-n" film. This is also fine.

[0276] The carrier density of a substantially intrinsic oxide semiconductor film is 1×10 5 cm -3More than 1×10 1 8 cm -3 Less than 1×10 is preferable. 7 cm -3 More than 1×10 17 cm -3 The following is preferred: 1×10 9 cm -3 5×10 or more 16 cm -3 More preferably, 1×10 10 cm -3 More than 1×10 16 cm -3 More preferably, 1×10 11 cm -3 Below Top 1×10 15 cm -3 The following is even more preferred:

[0277] In addition, by using the above-described substantially intrinsic oxide semiconductor film, the reliability of the transistor can be improved. Here, referring to FIG. 41, when an oxide semiconductor film is used for a channel region, The reason for improving the reliability of a transistor will be described. 1 is a diagram illustrating an energy band in a transistor used in a channel region.

[0278] In FIG. 41, GE denotes a gate electrode, GI denotes a gate insulating film, and OS denotes an oxide semiconductor film. 41 represents the gate electrode and SD represents the source electrode or drain electrode, respectively. a gate electrode, a gate insulating film, an oxide semiconductor film, and a source electrode or is an example of an energy band of the drain electrode.

[0279] In FIG. 41, a silicon oxide film is used as the gate insulating film, and an oxide semiconductor The structure uses In-Ga-Zn oxide as the film. The defect transition level (εf) is formed at a position 3.1 eV away from the conduction band of the gate insulating film. The gate voltage (Vg) is 30 V. The Fermi level (Ef) of the silicon oxide film at the interface is calculated from the conduction band of the gate insulating film by 3. The Fermi level of the silicon oxide film varies depending on the gate voltage. For example, by increasing the gate voltage, a gate insulating film is formed at the interface between the oxide semiconductor film and the silicon oxide film. The Fermi level (Ef) of the silicon oxide film is lowered in the (carrier), and X in FIG. 41 represents a defect level in the silicon oxide film.

[0280] As shown in FIG. 41, when a gate voltage is applied, for example, carriers are thermally excited. When this happens, carriers are trapped in the defect level (X in the figure), and the charge changes from positive ("+") to neutral. The charge state of the defect level changes to “0”. That is, the Fermi level of the silicon oxide film The sum of (Ef) and the thermal excitation energy mentioned above is higher than the defect transition level (εf). When the charge level of the defect in the silicon oxide film is increased, the charge state of the defect level in the silicon oxide film changes from a positive state to a neutral state, and a transistor This causes the threshold voltage of the transistor to shift in the positive direction.

[0281] In addition, when oxide semiconductor films having different electron affinities are used, The depth at which the Fermi level is formed at the interface with the oxide with a large electron affinity may differ. When an oxide semiconductor film is used, the gate insulating film is The conduction band of the film shifts upward. In this case, the defect level that can be formed in the gate insulating film (Figure 4 Since the X in 1 also moves upward, the Fermi level at the interface between the gate insulating film and the oxide semiconductor film The energy difference between the gate insulating film and the gate insulating film becomes large. Less charge is trapped in the silicon oxide film, for example. The change in the charge state of the defect level is reduced, and the gate bias heat The threshold voltage of a transistor under GBT (high-temperature) stress This can reduce fluctuations in the

[0282] In addition, it takes a long time for charges trapped in defect states in the oxide semiconductor film to disappear. Therefore, oxides with high defect level density are Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. be.

[0283] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor film is In order to reduce the impurity concentration in the oxide semiconductor film, It is preferable that the impurity concentration in the adjacent film is also reduced. , alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0284] Here, the influence of each impurity in the oxide semiconductor film will be described.

[0285] When silicon or carbon, which is one of the group 14 elements, is contained in the oxide semiconductor film, Therefore, the defect level is generated in the silicon oxide semiconductor film. The concentration of silicon and carbon near the interface with the oxide semiconductor film (secondary ion mass) Secondary Ion Mass Spectrometer (SIMS) The concentration obtained by y) is 2 × 1018 atoms / cm 3 Below, preferably 2 x 1 0 17 atoms / cm 3 The following applies.

[0286] In addition, when an alkali metal or an alkaline earth metal is contained in the oxide semiconductor film, a defect level Therefore, alkali metal or alkaline earth metals may form A transistor using an oxide semiconductor film containing a metal tends to be normally on. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film can be reduced. Specifically, it is preferable to use an alkali metal or or alkaline earth metal concentration, 1×10 18 atoms / cm 3 Below, preferably 2x 10 16 atoms / cm 3 To the following:

[0287] In addition, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated. The rear density increases and the oxide semiconductor film containing nitrogen tends to become n-type. A transistor using the oxide semiconductor film as a semiconductor tends to be normally on. In the above, it is preferable that the nitrogen content is reduced as much as possible. For example, The nitrogen concentration in the oxide semiconductor film is 5×10 19 atoms / cm 3 Less than, preferably is 5 x 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 The following applies.

[0288] In addition, hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. Therefore, oxygen vacancies may be formed. When hydrogen enters the oxygen vacancies, the carrier Electrons may be produced. Also, some of the hydrogen may combine with oxygen, which combines with the metal atom, Therefore, the oxide semiconductor film containing hydrogen may generate electrons, which are carriers. A transistor using such a metal oxide semiconductor film tends to be normally on. Specifically, in the oxide semiconductor film, The hydrogen concentration obtained by SIMS was 1×10 20 atoms / cm 3 Less than, preferably 1×10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Less than.

[0289] An oxide semiconductor film in which impurities are sufficiently reduced is used for a channel formation region of a transistor. This makes it possible to impart stable electrical characteristics to the transistor.

[0290] In addition, the oxide semiconductor film has an energy gap of 2 eV or more, or 2.5 eV or more. It is preferable to have one.

[0291] The thickness of the oxide semiconductor film is 3 nm to 200 nm, preferably 3 nm to 100 nm. 00 nm or less, and more preferably 3 nm or more and 60 nm or less.

[0292] In addition, when the oxide semiconductor film is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide is such that In:M:Zn = 1:1:0.5, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, I n:M:Zn = 2:1:1.5, In:M:Zn = 2:1:2.3, In:M:Zn = 2 :1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:4.1, In:M: Zn = 5:1:7, etc. are preferable.

[0293] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0294] (Embodiment 2) <Configuration of CAC> Hereinafter, the configuration of a CAC (Cloud Aligned Complementary)-OS that can be used in one aspect of the present invention will be described.

[0295] The CAC is, for example, a configuration of a material in which the elements constituting the oxide semiconductor are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. In the following, in the oxide semiconductor, one or more metal elements are unevenly distributed, and the region having the metal element is in a mixed state in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more 2 nm or less, or in the vicinity thereof, and is also referred to as a mosaic state or a patch state.

[0296] For example, in In-Ga-Zn oxide (hereinafter also referred to as IGZO), CAC-IG ZO means indium oxide (hereinafter, InO X1 (X1 is a real number greater than 0).​​​​ ), or indium zinc oxide (In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 is a real number greater than 0.) and gallium oxide (GaO X3 (X3 is 0) or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z4 are real numbers greater than 0).) By separating the layers, a mosaic pattern is formed. X1 , or In X2 Zinc Y2 O Z 2 is uniformly distributed in the film (hereinafter, also referred to as a cloud-like structure).

[0297] In other words, CAC-IGZO is GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite oxide having a structure in which a region in which In this specification, for example, the element M of the first region is an element of In. The atomic ratio of In to the element M in the first region is greater than the atomic ratio of In to the element M in the second region. has a higher In concentration than the first region.

[0298] IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of the crystalline compound represented are given.

[0299] The above crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. Note that the CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without orientation in the a-b plane.

[0300] On the other hand, CAC relates to the material composition. CAC refers to a region observed in a nanoparticle shape with Ga as a main component and a region observed in a nanoparticle shape with In as a main component being randomly dispersed in a mosaic pattern in a material composition containing In, Ga, Zn, and O. Therefore, in CAC, the crystal structure is a secondary element.

[0301] Note that CAC does not include a laminated structure of two or more types of films having different compositions. For example, a structure composed of two layers of a film mainly composed of In and a film mainly composed of Ga is not included.

[0302] Note that there may be cases where no clear boundary can be observed between a region where GaO X3 is the main component and a region where In X2 Zn Y2 O Z2 or a region where InO X1 is the main component.

[0303] <Analysis of CAC-IGZO> Subsequently, the results of measurements performed on the oxide semiconductor formed on the substrate using various measurement methods will be described.

[0304] ≪Configuration and Fabrication Method of Samples≫ Hereinafter, nine samples according to one aspect of the present invention will be described. Each sample, respectively, The oxide semiconductor film is formed under different conditions of the substrate temperature and the oxygen gas flow rate ratio. Note that the sample has a structure including a substrate and an oxide semiconductor over the substrate.

[0305] The preparation method of each sample will be described.

[0306] First, a glass substrate is used as the substrate. Then, the glass is A 100 nm-thick In-Ga-Zn oxide is formed as an oxide semiconductor on a silicon substrate. The deposition conditions were a pressure of 0.6 Pa in the chamber and an oxide target. (In:Ga:Zn=4:2:4.1 [atomic ratio]) was used. An AC power of 2500 W is supplied to an oxide target placed in the chamber.

[0307] As a condition for forming an oxide film, the substrate temperature is set to a temperature at which the substrate is not intentionally heated (hereinafter The temperature was set to 130°C, 170°C, or 180°C. The flow rate ratio of oxygen gas to the gas (hereinafter referred to as oxygen gas flow rate ratio) was set to 10%, 30%, Or, 100%, nine samples are prepared.

[0308] <Analysis by X-ray diffraction> In this section, X-ray diffraction (XRD) was performed on nine samples. The results of the measurement are described below. The XRD device used was a Bruker product. D8 ADVANCE was used. The conditions were θ / In 2θ scan, the scanning range is 15 deg. to 50 deg., and the step width is 0.02d. For example, the scanning speed was 3.0 deg. / min.

[0309] Figure 88 shows the results of measuring the XRD spectrum using the out-of-plane method. In addition, in Figure 88, the upper row shows the measurement results for a sample with a substrate temperature condition of 170°C during film formation. The middle row shows the measurement results for a sample with a substrate temperature of 130°C during film formation, and the lower row shows the film formation The left column shows the results of measurements taken with the substrate temperature at RT. The center column shows the results of measurements taken with the gas flow rate ratio at 10%. The right column shows the results for the sample with a 30% oxygen gas flow rate, and the right column shows the results for the sample with a 100% oxygen gas flow rate. The measurement results are shown below.

[0310] The XRD spectrum shown in Figure 88 shows that the film thickness increases when the substrate temperature is increased or when the amount of acid in the film is increased. By increasing the ratio of the atomic gas flow rate, the peak intensity around 2θ=31° becomes higher. The peak near 2θ=31° indicates that the c-axis is oriented in the direction approximately perpendicular to the surface on which the film is formed or the upper surface. The c-axis aligned crystal of IGZO compound (CAAC) It is also called line-IGZO.

[0311] In addition, the XRD spectrum shown in FIG. 88 shows that the substrate temperature during film formation was low or the oxygen gas The smaller the flow rate ratio, the less clear the peak. Alternatively, the sample with a small oxygen gas flow rate ratio had ab-plane and c-axis orientations in the measurement area. It can be seen that no direction is visible.

[0312] Analysis by electron microscope In this section, the samples were prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. ,HAADF(High-Angle Annular Dark Field)-S TEM(Scanning Transmission Electron Micro The results of the observation and analysis using the HAADF-scope will be described below (hereafter, HAADF- Images obtained by STEM are also called TEM images.

[0313] Planar images obtained by HAADF-STEM (hereinafter also referred to as planar TEM images) and The results of image analysis of the cross-sectional images (hereinafter also referred to as cross-sectional TEM images) will be explained. The TEM images were observed using a spherical aberration correction function. The images were taken using an atomic resolution analytical electron microscope, JEM-ARM200F, manufactured by JEOL Ltd. The specimen was irradiated with an electron beam having an acceleration voltage of 200 kV and a beam diameter of approximately 0.1 nmφ.

[0314] FIG. 89A shows a sample prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. FIG. 89B shows the relationship between the substrate temperature RT and the oxygen gas flow rate ratio during film formation. This is a cross-sectional TEM image of a sample prepared at 10%.

[0315] <Analysis of electron diffraction patterns> In this section, the samples were prepared at a substrate temperature of RT during film formation and an oxygen gas flow rate of 10%. By irradiating the sample with an electron beam with a probe diameter of 1 nm (also called a nano-beam electron beam), The results of acquiring sagittal diffraction patterns will now be described.

[0316] The film was formed at a substrate temperature of RT and an oxygen gas flow rate of 10% as shown in FIG. In the planar TEM image of the sample, black spots a1, a2, a3, a4, and a The electron beam diffraction pattern shown in FIG. 5 is observed. While irradiating the area, move the area from the 0 second position to the 35 second position at a constant speed. The results of black point a1 are shown in Fig. 89C, the results of black point a2 are shown in Fig. 89D, the results of black point a3 are shown in Fig. 89E, and the results of black point a4 are shown in Fig. The results for black point a5 are shown in Figure 89F and Figure 89G.

[0317] From Fig. 89C, Fig. 89D, Fig. 89E, Fig. 89F, and Fig. 89G, A bright area (ring-shaped) can be observed. Also, multiple spots can be observed in the ring-shaped area. can.

[0318] In addition, as shown in FIG. 89B, the film was formed at a substrate temperature RT and an oxygen gas flow rate ratio of 10%. In the cross-sectional TEM image of the prepared sample, black spots b1, b2, b3, b4, and Observe the electron diffraction pattern shown by black spot b5. The results of black spot b1 are shown in Figure 89H, and those of black spot b2 are shown in Figure 89H. The results are shown in Figure 89I, the results for black point b3 in Figure 89J, the results for black point b4 in Figure 89K, and the results for black point b The results of 5 are shown in Figure 89L.

[0319] From Figs. 89H, 89I, 89J, 89K, and 89L, it is possible to see that the ring-shaped high brightness In addition, multiple spots can be observed in a ring-shaped area.

[0320] For example, for a CAAC-OS having an InGaZnO4 crystal, When an electron beam with a probe diameter of 300 nm is incident on the row, the (00 9) The diffraction pattern includes spots due to the CAAC-OS It has been found that the film has a c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface on which the film is formed or the upper surface. On the other hand, an electron beam with a probe diameter of 300 nm is incident perpendicularly to the surface of the same sample. In other words, the CAAC-OS has a ring-shaped diffraction pattern along the a-axis and It is clear that the b-axis has no orientation.

[0321] In addition, a nanocrystalline oxide semiconductor nc-OS) with a large probe diameter When electron diffraction is performed using an electron beam (e.g., 50 nm or larger), a halo pattern is observed. A diffraction pattern is observed. In addition, a small probe diameter electron beam (e.g. When nanobeam electron diffraction is performed using a material with a diameter of less than 50 nm, bright spots are observed. In addition, when nanobeam electron diffraction was performed on the nc-OS, a circular (ring-shaped) In some cases, a bright area is observed. In addition, multiple bright spots are observed in a ring-shaped area. It may be measured.

[0322] Electron beam diffraction of a sample prepared at substrate temperature RT during film formation and oxygen gas flow rate of 10% The pattern has a ring-shaped area of ​​high brightness and multiple bright points in the ring area. The sample was fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. The folding pattern is nc-OS, and there is no orientation in the planar direction or cross-sectional direction. stomach.

[0323] From the above, oxide semiconductors formed at low substrate temperatures or with a small oxygen gas flow rate are The oxide semiconductor film has a structure that is clearly different from that of an amorphous oxide semiconductor film and that of a single crystal oxide semiconductor film. It can be assumed that the substance has the following properties.

[0324] ≪Elemental analysis≫ In this article, we will discuss energy dispersive X-ray spectroscopy (EDX). EDX mapping was obtained and evaluated using vective X-ray spectroscopy. By evaluating the film formation, the substrate temperature was set at RT and the oxygen gas flow rate was set at 10%. The results of elemental analysis of the samples are described below. The energy dispersive X-ray analyzer JED-2300T manufactured by JEOL Ltd. is used as the analyzer. A Si drift detector is used to detect the X-rays emitted from the sample.

[0325] In EDX measurement, each point in the analysis area of ​​the sample is irradiated with an electron beam, The energy and frequency of the characteristic X-rays of the sample are measured, and the EDX spectrum corresponding to each point is obtained. In this embodiment, the peaks in the EDX spectrum at each point are determined as electron transitions to the L shell of the In atom. electron transition to the K shell of Ga atom, electron transition to the K shell of Zn atom, and electron transition to the K shell of O atom The ratio of each atom at each point is calculated. By performing EDX analysis on the target area, an EDX map showing the distribution of the ratio of each atom is obtained. It is possible.

[0326] FIG. 90 shows the sample fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. FIG. 90A shows EDX mapping of Ga atoms (all The ratio of Ga atoms to Ga atoms is in the range of 1.18 to 18.64 [atomic%]. .) Figure 90B shows the EDX mapping of In atoms (ratio of In atoms to total atoms). The range of atomic percentage is 9.28 to 33.74. EDX mapping of n atoms (ratio of Zn atoms to total atoms ranges from 6.69 to 24.99[ atomic%]. Also, Fig. 90A, Fig. 90B, and Fig. 90C The cross section of the sample was fabricated at a substrate temperature of RT and an oxygen gas flow rate of 10% during film formation. The EDX mapping shows the same range of the measured elements in the range. The ratio of elements is shown by light and dark. The more the amount of the measured element, the brighter it becomes, and the less the measured element, the darker it becomes. The magnification of the EDX mapping shown in Figure 90 is 7.2 million times.

[0327] The EDX mapping shown in Figures 90A, 90B, and 90C shows that the relative brightness of the images A dark distribution was observed. The film was formed at a substrate temperature of RT and an oxygen gas flow rate of 10%. In the sample, it can be seen that each atom exists with its own distribution. Pay attention to the areas surrounded by solid lines and dashed lines in Figures 90B and 90C.

[0328] In FIG. 90A, the area enclosed by the solid line includes many relatively dark areas, and the area enclosed by the dashed line includes many relatively dark areas. It contains many relatively bright areas. Also, in FIG. 90B, the area surrounded by the solid line is a relatively bright area. The area enclosed by the dashed line contains many relatively dark areas.

[0329] In other words, the area surrounded by the solid line is the area with a relatively large amount of In atoms, and the area surrounded by the dashed line is the area with a relatively large amount of In atoms. In FIG. 90C, the area surrounded by the solid line is the area with relatively few atoms. The side is a relatively bright area, and the left side is a relatively dark area. The range is In X2 Zinc Y2 O Z2 , or InO X1 This is an area where the main components are:

[0330] The area surrounded by the solid line is the area with relatively few Ga atoms, and the area surrounded by the dashed line is the area with relatively few Ga atoms. In Figure 90C, the upper left area surrounded by the dashed line is The area in the lower right corner is a relatively bright area, and the area in the lower right corner is a dark area. The area is GaO X3 , or Ga X4 Zinc Y4 O Z4 This is an area where the main components are:

[0331] Also, from Figures 90A, 90B, and 90C, the distribution of In atoms is larger than that of Ga atoms. , relatively uniform distribution, InO X1 The region where is the main component is In X2 Zinc Y2 O Z2 It appears that the two are connected to each other through the regions where the main component is Sea urchin, In X2 Zinc Y2 O Z2 , or InO X1 The area where is the main component is cloud-like. It spreads and forms.

[0332] In this way, GaO X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or In O X1 In-Ga-Zn oxide with a structure in which the regions in which The compound can be referred to as CAC-IGZO.

[0333] The crystal structure of CAC is an nc structure. In the dc diffraction patterns, bright spots originating from IGZO, including single crystal, polycrystalline, and CAAC structures, were observed. In addition to the spots, there are several bright spots. The crystal structure is defined as the appearance of a ring-shaped area of ​​high brightness in addition to the bright spots. can be.

[0334] Also, from Figs. 90A, 90B, and 90C, GaO X3 The area where is the main component, and In X2 Zinc Y2 O Z2 , or InO X1 The size of the region in which is the principal component is 0.5n The diameter of the nucleus is preferably from 1 nm to 3 nm. In DX mapping, the diameter of the area where each metal element is the main component is between 1 nm and 2 nm. Let us assume that.

[0335] From the above, CAC-IGZO is different from IGZO compounds in which metal elements are uniformly distributed. CAC-IGZO has a Ga structure and has different properties from IGZO compounds. O X3 The main components are In X2 Zinc Y2 O Z2 , or InO X1 is the main component The structure is a mosaic of regions where each element is the main component and regions where each element is the main component. Therefore, when CAC-IGZO is used in semiconductor devices, X3 Due to The properties of In X2 Zinc Y2 O Z2 , or InO X1 The properties resulting from By using this, a high on-current (I on ), and high field-effect mobility (μ It is possible.

[0336] In addition, semiconductor elements using CAC-IGZO have high reliability. ZO is ideal for a variety of semiconductor devices, including displays.

[0337] This embodiment may be any of the other embodiments, at least some of which are described herein, or It can be implemented in appropriate combination with other embodiments.

[0338] (Embodiment 3) In this embodiment, a transistor that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail.

[0339] In this embodiment, the transistors having a top gate structure are shown in FIGS. This will be explained using 3C.

[0340] <3-1. Transistor configuration example 1> FIG. 42A is a top view of the transistor 100, and FIG. 42B is a top view of the transistor 100 shown in FIG. 42A. 42C is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 42A. In FIG. 42A, for clarity, components such as the insulating film 110 are omitted. In the top view of the transistor, in the following drawings, as in FIG. In some cases, some of the components may be omitted. Also, the dashed line X1-X2 indicates the channel. The direction of the dashed line Y1-Y2 is sometimes called the channel width (W) direction. .

[0341] The transistor 100 shown in FIGS. 42A to 42C includes an insulating film 104 on a substrate 102 and an insulating An oxide semiconductor film 108 on the insulating film 104, an insulating film 110 on the oxide semiconductor film 108, The conductive film 112 on the insulating film 110, the insulating film 104, the oxide semiconductor film 108, and the conductive film 11 Note that the oxide semiconductor film 108 overlaps with the conductive film 112. A channel region 108i is formed by the insulating film 116, a source region 108s is formed by the insulating film 116, and and a drain region 108d in contact with the drain region 108c.

[0342] The insulating film 116 contains nitrogen or hydrogen. s and the drain region 108d, the nitrogen or hydrogen in the insulating film 116 is converted into The source region 108s and the drain region 108d are doped with Zn. The carrier density of the rain region 108d is increased by adding nitrogen or hydrogen.

[0343] The transistor 100 also includes an insulating film 118 on the insulating film 116 and an insulating film 116 on the insulating film 117. A conductive layer electrically connected to the source region 108s through an opening 141a provided in the semiconductor substrate 108 is The drain region is connected to the insulating film 120a through an opening 141b provided in the insulating films 116 and 118. and a conductive film 120b electrically connected to the region 108d.

[0344] In this specification and the like, the insulating film 104 is referred to as a first insulating film, and the insulating film 110 is referred to as a second insulating film. The insulating film 116 is referred to as a third insulating film, and the insulating film 118 is referred to as a fourth insulating film. In addition, the conductive film 112 may function as a gate electrode. a functions as a source electrode, and the conductive film 120b functions as a drain electrode. Yes.

[0345] The insulating film 110 also functions as a gate insulating film. The insulating film 110 has an excess oxygen region. Excess oxygen can be supplied to the channel region 108i of the semiconductor substrate 108. Since the oxygen vacancies that may be formed in the panel region 108i can be compensated for by the excess oxygen, A highly reliable semiconductor device can be provided.

[0346] In order to supply excess oxygen to the oxide semiconductor film 108, The insulating film 104 formed below the insulating film 18 may have excess oxygen. The excess oxygen contained in the oxide semiconductor film 108 is The source region 108s and the drain region 108 When excess oxygen is supplied to the source region 108s and the drain region 108d, the resistance of the source region 108s and the drain region 108d increases. may be higher.

[0347] On the other hand, in the structure in which the insulating film 110 formed above the oxide semiconductor film 108 contains excess oxygen, By forming the semiconductor layer 108 in this manner, it is possible to selectively supply excess oxygen only to the channel region 108i. Alternatively, the channel region 108i, the source region 108s, and the drain region 10 After supplying excess oxygen to the source region 108s and the drain region 108d, By selectively increasing the rear density, the resistance of the source region 108s and the drain region 108d is reduced. Therefore, it is possible to suppress the resistance from increasing.

[0348] The source region 108s and the drain region 108d of the oxide semiconductor film 108 are Each of them preferably has an element that forms an oxygen vacancy or an element that bonds with the oxygen vacancy. Representative elements that form the oxygen vacancies or that bond with the oxygen vacancies include Hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, chlorine, titanium, rare gas elements, etc. Representative examples of rare gas elements are helium, neon, argon, krypton, The above elements that form oxygen vacancies may be contained in the insulating film 116. When the insulating film 116 contains an element that forms oxygen vacancies, the insulating film 11 6, elements that form oxygen vacancies diffuse into the source region 108s and the drain region 108d. Alternatively, the above-mentioned element that forms oxygen vacancies is added to the source region 10 by impurity addition processing. It may be doped in the drain region 108d as well as in the ion implantation region 108s.

[0349] When an impurity element is added to an oxide semiconductor film, a bond between a metal element and oxygen in the oxide semiconductor film is formed. The bond is broken, and oxygen vacancies are formed. Alternatively, an impurity element is added to the oxide semiconductor film. Then, oxygen that has been bonded to a metal element in the oxide semiconductor film is bonded to an impurity element, and the metal element As a result, oxygen is released from the oxide semiconductor film, and oxygen vacancies are formed. The carrier density increases and the conductivity becomes higher.

[0350] Next, the components of the semiconductor device shown in Figures 42A to 42C will be described in detail.

[0351] [substrate] The substrate 102 is made of a material having a heat resistance sufficient to withstand the heat treatment during the manufacturing process. This can be done.

[0352] Specifically, non-alkali glass, soda-lime glass, alkali glass, crystal glass For example, the insulating film may be made of glass, quartz, sapphire, etc. Also, an inorganic insulating film may be used. The inorganic insulating film may be, for example, a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. Examples of the film include an aluminum oxide film.

[0353] The alkali-free glass may have a thickness of, for example, 0.2 mm or more and 0.7 mm or less. Alternatively, the non-alkali glass may be polished to the above thickness.

[0354] In addition, we also offer 6th generation (1500mm x 1850mm) and 7th generation non-alkali glass. (1870mm x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400mm x 2800mm), 10th generation (2950mm x 3400mm) etc. This allows the use of a large glass substrate, making it possible to manufacture a large display device. can be done.

[0355] The substrate 102 may be a single crystal semiconductor substrate made of silicon or silicon carbide, or a polycrystalline A semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc. may be used. .

[0356] Furthermore, the substrate 102 may be made of an inorganic material such as a metal. , stainless steel or aluminum.

[0357] The substrate 102 is made of an organic material such as resin, resin film, or plastic. The resin film may be polyester, polyolefin, polyamide (nylon, lon, aramid, etc.), polyimide, polycarbonate, polyurethane, acrylic resin, elastomeric resin, Polyoxy resin, polyethylene terephthalate (PET), polyethylene naphthalate (PE Examples include polyethersulfone (PES), or resins with siloxane bonds. can be done.

[0358] The substrate 102 may be made of a composite material that combines an inorganic material and an organic material. The composite material is a material in which a metal plate or a thin glass plate is laminated with a resin film. Materials that have been bonded to resins, fibrous metals, particulate metals, fibrous glass, or particulate glass Materials dispersed in a film, or materials in which fibrous or particulate resin is dispersed in inorganic materials Examples of such fees include:

[0359] The substrate 102 is at least capable of supporting a film or layer formed thereon or therebelow. Any suitable material may be used, and the material may be one or more of an insulating film, a semiconductor film, and a conductive film. stomach.

[0360] [First insulating film] The insulating film 104 is formed by a method such as sputtering, CVD, vapor deposition, or pulsed laser deposition (PLD). The insulating film 104 can be formed by appropriately using a deposition method, a printing method, a coating method, or the like. For example, a single layer or a stacked layer of an oxide insulating film or a nitride insulating film can be formed. In order to improve the interface characteristics with the oxide semiconductor film 108, at least In either case, a region in contact with the oxide semiconductor film 108 is preferably formed using an oxide insulating film. In the case where an oxide insulating film which releases oxygen by heating is used as the insulating film 104, As a result, oxygen contained in the insulating film 104 can be moved to the oxide semiconductor film 108. be.

[0361] The thickness of the insulating film 104 is 50 nm or more, or 100 nm or more and 3000 nm or less, or The thickness of the insulating film 104 can be set to 200 nm or more and 1000 nm or less. This can increase the amount of oxygen released from the insulating film 104 and also can prevent the insulating film 104 and the oxide semiconductor from The interface state at the interface with the conductive film 108 and the channel region 1 of the oxide semiconductor film 108 It is possible to reduce the oxygen vacancies contained in 08i.

[0362] The insulating film 104 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitrogen. Silicon oxide, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn oxide The insulating film may be a single layer or a stacked layer. The layer structure of the silicon nitride film and the silicon oxynitride film is used as the layer 104. The insulating film 104 has a laminated structure, with a silicon nitride film on the lower layer and an oxynitride film on the upper layer. By using a silicon film, oxygen can be efficiently introduced into the oxide semiconductor film 108. Cut.

[0363] [Oxide semiconductor film] The metal oxide film described in Embodiment 1 can be used as the oxide semiconductor film 108. can.

[0364] In addition, when the oxide semiconductor film 108 is formed by a sputtering method, the film density can be increased. When the oxide semiconductor film 108 is formed by a sputtering method, The gas used may be a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen. In addition, the sputtering gas must be highly purified. The dew point of the gas used for the storage is -60℃ or less, preferably -100℃ or less. By using oxygen gas or argon gas, moisture and the like are taken into the oxide semiconductor film 108. This can be prevented as much as possible.

[0365] In addition, when the oxide semiconductor film 108 is formed by a sputtering method, a sputtering apparatus The chamber is then cooled to remove water and other impurities that may be present in the oxide semiconductor film 108 as much as possible. In order to remove the gas, a high vacuum (5×10 - 7 Pa to 1×10 -4 It is preferable to evacuate the gas to a pressure of about 1 Pa. Gas molecules equivalent to H2O (m / z=18) in the chamber during standby The partial pressure of the gas molecules (corresponding to the -4 Pa or less, preferably 5×10 -5 Pa or less It is preferable.

[0366] [Second insulating film] The insulating film 110 functions as a gate insulating film of the transistor 100. The oxide semiconductor film 100 has a function of supplying oxygen to the oxide semiconductor film 108, particularly to the channel region 108i. For example, the insulating film 110 may be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 108, In the film 110, at least a region in contact with the oxide semiconductor film 108 is formed using an oxide insulating film. The insulating film 110 is preferably formed of, for example, silicon oxide or silicon oxynitride. Silicon, silicon oxynitride, silicon nitride, or the like may be used.

[0367] The thickness of the insulating film 110 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less. m or less, or from 10 nm to 250 nm.

[0368] In addition, it is preferable that the insulating film 110 has few defects. (ESR: Electron Spin Resonance) observed signal For example, the above signal is observed at a g value of 2.001. The E' center is caused by the dangling bond of silicon. The insulating film 110 has a spin density due to the E' center of 3×10 17 spi ns / cm 3 Less than or equal to 5×10 16 spins / cm 3 Silicon oxide is less than A silicon oxynitride film or a silicon oxide nitride film may be used.

[0369] In addition to the above-mentioned signals, the insulating film 110 also emits signals due to nitrogen dioxide (NO2). A signal may be observed. The signal is divided into three signals due to the nuclear spin of N. The signal is split, and the g value of each signal is between 2.037 and 2.039 (the first signal). ), g value is between 2.001 and 2.003 (second signal), and g value is 1.9 It is observed between 64 and 1.966 (referred to as the third signal).

[0370] For example, the insulating film 110 may have a spin density of 1×10 1 7 spins / cm 3 More than 1×10 18 spins / cm 3 When an insulating film having a thickness of less than This is preferable.

[0371] In addition, nitrogen oxides (NO x ) creates a level in the insulating film 110 The level is located within the energy gap of the oxide semiconductor film 108. Therefore, nitrogen oxides (NOx) diffuse to the interface between the insulating film 110 and the oxide semiconductor film 108. When this level occurs, the level may trap electrons on the insulating film 110 side. The trapped electrons remain near the interface between the insulating film 110 and the oxide semiconductor film 108. This causes the threshold voltage of the transistor to shift in the positive direction. 0, if a film with a low content of nitrogen oxide is used, the threshold voltage of the transistor The shift can be reduced.

[0372] Nitrogen oxides (NO x An example of an insulating film with a low emission amount of ) is a silicon oxynitride film. The silicon oxynitride film can be analyzed by thermal desorption spectroscopy (TDS). Nitrogen oxides were detected by thermal desorption spectroscopy. (NO x ) is a membrane that releases more ammonia than water. Output is 1×10 18 pieces / cm 3 5×10 or more 19 pieces / cm 3 The following is the case. The amount of ammonia released is determined when the heat treatment temperature in TDS is between 50°C and 650°C, or The total amount is in the range of 50°C to 550°C.

[0373] Nitrogen oxides (NO x ) reacts with ammonia and oxygen during heat treatment, By using an insulating film that releases a large amount of monia, nitrogen oxides (NO x ) is reduced.

[0374] When the insulating film 110 was analyzed by SIMS, the nitrogen concentration in the film was 6×10 20 ato ms / cm 3It is preferable that the following is true:

[0375] The insulating film 110 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ) and high-k materials such as hafnium oxide may also be used. The use of this high-k material can reduce gate leakage of transistors.

[0376] [Third insulating film] The insulating film 116 contains nitrogen or hydrogen. The insulating film 116 also contains fluorine. The insulating film 116 may be, for example, a nitride insulating film. Silicon nitride, silicon oxynitride, silicon oxynitride, silicon fluoride nitride, fluoride The insulating film 116 can be formed using silicon nitride or the like. The hydrogen concentration in the insulating film 116 is 1 ×10 22 atoms / cm 3 The insulating film 116 is preferably an oxide semiconductor. It contacts the source region 108s and the drain region 108d of the conductor film 108. Impurities (such as nitrogen) in the source region 108s and the drain region 108d that are in contact with the insulating film 116 or hydrogen) concentration increases, and the carriers in the source region 108s and the drain region 108d The density of the material can be increased.

[0377] [Fourth insulating film] The insulating film 118 can be an oxide insulating film. For the insulating film 118, a stacked film of an oxide insulating film and a nitride insulating film can be used. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, Hafnium oxide, gallium oxide, Ga-Zn oxide, or the like may be used.

[0378] The insulating film 118 functions as a barrier film against hydrogen, water, and the like from the outside. It is preferable that

[0379] The thickness of the insulating film 118 is 30 nm or more and 500 nm or less, or 100 nm or more and 400 nm or less. m or less.

[0380] [Conductive film] The conductive films 112, 120a, and 120b are formed by sputtering, vacuum deposition, pulse laser, or the like. The conductive film 112 can be formed by using a photochemical deposition (PLD) method, a thermal CVD method, or the like. , 120a, 120b are conductive metal films, and films having a function of reflecting visible light. A conductive film or a conductive film having a function of transmitting visible light may be used.

[0381] Conductive metal films include aluminum, gold, platinum, silver, copper, chromium, tantalum, and titanium. Tungsten, molybdenum, tungsten, nickel, iron, cobalt, palladium or manganese A material containing a metal element selected from the above can be used. An alloy containing such a material may also be used.

[0382] Specifically, the metal film having the above-mentioned conductivity is a two-layer structure in which a copper film is laminated on a titanium film. Two-layer structure with copper film laminated on titanium nitride film, two-layer structure with copper film laminated on tantalum nitride film A three-layer structure is used, in which a copper film is laminated on a titanium film, and a titanium film is formed on top of that. In particular, the use of a conductive film containing copper can reduce the resistance. In addition, an example of a conductive film containing copper is an alloy film containing copper and manganese. The alloy film is suitable because it can be processed by wet etching.

[0383] It is preferable to use a tantalum nitride film as the conductive films 112, 120a, and 120b. The tantalum nitride film has electrical conductivity and a high barrier against copper and hydrogen. In addition, the tantalum nitride film releases less hydrogen from itself, so it is less susceptible to oxidation. As a metal film in contact with the oxide semiconductor film 108 or in the vicinity of the oxide semiconductor film 108, It can be most preferably used.

[0384] In addition, the conductive film having the above-mentioned conductivity is formed by using a conductive macromolecule or a conductive polymer. Good too.

[0385] The conductive film having the above-mentioned function of reflecting visible light may be made of gold, silver, copper, or palladium. In particular, a conductive film containing silver can be used. The use of such a material is preferable because it can increase the reflectance in visible light.

[0386] In addition, the conductive film having the above-mentioned function of transmitting visible light may be made of indium, tin, zinc, gallium, or the like. A material containing an element selected from the group consisting of aluminum, arsenic, and silicon can be used. In oxide, Zn oxide, In-Sn oxide (also called ITO), In-Sn-Si oxide Examples of such oxides include In-Zn oxide (also called ITSO), In-Zn oxide, and In-Ga-Zn oxide.

[0387] The conductive film having a function of transmitting visible light may be made of graphene or graphene. A film containing graphene may be used. The film containing graphene may be formed by forming a film containing graphene oxide. The graphene oxide film can be formed by reducing the graphene oxide film. Examples of the method include a method of applying heat and a method of using a reducing agent.

[0388] Moreover, the conductive films 112, 120a, and 120b can be formed by electroless plating. Materials that can be formed by the electroless plating method include, for example, Cu, Ni, Al, One or more selected from Au, Sn, Co, Ag, and Pd may be used. In particular, the resistance of the conductive film can be reduced by using Cu or Ag. Therefore, it is preferable.

[0389] In addition, when a conductive film is formed by electroless plating, the constituent elements of the conductive film tend to diffuse outward. In order to prevent the conductive film from diffusing, a diffusion prevention film may be formed under the conductive film. A seed layer may be formed between the film and the conductive film on which the conductive film can be grown. The diffusion prevention film can be formed by using, for example, a sputtering method. As the diffusion prevention film, for example, a tantalum nitride film or a titanium nitride film can be used. The seed layer can be formed by electroless plating. The seed layer is made of a material similar to that of the conductive film that can be formed by electroless plating. It can be used.

[0390] The conductive film 112 is formed using an oxide semiconductor, typically In-Ga-Zn oxide. When nitrogen or hydrogen is supplied from the insulating film 116, the oxide semiconductor In other words, oxide semiconductors are oxide conductors (OCs). Therefore, the oxide semiconductor functions as a gate electrode. It can be used.

[0391] For example, the conductive film 112 may have a single-layer structure of an oxide conductor (OC) or a single-layer structure of a metal film. or a laminated structure of an oxide conductor (OC) and a metal film.

[0392] Note that the conductive film 112 may have a single-layer structure of a metal film having a light-shielding property or an oxide conductor ( When a laminated structure of an OC and a metal film having a light-shielding property is used, This is preferable because the conductive film 11 can shield the channel region 108i from light. 2. A laminate of an oxide semiconductor or oxide conductor (OC) and a metal film having a light-shielding property. When using this structure, a metal film (e.g., a tin film) is formed on an oxide semiconductor or an oxide conductor (OC). By forming a metal film, the constituent elements in the metal film can be converted to an oxide semiconductor. or diffusion into the oxide conductor (OC) side, resulting in low resistance; damage during deposition of the metal film (e.g. , sputtering damage, etc.) or oxide semiconductors in the metal film Or, oxygen in the oxide conductor (OC) diffuses, forming oxygen vacancies and lowering the resistance. do.

[0393] The thickness of the conductive films 112, 120a, and 120b is 30 nm or more and 500 nm or less, or The thickness can be 00 nm or more and 400 nm or less.

[0394] <3-2. Transistor configuration example 2> Next, regarding a transistor having a different structure from that shown in FIGS. 42A to 42C, This will be explained using 3C.

[0395] FIG. 43A is a top view of a transistor 100A, and FIG. 43B is a top view of a transistor 100A shown in FIG. 43C is a cross-sectional view taken along dashed line Y1-Y2 in FIG. 43A. .

[0396] A transistor 100A shown in FIGS. 43A to 43C includes a conductive film 106 on a substrate 102 and The insulating film 104 over the conductive film 106, the oxide semiconductor film 108 over the insulating film 104, and the oxide semiconductor The insulating film 110 on the conductive film 108, the conductive film 112 on the insulating film 110, the insulating film 104, and the acid The oxide semiconductor film 108 and the insulating film 116 are disposed on the conductive film 112. The conductive film 108 has a channel region 108i overlapping with the conductive film 112 and a region in contact with the insulating film 116. It has a source region 108s and a drain region 108d in contact with the insulating film 116.

[0397] The transistor 100A has the same structure as the transistor 100 described above, and further includes a conductive film 106 and , and an opening 143.

[0398] The opening 143 is provided in the insulating films 104 and 110. The conductive film 106 is The conductive film 106 is electrically connected to the conductive film 112 through the opening 143. The conductive film 112 is applied with the same potential. 6 and the conductive film 112 may be applied with different potentials. For example, the conductive film 106 may be made of a light-shielding material. By forming the insulating layer 104, it is possible to suppress light from below being irradiated onto the channel region 108i. Cut.

[0399] In addition, in the case of the configuration of the transistor 100A, the conductive film 106 is a first gate electrode ( The conductive film 112 functions as a second gate electrode ( The insulating film 104 functions as a first gate electrode. The insulating film 110 functions as a first gate insulating film. do.

[0400] The conductive film 106 is made of the same material as the conductive films 112, 120a, and 120b described above. In particular, the conductive film 106 can be formed of a material containing copper. For example, the conductive film 106 may be a titanium nitride film or a titanium nitride film. A laminate structure in which a copper film is provided over a tantalum film or a tungsten film is formed. 0b is a laminated structure in which a copper film is provided on a titanium nitride film, a tantalum nitride film, or a tungsten film. In this case, it is preferable to use the transistor 100A as a pixel transistor of a display device. By using the conductive film 106 and the conductive film 107 in either or both of the driving transistor and the conductive film 109, The parasitic capacitance occurring between the conductive film 106 and the conductive film 120a, and the parasitic capacitance occurring between the conductive film 106 and the conductive film 120b Therefore, the conductive film 106, the conductive film 120a, and the conductive film 120b is connected to the first gate electrode, source electrode, and drain electrode of the transistor 100A. Not only is it used as a power supply wiring for a display device, a signal supply wiring, or a connection It can also be used for wiring for

[0401] Thus, the transistor 100A shown in FIGS. 43A to 43C is similar to the transistors described above. Unlike the transistor 100, conductive films functioning as gate electrodes are provided above and below the oxide semiconductor film 108. As shown in the transistor 100A, the semiconductor device of one embodiment of the present invention has a structure as follows. A plurality of gate electrodes may be provided on the gate electrode.

[0402] As shown in FIGS. 43B and 43C, the oxide semiconductor film 108 is The conductive film 106 functions as a gate electrode, and the conductive film 112 functions as a second gate electrode. It is positioned opposite the first gate electrode and is sandwiched between two conductive films that function as gate electrodes.

[0403] The length of the conductive film 112 in the channel width direction is longer than that of the oxide semiconductor film 108. The length of the oxide semiconductor film 108 in the channel width direction is longer than the length of the insulating film 110 in the channel width direction. The conductive film 112 and the conductive film 106 are sandwiched between the insulating film 112 and are covered with the conductive film 112. 104 and the insulating film 110 through an opening 143. One of the side surfaces of the conductive film 108 in the channel width direction is connected to a conductive film 112 with an insulating film 110 sandwiched therebetween. and is opposed to

[0404] In other words, in the channel width direction of the transistor 100A, the conductive film 106 and the conductive The film 112 is connected to the insulating film 104 and the insulating film 110 at an opening 143 provided therein. At the same time, the oxide semiconductor film 108 is surrounded with the insulating film 104 and the insulating film 110 interposed therebetween. This is a configuration that includes:

[0405] With such a structure, the oxide semiconductor film 10 included in the transistor 100A 8 is a conductive film 106 functioning as a first gate electrode and a conductive film 108 functioning as a second gate electrode. The transistor 100A can be electrically surrounded by the electric field of the conductive film 112. Thus, a channel region is formed by the electric field of the first gate electrode and the second gate electrode. The device structure of the transistor that electrically surrounds the oxide semiconductor film 108 is called Surro. This can be called an unded channel (S-channel) structure.

[0406] Since the transistor 100A has an S-channel structure, the conductive film 106 or The conductive film 112 effectively applies an electric field for inducing a channel to the oxide semiconductor film 108. This improves the current drive capability of the transistor 100A and provides a high on-state current. It is also possible to obtain high on-current characteristics. The transistor 100A can be miniaturized. Since the oxide semiconductor film has a structure surrounded by the conductive film 106 and the conductive film 112, The mechanical strength of 108 can be improved.

[0407] Note that an opening in the oxide semiconductor film 108 in the channel width direction of the transistor 100A An opening different from opening 143 may be formed on the side where portion 143 is not formed.

[0408] As shown in the transistor 100A, a transistor is formed with a semiconductor film sandwiched therebetween. In the case of a pair of gate electrodes, one of which is connected to a signal A and the other is connected to a signal B. A fixed potential Vb may be applied to the gate electrodes. A signal A may be applied to one gate electrode and a signal B may be applied to the other gate electrode. A signal B may be applied to one of the gate electrodes. A fixed potential V a, and the other gate electrode may be given a fixed potential Vb.

[0409] The signal A is, for example, a signal for controlling the conductive state or the non-conductive state. It is a digital signal that can take two types of potential: potential V1 or potential V2 (V1>V2). For example, the potential V1 may be a high power supply potential and the potential V2 may be a low power supply potential. Signal A may be an analog signal.

[0410] The fixed potential Vb is, for example, a potential for controlling the threshold voltage VthA of a transistor. The fixed potential Vb may be the potential V1 or the potential V2. This is preferable because it is not necessary to provide a separate potential generating circuit for generating the fixed potential Vb. The fixed potential Vb may be a potential different from the potential V1 or the potential V2. As a result, the gate-source voltage VthA can be increased. By reducing the drain current when Vgs is 0V, the leakage current of the circuit containing the transistor is reduced. For example, the fixed potential Vb may be set lower than the low power supply potential. In some cases, the threshold voltage VthA can be lowered by increasing the fixed potential Vb. As a result, the drain current is improved when the gate-source voltage Vgs is at a high power supply potential, and the transistor In some cases, the operating speed of a circuit having a transistor can be improved. For example, by lowering the fixed potential Vb, It may be higher than the power supply potential.

[0411] The signal B is, for example, a signal for controlling the conductive state or non-conductive state. It is a digital signal that can take two types of potential: potential V1, potential V2, or potential V3 (V3>V4). For example, the potential V3 may be a high power supply potential and the potential V4 may be a low power supply potential. Signal B may be an analog signal.

[0412] If signal A and signal B are both digital signals, signal B will have the same digital value as signal A. In this case, the on-current of the transistor is improved, and the transistor In this case, the operation speed of the circuit having the potential V1 and The potential V2 may be different from the potentials V3 and V4 in the signal B. For example, The gate insulating film corresponding to the gate to which signal B is input is the gate insulating film corresponding to the gate to which signal A is input. If the gate insulating film is thicker than the gate insulating film, the potential amplitude of signal B (V3-V4) is It may be set to be larger than (V1-V2). This will allow the transistor to be in a conducting state or The effect of signal A on the non-conducting state is set to the same degree as the effect of signal B on the non-conducting state. It may be possible to do so.

[0413] If signal A and signal B are both digital signals, signal B has a different digital value than signal A. In this case, the transistors are controlled by signals A and B separately. For example, a transistor can be In the case of the channel type, when signal A is at potential V1 and signal B is at potential V3, When only the signal A is in a conductive state, or when the signal B is at a potential V4, If only one transistor is non-conducting, a single transistor can function as a NAND circuit or a NOR circuit. In addition, the signal B is a signal for controlling the threshold voltage VthA. For example, the signal B may be a period during which a circuit having a transistor is in operation. The signal B may be a signal having a different potential during a period when the circuit is not operating. In this case, signal B may be a signal with a different potential depending on the operation mode of the circuit. In some cases, the potential may not switch as frequently as

[0414] When signal A and signal B are both analog signals, signal B is an analog signal with the same potential as signal A. analog signal obtained by multiplying the potential of signal A by a constant, or adding a constant to the potential of signal A Alternatively, it may be an analog signal obtained by subtracting the signal. In this case, the on-current of the transistor is The signal B may be increased in response to the signal P, thereby increasing the operating speed of a circuit having a transistor. A may be a different analog signal. In this case, the transistor control is signal A and signal B can be performed separately, which may result in higher functionality.

[0415] Signal A may be a digital signal and signal B may be an analog signal. Or, signal A may be It is also possible that signal A is an analog signal and signal B is a digital signal.

[0416] When a fixed potential is applied to both gate electrodes of a transistor, the transistor is For example, a transistor can function as an n-channel transistor. In the case of a transistor type, the fixed potential Va or the fixed potential Vb can be increased (or decreased). In some cases, the effective resistance of the resistor can be lowered (higher). By making both Vb high (low), a transistor with only one gate In some cases, a lower (higher) effective resistance may be obtained.

[0417] The other configurations of the transistor 100A are the same as those of the transistor 100 shown above. and has a similar effect.

[0418] An insulating film may be further formed on the transistor 100A. 44A and 44B, which are cross-sectional views of transistor 100B. The top view of the transistor 100B is the same as that of the transistor 100A shown in FIG. Therefore, the description will be omitted here.

[0419] The transistor 100B shown in FIGS. 44A and 44B includes conductive films 120a and 120b, an insulating film An insulating film 122 is provided on the film 118. The other configuration is the same as that of the transistor 100A. and has the same effect.

[0420] The insulating film 122 has a function of planarizing unevenness due to transistors and the like. The film 122 may be formed of any insulating material, such as inorganic or organic materials. The materials are silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, etc. Examples of the organic material include an aluminum film, an aluminum oxide film, and an aluminum nitride film. For example, photosensitive resin materials such as acrylic resin and polyimide resin can be used.

[0421] <3-3. Transistor configuration example 3> Next, regarding a transistor having a different structure from that shown in FIGS. 43A to 43C, This will be explained using 7B.

[0422] 45A and 45B are cross-sectional views of transistor 100C, and FIGS. 46A and 46B are cross-sectional views of transistor 100C. 47A and 47B are cross-sectional views of transistor 100E. 1 is a cross-sectional view of a transistor 100C, a transistor 100D, and a transistor The top view of the transistor 100E is similar to that of the transistor 100A shown in FIG. The explanation here is omitted.

[0423] The transistor 100C shown in FIGS. 45A and 45B has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 112 and the shape of the insulating film 110 are different from those of the transistor 100A.

[0424] The conductive film 112 of the transistor 100C includes a conductive film 112_1 on the insulating film 110 and a conductive For example, the conductive film 112_1 is made of an acid. By using a nitride conductive film, excess oxygen can be added to the insulating film 110. The oxide conductive film can be formed in an atmosphere containing oxygen gas by a sputtering method. The oxide conductive film may be, for example, an oxide containing indium and tin. oxides containing tungsten and indium, oxides containing tungsten, indium and zinc Oxide, oxide having titanium and indium, oxide having titanium, indium and tin an oxide having indium and zinc; an oxide having silicon, indium, and tin; Examples of the oxide include oxides containing indium, gallium, and zinc.

[0425] 45B, in the opening 143, the conductive film 112_2 and the conductive film 1 When the opening 143 is formed, a conductive film that becomes the conductive film 112_1 is formed. After the formation of the conductive layer, the opening 143 is formed, thereby forming the shape shown in FIG. When an oxide conductive film is used as the conductive film 112_1, the conductive film 112_2 and the conductive film 106 By adopting a structure in which the conductive film 112 and the conductive film 106 are connected, the connection resistance between the conductive film 112 and the conductive film 106 can be reduced. can be done.

[0426] The conductive film 112 and the insulating film 110 of the transistor 100C have a tapered shape. More specifically, the lower end of the conductive film 112 is formed outside the upper end of the conductive film 112. In addition, the lower end of the insulating film 110 is formed outside of the upper end of the insulating film 110. Moreover, the lower end of the conductive film 112 is formed at approximately the same position as the upper end of the insulating film 110 .

[0427] The conductive film 112 and the insulating film 110 of the transistor 100C are tapered, In comparison with the case where the conductive film 112 and the insulating film 110 of the transistor 100A are rectangular, the insulating film 1 This is preferable because it can improve the coverage of 16.

[0428] The other configurations of the transistor 100C are the same as those of the transistor 100A described above. and has the same effect.

[0429] The transistor 100D illustrated in FIGS. 46A and 46B has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 112 and the shape of the insulating film 110 are different from those of the transistor 100A.

[0430] The conductive film 112 of the transistor 100D is a conductive film 112_1 on the insulating film 110 and a conductive The conductive film 112_2 is disposed on the conductive film 112_1. For example, the conductive film 112_1 and the conductive film 112_2 are formed on the outer side of the upper end of the conductive film 112_1. The film 112_2 and the insulating film 110 are processed using the same mask, and the conductive film 112_2 is wet The conductive film 112_1 and the insulating film 110 are dry-etched by etching. By processing, the above structure can be obtained.

[0431] In addition, by using the structure of the transistor 100D, the region 1 Region 108f may be formed by forming channel region 108i and source region 108i. 08s and between the channel region 108i and the drain region 108d.

[0432] The region 108f functions as either a high resistance region or a low resistance region. The resistive region is a conductive region that has a resistance equivalent to that of the channel region 108i and functions as a gate electrode. This is a region where the film 112 does not overlap. When the region 108f is a high resistance region, the region 108f is This region functions as a so-called offset region. When the region 108f functions as an offset region, In order to suppress a decrease in the on-state current of the transistor 100D, the channel length (L ) direction, the region 108f may be set to 1 μm or less.

[0433] The low resistance region is a region having a lower resistance than the channel region 108i and a The region 108f is a low resistance region. In this case, the region 108f is a so-called LDD (Lightly Doped Drain) region. When the region 108f functions as an LDD region, the drain This allows the electric field in the drain region to be relaxed, which reduces the threshold voltage of the transistor caused by the electric field in the drain region. This can reduce fluctuations in the value voltage.

[0434] In addition, when the region 108f is used as an LDD region, for example, One or more of nitrogen, hydrogen, and fluorine are supplied to the insulating film 110 and the conductive film 11 By using the conductive film 112_1 as a mask, an impurity element is added from above the conductive film 112_1, The impurities pass through the conductive film 112_1 and the insulating film 110 and are added to the oxide semiconductor film 108. By this, the region 108f can be formed.

[0435] As shown in FIG. 46B, in the opening 143, the conductive film 112_2 and the conductive film 1 06 is connected.

[0436] The other configurations of the transistor 100D are the same as those of the transistor 100A described above. and has the same effect.

[0437] The transistor 100E shown in FIGS. 47A and 47B has a stacked structure of a conductive film 112, a conductive film The shape of the insulating film 112 and the shape of the insulating film 110 are different from those of the transistor 100A.

[0438] The conductive film 112 of the transistor 100E is a conductive film 112_1 on the insulating film 110 and a conductive The conductive film 112_2 is disposed on the conductive film 112_1. The insulating film 110 is formed on the outer side of the lower end of the conductive film 112_2. For example, the conductive film 112_1 and the conductive film The conductive film 112_2 and the insulating film 110 are processed using the same mask. 12_1 is etched by a wet etching method, and the insulating film 110 is etched by a dry etching method. By performing the above-mentioned processing, the above-mentioned structure can be obtained.

[0439] In addition, like the transistor 100D, the transistor 100E includes an oxide semiconductor film 1 In some cases, a region 108f is formed in the semiconductor substrate 108. The region 108f is a channel region 108i. between the source region 108s and the channel region 108i and the drain region 108d is formed.

[0440] As shown in FIG. 47B, in the opening 143, the conductive film 112_2 and the conductive film 1 06 is connected.

[0441] The other configurations of the transistor 100E are similar to those of the transistor 100A described above. and has the same effect.

[0442] <3-4. Transistor configuration example 4> Next, regarding a configuration different from that of the transistor 100A shown in FIGS. 43A to 43C, This will be explained using 52A to 52B.

[0443] 48A and 48B are cross-sectional views of transistor 100F, and FIGS. 49A and 49B are cross-sectional views of transistor 100F. 50A and 50B are cross-sectional views of transistor 100H. 51A and 51B are cross-sectional views of transistor 100J, and FIG. 52A and 52B are cross-sectional views of the transistor 100K. Transistor 100G, transistor 100H, transistor 100J, and transistor The top view of the transistor 100K is similar to that of the transistor 100A shown in FIG. The explanation here is omitted.

[0444] Transistor 100F, transistor 100G, transistor 100H, transistor The transistor 100J and the transistor 100K are the same as the transistor 100A shown above and an oxide semiconductor The structure of the film 108 is different. Other configurations are the same as the transistor 100A shown above. They have the same configuration and provide the same effects.

[0445] The oxide semiconductor film 108 included in the transistor 100F illustrated in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2. The channel region 108i, the source region 108s, and the drain region 108d are The oxide semiconductor film 108_1, the oxide semiconductor film 108_2, and the oxide semiconductor film It has a three-layer laminated structure of 108_3.

[0446] The oxide semiconductor film 108 included in the transistor 100G illustrated in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 on the oxide semiconductor film The semiconductor device further includes a channel region 108i, a source region 108s, and a semiconductor film 108_3. The drain region 108d is formed by the oxide semiconductor film 108_2 and the oxide semiconductor film 1 It has a two-layer laminated structure of 08_3.

[0447] The oxide semiconductor film 108 included in the transistor 100H illustrated in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film The semiconductor device further includes a channel region 108i, a source region 108s, and a semiconductor film 108_2. The drain region 108d is formed of the oxide semiconductor film 108_1 and the oxide semiconductor film 1 It has a two-layer laminated structure of 08_2.

[0448] The oxide semiconductor film 108 included in the transistor 100J illustrated in FIGS. The oxide semiconductor film 108_1 on the insulating film 104 and the oxide semiconductor film 108_1 on the oxide semiconductor film and an oxide semiconductor film 108_3 on the oxide semiconductor film 108_2. The channel region 108i is formed by the oxide semiconductor film 108_1 and the oxide semiconductor film 108 The source region 108s and the oxide semiconductor film 108_3 are stacked in a three-layer structure. The drain region 108d is formed of the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2. The transistor 100J has a two-layer laminate structure of 108_2. In the cross section in the axial direction, the oxide semiconductor film 108_3 is It covers the side surface of the semiconductor film 108_2.

[0449] The oxide semiconductor film 108 included in the transistor 100K illustrated in FIGS. The oxide semiconductor film 108_2 on the insulating film 104 and the oxide semiconductor film 108_2 on the oxide semiconductor film The channel region 108i includes an oxide semiconductor film 108_3. 2 and an oxide semiconductor film 108_3. The drain region 108d has a single-layer structure of the oxide semiconductor film 108_2. In the cross section of the transistor 100K in the channel width (W) direction, the oxide semiconductor film 108 _3 covers the side surfaces of the oxide semiconductor film 108_2.

[0450] The side surface or the vicinity of the channel region 108i in the channel width (W) direction is processed. Damage in the junctions can easily lead to the formation of defects (e.g. oxygen vacancies) or the presence of impurities. Therefore, even if the channel region 108i is substantially intrinsic, When a stress such as an electric field is applied, the channel width ( The side surface or its vicinity in the W direction is activated and tends to become a low-resistance (n-type) region. When the side surface or the vicinity of the side surface of the channel region 108i in the channel width (W) direction is an n-type region, Since the n-type region serves as a path for carriers, a parasitic channel may be formed.

[0451] Therefore, in the transistor 100J and the transistor 100K, the channel region The channel region 108i has a laminated structure, and the side surface of the channel region 108i in the channel width (W) direction is By using this structure, the side of the channel region 108i is covered with one layer of the structure. or suppressing defects on or near the side of the channel region 108i. This makes it possible to reduce the adhesion of impurities to the vicinity.

[0452] [Band structure] Here, the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3, and the insulating film The band structure of the insulating film 110, the insulating film 104, the oxide semiconductor films 108_2 and 108_3, and The band structure of the insulating film 110, the insulating film 104, and the oxide semiconductor films 108_1 and 108_ The band structures of the insulating film 110 and the insulating film 2 will be described with reference to FIGS. 53A to 53C show the band structures in the channel region 108i.

[0453] FIG. 53A shows the insulating film 104, the oxide semiconductor films 108_1, 108_2, and 108_3, and FIG. 53B is an example of a band structure in the thickness direction of a laminated structure having the insulating film 110 and the insulating film 110. The insulating film 104 includes oxide semiconductor films 108_2 and 108_3, and an insulating film 110. FIG. 53C shows an example of a band structure in the thickness direction of a laminated structure. The laminated structure having the semiconductor films 108_1 and 108_2 and the insulating film 110 has a thickness direction barrier. In order to facilitate understanding, the band structure is shown by using the insulating film 104 and the oxide The energy at the bottom of the conduction band of the semiconductor films 108_1, 108_2, and 108_3 and the insulating film 110 The energy level (Ec) is shown.

[0454] FIG. 53A shows a structure in which a silicon oxide film is used as the insulating films 104 and 110, and an oxide semiconductor The film 108_1 is a metal oxide film having an atomic ratio of In:Ga:Zn=1:3:2. The oxide semiconductor film 108_2 is formed using a gold target. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. The oxide semiconductor film thus formed is used to form an oxide semiconductor film 108_3 having an atomic ratio of metal elements. The oxide semiconductor formed using a metal oxide target of In:Ga:Zn=1:3:2 FIG. 13 is a band diagram of a configuration using a membrane.

[0455] FIG. 53B shows a structure in which a silicon oxide film is used as the insulating films 104 and 110, and an oxide semiconductor The film 108_2 is a metal oxide film with an atomic ratio of metal elements of In:Ga:Zn=4:2:4.1. An oxide semiconductor film formed using an oxide semiconductor target was used as the oxide semiconductor film 108_3. A metal oxide target with an atomic ratio of In:Ga:Zn=1:3:2 was used. FIG. 11 is a band diagram of a structure using an oxide semiconductor film to be formed.

[0456] FIG. 53C shows a structure in which a silicon oxide film is used as the insulating films 104 and 110, and an oxide semiconductor The film 108_1 is a metal oxide film having an atomic ratio of In:Ga:Zn=1:3:2. The oxide semiconductor film 108_2 is formed using a gold target. A metal oxide target with an atomic ratio of In:Ga:Zn=4:2:4.1 was used. FIG. 11 is a band diagram of a structure using an oxide semiconductor film to be formed.

[0457] As shown in FIG. 53A, in the oxide semiconductor films 108_1, 108_2, and 108_3, As shown in FIG. 53B, the energy level of the conduction band minimum changes gradually. In the compound semiconductor films 108_2 and 108_3, the energy level at the bottom of the conduction band is gradually As shown in FIG. 53C, in the oxide semiconductor films 108_1 and 108_2, In other words, the energy level at the bottom of the conduction band changes gradually. The energy levels change continuously or have a continuous junction. The oxide semiconductor film 108_1 is formed on the oxide semiconductor film 108_2. At the interface between the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3, trap centers and recombination Assume that there are no impurities that would form defect levels such as the core.

[0458] In order to form a continuous junction in the oxide semiconductor films 108_1, 108_2, and 108_3, A multi-chamber deposition system (sputtering system) equipped with a load lock chamber was used. It is necessary to laminate each film in succession without exposing them to the atmosphere.

[0459] By using the structure shown in FIGS. 53A to 53C, the oxide semiconductor film 108_2 is formed as a well. In the transistor having the above stacked structure, the channel region is an oxide semiconductor film It can be seen that it is formed at 108_2.

[0460] Note that by providing the oxide semiconductor films 108_1 and 108_3, the oxide semiconductor film 1 The defect states that may be formed in the oxide semiconductor film 108_2 can be kept away from the oxide semiconductor film 108_2. .

[0461] In addition, the defect level is the minimum of the conduction band of the oxide semiconductor film 108_2 which functions as a channel region. The energy level (Ec) of the electron can be farther from the vacuum level, and electrons accumulate in the defect level. When electrons accumulate in the defect level, they become a negative fixed charge. Therefore, the threshold voltage of the transistor is shifted in the positive direction. is closer to the vacuum level than the energy level (Ec) of the conduction band minimum of the oxide semiconductor film 108_2. By doing so, electrons are less likely to accumulate in the defect level. This increases the on-state current of the transistor and also increases the field effect mobility. can be increased.

[0462] In addition, the oxide semiconductor films 108_1 and 108_3 are more conductive than the oxide semiconductor film 108_2. The energy level of the conduction band minimum is close to the vacuum level. The energy levels of the conduction band minimum and the conduction band minimum of the oxide semiconductor films 108_1 and 108_3 are The difference between the energy levels is 0.15 eV or more, or 0.5 eV or more and 2 eV or less, That is, the electron affinity of the oxide semiconductor films 108_1 and 108_3 is The difference between the electron affinity of the oxide semiconductor film 108_2 and the electron affinity of the oxide semiconductor film 108_2 is 0.15 eV or more, or 0. The electron transport energy is 5 eV or more and 2 eV or less, or 1 eV or less.

[0463] With such a structure, the oxide semiconductor film 108_2 serves as a main current path. That is, the oxide semiconductor film 108_2 functions as a channel region. The films 108_1 and 108_3 function as oxide insulating films. The films 108_1 and 108_3 constitute the oxide semiconductor film 108_2 in which a channel region is to be formed. It is preferable to use an oxide semiconductor film formed of one or more metal elements that form the oxide semiconductor layer. By adopting such a structure, the interface between the oxide semiconductor film 108_1 and the oxide semiconductor film 108_2, Alternatively, the oxide semiconductor film 108_2 and the oxide semiconductor film 108_3 may be diffused at the interface between them. Therefore, the movement of carriers is not hindered at the interface, and therefore, The field effect mobility of the transistor is increased.

[0464] The oxide semiconductor films 108_1 and 108_3 function as part of a channel region. To prevent this, materials with sufficiently low electrical conductivity are used. The conductive films 108_1 and 108_3 are each made of oxide insulating material based on their physical properties and / or functions. Alternatively, the oxide semiconductor films 108_1 and 108_3 may be formed of a material having a high electron affinity (vacuum the energy level of the oxide semiconductor film 108_2 is smaller than that of the oxide semiconductor film 108_2, The energy level of the conduction band minimum is the same as that of the oxide semiconductor film 108_2. A material with a band offset is used. In order to suppress the occurrence of a difference in threshold voltage depending on the thickness of the oxide semiconductor film 108, The energy levels of the conduction band minimums of the oxide semiconductor films 108_1 and 108_3 are lower than the conduction band minimum of the oxide semiconductor film 108_2. It is preferable to use a material that is closer to the vacuum level than the lower energy level. For example, an oxide The energy level of the conduction band minimum of the semiconductor film 108_2 and the oxide semiconductor films 108_1 and 10 The difference between the energy level of the conduction band minimum of 8_3 is 0.2 eV or more, preferably 0.5 eV. It is preferable that the amount is equal to or more than that.

[0465] In addition, the oxide semiconductor films 108_1 and 108_3 each have a spinel crystal structure. It is preferable that the oxide semiconductor films 108_1 and 108_3 do not include a spinel type crystal. When the spinel type crystal structure is included, the conductive film 120 is In some cases, the constituent elements of the oxide semiconductor film 108_2 may diffuse into the oxide semiconductor film 108_2. When the oxide semiconductor films 108_1 and 108_3 are CAAC-OS films, which will be described later, This is preferable because it enhances the blocking properties of the constituent elements of 120a and 120b, for example, copper element.

[0466] In this embodiment, the oxide semiconductor films 108_1 and 108_3 are made of a metal The metal oxide target with the atomic ratio of In:Ga:Zn=1:3:2 was used. However, the present invention is not limited to this structure. The compound semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 [atomic ratio] ], In:Ga:Zn=1:1:1.2[atomic ratio], In:Ga:Zn=1:3:4[ [Atomic ratio], In:Ga:Zn=1:3:6 [Atomic ratio], In:Ga:Zn=1:4: 5 [atomic ratio], In:Ga:Zn=1:5:6 [atomic ratio], or In:Ga:Zn =1:10:1 [atomic ratio] metal oxide target is used to form oxide semiconductor film Alternatively, the oxide semiconductor films 108_1 and 108_3 may be formed using a metal element. The oxide semiconductor formed using a metal oxide target with an atomic ratio of Ga:Zn=10:1 In this case, the oxide semiconductor film 108_2 may be formed of a metal element having an atomic ratio of 0.1 to 0.1. Oxide semiconductor formed using a metal oxide target with In:Ga:Zn=1:1:1 The oxide semiconductor films 108_1 and 108_3 are made of a metal element having an atomic ratio of Ga:Z. When an oxide semiconductor film is formed using a metal oxide target of n=10:1, The energy level of the conduction band minimum of the oxide semiconductor film 108_1, The difference in energy level between the conduction band minimum of 108_3 and the This is preferable.

[0467] Note that the oxide semiconductor films 108_1 and 108_3 are made of In:Ga:Zn=1:1:1 When a metal oxide target having an atomic ratio of 108 is used, the oxide semiconductor films 108_1 and 108 _3 is the case where In:Ga:Zn=1:β1(0<β1≦2):β2(0<β2≦2) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga:Zn=1. When a metal oxide target having an atomic ratio of 3:4 is used, the oxide semiconductor film 108_1 , 108_3 is In:Ga:Zn=1:β3(1≦β3≦5):β4(2≦β4≦6) In addition, the oxide semiconductor films 108_1 and 108_3 may be formed of In:Ga: When a metal oxide target with an atomic ratio of Zn=1:3:6 is used, the oxide semiconductor film 1 08_1 and 108_3 are In:Ga:Zn=1:β5(1≦β5≦5):β6(4≦β 6≦8).

[0468] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0469] (Embodiment 4) In this embodiment, a transistor that can be used in a semiconductor device of one embodiment of the present invention will be described. This will be explained in detail.

[0470] In this embodiment, the bottom gate transistor will be described with reference to FIGS. This will be explained using C.

[0471] <4-1. Transistor configuration example 1> FIG. 54A is a top view of transistor 300A, and FIG. 54B is a top view of a portion of transistor 300A shown in FIG. 54C corresponds to a cross-sectional view taken along the dashed line Y1-Y2 shown in FIG. 54A. In FIG. 54A, in order to avoid complication, the transistor Some of the components of the gate insulating film of the sta 300A are omitted in the figure. The dashed line X1-X2 direction is the channel length direction, and the dashed line Y1-Y2 direction is In the top view of the transistor, In the drawings, as in FIG. 54A, some of the components may be omitted.

[0472] A transistor 300A shown in FIGS. 54A to 54C includes a conductive film 304 on a substrate 302 and An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, an oxide semiconductor film 308 on the insulating film 307; a conductive film 312a on the oxide semiconductor film 308; and a conductive film 312b over the oxide semiconductor film 308. More specifically, an insulating film 31 is formed over the conductive films 312a and 312b and the oxide semiconductor film 308. 4, 316, and an insulating film 318 are provided.

[0473] In the transistor 300A, the insulating films 306 and 307 are A functions as a gate insulating film, and the insulating films 314, 316, and 318 are The insulating film functions as a protective insulating film for the transistor 300A. The conductive film 304 functions as a gate electrode, and the conductive film 312a functions as a source electrode. The conductive film 312b functions as a drain electrode.

[0474] In this specification and the like, the insulating films 306 and 307 are referred to as a first insulating film, and the insulating film 314 and The insulating film 316 may be referred to as a second insulating film, and the insulating film 318 may be referred to as a third insulating film. .

[0475] The transistor 300A shown in FIGS. 54A to 54C has a channel-etched structure. The oxide semiconductor film of one embodiment of the present invention can be suitably used for a channel-etch transistor. It is possible.

[0476] <4-2. Transistor configuration example 2> FIG. 55A is a top view of transistor 300B, and FIG. 55B is a top view of a portion of transistor 300B shown in FIG. FIG. 55C corresponds to a cross-sectional view taken along the dashed line Y1-Y2 shown in FIG. 55A. This corresponds to a cross-sectional view of

[0477] A transistor 300B shown in FIGS. 55A to 55C includes a conductive film 304 on a substrate 302, An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, An oxide semiconductor film 308 on the insulating film 307, an insulating film 314 on the oxide semiconductor film 308, An insulating film 316 on the insulating film 314 and an opening 34 provided in the insulating film 314 and the insulating film 316 A conductive film 312a electrically connected to the oxide semiconductor film 308 via the insulating film 31 4 and electrically connected to the oxide semiconductor film 308 through an opening 341b provided in the insulating film 316. In addition, the transistor 300B has a conductive film 312b connected to the An insulating film 318 is provided over the conductive films 312 a and 312 b and the insulating film 316 .

[0478] In the transistor 300B, the insulating films 306 and 307 are B, and the insulating films 314 and 316 are formed on the oxide semiconductor film 308 The insulating film 318 functions as a protective insulating film for the transistor 300B. In the transistor 300B, the conductive film 304 functions as a gate The conductive film 312a functions as a source electrode, and the conductive film 3 12b functions as a drain electrode.

[0479] The transistor 300A shown in FIGS. 54A to 54C has a channel-etched structure. In contrast, the transistor 300B shown in FIGS. 55A to 55C has a channel protection type structure. The oxide semiconductor film of one embodiment of the present invention is also suitable for a channel protection transistor. It can be used.

[0480] <4-3. Transistor configuration example 3> FIG. 56A is a top view of transistor 300C, and FIG. 56B is a top view of a portion of transistor 300C shown in FIG. FIG. 56C corresponds to a cross-sectional view taken along the dashed line Y1-Y in FIG. This corresponds to a cross-sectional view of section 2.

[0481] The transistor 300C shown in FIGS. 56A to 56C is the same as the transistor 300 shown in FIGS. The shape of the insulating films 314 and 316 is different from that of the transistor 300B. The insulating films 314 and 316 of the first embodiment are provided in an island shape on the channel region of the oxide semiconductor film 308. The other configurations are similar to those of the transistor 300B.

[0482] <4-4. Transistor configuration example 4> FIG. 57A is a top view of transistor 300D, and FIG. 57B is a top view of a portion of transistor 300D shown in FIG. 57C corresponds to a cross-sectional view taken along the dashed line Y1-Y2 shown in FIG. 57A. This corresponds to a cross-sectional view of

[0483] A transistor 300D shown in FIGS. 57A to 57C includes a conductive film 304 on a substrate 302 and An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, an oxide semiconductor film 308 on the insulating film 307; a conductive film 312a on the oxide semiconductor film 308; The conductive film 312b over the oxide semiconductor film 308, the oxide semiconductor film 308, and the conductive film 312 a, 312b, an insulating film 314 on the insulating film 314, and an insulating film 316 on the insulating film 316. It has an insulating film 318 and conductive films 320a and 320b on the insulating film 318.

[0484] In the transistor 300D, the insulating films 306 and 307 are D, and the insulating films 314, 316, and 318 function as the first gate insulating film of the transistor. The second gate insulating film of the transistor 300D also functions as a second gate insulating film. In D, the conductive film 304 functions as a first gate electrode, and the conductive film 320a functions as a second gate electrode. The conductive film 320b functions as a pixel electrode for use in a display device. The conductive film 312a functions as a source electrode. The film 312b functions as a drain electrode.

[0485] As shown in FIG. 57C, the conductive film 320a is formed by insulating films 306, 307, 314, and 31 6, 318 are provided with openings 342b, 342c, which are connected to the conductive film 304. Therefore, the conductive film 320a and the conductive film 304 are given the same potential.

[0486] In the transistor 300D, openings 342b and 342c are provided, and the conductive film 3 Although the configuration in which 20a and the conductive film 304 are connected has been illustrated, the present invention is not limited to this. For example, , only one of the openings 342b and 342c is formed, and the conductive film 3 20a and the conductive film 304 are connected, or openings 342b and 342c are provided. In this case, the conductive film 320a and the conductive film 304 may not be connected to each other. In the case where the conductive film 320a and the conductive film 304 are not connected, the conductive film 320a and the conductive film 304 are Each of the electrodes can be given a different potential.

[0487] The conductive film 320b is formed through the openings 342a provided in the insulating films 314, 316, and 318. 3. It is connected to the conductive film 312b via the conductive film 312b.

[0488] The transistor 300D has the S-channel structure described above.

[0489] <4-5. Transistor configuration example 5> In addition, the oxide semiconductor film 308 included in the transistor 300A illustrated in FIGS. In this case, an example is shown in FIGS. 58A and 58B and 59A and 59B. As shown in.

[0490] 58A and 58B are cross-sectional views of transistor 300E, and FIGS. 1 and 2 are cross-sectional views of the transistor 300F. The view is similar to the top view of transistor 300A shown in FIG. 54A.

[0491] The oxide semiconductor film 308 included in the transistor 300E illustrated in FIGS. 58A and 58B is an oxide semiconductor film. A nitride semiconductor film 308_1, an oxide semiconductor film 308_2, and an oxide semiconductor film 308_3. 59A and 59B, the transistor 300F has an oxide semiconductor. The oxide semiconductor film 308 includes an oxide semiconductor film 308_2 and an oxide semiconductor film 308_3.

[0492] Note that the conductive film 304, the insulating film 306, the insulating film 307, the oxide semiconductor film 308, and the oxide semiconductor Conductive film 308_1, oxide semiconductor film 308_2, oxide semiconductor film 308_3, conductive film 31 2a, 312b, insulating film 314, insulating film 316, insulating film 318, and conductive film 320a, 3 The conductive film 106, the insulating film 116, the insulating film 114, and the oxide film 20b are respectively described above. An oxide semiconductor film 108, an oxide semiconductor film 108_1, an oxide semiconductor film 108_2, an oxide semiconductor The conductive film 108_3, the conductive films 120a and 120b, the insulating film 104, the insulating film 118, and the insulating film 11 6 and the conductive film 112 can be used.

[0493] <4-6. Transistor configuration example 6> FIG. 60A is a top view of transistor 300G, and FIG. 60B is a top view of a portion of transistor 300G shown in FIG. FIG. 60C corresponds to a cross-sectional view taken along the dashed line Y1-Y2 shown in FIG. 60A. This corresponds to a cross-sectional view of

[0494] A transistor 300G shown in FIGS. 60A to 60C includes a conductive film 304 on a substrate 302, An insulating film 306 on the substrate 302 and the conductive film 304, an insulating film 307 on the insulating film 306, an oxide semiconductor film 308 on the insulating film 307; a conductive film 312a on the oxide semiconductor film 308; The conductive film 312b over the oxide semiconductor film 308, the oxide semiconductor film 308, the conductive film 312a, The insulating film 314 on the conductive film 312b, the insulating film 316 on the insulating film 314, and the insulating film 31 6 and a conductive film 320b on the insulating film 316.

[0495] The insulating film 306 and the insulating film 307 have an opening 351. A conductive film 312 is formed on the film 307 and is electrically connected to the conductive film 304 through the opening 351. Furthermore, the insulating film 314 and the insulating film 316 have an opening reaching the conductive film 312b. The conductive film 312c has a portion 352a and an opening 352b reaching the conductive film 312c.

[0496] The oxide semiconductor film 308 is formed by stacking an oxide semiconductor film 308_2 on the conductive film 304 side and an oxide semiconductor film 308_3 on the conductive film 304 side. and an oxide semiconductor film 308_3 over the oxide semiconductor film 308_2.

[0497] In addition, an insulating film 318 is provided on the transistor 300G. The insulating film 318 is The insulating film 316, the conductive film 320a, and the conductive film 320b are formed so as to cover the insulating film 316, the conductive film 320a, and the conductive film 320b.

[0498] In the transistor 300G, the insulating films 306 and 307 are G, and the insulating films 314 and 316 function as the first gate insulating film of the transistor 3 The insulating film 318 functions as a second gate insulating film of the transistor 300. In the transistor 300G, the conductive film 3 The conductive film 320a functions as a second gate electrode. The conductive film 320b functions as a pixel electrode used in a display device. In the transistor 300G, the conductive film 312a functions as a source electrode. The conductive film 312b functions as a drain electrode. In 0G, the conductive film 312c functions as a connection electrode.

[0499] The transistor 300G has the S-channel structure described above.

[0500] In addition, the structures of the transistors 300A to 300G may be freely combined. This is also fine.

[0501] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0502] (Embodiment 5) In this embodiment, a semiconductor device including a metal oxide film according to one embodiment of the present invention will be described with reference to FIG. 1 to 63.

[0503] <5-1. Configuration example 1 of semiconductor device> FIG. 61 illustrates a transistor 300D according to the third embodiment and a transistor 300E according to the second embodiment. 10 is a cross-sectional view in the channel length (L) direction of an example in which a first electrode 100A and a second electrode 100B are laminated together.

[0504] The transistor 300D and the transistor 100B are formed into a stacked structure. This allows the layout area of ​​the resistors to be reduced.

[0505] For example, by using the configuration of FIG. 61 in the pixel portion of a display device, the pixel density of the display device can be increased. For example, if the pixel density of a display device is 1000 ppi (pixel per inch, or the pixel density of the display device exceeds 2000 ppi. Even in this case, the aperture ratio of the pixel can be increased by using the arrangement shown in FIG. Note that ppi is a unit that represents the number of pixels per inch.

[0506] In addition, by forming the transistor 300D and the transistor 100B into a stacked structure, The configuration will differ in some parts from that shown in the figure.

[0507] For example, in FIG. 61, transistor 300D has the following different configuration from that shown above: do.

[0508] The transistor 300D shown in FIG. 61 has an insulating film 318 and a conductive film 320a. The insulating film 110a includes a film 319 and an insulating film 110a.

[0509] The insulating film 319 can be made of the material shown in the insulating film 314 or the insulating film 316. The insulating film 319 is provided so as not to be in contact with the oxide semiconductor film 108. The insulating film 110a is formed by processing the same insulating film as the insulating film 110. Note that the conductive film 320a of the transistor 300D and the The conductive film 112 included in B is formed by processing the same conductive film.

[0510] In addition, the transistor 100B shown in FIG. 61 includes a conductive film 312c instead of the conductive film 106. In addition, the transistor 100B shown in FIG. The insulating film 104 is formed by the transistor 300D. By using insulating films 314, 316, 318, and 319 that are similar to the insulating films 314, 316, 318, and 319, the manufacturing process of the transistors can be shortened. It can be made easier.

[0511] In FIG. 61, a conductive film 344 is connected to the conductive film 120b of the transistor 100B. The conductive film 344 is connected to the insulating film 122 through an opening 342. , and is electrically connected to the conductive film 120b. Note that the conductive film 344 may be a material that can be used for a pixel cell of a display device. It functions as a pole.

[0512] In addition, in FIG. 61, the transistor 300D and the transistor 100B are stacked. Although the above description is directed to a case where the structure is the same as the above, the present invention is not limited to this. For example, the structure shown in FIG. 62 and FIG. 63 This may also be configured.

[0513] <5-2. Configuration example 2 of semiconductor device> FIG. 62 shows a structure in which the transistor 950 and the transistor 300A shown in the third embodiment are stacked. FIG. 13 is a cross-sectional view in the channel length (L) direction of an example of the structure.

[0514] The transistor 950 shown in FIG. 62 includes a substrate 952, an insulating film 954 on the substrate 952, and A semiconductor film 956 on the insulating film 954, an insulating film 958 on the semiconductor film 956, and an insulating film 958 The conductive film 960 on the insulating film 954, the semiconductor film 956, and the insulating film 96 on the conductive film 960. 2, an insulating film 964 on the insulating film 962, and a conductive film 9 An insulating film 968 is provided over the transistor 950. can be.

[0515] The semiconductor film 956 contains silicon. In particular, the semiconductor film 956 contains crystalline silicon. The transistor 950 is preferably a transistor using so-called low-temperature polysilicon. For example, transistors using low-temperature polysilicon are used in the driving circuit of a display device. This is preferable because it can provide high field effect mobility. The photodiode 300A is preferably used in the pixel section of a display device, for example, because it can reduce power consumption. do.

[0516] The substrate 952 may be a glass substrate or a plastic substrate. The insulating film 954 functions as a base insulating film of the transistor 950. The film 954 may be, for example, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. The insulating film 958 is a gate insulating film of the transistor 950. The insulating film 958 can be formed using any of the materials listed for the insulating film 954. The conductive film 960 functions as a gate electrode of the transistor 950. The film 960 may include the conductive films 312a, 312b, 120a, 120b, etc., shown in the previous embodiment. The insulating films 962, 964, and 968 can be made of the same material as that of the transistor 95. The conductive films 966a and 966b function as a protective insulating film for the transistor. The conductive films 966a and 966b function as a source electrode and a drain electrode of the transistor 950. b is the same as the conductive films 312a, 312b, 120a, 120b, etc. shown in the previous embodiment. Materials can be used.

[0517] In addition, an insulating film 970 and an insulating layer are provided between the transistor 950 and the transistor 300A. An insulating film 974 is provided to cover the transistor 300A. The insulating film 970 functions as a barrier film. Impurities in the transistor 950, such as hydrogen, enter the transistor 300A side. The insulating film 972 is formed so as not to be embedded in the transistor 300A. It functions as a membrane.

[0518] The insulating film 970 is made of a material that releases little hydrogen and can suppress the diffusion of hydrogen. Such materials include silicon nitride and aluminum oxide. The insulating film 972 preferably contains, for example, excess oxygen. 14, 316 can be used.

[0519] In addition, in FIG. 62, the transistor 950 and the transistor 300A do not overlap. However, the present invention is not limited to this structure. For example, the channel region of the transistor 950 and the The channel region of the transistor 300A may be arranged so as to overlap with the channel region of the transistor 300A. FIG. 63 shows a transistor 950 and a transistor 300A in a stacked structure. FIG. 63 is a cross-sectional view in the channel length (L) direction of an example of the case where the structure shown in FIG. This makes it possible to further reduce the layout area of ​​the transistors.

[0520] Although not shown, the transistor 950 and other transistors shown in the second and third embodiments may be used. Transistors (e.g., transistors 100A through 100K and transistors 300B through 300G) may be laminated.

[0521] In this manner, the metal oxide film of one embodiment of the present invention can be used to stack transistors of various shapes. The present invention can also be suitably used in such a structure.

[0522] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0523] (Embodiment 6) In this embodiment, a display device including the transistor described in the above embodiment will be An example will be described below with reference to Figures 64 to 71.

[0524] Fig. 64 is a top view showing an example of a display device. The display device 700 shown in Fig. 64 is a first A pixel portion 702 is provided on the first substrate 701, and a source driver is provided on the first substrate 701. A pixel portion 702, a source driver circuit portion 704, a gate driver circuit portion 706, A sealant 712 is disposed so as to surround the path portion 704 and the gate driver circuit portion 706. and a second substrate 705 disposed so as to face the first substrate 701. The first substrate 701 and the second substrate 705 are sealed with a sealant 712. That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are The first substrate 701, the sealant 712, and the second substrate 705 seal the entire structure. Although not shown in FIG. 64, a display element is provided between the first substrate 701 and the second substrate 705. can be done.

[0525] The display device 700 is surrounded by a sealant 712 on the first substrate 701. A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 705 are arranged in a region different from the region. and a flexible printed circuit (FPC) terminal section 708 (FPC: Flex Also, an FPC terminal portion 708 is provided. An FPC 716 is connected to the pixel section 702 and the source driver circuit. Various signals are supplied to the path section 704 and the gate driver circuit section 706. 702, a source driver circuit section 704, a gate driver circuit section 706, and an FPC terminal section Signal lines 710 are connected to the terminals 708. Various signals are supplied by the FPC 716. The signals are transmitted through a signal line 710 to a pixel section 702, a source driver circuit section 704, a gate driver A driver circuit portion 706 and an FPC terminal portion 708 are provided.

[0526] The display device 700 may include a plurality of gate driver circuits 706. The device 700 includes a source driver circuit section 704 and a gate driver circuit section 706. Although an example in which the pixel portion 702 is formed on the same first substrate 701 is shown, the present invention is not limited to this configuration. For example, only the gate driver circuit section 706 may be formed on the first substrate 701. Alternatively, only the source driver circuit portion 704 may be formed on the first substrate 701. In this case, the substrate on which the source driver circuit or the gate driver circuit is formed (for example, A driving circuit board formed of a monocrystalline semiconductor film or a polycrystalline semiconductor film is formed on a first substrate 701. The method of connecting the separately formed drive circuit board is not particularly limited. Instead, we use COG (Chip On Glass) method, wire bonding method, etc. can be used.

[0527] The display device 700 also includes a pixel portion 702, a source driver circuit portion 704, and a gate The driver circuit section 706 includes a plurality of transistors.

[0528] The display device 700 can also include various elements, such as: For example, electroluminescence (EL) elements (EL elements including organic and inorganic materials, Organic EL elements, inorganic EL elements, LEDs, etc.), light-emitting transistors (transistors that emit light according to the current transistor), electron emission element, liquid crystal element, electronic ink element, electrophoretic element, electron Etching elements, plasma display panels (PDPs), MEMS (microelectromechanical systems) Ultra-mechanical systems) displays (e.g., grating light valves ( GLV), Digital Micromirror Device (DMD), Digital Microshutter - (DMS) element, Interference Modulation (IMOD) element, etc.), Piezoelectric ceramic displays and the like.

[0529] An example of a display device using an EL element is an EL display. An example of a display device using emission elements is a field emission display (FE D) or SED type flat panel display (SED: Surface-conductio n Electron-emitter Display) and others. An example of such a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). Display, reflective LCD display, direct-view LCD display, projection LCD display Examples of display devices using electronic ink elements or electrophoretic elements include: Electronic paper. Semi-transmissive LCDs and reflective LCDs are also used. In this case, a part or the whole of the pixel electrode should function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM may be provided under the reflective electrode. This can further reduce power consumption.

[0530] The display method of the display device 700 may be a progressive method or an interlace method. In addition, the color elements controlled by pixels when displaying in color are R It is not limited to the three colors GB (R stands for red, G stands for green, B stands for blue). For example, It may be composed of four pixels: a pixel, a pixel, and a pixel of white (W). As in the column, two colors of RGB form one color element, and different two colors are generated depending on the color element. You can also select colors to configure the color. Or, you can select one or more colors such as yellow, cyan, and magenta for RGB. The size of the display area may be different for each dot of the color element. However, the disclosed invention is not limited to color display devices, and may be used in monochrome display devices. The present invention can also be applied to display devices.

[0531] Also, white light is emitted from the backlight (organic EL element, inorganic EL element, LED, fluorescent lamp, etc.) In order to display full color using (W), a colored layer (also called a color filter) is The colored layer may be, for example, red (R), green (G), blue (B), or red (C). ), yellow (Y), etc. can be used in appropriate combination. In this case, the color reproducibility can be improved compared to when no color layer is used. By disposing a region having a color layer and a region not having a color layer, The white light in the region may be directly used for display. By placing the colored layer over the entire display, the decrease in brightness caused by the colored layer can be reduced during bright display, and power consumption can be reduced by 2. However, in some cases, the emission of light from organic EL elements and inorganic EL elements can be reduced by about 10 to 30%. When using optical elements to display full color, R, G, B, Y, and W are each emitted in different colors. By using a self-luminous element, it is possible to obtain a light emission from a colored layer. In some cases, power consumption can be reduced even further.

[0532] In addition, as a colorization method, a part of the light emitted from the above-mentioned white light is passed through a color filter. In addition to the color filter method, which converts the light into red, green, and blue by filtering the light, A method that uses two colors of light (three-color method), or a method that uses part of the light emitted from the blue light to emit red or A method for converting to green (color conversion method, quantum dot method) may be applied.

[0533] In this embodiment, a liquid crystal element and an EL element are used as display elements. 65 to 67. Note that Fig. 65 and Fig. 66 are diagrams showing the structure of the dashed line in Fig. 64. This is a cross-sectional view of the display device taken along the line QR, and uses a liquid crystal display as the display element. FIG. 7 is a cross-sectional view taken along the dashed line QR in FIG. 64, in which an EL element is used as a display element. This is the configuration.

[0534] First, the common parts shown in Figures 65 to 67 will be explained, and then the different parts will be explained. This is explained below.

[0535] <6-1. Explanation of common parts of display devices> A display device 700 shown in FIGS. 65 to 67 includes a wiring portion 711, a pixel portion 702, and The display device includes a source driver circuit section 704 and an FPC terminal section 708. The pixel portion 702 includes a transistor 750 and a capacitor 711. The source driver circuit portion 704 includes a transistor 752. do.

[0536] Transistor 750 and transistor 752 are similar to transistor 100B shown above. The structures of the transistors 750 and 752 are the same as those described above. Other transistors shown in the embodiment of the present invention may be used.

[0537] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. The transistor has a semiconductor film. The off-state current of the transistor can be reduced. It is possible to extend the retention time of electrical signals such as signals, and the write interval can be extended when the power is on. This allows the frequency of refresh operations to be reduced, resulting in reduced power consumption. It has the effect of suppressing power.

[0538] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0539] The capacitor 790 is a conductive film that functions as a first gate electrode of the transistor 750. A lower electrode formed through a process of processing the same conductive film as the film, and a transistor 750 a step of processing the same conductive film as the conductive film that functions as the source electrode and the drain electrode. and an upper electrode formed through the lower electrode. The same insulating film as the insulating film that functions as the first gate insulating film of the sta 750 is formed. An insulating film formed through a process and an insulating film functioning as a protective insulating film for the transistor 750 and an insulating film formed through the same process for forming an insulating film. The element 790 has a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. It is.

[0540] 65 to 67, a transistor 750, a transistor 752, and a capacitor A planarization insulating film 770 is provided on the element 790 .

[0541] 65 to 67, the transistor 750 and the The transistor 752 in the source driver circuit portion 704 has the same structure as the transistor However, the present invention is not limited to this. For example, The transistors in the pixel section 702 may be different from those in the pixel section 704. A top-gate transistor is used for the source driver circuit section 702, and a bottom-gate transistor is used for the source driver circuit section 704. A structure using a top-gate type transistor in the pixel portion 702, or a bottom-gate type transistor in the pixel portion 702 and a top-gate type transistor is used in the source driver circuit section 704. The source driver circuit section 704 may be replaced with a gate driver circuit section. It may also be read as follows.

[0542] The signal line 710 is connected to the source and drain electrodes of the transistors 750 and 752. The signal line 710 is formed through the same process as the conductive film that functions as the signal line 710. When materials containing this material are used, signal delays caused by wiring resistance are minimal, making it possible to display images on a large screen. It becomes Noh.

[0543] The FPC terminal portion 708 includes a connection electrode 760, an anisotropic conductive film 780, and an FPC 71. 6. The connection electrode 760 is connected to the source and drain electrodes of the transistors 750 and 752. The connection electrode 760 is formed through the same process as the conductive film that functions as the drain electrode. , and is electrically connected to a terminal of the FPC 716 via an anisotropic conductive film 780 .

[0544] The first substrate 701 and the second substrate 705 may be, for example, a glass substrate. In addition, the first substrate 701 and the second substrate 705 may be flexible substrates. The flexible substrate may be, for example, a plastic substrate. do.

[0545] In addition, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating film. A device for controlling the distance (cell gap) between the first substrate 701 and the second substrate 705 is provided. In addition, a spherical spacer may be used as the structure 778.

[0546] In addition, on the second substrate 705 side, a light-shielding film 738 functioning as a black matrix and A colored film 736 that functions as a color filter, a light-shielding film 738 that is in contact with the colored film 736, and An insulating film 734 is provided.

[0547] <6-2. Example of the configuration of a display device using a liquid crystal element> The display device 700 shown in FIG. 65 includes a liquid crystal element 775. The liquid crystal element 775 includes a conductive film The conductive film 774 is a second substrate 705. The display device 700 shown in FIG. The alignment state of the liquid crystal layer 776 is changed by a voltage applied between the liquid crystal layer 772 and the conductive film 774. By this, the transmission or non-transmission of light is controlled, and an image can be displayed.

[0548] The conductive film 772 serves as a source electrode or a drain electrode of the transistor 750. The conductive film 772 is formed over the planarization insulating film 770. The pixel electrode functions as one electrode of the display element.

[0549] The conductive film 772 may be a conductive film that transmits visible light or a conductive film that reflects visible light. A conductive film having a light transmitting property in visible light can be used. For example, a material containing one of the elements indium (In), zinc (Zn), and tin (Sn) may be used. The conductive film that is reflective in visible light may be, for example, aluminum or It is preferable to use a material containing silver.

[0550] In the case where a conductive film having a reflectivity to visible light is used as the conductive film 772, the display device 700 has the following characteristics: The liquid crystal display device is a reflective type. In this case, the display device 700 becomes a transmissive liquid crystal display device.

[0551] In addition, by changing the structure on the conductive film 772, the driving method of the liquid crystal element can be changed. An example of this case is shown in FIG. 66. The display device 700 shown in FIG. This is an example of a configuration using a horizontal electric field method (e.g., FFS mode) as a driving method. In the structure shown in FIG. 1, an insulating film 773 is provided over a conductive film 772, and a conductive film In this case, the conductive film 774 is used as a common electrode. The insulating film 773 functions as a conductive film between the conductive film 772 and the conductive film 774. The alignment state of the liquid crystal layer 776 can be controlled by the field.

[0552] Although not shown in FIGS. 65 and 66, the conductive film 772 or the conductive film 774 An alignment film is provided on either or both of the sides in contact with the liquid crystal layer 776. Although not shown in FIG. 65 and FIG. 66, a polarizing member, a phase difference member, a reflecting member, etc. Optical members (optical substrates) such as a polarizing substrate and a positioning member may be provided as appropriate. Circularly polarized light produced by a retardation substrate may be used. Either may be used.

[0553] When liquid crystal elements are used as display elements, thermotropic liquid crystal, low molecular weight liquid crystal, high molecular weight liquid crystal, For example, a liquid crystal, a polymer-dispersed liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc. can be used. Depending on the conditions, the liquid crystal material can have a cholesteric phase, a smectic phase, a cubic phase, or a chiral phase. It shows nematic phase, isotropic phase, etc.

[0554] In addition, when the in-plane switching method is adopted, liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of a cholesteric liquid crystal is increased, the cholesteric The blue phase appears just before the transition from the black phase to the isotropic phase. In order to improve the temperature range, a liquid crystal composition containing a chiral agent of several weight percent or more is used. The liquid crystal composition containing the liquid crystal exhibiting the blue phase and the chiral agent is used in the liquid crystal layer. Since the liquid crystal display has a short rotational angle and is optically isotropic, no alignment treatment is required. Since the rubbing process is unnecessary, electrostatic damage caused by the rubbing process is prevented. This can prevent the occurrence of defects or damage to the liquid crystal display device during the manufacturing process. Furthermore, liquid crystal materials exhibiting a blue phase have little viewing angle dependency.

[0555] In addition, when liquid crystal elements are used as display elements, TN (Twisted Nematic) ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB(Optical y Compensated Birefringence mode, FLC (Ferr oelectric Liquid Crystal) mode, AFLC (AntiFe You can use modes such as the rheological Liquid Crystal mode. Cut.

[0556] The display device 700 is a normally black type liquid crystal display device, for example, a vertical alignment (V A) mode may be adopted as a transmission type liquid crystal display device. There are several examples, such as MVA (Multi-Domain Vertical Allocation). Alignment) mode, PVA(Patterned Vertical Alignment) mode gnment mode, ASV mode, etc. can be used.

[0557] <6-3. Display devices using light-emitting elements> The display device 700 shown in FIG. 67 includes a light-emitting element 782. The light-emitting element 782 is a conductive film The display device 700 shown in FIG. The EL layer 786 of the light element 782 emits light, thereby displaying an image. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0558] Examples of materials that can be used for the organic compound include fluorescent materials and phosphorescent materials. In addition, materials that can be used for quantum dots include colloidal quantum dots. materials, alloy type quantum dot materials, core-shell type quantum dot materials, core type quantum dot materials, In addition, the elements of the 12th and 16th families, the 13th and 15th families, or the 14th and 16th families Materials containing the element group may also be used. Cadmium (Cd), selenium (Se), Zinc (Zn), Sulfur (S), Phosphorus (P), Indium (In), Tellurium (Te), Lead (P b) Quantum with elements such as gallium (Ga), arsenic (As), aluminum (Al), etc. Dot material may also be used.

[0559] The organic compounds and inorganic compounds described above can be formed by, for example, deposition methods (including vacuum deposition methods), The droplet ejection method (also called the inkjet method), coating method, gravure printing method, etc. are used to create the shape. The EL layer 786 can be made of a low molecular weight material, a medium molecular weight material (oligomer, dye, etc.). The material may comprise a polymeric material, such as a fluorine atom, an acrylonitrile, a fluorine atom ...

[0560] Here, a method for forming the EL layer 786 by using a droplet discharge method will be described with reference to FIGS. 68A to 68D are cross-sectional views illustrating a method for manufacturing the EL layer 786. It is.

[0561] First, a conductive film 772 is formed over a planarization insulating film 770. Insulating film 730 is formed as shown in FIG. 68A.

[0562] Next, a droplet is discharged from a droplet discharge device 783 to an exposed portion of the conductive film 772, which is an opening in the insulating film 730. Droplets 784 are ejected to form a layer 785 containing the composition. The droplets 784 are a mixture of the composition containing a solvent. and is deposited on the conductive film 772 (see FIG. 68B).

[0563] The step of discharging the droplets 784 may be performed under reduced pressure.

[0564] Next, the solvent is removed from the layer 785 containing the composition, and the layer is solidified to form an EL layer 786. (See Figure 68C).

[0565] The solvent may be removed by a drying step or a heating step.

[0566] Next, a conductive film 788 is formed on the EL layer 786 to form a light-emitting element 782 (FIG. 68D). reference).

[0567] In this way, when the EL layer 786 is formed by the droplet discharge method, the composition can be selectively discharged. This allows for a reduction in material waste. Since a filming process is not required, the process can be simplified and costs can be reduced.

[0568] The droplet discharge method described above is a method of discharging a composition using a nozzle having a discharge port, or using one or more is a general term for anything that has a means for ejecting droplets, such as a head having multiple nozzles.

[0569] Next, a droplet discharge device used in the droplet discharge method will be described with reference to FIG. 14 is a conceptual diagram illustrating a droplet ejection device 1400. FIG.

[0570] The droplet discharge device 1400 includes a droplet discharge means 1403. 3 has a head 1405 and a head 1412.

[0571] The head 1405 and the head 1412 are connected to a control means 1407, which controls a computer. The laser beam is then drawn in a preprogrammed pattern by controlling the laser beam 1410. can be done.

[0572] The timing of drawing may be, for example, marker 1 formed on the substrate 1402. Alternatively, the reference point may be determined based on the outer edge of the substrate 1402. Here, the marker 1411 is detected by the imaging means 1404, and the image processing means 1 The signal converted to a digital signal by 409 is recognized by a computer 1410 and a control signal is generated. The generated signal is sent to the control means 1407.

[0573] The imaging means 1404 may be a charge-coupled device (CCD) or a complementary metal oxide semiconductor (CM An image sensor using an OS can be used. The information of the pattern to be created is stored in the storage medium 1408. A control signal is sent to the control means 1407, and the individual heads 1405, The material to be discharged is supplied from a material supply source 1413, a material supply unit 1414, and a nozzle 1416. The fuel is supplied from a fuel supply source 1414 through piping to heads 1405 and 1412, respectively. do.

[0574] The inside of the head 1405 is a space for filling the liquid material, as shown by the dotted line 1406, and a space for discharging the material. The head 1412 has a nozzle as an outlet. The head 1405 and the head 1412 have the same internal structure. With this size, different materials can be printed at different widths at the same time. It is possible to discharge multiple types of luminescent materials and draw on them. When drawing on a wide area, In order to improve throughput, the same material is ejected from multiple nozzles at the same time to create a pattern. When a large substrate is used, the head 1405 and the head 1412 move over the substrate as shown in FIG. You can freely scan in the directions of the X, Y, and Z arrows shown in the figure to freely set the drawing area. This allows the same pattern to be written multiple times on a single substrate.

[0575] The step of discharging the composition may be carried out under reduced pressure. After the composition is discharged, one or both of the steps of drying and baking are performed. Both processes are heat treatment processes, but the purpose, temperature and time are different. The drying and firing processes are carried out under normal or reduced pressure by irradiation with laser light, instantaneous thermal annealing, or heating. The timing of the heat treatment and the number of times the heat treatment is performed are not particularly limited. In order to perform the drying and baking processes well, the temperature at which they are performed should be adjusted according to the material and composition of the substrate. It depends on the nature of the composition.

[0576] As described above, the EL layer 786 can be formed by using a droplet discharge apparatus.

[0577] Returning to the explanation of the display device 700 shown in FIG.

[0578] In addition, in the display device 700 shown in FIG. 67, an insulating film is provided over the planarization insulating film 770 and the conductive film 772. An insulating film 730 is provided. The insulating film 730 covers a part of the conductive film 772. 782 has a top emission structure. Therefore, the conductive film 788 has a light transmitting property, and It transmits the light emitted by the L layer 786. In this embodiment, the top emission The structure is exemplified, but is not limited to this. For example, a bottom emission structure in which light is emitted to both the conductive film 772 and the conductive film 788; An al-emission structure can also be applied.

[0579] A colored film 736 is provided at a position overlapping the light emitting element 782, and a colored film 736 is provided at a position overlapping the insulating film 730. A light-shielding film 738 is provided at the position where the light-shielding film 738 is to be formed, the wiring portion 711, and the source driver circuit portion 704. The colored film 736 and the light-shielding film 738 are covered with an insulating film 734. In addition, the space between the light emitting element 782 and the insulating film 734 is filled with a sealing film 732. In the display device 700 shown in FIG. 1, a configuration in which a colored film 736 is provided is illustrated. For example, when the EL layer 786 is formed by coloring, The film 736 may not be provided.

[0580] <6-4. Example of a configuration in which an input / output device is provided on a display device> Also, the display device 700 shown in Fig. 66 and Fig. 67 may be provided with an input / output device. An example of the force device is a touch panel.

[0581] FIG. 70 shows a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. 66, and FIG. FIG. 71 shows a configuration in which a touch panel 791 is provided on a display device 700.

[0582] FIG. 70 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. FIG. 71 is a cross-sectional view of a configuration in which a touch panel 791 is provided on the display device 700 shown in FIG. be.

[0583] First, the touch panel 791 shown in FIG. 70 and FIG. 71 will be described below.

[0584] The touch panel 791 shown in FIG. 70 and FIG. 71 is provided between a substrate 705 and a colored film 736. The touch panel 791 is a so-called in-cell type touch panel. 736 may be formed on the substrate 705 side before the colored film 736 is formed.

[0585] The touch panel 791 includes a light-shielding film 738, an insulating film 792, an electrode 793, and an electrode 794, an insulating film 795, an electrode 796, and an insulating film 797. When a detection object such as a stylus approaches, the mutual capacitance between electrode 793 and electrode 794 changes. It is possible to detect the change.

[0586] In addition, above the transistor 750 shown in FIGS. 70 and 71, an electrode 793 and The electrode 796 is formed by passing through an opening in the insulating film 795. The electrode 794 is electrically connected to the two electrodes 793 that sandwich the electrode 794 via the electrodes 793. 71 illustrates a configuration in which the region where the electrode 796 is provided is provided in the pixel portion 702. However, the present invention is not limited to this. For example, the light emitting diode 704 may be formed in the source driver circuit section 704.

[0587] The electrodes 793 and 794 are provided in a region overlapping with the light-shielding film 738. As shown in FIG. 7, the electrode 793 is preferably provided so as not to overlap with the liquid crystal element 775. As shown in FIG. 71, the electrode 793 is provided so as not to overlap the light emitting element 782. In other words, the electrode 793 overlaps with the light-emitting element 782 and the liquid crystal element 775. In other words, the electrode 793 has a mesh shape. By this configuration, the electrode 793 does not block the light emitted by the light emitting element 782. Alternatively, the electrode 793 may be configured so as not to block light passing through the liquid crystal element 775. Therefore, the reduction in brightness due to the placement of the touch panel 791 is extremely small. Since the number of pixels is small, a display device with high visibility and reduced power consumption can be realized. The pole 794 may be of a similar configuration.

[0588] In addition, since the electrodes 793 and 794 do not overlap with the light-emitting element 782, The electrode 794 may be made of a metal material having a low transmittance of visible light. Since the electrodes 793 and 794 do not overlap with the liquid crystal element 775, In addition, a metal material having a low transmittance of visible light can be used.

[0589] Therefore, compared with electrodes using oxide materials with high visible light transmittance, the electrodes 793 and The resistance of the electrode 794 can be reduced, improving the sensor sensitivity of the touch panel. It is possible.

[0590] For example, the electrodes 793, 794, and 796 may be made of conductive nanowires. The nanowires have an average diameter of 1 nm to 100 nm, preferably 5 nm to 50 nm. The size of the nanoparticles may be 5 nm or less, and more preferably 5 nm or more and 25 nm or less. The wires are metal nanowires such as Ag nanowires, Cu nanowires, or Al nanowires. For example, electrodes 793 and 794 may be used. When Ag nanowires are used for either 94 or 796, or for all of them, the The light transmittance is to be 89% or more, and the sheet resistance is to be 40Ω / □ or more and 100Ω / □ or less. can.

[0591] 70 and 71 show an example of the configuration of an in-cell type touch panel. However, the present invention is not limited to this. For example, a so-called on-cell type transistor formed on the display device 700 may be used. A so-called out-cell type touch panel that is attached to the display device 700. It is also possible to use the following.

[0592] In this manner, the display device according to one embodiment of the present invention can be used in combination with various types of touch panels. It can be used.

[0593] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0594] (Embodiment 7) In this embodiment, an example of a semiconductor device according to one embodiment of the present invention will be described. The transistor shown in the embodiment is suitable for miniaturization.

[0595] <7-1. Examples of transistor configurations suitable for miniaturization> 72A to 72C show an example of a transistor 200. 72A is a top view of the 200. Note that some of the membranes have been omitted in FIG. 72A for clarity of illustration. FIG. 72B is a cross-sectional view corresponding to the dashed line X1-X2 shown in FIG. 72A. , FIG. 72C is a cross-sectional view corresponding to Y1-Y2.

[0596] The transistor 200 includes a conductor 205 (conductor 205a, and conductor 205b), and conductor 260 (conductor 260a and conductor 260b). , an insulator 220 serving as a gate insulating layer, an insulator 222, an insulator 224, and an insulator The oxide semiconductor 230 has a region in which a channel is to be formed, and a source or drain A conductor 240a functions as one of the drains and a conductor 240b functions as the other of the source or drain. and an insulator 280 having excess oxygen.

[0597] The oxide semiconductor 230 includes an oxide semiconductor 230a and an oxide layer on the oxide semiconductor 230a. The first and second oxide semiconductors 230a and 230b are electrically connected to each other via a first insulating film 230c. When the transistor 200 is turned on, a current flows mainly through the oxide semiconductor 230b. On the other hand, the oxide semiconductor 230a and the oxide semiconductor 230c are In the case of the oxide semiconductor 230b, a current flows near the interface with the oxide semiconductor 230b (which may be a mixed region). In some cases, the insulating region may act as an insulator, while other regions may act as an insulator.

[0598] The structure shown in FIGS. 72A to 72C includes a conductor 260 that functions as a gate electrode. The gate electrode 260a is a layered structure having a conductor 260b. The insulator 270 is disposed on the corresponding conductor 260 .

[0599] The conductor 205 may be selected from the group consisting of molybdenum, titanium, tantalum, tungsten, aluminum, copper, A metal film containing an element selected from chromium, neodymium, and scandium, or Metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) Indium tin oxide, indium oxide containing tungsten oxide, tungsten oxide Indium zinc oxide with tin oxide, Indium oxide with titanium oxide, Titanium oxide Indium tin oxide, indium zinc oxide, indium tin oxide doped with silicon oxide Conductive materials such as oxides may also be applied.

[0600] For example, the conductor 205a may be a conductor having a barrier property against hydrogen, such as nitride. For the conductor 205b, tungsten having high conductivity may be laminated. By using this combination, it is possible to obtain an oxide semiconductor 23 while maintaining the electrical conductivity of the wiring. 72A to 72C, the conductor 20 can be prevented from diffusing hydrogen into the conductor 20. Although a two-layer structure of the conductive material 205a and the conductive material 205b is shown, the present invention is not limited to this configuration. A laminated structure of more than one layer may also be used.

[0601] The insulator 220 and the insulator 224 are made of a material such as a silicon oxide film or a silicon oxynitride film. It is preferable that the insulator contains oxygen. In particular, the insulator 224 contains excess oxygen (chemical It is preferable to use an insulator that contains oxygen in excess of the stoichiometric composition. By providing an insulator containing oxygen in contact with the oxide that constitutes the transistor 200, The oxygen vacancies in the oxide can be compensated for. They do not necessarily have to be made of the same material.

[0602] The insulator 222 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations It is preferable to use aluminum oxide, bismuth oxide, gel oxide, etc., as the insulator. Manium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator.

[0603] The insulator 222 may have a laminated structure of two or more layers. However, the present invention is not limited to a laminated structure made of the above-mentioned materials, and may be a laminated structure made of different materials.

[0604] Between the insulator 220 and the insulator 224, there is an insulator 222 including a high-k material. This allows the insulator 222 to capture electrons under certain conditions, increasing the threshold voltage. That is, the insulator 222 may become negatively charged.

[0605] For example, the insulators 220 and 224 are made of silicon oxide, and the insulator 222 is made of , materials with many electron capture levels such as hafnium oxide, aluminum oxide, and tantalum oxide. When used in a semiconductor device, the temperature is higher than the operating temperature or storage temperature (e.g., 125 The electric conductor 205 is heated at a temperature of 150° C. or higher and 450° C. or lower, typically 150° C. or higher and 300° C. or lower. The potential of the source electrode and drain electrode is kept higher than that of the drain electrode for 10 milliseconds or more, typically 1 minute. By maintaining the above, the oxide constituting the transistor 200 is At this time, some of the moving electrons are captured by the electron capture level of the insulator 222. will be done.

[0606] A transistor in which the necessary number of electrons are captured in the electron capture level of the insulator 222 reaches a threshold The voltage shifts to the positive side. Note that the voltage of the conductor 205 can be controlled to capture electrons. The amount of the charge can be controlled, and the threshold voltage can be controlled accordingly. By having this, the transistor 200 is in a non-conducting state (off) even when the gate voltage is 0V. The transistor is a normally-off type transistor in which the on-state is turned on.

[0607] The electron capture process may be performed during the manufacturing process of a transistor. After forming the conductor that connects to the source or drain of the transistor, or in the previous process ( After the wafer processing, after the wafer dicing process, after packaging, etc., This should be done at some stage before loading.

[0608] In addition, by appropriately adjusting the film thicknesses of the insulators 220, 222, and 224, It is possible to control the voltage to a low level. Alternatively, a transistor having stable electrical characteristics can be provided. Alternatively, a transistor having a large on-state current can be provided. It is possible to provide a transistor having a small subthreshold swing value. It is possible to provide a highly reliable transistor.

[0609] The oxide semiconductor 230a, the oxide semiconductor 230b, and the oxide semiconductor 230c are In It is formed of metal oxides such as -M-Zn oxide (M is Al, Ga, Y, or Sn). In addition, the oxide semiconductor 230 may be an In—Ga oxide or an In—Zn oxide.

[0610] The insulator 250 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or oxide. Aluminum, hafnium oxide, tantalum oxide, zirconium oxide, zirconium titanate Lead (PZT), Strontium Titanate (SrTiO3) or (Ba,Sr)TiO3 Use of insulators, including so-called high-k materials such as (BST), in single or multilayer configurations Alternatively, these insulators can be coated with, for example, aluminum oxide, bismuth oxide, or germanium oxide. Niobium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide Alternatively, zirconium oxide may be added to the insulator. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator.

[0611] The insulator 250 is made of an insulator containing oxygen in excess of the stoichiometric composition, similar to the insulator 224. It is preferable to use an oxide insulator containing such excess oxygen. By providing the oxide semiconductor 230 in contact with the oxide semiconductor 230, oxygen vacancies in the oxide semiconductor 230 can be reduced. This can be done.

[0612] The insulator 250 may be aluminum oxide, aluminum oxynitride, gallium oxide, or oxide. Gallium oxide, yttrium oxide, yttrium oxynitride, hafnium oxide, oxynitride By using an insulating film with barrier properties against oxygen and hydrogen, such as hafnium or silicon nitride, When the insulator 250 is formed using such a material, the oxide semiconductor 23 It functions as a layer that prevents the release of oxygen from the substrate and the intrusion of impurities such as hydrogen from the outside.

[0613] Note that the insulator 250 has the same multilayer structure as the insulators 220, 222, and 224. The insulator 250 may have a layer structure. By having the insulator, the transistor 200 has a positive shift in threshold voltage. With this configuration, the transistor 200 can be Even when the transistor is turned on, it is a normally-off transistor, which is in a non-conducting state (also called an off state). do.

[0614] In the semiconductor device shown in FIGS. 72A to 72C, the oxide semiconductor 230 and the conductor 2 In addition to the insulator 250, a barrier film may be provided between the oxide semiconductor 23 and the insulating film 250. OC having a barrier property may be used.

[0615] For example, an insulating film containing excess oxygen is provided in contact with the oxide semiconductor 230, and a barrier film is provided. By wrapping the oxide, the oxide is in a state where the composition is almost stoichiometric, or The oxide semiconductor 230 can be made in a supersaturated state with a higher oxygen content than the composition. This can prevent the intrusion of impurities such as elements.

[0616] One of the conductors 240a and 240b functions as a source electrode and the other It functions as a drain electrode.

[0617] The conductor 240a and the conductor 240b are made of aluminum, titanium, chromium, nickel, or copper. , yttrium, zirconium, molybdenum, silver, tantalum, or tungsten. Metals or alloys containing metals as the main component can be used. Also, the figure shows a single-layer structure. However, a laminated structure of two or more layers may be used.

[0618] For example, a titanium film and an aluminum film may be laminated. A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film. A two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a copper film is laminated on a tungsten film, A two-layer structure may also be used.

[0619] In addition, an aluminum film or a copper film is formed on a titanium film or a titanium nitride film, and a titanium film or a copper film is formed on the aluminum film or the copper film. A three-layer structure in which a titanium film or titanium nitride film is laminated, a molybdenum film or a molybdenum nitride film is laminated, and An aluminum or copper film is then laminated on top of the molybdenum film or molybdenum nitride film. In addition, transparent conductive films containing indium oxide, tin oxide, or zinc oxide are also available. Materials may also be used.

[0620] The conductor 260 having the function of a gate electrode is made of, for example, aluminum or chromium. , copper, tantalum, titanium, molybdenum, tungsten, or any of the above. It can be formed using an alloy containing metals as components or an alloy combining the above-mentioned metals. In addition, the present invention uses a metal selected from one or more of manganese and zirconium. In addition, semiconductors such as polycrystalline silicon doped with impurity elements such as phosphorus may be used. Alternatively, a silicide such as nickel silicide may be used.

[0621] For example, a two-layer structure in which a titanium film is laminated on an aluminum film may be used. A two-layer structure in which a titanium film is laminated on a titanium film, and a tungsten film is laminated on a titanium nitride film Two-layer structure: a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film. A structure may also be used.

[0622] In addition, a three-layer structure in which an aluminum film is laminated on a titanium film and another titanium film is laminated on the aluminum film is also available. In addition, titanium, tantalum, tungsten, molybdenum, An alloy film made by combining one or more metals selected from chromium, neodymium, and scandium Alternatively, a nitride film may be used.

[0623] The conductor 260 may be made of indium tin oxide, indium oxide containing tungsten oxide, or the like. Indium zinc oxide containing tungsten oxide, Indium oxide containing titanium oxide Add indium tin oxide, indium zinc oxide, and silicon oxide containing titanium oxide. A light-transmitting conductive material such as indium tin oxide can also be used. A laminated structure of the above-mentioned light-transmitting conductive material and the above-mentioned metal can also be used.

[0624] The conductor 260a is formed by using a thermal CVD method, an MOCVD method, or an ALD method. , using the atomic layer deposition (ALD) method. It is preferable to form the insulating layer 250 by using the ALD method or the like. It can reduce damage caused by Zuma. It can also improve coverage. This is preferable, as it allows for the provision of a highly reliable transistor 200.

[0625] The conductor 260b is made of conductive material such as tantalum, tungsten, copper, or aluminum. It is formed using high quality materials.

[0626] Further, an insulator 270 is provided so as to cover the conductor 260. Oxygen is released from the insulator 280. When an oxide material is used, the conductor 260 is prevented from being oxidized by the desorbed oxygen. To achieve this, the insulator 270 is made of a material that has a barrier property against oxygen.

[0627] For example, the insulator 270 may be a metal oxide such as aluminum oxide. The insulator 270 may be provided to a thickness sufficient to prevent oxidation of the conductor 260. For example, the thickness of the insulator 270 is 1 nm or more and 10 nm or less, preferably 3 nm or more and 7 nm or less. The value is set to nm or less.

[0628] Therefore, the oxidation of the conductor 260 is suppressed, and the oxygen desorbed from the insulator 280 is efficiently oxidized. The semiconductor layer 230 may be made of a fluorine-containing material.

[0629] An insulator 280 is provided on the transistor 200. The insulator 280 has a stoichiometric composition It is preferable to use an insulator that contains excess oxygen rather than oxygen. A region where oxygen exists in excess of the stoichiometric composition (hereinafter referred to as the excess oxygen region) is formed. In particular, when an oxide semiconductor is used for the transistor 200, By providing an insulator having an oxygen excess region as an interlayer film near the transistor 200, By reducing oxygen vacancies in the transistor 200, the reliability can be improved.

[0630] As an insulator having an excess oxygen region, specifically, an oxide insulator in which a part of oxygen is released by heating is used. It is preferable to use a nitride material.

[0631] For example, such a material may include silicon oxide or silicon oxynitride. It is preferable to use a metal oxide. Silicon oxynitride refers to a material that contains more oxygen than nitrogen, and silicon oxynitride Nitrogen refers to a material that contains more nitrogen than oxygen.

[0632] Also, the insulator 280 covering the transistor 200 is a flat surface that covers the uneven shape underneath. It may also function as a protective film.

[0633] <7-2. Application examples of transistors suitable for miniaturization> An example in which transistors made of different materials are stacked will be described below.

[0634] The semiconductor device shown in FIG. 73 includes a transistor 400, a transistor 200, and a capacitor. It has element 410.

[0635] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. Since the off-state current of the transistor 200 is small, the transistor 200 can be used as a semiconductor device (memory By using this in a memory device, it is possible to retain memory contents for a long period of time. Semiconductor devices that do not require refresh operations or require refresh operations very infrequently Since it is possible to use the device as a semiconductor device (memory device), power consumption can be sufficiently reduced. Cut.

[0636] As shown in FIG. 73, the semiconductor device includes a transistor 400, a transistor 200, and a capacitance element. The transistor 200 is provided above the transistor 400, and the capacitance element The transistor 410 is disposed above the transistor 400 and the transistor 200 .

[0637] The transistor 400 is provided on a substrate 401, and includes a conductor 406, an insulator 404, and a substrate 402. A semiconductor region 402 consisting of a part of 401 and functioning as a source region and a drain region. The semiconductor device has a low resistance region 408a that is capable of resisting a current and a low resistance region 408b that is capable of resisting a current.

[0638] The transistor 400 may be a p-channel transistor or an n-channel transistor. Either of the above is acceptable.

[0639] The region in which the channel of the semiconductor region 402 is formed, the region in the vicinity thereof, the source region, and In the low resistance region 408a which becomes the drain region, and the low resistance region 408b, etc., It is preferable that the semiconductor material contains a silicon-based semiconductor, and it is preferable that the semiconductor material contains single crystal silicon. Or Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide) Materials containing gallium arsenide (GaAs), GaAlAs (Gallium Aluminum Arsenide), etc. It is also possible to develop a silicon lattice structure in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing. Alternatively, a transistor may be used. The Jista 400 is a HEMT (High Electron Mobility Transistor) istor) may also be used.

[0640] The low resistance region 408a and the low resistance region 408b are formed by applying a semiconductor In addition to the conductive material, elements that impart n-type conductivity, such as arsenic or phosphorus, or p-type conductivity, such as boron, are added. The material contains an element that imparts electrical conductivity to the mold.

[0641] The conductor 406 that functions as a gate electrode is made of arsenic, phosphorus, or the like that imparts n-type conductivity. An element, or a semiconductor material such as silicon that contains an element that gives it p-type conductivity, such as boron Conductive materials such as aluminum, metal, alloy, or metal oxide materials can be used. .

[0642] In addition, the threshold voltage can be adjusted by determining the work function depending on the conductor material. Specifically, it is preferable to use materials such as titanium nitride and tantalum nitride for the conductor. Furthermore, in order to achieve both electrical conductivity and embeddability, tungsten or aluminum is used as the conductor. It is preferable to use metal materials such as tungsten as the lamination layer. This is preferable in terms of thermal stability.

[0643] Note that the transistor 400 shown in FIG. 73 is just an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration and driving method.

[0644] Covering the transistor 400 are an insulator 420, an insulator 422, an insulator 424, and an insulator 426. The edges 426 are stacked in order.

[0645] The insulators 420, 422, 424, and 426 may be, for example, an acid. silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, Aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like may be used.

[0646] The insulator 422 serves to eliminate a step caused by the transistor 400 and the like provided below. The top surface of the insulator 422 is chemically treated to improve the planarization. Mechanical polishing (CMP) method The surface may be planarized by a planarization process using a polishing agent or the like.

[0647] The insulator 424 may include a transistor 400, a substrate 401, or a transistor 400. The region in which the resistor 200 is provided has a barrier property to prevent hydrogen and impurities from diffusing. It is preferred to use a membrane.

[0648] For example, silicon nitride formed by CVD is an example of a film that has a barrier property against hydrogen. Here, a semiconductor having an oxide semiconductor such as the transistor 200 can be used. When hydrogen diffuses into a semiconductor element, the characteristics of the semiconductor element may deteriorate. A film that suppresses hydrogen diffusion is used between the transistor 200 and the transistor 400. Specifically, the film that suppresses hydrogen diffusion is a film that desorbs a small amount of hydrogen. do.

[0649] It is preferable that the insulator 426 has a lower dielectric constant than the insulator 424. For example, The dielectric constant of the insulator 426 is preferably less than 4, more preferably less than 3. The relative dielectric constant of the insulator 424 is preferably 0.7 times or less than the relative dielectric constant of the insulator 426, and more preferably 0.6 times or less. It is more preferable to use a material with a low dielectric constant for the interlayer film, thereby reducing the parasitic capacitance between wirings. can be reduced.

[0650] In addition, the insulators 420, 422, 424, and 426 are provided with a capacitance element. 410, or a conductor 428 electrically connected to the transistor 200, and a conductor 43 0 and the like are embedded. Note that the conductor 428 and the conductor 430 are plugs or wiring. In this specification, the term "wiring" refers to a wiring and a plate electrically connected to the wiring. In other words, when a part of the conductor functions as a wiring, In some cases, a portion of the conductor may function as a plug.

[0651] The materials of the plugs and wiring (the conductor 428, the conductor 430, etc.) are metal. Conductive materials such as metals, alloys, metal nitrides, or metal oxides are applied in a single layer or in a Materials such as tungsten and molybdenum, which have both heat resistance and electrical conductivity, can be used. It is preferable to use any high melting point material, and it is preferable to use tungsten. It is preferable to use a low resistance conductive material such as aluminum or copper. By using this, the wiring resistance can be reduced.

[0652] The conductor 428 and the conductor 430 are made of a conductor having a barrier property against hydrogen. In particular, the opening in the insulator 424 having a barrier property against hydrogen is preferably In this case, it is preferable that a conductor having a barrier property against hydrogen is formed. , the transistor 400 and the transistor 200 may be separated by a barrier layer; The diffusion of hydrogen from the transistor 400 to the transistor 200 can be suppressed.

[0653] As a conductor having a barrier property against hydrogen, for example, tantalum nitride or the like is used. In addition, by laminating tantalum nitride and highly conductive tungsten, The diffusion of hydrogen from the transistor 400 can be suppressed while maintaining the overall conductivity. In this case, the tantalum nitride layer having a barrier property against hydrogen is It is preferable that the insulating material 424 has a thickness of 100 .mu.m.

[0654] A wiring layer may be provided over the insulator 426 and the conductor 430. For example, as shown in FIG. In FIG. 3, an insulator 450, an insulator 452, and an insulator 454 are stacked in this order. In addition, a conductor 456 is formed on the insulator 450, the insulator 452, and the insulator 454. The conductor 456 functions as a plug or a wiring. The conductor 428 and the conductor 430 can be formed using similar materials.

[0655] The conductor 456 is preferably made of a low resistance conductive material such as aluminum or copper. It is preferable to use a low-resistance conductive material to reduce the wiring resistance. When copper is used for the body 456, it is preferable to laminate a conductor that suppresses the diffusion of copper. Conductors that suppress diffusion include, for example, tantalum and alloys containing tantalum such as tantalum nitride; Ruthenium and alloys containing ruthenium are preferably used.

[0656] Also, for example, the insulator 450 may be used to suppress the diffusion of copper or to provide resistance to oxygen and hydrogen. It is preferable to use an insulator that has a barrier property to suppress the diffusion of copper. An example of the insulator is silicon nitride. Fees may be used.

[0657] In particular, the insulator 450 that suppresses copper diffusion is in contact with an opening that the insulator 450 has, and the insulator 450 suppresses copper diffusion. It is preferable to provide a conductor and laminate copper on the conductor that suppresses copper diffusion. This makes it possible to suppress the diffusion of copper to the periphery of the wiring.

[0658] On the insulator 454, an insulator 458, an insulator 210, an insulator 212, and an insulator 21 are arranged. 4 are stacked in order. 214, or any of its parts, to suppress copper diffusion or to provide a barrier against oxygen and hydrogen. It is preferable to form the insulating layer using a material having good mechanical properties.

[0659] The insulator 458 and the insulator 212 may include, for example, the substrate 401 or the transistor 4 The region where the transistor 200 is provided is provided with copper, hydrogen, or impurities. It is preferable to use a film having a barrier property so that the impurities do not diffuse. The same materials as those in 424 can be used.

[0660] The insulator 210 may be made of the same material as the insulator 420. For example, The edge 210 may be a silicon oxide film, a silicon oxynitride film, or the like.

[0661] For example, the insulator 214 may be made of aluminum oxide, hafnium oxide, or tantalum oxide. It is preferable to use a metal oxide such as

[0662] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that does not allow impurities such as oxygen and moisture to pass through the membrane. Aluminum oxide is highly resistant to hydrogen, moisture, etc. during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 200. The insulating film can suppress the release of oxygen from the oxide that constitutes the transistor 200. Therefore, aluminum oxide can be used as a protective film for the transistor 200. Suitable.

[0663] On the insulator 214, an insulator 216 is provided. The insulator 216 has a structure similar to that of the insulator 420. For example, the insulator 216 may be a silicon oxide film or a silicon oxynitride film. A silicon film or the like can be used.

[0664] Also, the insulator 458, the insulator 210, the insulator 212, the insulator 214, and the insulator 216 The conductive material 218 and the conductive material 205 constituting the transistor 200 are embedded in the insulating layer 214. Note that the conductor 218 is electrically connected to the capacitor 410 or the transistor 400. The conductor 218 functions as a plug or wiring for connecting the conductor 428 and the The conductor 430 can be formed using a material similar to that of the conductor 430 .

[0665] In particular, the insulator 458, the insulator 212, and the conductor 218 in the area in contact with the insulator 214. is a conductive material that suppresses copper diffusion or has barrier properties against oxygen, hydrogen, and water. With this configuration, the transistor 400 and the transistor 200 are preferably the same. is a layer that suppresses copper diffusion or has barrier properties against oxygen, hydrogen, and water. , and thus can be isolated. In other words, the diffusion of copper from the conductor 456 is suppressed, and the transistor This makes it possible to suppress the diffusion of hydrogen from 400 to the transistor 200 .

[0666] Above the insulator 214, a transistor 200 and an insulator 280 are provided. In addition, the transistor 200 shown in FIG. 73 is only an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration and driving method.

[0667] On the insulator 280, an insulator 282, an insulator 284, and an insulator 470 are laminated in this order. In addition, the insulator 220, the insulator 222, the insulator 224, the insulator 280, the insulator 2 Conductor 244 and the like are embedded in...

Claims

[Claim 1] A metal oxide film having In, M (M is Al, Ga, Y, or Sn), and Zn, the metal oxide film has a first crystal portion and a second crystal portion, the first crystal portion has a c-axis orientation, The second crystal portion does not have a c-axis orientation, When an electron beam diffraction measurement was performed on a cross section and an electron beam diffraction pattern of the metal oxide film was observed, The electron beam diffraction pattern is a first region having a diffraction spot caused by the first crystal portion; a second region having a diffraction spot caused by the second crystal portion, an integrated intensity of luminance in the first region is greater than an integrated intensity of luminance in the second region; 1. A metal oxide film comprising:

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