Power converter

Abstract

To provide a power conversion circuit capable of improving the performance with respect to a minute current and also suppressing ripple by improving the circuit.SOLUTION: A power conversion circuit comprises: (n) converters 5 which are connected in parallel; a motor control section 11 which outputs control information corresponding to an inputted command value; and a pulse generation section 12 which generates a multiplex pulse signal for driving the (n) converters on the basis of the control information. A zero current detection section 22 is configured to set whether or not a detection pulse can be outputted when a zero-cross point of current outputted by the converters 5 is detected. A determination switch section 24 sets, in accordance with a command value Iout, the number of times of detection of the zero-cross point as timing, in which the zero current detection section 22 is caused to output the detection pulse, within an output period of the multiplex pulse signal. The pulse generation section 12 generates the multiplex pulse signal in accordance with the detection pulse.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power converter having a plurality of converters connected in parallel. [Background technology]

[0002] For example, Patent Document 1 proposes a power generating device for a hybrid vehicle. In this power generating device, a multi-phase converter is connected in parallel to each phase of a permanent magnet synchronous motor. Each multi-phase converter is driven while changing its phase to output a sinusoidal voltage, thereby reducing the output current ripple. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2009-219299 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the above configuration, the more converters connected in parallel, the more the output current ripple can be reduced, but if the current command value is small, the cycle becomes shorter, which shortens the pulse width that drives the converter, and the control resolution of the processing in the microcomputer may be insufficient, making it impossible to output the pulse normally. More specifically, when the cycle becomes shorter, the triangular wave of the carrier signal in the pulse control becomes higher in frequency.

[0005] When controlling with a microcomputer, the minimum pulse width that can be output is determined by the control resolution of the interrupt, etc. When trying to generate a waveform other than direct current, such as a sine wave, using a minute current, it is approximated at the limit of resolution, resulting in a current waveform that differs from the target or ripples in the waveform. When the pulse cannot be output normally in this way, distortion occurs in the current waveform, resulting in increased noise and sounds.

[0006] The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a power conversion circuit that improves performance for minute currents and suppresses ripples by improving the circuit. [Means for solving the problem]

[0007] According to the power conversion circuit of claim 1, the control unit (11) outputs control information according to an input command value, and the pulse generating unit (12) generates a multiple pulse signal for driving n converters (2 or more) connected in parallel based on the control information. The zero current detection unit (22) is configured so that it is possible to set whether or not to output a detection pulse when a zero cross point of a current output by the converter is detected. The detection count setting unit (24) sets the number of zero cross point detections as timing for causing the zero current detection unit to output a detection pulse within an output period of the multiple pulse signal according to the command value. The pulse generating unit generates the multiple pulse signal according to the detection pulse.

[0008] Specifically, for example, as in the power conversion circuit of claim 2 or 3, the detection count setting unit sets the initial value of the detection count to "1", and when the difference between the command value and the current value that can be output based on the command value exceeds a threshold value (claim 2), or when the command value falls below the threshold value (claim 3), sets the detection count to "2" or more. This allows the pulse generating unit to generate a multiple pulse signal based on the zero crossing point of the current detected the second time onwards. Therefore, it becomes possible to output a minute current without narrowing the pulse width of the multiple pulse signal.

[0009] According to the power conversion circuit of claim 4, the phase correction unit included in the detection count setting unit corrects the output phase of the multiplex pulse signal to the delayed side when the detection count is set to 2 or more. This makes it possible to allocate and correct the phase delay caused by setting the detection count to 2 or more to the multiplex pulse signal. [Brief description of the drawings]

[0010] [Figure 1]Electrical configuration diagram for one phase in the first embodiment [Diagram 2] Overall Electrical Diagram [Diagram 3] A diagram showing the waveform of the inductor current IL in one converter. [Figure 4] A diagram showing the waveform of the output current Iout of one phase, which is a combination of the waveforms of the inductor currents IL1 to IL4 of the four converters. [Diagram 5] Converter control configuration diagram [Figure 6] A flowchart mainly showing the processing contents of the judgment switching unit [Figure 7] Timing chart showing the on / off control of switches SW1 and SW2 [Figure 8] A diagram showing the waveforms of the currents output by each of the four multiple converters and the combined current waveform. [Figure 9] Diagram explaining the problems with the conventional technology (part 1) [Figure 10] Diagram explaining the problems with the conventional technology (part 2) [Figure 11] Diagram explaining the problems with the conventional technology (part 3) [Figure 12] FIG. 1 is a diagram for explaining the effect of the present embodiment; [Figure 13] FIG. 2 is a diagram for explaining the effect of the present embodiment; [Figure 14] 11 is a flowchart showing the second embodiment, focusing on the process contents of a judgment switching unit. [Figure 15] 11 is a flowchart showing the third embodiment, focusing on the process contents of a judgment switching unit. [Figure 16] Timing chart showing the on / off control of switches SW1 and SW2 DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] (First embodiment) The first embodiment will be described below. The control related to the current boundary mode in this embodiment is based on the configuration disclosed in JP 2022-132052 A (hereinafter referred to as the prior application). As shown in FIG. 2, a three-phase inverter 3 as a power converter is connected to a battery 2. The battery 2 is a storage battery such as a nickel-metal hydride storage battery or a lithium storage battery. A motor 4 is connected to the three-phase inverter 3. The motor 4 is, for example, a power generating device that drives the wheels of a hybrid vehicle, and is, for example, a permanent magnet synchronous motor (PMSM).

[0012] The three-phase inverter 3 is composed of multi-phase converters 6u, 6v, and 6w, each of which is a basic unit converter 5u, 5v, and 5w corresponding to the U phase, V phase, and W phase, and is multiplexed in parallel with n converters 5u, 5v, and 5w (two or more). In FIG. 1, the reference characters of the converters 5u, 5v, and 5w, which are basic units, are suffixed with "1 to n". In the following description, each of the converters 5u1, 5u2, 5u3...5un, 5v1, 5v2, 5v3...5vn, 5w1, 5w2, 5w3...5wn may be abbreviated as "converter 5" simply. In addition, the converters 5u1, 5v1, and 5w1, which are targets for detecting the inductor current IL (current flowing through the inductor), may be referred to as "master phase converter 5". A configuration example of the converter 5 is shown in FIG. 5.

[0013] For example, the U-phase multiphase converter 6u shares the total current flowing through the n converters 5 at 1 / n, and drives the converters 5u1...5un with a phase difference T / n between them to level out the drive currents of the converters 5u1...5un. The output currents of the converters 5u1...5un are combined, so that the current ripples can be offset, and a desired current waveform, a sine wave current in this case, is output. The same is true for the V-phase and W-phase multiphase converters 6v and 6w. FIG. 3 shows the waveform of the inductor current IL in one converter 5, and FIG. 4 shows the waveform of the output current Iout of one phase, which is a combination of the waveforms of the inductor currents IL1 to IL4 of the four converters.

[0014] As shown in Fig. 5, each of the converters 5 is configured as a step-down non-inverting buck converter that includes an upper arm switch SW1, a lower arm switch SW2, an inductor L, and a capacitor C and converts the voltage of the battery 2 as desired. The upper arm switch SW1 and the lower arm switch SW2 are configured as power switches such as N-channel power MOSFETs, and freewheeling diodes D1 and D2 are connected between the drain and source, respectively, to commutate the load current. The capacitors Ca1 and Ca2 are elements whose capacitance change has a temperature characteristic. In the following description, both or one of the upper arm switch SW1 and the lower arm switch SW2 may be referred to as a "power switch."

[0015] In the control system 1 according to this embodiment, a control device 10 is connected to a three-phase inverter 3, and control is mainly performed by the control device 10. The control device 10 is configured by a computer equipped with multiple CPU cores, a memory 37, and the like, and functionally includes a motor control unit 11 and a pulse generating unit 12.

[0016] A current sensor 14 is provided in the current path of the inductor L that constitutes the converters 5u1, 5v1, and 5w1 that are the master phases of the UVW phases. The inductor current IL detected by the current sensor 14 is input to the motor control unit 11. The motor control unit 11 receives the command values ​​Id of the d-axis current and the q-axis current calculated according to the required torque. * ,Iq * is input, and the current command value Id * ,Iq * The control information Iu_cmd, Iv_cmd, and Iw_cmd corresponding to the current command value Id * ,Iq * The update period of the current command value Id is set to a time that is sufficiently short compared to the period of the AC frequency. * ,Iq * can be set in detail.

[0017] Furthermore, a current sensor 14 is provided to detect phase currents Iu, Iv, Iw to be input to the motor 4, and the current detected by the current sensor 14 is input to the motor control unit 11. The motor control unit 11 also receives an input of a rotor angle θ from a rotational position sensor 4a, such as a resolver, installed on the motor 4. Based on these inputs, the motor control unit 11 performs vector control calculations in a three-phase to two-phase converter 34, and generates a d-axis current Id and a q-axis current Iq.

[0018] The subtractor 30 calculates the d-axis current command value Id * , q-axis current command value Iq * The current controller 31 subtracts the d-axis current Id and the q-axis current Iq from the current controller 31, and outputs the result to the current controller 31. The current controller 31 outputs the d-axis and q-axis current command values ​​Id_cmd and Iq_cmd to the two-phase to three-phase converter 32, for example, by proportional-integral control. The two-phase to three-phase converter 32 converts the d-axis current command values ​​input from the current controller 31 into current command values ​​Iu_cmd, Iv_cmd, and Iw_cmd for each of the three phases of the motor 4, and outputs them to the pulse generating unit 12.

[0019] The pulse generating unit 12 generates multiple pulses, i.e., multiphase pulses, to perform multiple operations on the 3×n converters 5 of the three-phase inverter 3 based on control information input from the motor control unit 11. As shown in Fig. 1 and Fig. 5, the pulse generating unit 12 has functional configurations including a gate driving unit 21, a zero current detection unit 22, a pulse calculation unit 23, and a judgment switching unit 24. The internal configuration of the pulse calculation unit 23 is shown in Fig. 3 of the prior application. The judgment switching unit 24 will be described later.

[0020] The pulse calculation unit 23 calculates each parameter of the on time Ton and off time Toff of the upper arm switch SW1 and the lower arm switch SW2, the period T, and the phase difference Td between the multiple pulses to be input to multiple converters 5 of the same phase when each converter 5 of the multi-phase converters 6u, 6v, 6w of each phase operates in the current boundary mode.

[0021] The current boundary mode is a mode in which the upper arm switch SW1 and the lower arm switch SW2 are switched on and off when the inductor current IL is detected to be zero. The parameters of the on time Ton, the off time Toff, the cycle T, and the phase difference Td are set to be the same among the multiple pulses input to each converter 5 of the multiphase converter 6 of the same phase.

[0022] The gate driver 21 drives the three-phase inverter 3 based on the calculation results of the pulse calculator 23. The gate driver 21 drives the upper arm switch SW1 or the lower arm switch SW2 to turn on and off based on the on-time Ton, off-time Toff, period T, and phase difference Td calculated by the pulse calculator 23. Details of the current boundary mode are shown in paragraphs

[0024] to

[0035] and FIG. 4 of the prior application, and therefore will not be described here. In addition, the processing operations related to the multi-phase converters 6u, 6v, and 6w of each phase are also shown in paragraphs

[0036] to

[0053] and FIG. 6 and FIG. 7, and therefore will not be described here.

[0023] The following will mainly describe the differences between this embodiment and the prior publication. The current boundary mode has the following problems. When controlling a minute current, the period of pulse control becomes short. If the period falls below T1, which is the limit of the control resolution of the microcomputer constituting the control device 10, the pulse signal cannot be output normally as shown in FIG. 9, and ripples occur in the composite current waveform as shown in FIG. 10.

[0024] Therefore, in this embodiment, the pulse generating unit 12 is provided with a judgment switching unit 24 equivalent to a detection count setting unit. As shown in Fig. 5, the current command value Iout is input to the judgment switching unit 24 via the motor control unit 11. The current command value IoutC is any one of the current command values ​​Iu_cmd, Iv_cmd, and Iw_cmd. In general, in the current boundary mode, the turn-off of the lower arm switch SW2 of the converter 5 and the turn-on of the upper arm switch SW1 are switched at the timing of first detecting a zero cross point where the polarity of the resonant current changes from positive to negative. In Fig. 9 and other figures, the above timing is indicated as ZCS (Zero Current Switching).

[0025] In contrast, the judgment switching unit 24 of this embodiment sets the timing for turning off the lower arm switch SW2 to the timing when the zero cross point is detected for the second or subsequent time, as shown in Fig. 7, in the zero current detection unit 24. The zero current detection unit 22 has an internal counter that counts the number of times that the zero cross point is detected. When the count value matches the number of times of detection set by the judgment switching unit 24, a detection pulse of the zero cross point is output to the pulse calculation unit 23. The default value of the number of times of detection is "1".

[0026] In this way, by delaying the timing at which the lower arm switch SW2 is turned off from the timing at which the zero-crossing point is first detected, the current waveform is pulled to the negative side in the LC resonant operation, so that the amplitude value of the composite current decreases and the resonant period T becomes equivalently slower, making it possible to output a minute current and reducing the ripple in the current waveform.

[0027] Next, the processing contents of the pulse generating unit 12 will be described. As shown in Fig. 6, the judgment switching unit 24 calculates a target current Iout_tgt based on the input command value IoutC and a controllable output current Iout_cnt as a composite current (S1, S2). Then, the error between the target current Iout_tgt and the output current Iout_cnt is calculated (S3). In this case, the error is based on the premise that Iout_tgt>Iout_cnt.

[0028] Next, it is determined whether the error is equal to or smaller than a threshold and is sufficiently small (S4). Here, the determination of whether the error is sufficiently small is made, for example, by calculation based on the value of the target current Iout_tgt and the on-time Ton of the switches SW1 and SW2, or by using a map created in advance. If it is determined to be (YES), control is performed in the normal current boundary mode, and the pulse calculation unit 23 calculates the on-time Ton of the upper arm switch SW1 and the off-time Toff of the lower arm switch SW2 (S5), and calculates the phase difference Td between the multiplexed pulse signals by dividing the period T of the multiplexed pulse signal by the number of multiplexes n (S6). Then, the multiplexed pulse signal is output to the gate drive unit 21 (S7).

[0029] In this case, the gate driver 21 turns on the upper arm switch SW1 or the lower arm switch SW2 on the condition that the zero current detector 22 detects the timing when the polarity of the inductor current IL transitions from negative to positive and becomes zero. At this time, the pulse calculator 23 makes the gate driver 21 turn on the upper arm switch SW1 if the current command value Iout for the U phase exceeds zero, for example. If the current command value Iout is less than zero, the pulse calculator 23 makes the gate driver 21 turn on the lower arm switch SW2.

[0030] When driving the converter 5u1, the pulse calculation unit 23 calculates the on-time Ton for which the power switch SW1 or SW2 of each converter 5 is kept on, and the phase difference Td between the multiple pulses applied to each converter 5. The calculation of each parameter will be described below using the U phase as an example. If the output current of the converter 5 corresponding to the current command value IoutC is Iout and the number of multiple converters 5 is n, then the average current I of the converter 5 is Iout / n, and the peak current ILp of the inductor current IL is twice the average current I, or 2I.

[0031] When the current command value IoutC>0, the pulse calculation unit 23 calculates the on-time Ton and off-time Toff of the upper arm switch SW1, as well as the period T and phase difference Td, based on the following equations (1) and (2), respectively. Vin: Input voltage of converter 5 Vout: Output voltage of converter 5 Ton1: ON time of upper arm switch SW1 Toff1: Off time of upper arm switch SW1 T1: On-off cycle Td1: Phase difference between each on timing L: Inductance of the inductor ILp: Peak current flowing through the inductor Let us assume that.

[0032] If the command value IoutC is a positive value, the pulse generating unit 12 turns on the upper arm switch SW1. Ton1 = ILp × L / (Vin - Vout) Toff1=ILp×L / Vout T1=Ton1+Toff1 Td1 = T1 / n … (1) A multi-pulse signal is generated to drive the

[0033] Also, Ton2: On time of lower arm switch SW2 Toff2: Off time of lower arm switch SW2 T2: On-off cycle Td2: Phase difference between each on timing Let us assume that.

[0034] If the current command value IoutC is a negative value, the pulse generating unit 12 turns on the lower arm switch SW2. Ton2=ILp×L / Vout Toff2=ILp×L / (Vin-Vout) T2=Ton2+Toff2 Td2 = T2 / n … (2) In addition, the phase difference Tdm of the m-th converter 5 with respect to the first converter 5 is expressed as follows: Tdm = Td × (m-1) = T / n × (m-1) It becomes.

[0035] The output current Iout_cnt in step S2 is equal to the peak current ILp that satisfies T(1,2)=Tmin in the equations for calculating the periods T1 and T2 in equations (1) and (2), where Tmin is the minimum value of the controllable period and is determined depending on the performance of the transistors that constitute the converter 5 and the performance of the microcomputer that constitutes the control device 10.

[0036] On the other hand, if the error exceeds the threshold value in step S4 (NO), this means that the magnitude of the current ripple has reached a level that cannot be ignored. Then, the judgment switching unit 24 changes the number of times the zero crossing point is detected from the default value "1" to "N", which is "2" or more (S8). If the number of times the detection is set to "2" or more, the timing at which the upper arm switch SW is turned on is delayed by a period Tf. The length of this period Tf is determined in advance according to the resonant frequency. Therefore, instead of step S5, the pulse calculation unit 23 calculates the on time Ton of the upper arm switch SW1 and the off time Toff of the lower arm switch SW2 taking into account the length of the period Tf (S9). Then, the process proceeds to step S6.

[0037] FIG. 7 shows the turn-on timing of the upper arm switch SW1 when the current command value exceeds zero and N=2. The current detection unit 22 detects the zero cross point ZCS when the polarity of the current changes from negative to positive, and does not output a detection pulse if the count value is "1". When the count value becomes "2", a detection pulse is output. At this timing, the upper arm switch SW1 is turned on. The turn-on occurs with a delay of a period Tf from the timing of detecting the first zero cross point ZCS. The average current value decreases by this amount, and the combined current Iout becomes T / (T+Tf) times. In other words, if the amount of decrease in current is Ioutf, Ioutf = Iout × T / (T + Tf).

[0038] In this timing chart, the switch SW2 on the lower arm side is also controlled to perform synchronous rectification, but the switch SW2 may be turned off to allow the current to circulate through the freewheel diode D2.

[0039] As described above, this embodiment includes n converters 5 connected in parallel, a motor control unit 11 that outputs control information according to an input command value Iout, and a pulse generating unit 12 that generates a multiple pulse signal for driving the n converters based on the control information. The zero current detecting unit 22 is configured so that it can be set whether or not to output a detection pulse when a zero cross point of a current output by the converter 5 is detected. The judgment switching unit 24 sets the number of zero cross point detections as the timing for causing the zero current detecting unit 22 to output a detection pulse within the output period of the multiple pulse signal according to the command value Iout. The pulse generating unit 12 generates a multiple pulse signal according to the detection pulse.

[0040] The judgment switching unit 24 sets the initial value of the detection count to "1", and when the difference between the command value Iout and the current value that can be output based on the command value Iout exceeds a threshold value, sets the detection count to "2" or more. This allows the pulse generating unit 12 to generate a multiple pulse signal based on the zero crossing point of the current detected the second time or later. Therefore, it becomes possible to output a small current without narrowing the pulse width of the multiple pulse signal. Also, when the command value Iout is a relatively large value and the value of the output current is also relatively large, the converter 5 can be controlled in the current boundary mode.

[0041] Furthermore, if the command value is a positive value, the pulse generating unit 12 generates a multi-pulse signal to drive the upper arm switch SW1 of the converter 5 according to formula (1), and if the command value is a negative value, the pulse generating unit 12 generates a multi-pulse signal to drive the lower arm switch SW2 of the converter 5 according to formula (2). In this way, the multi-pulse signal can be generated specifically according to formulas (1) and (2).

[0042] Second embodiment Hereinafter, the same parts as those in the first embodiment are denoted by the same reference numerals and the description thereof will be omitted, and the different parts will be described. As shown in Fig. 14, in the second embodiment, when step S1 is executed, a threshold value Iout_th is calculated (S11). Then, it is determined whether the target current Iout_tgt is equal to or greater than the threshold value Iout_th (S12). If it is equal to or greater than the threshold value Iout_th (YES), the process proceeds to step S5, and if it is less than the threshold value Iout_th (NO), the process proceeds to step S8.

[0043] The threshold Iout_th may be set to multiple values, for example, x[A], y[A] (x>y). In step S8, a map may be used to set N=2 if the threshold is less than x[A], and N=3 if the threshold is less than y[A].

[0044] Third embodiment As shown in Fig. 15, in the third embodiment, when step S9 is executed, the phase difference between the multiplex pulse signals is corrected to (T+Tf) / n (S10) and then the process proceeds to step S7. For example, as shown in Fig. 16, by setting N=2, the turn-on timing of the upper arm switch SW1 is delayed by a period Tf, so this amount is added to the output period T of the multiplex pulse signal and divided by the number of multiplexes n to correct the phase. This makes it possible to eliminate phase mismatch.

[0045] (Other embodiments) Although a step-down converter 5 is used as the power converter, the present invention is not limited to this, and for example, a step-up converter or a step-up / step-down converter 5 can be used. The converter 5 may be either a non-insulated type or an insulated type.

[0046] Although the number of multiple operations n is set to 4 in this embodiment, the number of multiple operations n may be 3 or 4 or more. Although the power switches SW1 and SW2 are exemplified by N-channel power MOSFETs, they may be configured by other types of power switching elements.

[0047] In order to divert the load current to the power MOSFETs constituting the power switches SW1 and SW2, the freewheeling diodes D1 and D2 are provided in parallel, respectively, but this is not limited to this. Body diodes added to the power MOSFETs may be used instead of the freewheeling diodes D1 and D2. Also, a power switch with reverse conductivity, for example, an RC-IGBT, may be used.

[0048] Similarly to the first multiplex converter 5u1, 5v1, 5w1, the second or more m-th converters 5u2...5un, 5v2...5vn, 5w2...5wn may be provided with a zero current detector 22 so that the corresponding power switch SW1 or SW2 is turned on after detecting that the inductor current IL is zero. The on-time Ton of the power switches SW1 and SW2 is preferably calculated using the above-mentioned formulas (1) and (2).

[0049] The components of the control device 10, namely the motor control unit 11 and the pulse generating unit 12, may be realized using hardware combining logic circuits, or may be realized by hardware such as a microcomputer executing a program. The control device 10 and the method described in the present disclosure may be implemented by a special-purpose computer provided by configuring a processor and a memory programmed to execute one or more functions embodied in a computer program. Alternatively, the control device 10 and the method described in the present disclosure may be implemented by a special-purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control device 10 and the method described in the present disclosure may be implemented by one or more special-purpose computers configured by combining a processor and a memory programmed to execute one or more functions with a processor configured with one or more hardware logic circuits. Also, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executed by the computer.

[0050] Although the present invention has been described based on the above-mentioned embodiment, it is understood that the present invention is not limited to the embodiment or structure. The present invention also includes various modifications and modifications within the equivalent range. In addition, various combinations and forms, and other combinations and forms including one, more, or less than one element, are also within the scope and concept of the present invention. [Explanation of symbols]

[0051] In the drawings, 3 indicates a three-phase inverter, 5, 5u1, 5v1, 5w1, 5u2, 5v2, 5w2, 5u3, 5v3, 5w3, 5un, 5vn, and 5wn indicate converters, 6u, 6v, and 6w indicate multi-phase converters, 10 indicates a control device, 11 indicates a motor control unit, 12 indicates a pulse generating unit, 22 indicates a zero current detection unit, 24 indicates a judgment switching unit, SW1 indicates an upper arm switch, and SW2 indicates a lower arm switch.

Claims

1. Two or more n converters (5) connected in parallel; A control unit (11) that outputs control information according to an input command value; A pulse generating unit (12) that generates a multi-pulse signal for driving the n converters based on the control information; a zero current detection unit (22) configured to be able to set whether or not to output a detection pulse when a zero cross point of a current output by the converter is detected; a detection count setting unit (24) that sets, in accordance with the command value, the number of times that the zero-crossing points are detected as a timing for causing the zero current detection unit to output the detection pulse within an output period of the multiplex pulse signal, The pulse generating unit is a power converter that generates the multi-pulse signal in response to the detection pulse.

2. The detection count setting unit sets an initial value of the detection count to “1”, 2. The power converter according to claim 1, wherein the number of detections is set to "2" or more when a difference between the command value and a current value that can be output based on the command value exceeds a threshold value.

3. The detection count setting unit sets an initial value of the detection count to “1”, The power converter according to claim 1 , wherein the number of detections is set to “2” or more when the command value falls below a threshold value.

4. 4. The power converter according to claim 2, wherein the detection count setting unit includes a phase correction unit that corrects an output phase of the multiplexed pulse signal to the delayed side when the detection count setting unit is set to "2" or more.

5. The pulse generating unit includes a switch driving unit (21) that drives each switch constituting the converter; 2. The power converter according to claim 1, further comprising a pulse calculation unit (23) that calculates an on-time, an on-off cycle, and a phase difference between each on-timing of each of the switches to generate a multi-pulse signal to be output to the switch driving unit.

6. The voltage input to the converter is Vin, and the voltage output by the converter is Vout. The on-time of the upper arm switch constituting the converter is defined as Ton1, the off-time of the upper arm switch is defined as Toff1, the on-off period is defined as T1, and the phase difference between the on-timings of the upper arm switch is defined as Td1. The on-time of the lower arm switch constituting the converter is defined as Ton2, the off-time thereof is defined as Toff2, the on-off period is defined as T2, and the phase difference between the on-timings of each of the lower arm switches is defined as Td2. Let L be the inductance of the inductor provided in the converter, ILp be the peak current flowing through the inductor, and ILn be the absolute value of the negative peak current of the inductor. When the current amount interpolation pulse is necessary, if the command value is a positive value, the pulse generating unit controls an upper arm switch constituting the converter. Ton1=ILp×L / (Vin-Vout) Toff1=ILp×L / Vout T1=Ton1+Toff1 Td1=T1 / n...(1) generating a multi-pulse signal to drive the If the command value is a negative value, the lower arm switch constituting the converter is Ton2=ILp×L / Vout Toff2=ILp×L / (Vin-Vout) T2=Ton2+Toff2 Td2=T2 / n...(2) 6. The power converter of claim 5, which generates a multi-pulse signal to drive the inverter.

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