SOI wafer and method for manufacturing the same

Abstract

To provide an SOI wafer for a high-frequency integrated circuit board, which has an ability to reduce harmonics, the ability being superior to that of an SOI wafer comprising a conventional polysilicon layer as a trap-rich layer, and which can be processed easily, and a method for manufacturing the same.SOLUTION: An SOI wafer 1 includes, in this order on a silicon single crystal substrate 2 having a resistivity of 10 Ω cm or more to 5,000 Ω cm or less: a silicon epitaxial film 3 having a carbon concentration of 2×1019 atoms / cm3 or more and less than 3×1020 atoms / cm3 and including carbon defects; a dielectric layer 4; and a silicon single crystal substrate 5. The thickness of the silicon epitaxial film 3 satisfies the relationship: 6.6×1020×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm3)].SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an SOI wafer and a method for manufacturing the same. [Background technology]

[0002] In recent years, the demand for large-capacity communications has been extremely high, and the development of devices applicable to the fifth and sixth generation mobile communications systems (commonly known as 5G and 6G) ​​has accelerated. These communications devices incorporate integrated circuits, and the active elements (e.g., transistors) and passive elements (e.g., inductors) that make up the integrated circuits are required to have a high degree of operational stability in 5G and 6G environments. In particular, because these large-capacity communications systems are scheduled to use high frequency bands (millimeter waves to sub-terahertz bands), there is a social demand for device designs and material development that combine excellent high-frequency characteristics with power-saving performance.

[0003] Looking at the materials required for semiconductor integrated circuits, silicon wafers produced by the Czochralski (CZ) method are sometimes used as substrates for high-frequency integrated circuits. The silicon wafers used in this case need to have high substrate resistivity in order to achieve low resistance loss and good high-frequency characteristics.

[0004] Furthermore, in applications requiring better high-frequency characteristics, wafers with a trap-rich layer formed thereon as described in Patent Document 1 and Patent Document 2 are often used. This is because, when a high-frequency signal is input to a device formed on a high-resistivity substrate, a phenomenon is known in which the resistivity changes due to the formation of an inversion layer in the substrate, and high substrate resistivity can be maintained by capturing carriers generated in the inversion layer at a deep level of the trap-rich layer. In particular, for passive elements, wafers with a polysilicon layer formed as a trap-rich layer on a high-resistivity substrate are used. On the other hand, SOI wafers with a trap-rich layer are widely used for active elements. In the structure of such an SOI wafer, a polysilicon layer as a trap-rich layer, an oxide film as a dielectric layer, and a single crystal silicon layer are stacked in this order on a high-resistivity substrate.

[0005] However, the production of high resistivity substrates, which are widely used as substrates for high frequency integrated circuits, is technically difficult to control the resistivity, resulting in low yields. In addition, polysilicon used as the trap rich layer is difficult to process, leading to poor productivity, and the SOI structure using polysilicon as the trap rich layer has a complex manufacturing process and significant cost issues. Therefore, there has been a demand for the development of technology that does not use high resistivity substrates, but instead uses wafers with a silicon epitaxial film formed on a silicon single crystal substrate (hereinafter simply referred to as "silicon substrate") to produce SOI wafers that exhibit excellent high frequency characteristics, particularly reducing harmonics.

[0006] In addition, Patent Documents 3 and 4 describe wafers in which a carbon-doped epitaxial film is formed on a silicon substrate. However, the wafers in Patent Documents 3 and 4 are basically epitaxial wafers consisting of a silicon substrate, a carbon-doped epitaxial film, and a silicon epitaxial film, and are intended to be used mainly in image sensors, and there is no consideration of using the epitaxial layer as a trap rich layer to produce an SOI wafer. Moreover, Patent Documents 3 and 4 do not describe performing a heat treatment after forming the epitaxial film, so no trap rich layer is formed in the epitaxial film.

[0007] In addition, an epitaxial wafer in which a heat treatment is performed on a wafer in which a carbon-doped epitaxial film is formed on a silicon substrate is described in Patent Document 5. However, there is no mention of its use as a wafer for high-frequency devices or an SOI wafer in which a trap rich layer is formed.

[0008] In Patent Document 5, the silicon epitaxial film containing a high concentration of carbon was developed with the aim of using it as a gettering layer, and the heat treatment is aimed at driving gettering. Therefore, the heat treatment conditions are described as being in the range of 450 to 750°C for about 30 minutes. Although heat treatment at 800 to 1000°C is also mentioned in order to drive gettering in a shorter time, the heat treatment time is estimated to be 30 minutes or less. However, it is difficult to obtain stable high frequency characteristics under such conditions.

[0009] For the reasons mentioned above, it is difficult to use the wafers disclosed in Patent Documents 3, 4, and 5 as wafers for high frequency devices. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Special Publication No. 2015-503853 [Patent Document 2] JP 2019-129195 A [Patent Document 3] JP 2009-164590 A [Patent Document 4] JP 2009-200231 A [Patent Document 5] JP 2006-216934 A Summary of the Invention [Problem to be solved by the invention]

[0011] As described above, there has been a demand for an SOI wafer that can reduce harmonics without using a high resistivity substrate as a substrate for high frequency integrated circuits and can replace a polysilicon layer as a trap rich layer. The inventors of the present invention have conducted extensive research aimed at developing a material that meets such demands, and have found that an SOI wafer using an epitaxial wafer in which a silicon epitaxial film containing a high concentration of carbon is formed on a substrate with normal resistivity is promising. This makes it possible to provide a substrate for high frequency integrated circuits that can be manufactured with a small number of steps and that is easy to process.

[0012] However, the ability of these substrates to reduce harmonics did not reach the level of SOI wafers that used conventional polysilicon layers as trap rich layers, and there was an urgent need to develop SOI wafers that showed better high frequency characteristics.

[0013] The present invention has been made in consideration of the above problems, and has an object to provide an SOI wafer for use in high frequency integrated circuit substrates, which is an SOI wafer using an epitaxial wafer in which a silicon epitaxial film containing a high concentration of carbon is formed on a substrate having normal resistivity, which has a superior ability to reduce harmonics compared to SOI wafers using a conventional polysilicon layer as a trap rich layer, and which has an easy processing process, and a method for manufacturing the same. [Means for solving the problem]

[0014] The present invention has been made to achieve the above object, and provides a method for manufacturing a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less, the method comprising: 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 The silicon epitaxial film has a thickness of less than 6.6×10 and includes a carbon defect-containing silicon epitaxial film, a dielectric layer, and a silicon single crystal film, in that order. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The present invention provides an SOI wafer that satisfies the above requirements.

[0015] In such an SOI wafer, the silicon epitaxial film containing minute carbon defects acts as a trap rich layer, and thus the wafer has superior high frequency characteristics to conventional SOI wafers that use a polysilicon layer as a trap rich layer.

[0016] In this case, the SOI wafer can be a wafer for a high frequency device.

[0017] The SOI wafer according to the present invention has superior high frequency characteristics to conventional SOI wafers that use a polysilicon layer as a trap rich layer due to the silicon epitaxial film containing minute carbon defects acting as a trap rich layer, and is therefore suitable as a wafer for high frequency devices.

[0018] At this time, the carbon defects have a size of 10 nm or less and a density of 1×10 10 cm -2 The above may be possible.

[0019] If such carbon defects are contained, the SOI wafer will be more stable and have better high frequency characteristics than a conventional SOI wafer that uses a polysilicon layer as a trap rich layer.

[0020] The present invention also includes steps of preparing a first substrate, which is a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, and depositing a carbon-containing gas having a carbon concentration of 2×10 on the first substrate under reduced pressure. 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 and forming carbon defects in the silicon epitaxial film by subjecting a first substrate having the silicon epitaxial film formed thereon to a heat treatment temperature of 900° C. or more and 1100° C. or less for a heat treatment time of 3 hours or more and 36 hours or less. The method includes the steps of: preparing a second substrate which is a silicon single crystal substrate; forming a dielectric layer on a surface of the second substrate; and bonding the epitaxial film formed on the first substrate and the dielectric layer of the second substrate together. In the step of vapor-growing the silicon epitaxial film, the silicon epitaxial film has a thickness of 6.6×10 or less. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The present invention provides a method for manufacturing an SOI wafer, which is characterized by forming a silicon epitaxial film that satisfies the above-mentioned condition (1).

[0021] According to such a method for manufacturing an SOI wafer, minute carbon defects can be formed at a high density inside the silicon epitaxial film of the first substrate by vapor phase growth of the first substrate and subsequent heat treatment. By using the first substrate as a base wafer and manufacturing an SOI wafer by a bonding method, the silicon epitaxial film acts as a trap rich layer, and therefore an SOI wafer having better high frequency characteristics than a conventional SOI wafer using a polysilicon layer as a trap rich layer can be easily manufactured.

[0022] The present invention also includes steps of preparing a first substrate, which is a silicon single crystal substrate having a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less, and depositing a carbon-containing gas having a carbon concentration of 2×10 on the first substrate under reduced pressure.19 atoms / cm 3 More than 3×10 20 atoms / cm 3 and a step of heat-treating a first substrate on which the silicon epitaxial film has been formed in an oxidizing atmosphere at a heat treatment temperature of 900° C. to 1100° C. for a heat treatment time of 3 hours to 36 hours, thereby forming carbon defects in the silicon epitaxial film and forming an oxide film on the silicon epitaxial film. The step of vapor-growing the silicon epitaxial film includes a step of preparing a second substrate which is a silicon single crystal substrate, and a step of bonding the oxide film formed on the epitaxial film formed on the first substrate to the second substrate. In the step of vapor-growing the silicon epitaxial film, the thickness of the silicon epitaxial film is 6.6×10 or less. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The present invention provides a method for manufacturing an SOI wafer, which is characterized by forming a silicon epitaxial film that satisfies the above-mentioned condition (1).

[0023] By using such a method for manufacturing an SOI wafer, it is possible to form minute carbon defects at a high density inside the silicon epitaxial film of the first substrate, and by using this as a base wafer to manufacture an SOI wafer by a bonding method, the silicon epitaxial film acts as a trap rich layer, and therefore it is possible to easily manufacture an SOI wafer having better high frequency characteristics than an SOI wafer that uses a conventional polysilicon layer as a trap rich layer.

[0024] In this case, the second substrate having no oxide film formed on its surface can be a substrate obtained by cutting a single silicon single crystal substrate into a plurality of thin substrates before bonding to the first substrate.

[0025] This makes it possible to cut out a plurality of silicon substrates as the second substrate required for the SOI wafer of the present invention from a single silicon single crystal substrate, which provides a significant advantage in terms of manufacturing costs.

[0026] In this case, the SOI wafer manufactured by using the above-mentioned method for manufacturing an SOI wafer can be used as a wafer for high frequency devices.

[0027] An SOI wafer manufactured using the above-described SOI wafer manufacturing method has a silicon epitaxial film in which minute carbon defects are formed at a high density, which acts as a trap rich layer, and thus has superior high frequency characteristics to a conventional SOI wafer that uses a polysilicon layer as a trap rich layer. Therefore, the SOI wafer is particularly suitable as a wafer for high frequency devices.

[0028] At this time, the carbon defects have a size of 10 nm or less and a density of 1×10 10 cm -2 The above may be possible.

[0029] By using an SOI wafer containing such carbon defects, it is possible to obtain an SOI wafer that can achieve more stable high frequency characteristics superior to those of a conventional SOI wafer that uses a polysilicon layer as a trap rich layer. Effect of the Invention

[0030] As described above, the SOI wafer of the present invention does not need to be a high resistivity substrate, and the silicon epitaxial film containing minute carbon defects acts as a trap rich layer, so that the SOI wafer has a higher harmonic reduction capability than the conventional SOI wafer using a polysilicon layer as a trap rich layer, and is suitable as a wafer for high frequency devices. Also, the manufacturing method of the SOI wafer of the present invention makes it possible to easily manufacture the SOI wafer having the above-mentioned superior harmonic reduction capability. [Brief description of the drawings]

[0031] [Figure 1] 1 is a schematic diagram showing an SOI wafer according to the present invention. [Diagram 2] FIG. 2 is a flow diagram showing an example of a method for manufacturing an SOI wafer according to the first embodiment of the present invention. [Diagram 3] FIG. 5 is a flow diagram showing an example of a method for manufacturing an SOI wafer according to a second embodiment of the present invention. [Figure 4] FIG. 11 is a flow diagram showing an example of a method for manufacturing an SOI wafer according to a third embodiment of the present invention. [Diagram 5] 1 is a graph showing the conditions of carbon concentration and film thickness of a silicon epitaxial film under which a void defect region is formed near the interface between the silicon epitaxial film and a silicon substrate in an SOI wafer of the present invention. [Figure 6] 13 is a plot showing changes in second harmonic and third harmonic characteristics of an epitaxial wafer when heat treatment is performed on the epitaxial wafer with different heat treatment times in Experimental Example 2. [Figure 7] 1 is a graph showing the relationship between the second harmonic characteristics and the third harmonic characteristics of epitaxial wafers and the carbon concentration in Example 1 and Comparative Examples 1 and 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0032] The present invention will be described in detail below, but the present invention is not limited thereto.

[0033] As mentioned above, the demand for smaller, more energy-efficient, and less costly communications equipment has created a demand for inexpensive SOI wafers that can further improve high-frequency characteristics, in particular by reducing harmonics.

[0034] As a result of intensive research into the above-mentioned problem, the inventors have discovered that a carbon concentration of 2×10 19 atoms / cm 3 More than 3×10 20atoms / cm 3 The silicon epitaxial film has a thickness of less than 6.6×10 and includes a carbon defect-containing silicon epitaxial film, a dielectric layer, and a silicon single crystal film, in that order. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The inventors have found that an SOI wafer characterized by satisfying the above condition (1) and (2) above has a superior harmonic reduction capability to an SOI wafer using a conventional polysilicon layer as a trap rich layer due to the action of a silicon epitaxial film containing minute carbon defects, and have completed the present invention.

[0035] The present inventors also provide a method for manufacturing a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less, comprising the steps of: preparing a first substrate, which is a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less; 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 and forming carbon defects in the silicon epitaxial film by subjecting a first substrate having the silicon epitaxial film formed thereon to a heat treatment temperature of 900° C. or more and 1100° C. or less for a heat treatment time of 3 hours or more and 36 hours or less. The method includes the steps of: preparing a second substrate which is a silicon single crystal substrate; forming a dielectric layer on a surface of the second substrate; and bonding the epitaxial film formed on the first substrate and the dielectric layer of the second substrate together. In the step of vapor-growing the silicon epitaxial film, the silicon epitaxial film has a thickness of 6.6×10 or less. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The inventors have found that it is possible to easily manufacture SOI wafers having the above-mentioned excellent harmonic reduction capability by a method for manufacturing an SOI wafer, which is characterized by forming a silicon epitaxial film that satisfies the above-mentioned requirement (2). Thus, the present invention has been completed.

[0036] The present inventors also provide a method for manufacturing a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less, comprising the steps of: preparing a first substrate, which is a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less; 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 and a step of heat-treating a first substrate on which the silicon epitaxial film has been formed in an oxidizing atmosphere at a heat treatment temperature of 900° C. to 1100° C. for a heat treatment time of 3 hours to 36 hours, thereby forming carbon defects in the silicon epitaxial film and forming an oxide film on the silicon epitaxial film. The step of vapor-growing the silicon epitaxial film includes a step of preparing a second substrate which is a silicon single crystal substrate, and a step of bonding the oxide film formed on the epitaxial film formed on the first substrate to the second substrate. In the step of vapor-growing the silicon epitaxial film, the thickness of the silicon epitaxial film is 6.6×10 or less. 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The inventors have found that it is possible to easily manufacture SOI wafers having the above-mentioned excellent harmonic reduction capability by a method for manufacturing an SOI wafer, which is characterized by forming a silicon epitaxial film that satisfies the above-mentioned requirement (2). Thus, the present invention has been completed.

[0037] [SOI wafer of the present invention] The SOI wafer of the present invention will be described below with reference to Fig. 1. As shown in Fig. 1, the SOI wafer 1 of the present invention includes a silicon epitaxial film 3 containing carbon defects, a dielectric layer 4, and a silicon single crystal substrate 5, which are arranged in this order on a silicon single crystal substrate 2.

[0038] The silicon single crystal substrate 2 has a resistivity of 10 Ω·cm or more and 5000 Ω·cm or less. A silicon single crystal substrate 2 with a resistivity in this range can be used for high frequency devices. The resistivity is more preferably about 1000 to 5000 Ω·cm, which has good high frequency characteristics and allows resistivity control in single crystal production.

[0039] The silicon epitaxial film 3 has a typical carbon solid solubility of 3 × 10 17 atoms / cm 3 (the maximum solid solubility of carbon at the melting point of silicon) is much higher than 2×10 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 It contains carbon at a concentration of less than 1000 nm and contains carbon defects. It also does not contain void defects.

[0040] The minute carbon defects contained in the silicon epitaxial film 3 have a size of about 10 nm or less and a density in the silicon epitaxial film 3 of about 1×10 10 cm -2 It is preferable that the carbon concentration of the silicon epitaxial film 3 is as above (when the carbon concentration is lower than that of the present invention, carbon defects of about 25 nm or more are included at a low density). The size of the carbon defect is a value measured by measuring the longest part of the defect detected by cross-sectional TEM. This also applies to the manufacturing method of the SOI wafer described later.

[0041] In order to prevent the silicon epitaxial film 3 from containing void defects, the thickness and carbon concentration of the silicon epitaxial film 3 are set to 6.6×10 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 ) relationship is satisfied.

[0042] The minute carbon defects present at high density in the silicon epitaxial film 3 form new deep levels in the film, resulting in a trap-rich SOI wafer. Such an SOI wafer has the advantages of minute carbon defects and has excellent harmonic characteristics that eliminate the disadvantages of void defects. This is thought to be because the silicon epitaxial film, in which minute carbon defects are formed at high density, acts as a trap-rich layer and inhibits the formation of an inversion layer. This makes it an ideal substrate for high-frequency device wafers and active elements.

[0043] The upper and lower limits of the carbon concentration of the silicon epitaxial film 3 are 2.0×10 19 atoms / cm 3 That's it, 3 x 10 20 atoms / cm 3 At such a concentration, the carbon concentration is much higher than the general carbon solid solubility, so it is possible to form minute carbon defects at a high density by heat treatment, and sufficient high frequency characteristics can be realized. If the carbon concentration is below the lower limit, the degree of carbon supersaturation is small, so coarse carbon defects are formed, resulting in low density and making it impossible to realize sufficient high frequency characteristics. On the other hand, if the carbon concentration is 2.0×10 19 atoms / cm 3 In the above cases, when the film thickness exceeds a certain value, void defects are formed, and if these coexist with minute carbon defects inside the film, the high frequency characteristics improve by heat treatment, but the extent of the improvement is small. This is thought to be because the volume of void defects is much larger than that of carbon defects, so the effect of void defects becomes dominant. Therefore, in order to obtain an SOI wafer with excellent high frequency characteristics, it is important that the film thickness of the silicon epitaxial film 3 is thin enough to prevent the formation of void defects. Also, when the carbon concentration is less than 3×10 20 atoms / cm 3 Above this limit, the film quality of the silicon epitaxial film 3 deteriorates, and the productivity also decreases. The upper limit of the carbon concentration depends on the thickness of the silicon epitaxial film. 20×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 This concentration can be obtained from the relation: (1) = (1 / 2) / (2 / 1). At this concentration, the high frequency characteristics are stable and excellent. This also applies to the manufacturing method of SOI wafers described later.

[0044] The upper and lower limits of the thickness of the silicon epitaxial film 3 can be set to, for example, 0.1 μm or more and 2.5 μm or less, taking into consideration productivity and costs. Within this range, sufficient high-frequency characteristics can be obtained at a lower cost. However, if the carbon concentration of the silicon epitaxial film is 2.0×10 19 atoms / cm 3 In the above cases, when the silicon epitaxial film is heat-treated, void defect regions are likely to form at the interface between the silicon epitaxial film and the silicon substrate. Since void defects are aggregates of vacancies, the formation of void defects can be suppressed by reducing the thickness of the silicon epitaxial film 3, thereby reducing the amount of vacancies generated inside the film. For this reason, it is necessary to adjust the film thickness according to the carbon concentration. From the above, the relationship between the thickness of the silicon epitaxial film 3 and the carbon concentration is 6.6×10 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 ) must be satisfied.

[0045] (Experimental Example 1) The following describes the results of an experiment evaluating the relationship between the carbon concentration and the thickness of a carbon-doped silicon epitaxial film formed on a silicon substrate, which does not cause void defects in the epitaxial film.

[0046] The inventors used a low-pressure CVD apparatus to 19 atoms / cm 3 Silicon epitaxial film containing more than 2.0×10 carbon and varying thickness (carbon concentration: 2.0×10 19 atoms / cm 3The samples had film thicknesses of 1 μm, 1.5 μm, 2 μm, 3 μm, and 5.5 μm, and carbon concentrations of 1.0 × 10 20 atoms / cm 3 The samples had film thicknesses of 1 μm, 2 μm, and 3 μm, and carbon concentrations of 3.0×10 20 atoms / cm 3 and 1.0×10 21 In the sample, a silicon epitaxial film (thickness: 1 μm) was formed on a silicon substrate. The carbon concentration and thickness of the silicon epitaxial film were adjusted by changing the amount of source gas introduced into the low-pressure CVD furnace and the processing time.

[0047] To evaluate the presence or absence of void defect regions in these epitaxial wafers, the epitaxial wafers obtained were subjected to heat treatment at 1000°C for 36 hours in an oxygen atmosphere. After the heat treatment, planar TEM observation was performed using thin specimens (approximately 500 nm thick) including the interface between the silicon epitaxial film and the silicon substrate of each epitaxial wafer.

[0048] As a result of Experimental Example 1, the carbon concentration was 2.0 × 10 19 atoms / cm 3 In the sample, the film thickness is 3 μm or more, and the carbon concentration is 1.0 × 10 20 atoms / cm 3 In the sample, the film thickness is 2 μm or more, and the carbon concentration is 3.0 × 10 20 atoms / cm 3 In the above samples, the film thickness was 1 μm, and it was found that a void defect region was formed near the interface between the silicon epitaxial film and the silicon substrate.

[0049] From the above results, the inventors concluded that the conditions for forming void defects in a silicon epitaxial film by heat treatment vary depending on both the carbon concentration contained in the silicon epitaxial film and the thickness of the silicon epitaxial film.

[0050] FIG. 5 shows the results of the presence or absence of the void defect region shown in Experimental Example 1, organized according to the carbon concentration contained in the silicon epitaxial film and the film thickness of the silicon epitaxial film. 5 is a graph showing the carbon concentration and film thickness conditions of the silicon epitaxial film under which a void defect region is formed near the interface between the silicon epitaxial film and the silicon substrate in the epitaxial wafer of the present invention. The region in which a void defect region is formed at the interface between the silicon epitaxial film and the silicon substrate after heat treatment is shown by the dashed line and the shaded area in the figure. In other words, the white area in the figure is the region in which no void defect region is formed in the silicon epitaxial film. This is because, in the relationship between the carbon concentration in the silicon epitaxial film and the film thickness, 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 ) can be set as a range that satisfies the above.

[0051] According to the SOI wafer of the present invention, a high resistivity substrate is not required, and the silicon epitaxial film containing a high density of minute carbon defects acts as a trap rich layer, so that the SOI wafer has a superior harmonic reduction capability to that of a conventional SOI wafer using a polysilicon layer as a trap rich layer, and is therefore suitable as a wafer for high frequency devices.

[0052] Next, a method for producing an SOI wafer according to the present invention will be described.

[0053] [First embodiment] An example of a method for manufacturing an SOI wafer according to a first embodiment of the present invention is shown in Fig. 2. This method is a method for manufacturing an SOI wafer that uses a silicon epitaxial film in which minute carbon defects are formed at a high density as a trap rich layer.

[0054] First, a method for manufacturing an epitaxial wafer of a first substrate that serves as a base wafer will be described.

[0055] (Step of Preparing a First Substrate) As the first substrate, a silicon substrate having a resistivity of 10 to 5000 Ω·cm is prepared.

[0056] (Step for growing silicon epitaxial film in vapor phase) Next, a carbon concentration of 2×10 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 A silicon epitaxial film of less than 100 nm is vapor-grown. Specifically, a gas containing silicon atoms and carbon atoms is supplied onto a silicon substrate under reduced pressure, and 2×10 19 atoms / cm 3 That's it, 3 x 10 20 atoms / cm 3 and the relationship between the thickness of the silicon epitaxial film and the carbon concentration is 6.6×10 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 A silicon epitaxial film (hereinafter, simply referred to as "epitaxial film") that fills the gap (a) of the silicon nitride film (b) is grown in a vapor phase.

[0057] By performing the vapor phase growth of the epitaxial film under reduced pressure, the concentration of impurities other than carbon doped in the epitaxial film can be reduced. The pressure for forming the epitaxial film is not particularly limited as long as it is reduced pressure, but it is preferable to perform the growth at about 10 Torr (about 1.3 kPa), for example, 5 Torr (about 0.67 kPa) to 20 Torr (about 2.7 kPa).

[0058] Carbon doping in vapor phase growth of an epitaxial film uses a gas (source gas) containing silicon atoms and carbon atoms, as described above. The source gas preferably contains at least one of monomethylsilane gas and trimethylsilane gas. By using these gases, good carbon doping can be easily performed on the silicon epitaxial film. In addition, the atmosphere for vapor phase growth may contain hydrogen, argon, or the like as a carrier gas when the source gas is supplied.

[0059] The epitaxial film can be formed better under reduced pressure by vapor-phase growth at, for example, 600 to 1000°C.

[0060] It is also preferable to appropriately set the pressure, temperature, time, and source gas concentration of the vapor phase growth so that the epitaxial film to be formed has a desired thickness. The thickness of the epitaxial film can be, for example, 0.1 μm to 2.5 μm, but is not limited to 6.6×10 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 The above relationship between the carbon concentration and the film thickness of the epitaxial film is not limited to this, so long as it satisfies the above-mentioned range. Void defects are not formed in the epitaxial film.

[0061] (Step of forming carbon defects) Thereafter, the epitaxial wafer having the epitaxial film is subjected to a heat treatment, whereby minute carbon defects can be formed in the epitaxial film at a high density.

[0062] The method of heat treatment after the formation of the epitaxial film is not particularly limited, and for example, a heat treatment furnace for general silicon wafers or a chamber used for vapor phase growth of the epitaxial film can be used.

[0063] The lower limit of the heat treatment temperature in the heat treatment is 900° C. or more, and the upper limit is 1100° C. or less. In this way, minute carbon defects can be formed at a high density using a general heat treatment furnace, and the effects of heavy metal diffusion can be suppressed, improving manufacturing efficiency.

[0064] The heat treatment time is set to 3 hours or more and 36 hours or less. By doing so, sufficiently small carbon defects are formed, improving the quality and resulting in an epitaxial wafer that is excellent from the viewpoint of manufacturing efficiency.

[0065] Here, the results of the investigation into the heat treatment time in the heat treatment will be explained in the following Experimental Example 2.

[0066] (Experimental Example 2) The heat treatment time required to form minute carbon defects at a high density was determined by the following experiment. To investigate the heat treatment time required for the manufacture of epitaxial wafers with excellent harmonic characteristics, the carbon concentration during film formation was set to 1.0×10 20 atoms / cm 3 The epitaxial wafer was subjected to a heat treatment in an oxygen atmosphere at 1000°C for a heat treatment time varying from 15 minutes to 12 hours. In order to investigate the high frequency characteristics of the epitaxial wafer, the second harmonic characteristics and the third harmonic characteristics were measured.

[0067] The high frequency characteristics of the SOI wafer are measured as follows. To measure harmonic characteristics [second harmonic characteristics (2HD) and third harmonic characteristics (3HD)], first remove the top silicon single crystal film, then form a co-planar waveguide (CPW) out of metal (e.g. aluminum) on the dielectric layer (e.g. oxide film), and ground probes to both ends of this metal electrode. Then, input a high-frequency signal from one of the electrodes, and measure the second and third harmonics output from the other side (e.g. input signal frequency: 1GHz, input power: 15dBm).

[0068] For the epitaxial wafers used in this experiment, aluminum electrodes with a line length of 2200 μm were formed on the silicon epitaxial film that had been heat-treated for the heat treatment time in the above range, and the second harmonic characteristics and third harmonic characteristics were measured. The measurement results are shown in Figure 6. As shown in Figure 6, when the input signal frequency of the samples that had been heat-treated for 3 hours or more was 1 GHz, the second harmonic characteristics were all around -50 dBm, and the third harmonic characteristics were all below -60 dBm.

[0069] This result shows that in order to manufacture epitaxial wafers that exhibit excellent harmonic characteristics by forming minute carbon defects at a high density, heat treatment at 1000°C must be performed for at least 3 hours. Therefore, the heat treatment time is set to 3 hours or more and 36 hours or less. The upper limit is set to 36 hours or less in consideration of productivity, since even if the treatment is performed for an excessively long period of time, there is no change in the effect of forming carbon defects. By doing so, sufficiently small carbon defects are formed, improving quality and resulting in an epitaxial wafer that is excellent in terms of manufacturing efficiency.

[0070] In view of the above, the epitaxial wafer is directly placed in a heat treatment furnace heated to about 1000°C and heat-treated for about 3 to 36 hours, whereby minute carbon defects are formed at a high density in the epitaxial film formed by vapor phase growth under reduced pressure. At this time, the type of gas used during the heat treatment is not particularly limited, and can be, for example, oxygen gas or an inert gas such as argon or nitrogen.

[0071] After the above heat treatment, it is not essential to form a dielectric layer on the epitaxial film, and it does not matter if a dielectric layer is not formed on the epitaxial film.

[0072] In this manner, an epitaxial wafer (base wafer) used for the trap rich layer in the SOI wafer of the first embodiment of the present invention can be manufactured. The epitaxial film in which minute carbon defects are formed at a high density functions as the trap rich layer.

[0073] Next, a method for manufacturing the second substrate in the method for manufacturing the SOI wafer according to the first embodiment will be described.

[0074] (Step of Preparing a Second Substrate) A silicon single crystal substrate is prepared as the second substrate. The resistivity of the second substrate can be, for example, a silicon single crystal substrate having a resistivity of about 10 Ω·cm, but is not limited to this. It can be appropriately determined within the range of 10 to 1000 Ω·cm depending on the device to be manufactured.

[0075] (Step of forming a dielectric layer) Next, a dielectric layer is formed on the surface of the second substrate. The material of the dielectric layer is not particularly limited, but for example, a silicon oxide film can be formed by thermal oxidation or pyrogenic oxidation. When an oxide film is formed as the dielectric layer, the oxide film can be formed on the entire substrate surface by thermal oxidation (oxidizing atmosphere, 1000°C, 1 to 12 hours). This second substrate becomes a bond wafer.

[0076] The order in which the first substrate and the second substrate are fabricated in Fig. 2 does not matter. Either may be performed first, or they may be performed in parallel.

[0077] (Step of bonding the epitaxial film formed on the first substrate and the dielectric layer of the second substrate) After preparing a first substrate, which is an epitaxial wafer produced by vapor phase growth and subsequent heat treatment as described above, and a second substrate, the epitaxial film of the first substrate and the dielectric layer of the second substrate are bonded together (joined) as shown in Figure 2.

[0078] After bonding, the silicon substrate of the second substrate can be thinned. This thinning can be achieved to a desired thickness depending on the application by polishing or etching the silicon substrate of the second substrate or by ion implantation delamination. The ion implantation delamination can be performed, for example, by injecting hydrogen ions or the like from the dielectric layer side of the silicon substrate before bonding as shown in FIG. 2 to form an ion implantation layer in the silicon substrate, and then by delaminating the substrate along the ion implantation layer by heat treatment or the like after bonding.

[0079] The SOI wafer can be manufactured by the method for manufacturing an SOI wafer according to the first embodiment of the present invention. The SOI wafer manufactured in this manner has a 2×10 19 atoms / cm 3 That's it, 3 x 10 20 atoms / cm 3The epitaxial film has a structure in which minute carbon defects are formed, which are obtained by heat-treating an epitaxial film containing carbon at a concentration of less than 100 nm, a dielectric layer, and a silicon single crystal film are laminated in this order.

[0080] The carbon concentration of the epitaxial film is 2×10 19 atoms / cm 3 If the carbon concentration in the epitaxial film is 3×10 or more, a sufficient amount of minute carbon defects are formed by the heat treatment, and the second and third harmonics can be significantly reduced compared to before the heat treatment. 20 atoms / cm 3 In the above cases, the quality of the epitaxial film deteriorates and the productivity also decreases.

[0081] The tiny carbon defects contained in the epitaxial film are approximately 10 nm or less in size and have a density of approximately 1×10 10 cm -2 The above is preferable (when the carbon concentration of the epitaxial film is lower than that of the present invention, carbon defects of about 25 nm or more are included at a low density).

[0082] According to the method for manufacturing an SOI wafer of the first embodiment of the present invention, an SOI wafer having a high density of minute carbon defects formed in the epitaxial film can be easily manufactured without using a high resistivity substrate. The manufactured SOI wafer has a superior harmonic reduction capability to an SOI wafer using a conventional polysilicon layer as a trap rich layer, because the epitaxial film functions as a trap rich layer to reliably reduce harmonics. As a result, the SOI wafer is suitable as a wafer for high frequency devices.

[0083] [Second embodiment] An example of a method for manufacturing an SOI wafer according to the second embodiment of the present invention is shown in Fig. 3. This method is a method for manufacturing an SOI wafer that uses a silicon epitaxial film in which minute carbon defects are formed at a high density as the trap rich layer described above.

[0084] (Step of Preparing a First Substrate) to (Step of Vapor-Developing a Silicon Epitaxial Film) First, a method for manufacturing an epitaxial wafer of a first substrate serving as a base wafer will be described. The steps from preparing the first substrate to growing a silicon epitaxial film by vapor phase growth are the same as the method for manufacturing an epitaxial wafer in the first embodiment shown in FIG.

[0085] (Step of forming carbon defects and oxide film) In the method for producing an SOI wafer according to the second embodiment, a first substrate on which a silicon epitaxial film has been formed is heat-treated in an oxidizing atmosphere at a temperature of 900° C. to 1100° C. for a time period of 3 hours to 36 hours, thereby forming carbon defects in the silicon epitaxial film and forming an oxide film on the silicon epitaxial film, as shown in FIG. 3. The heat treatment conditions in this case are as described in the first embodiment, and the heat treatment for forming carbon defects is performed in an oxidizing atmosphere, thereby simultaneously forming carbon defects in the silicon epitaxial film and forming an oxide film on the silicon epitaxial film.

[0086] The thickness of the oxide film is not particularly limited and can be adjusted according to the application, but can be set to 100 nm or more and 1 μm or less in consideration of productivity.

[0087] According to the above-described method for manufacturing an SOI wafer of the second embodiment, an epitaxial wafer (base wafer) that functions as a trap rich layer of an SOI wafer can also be manufactured.

[0088] In the second embodiment, an oxide film is formed on the surface of the epitaxial film on the first substrate. The formation of the oxide film and the heat treatment required to form a high density of minute carbon defects in the epitaxial film can be performed simultaneously in the same chamber, making it possible to reduce the number of processes required for manufacturing SOI wafers.

[0089] (Step of Preparing a Second Substrate) As in the first embodiment, a second substrate, which is a silicon single crystal substrate, is prepared. The second substrate, which is to be a bond wafer shown in FIG. 3, can be, for example, a silicon substrate having a resistivity of about 10 Ω·cm, but is not limited thereto. The resistivity can be appropriately determined within the range of 10 to 1000 Ω·cm depending on the device to be manufactured.

[0090] (Step of bonding an oxide film formed on an epitaxial film formed on a first substrate to a second substrate) In the second embodiment, since an oxide film is formed on the epitaxial film, the step of forming a dielectric layer on the surface of the second substrate as in the first embodiment is not performed, but the presence of the dielectric layer is not intended to be eliminated. As shown in Fig. 3, the oxide film formed on the epitaxial film formed on the first substrate and the second substrate are bonded (joined).

[0091] In this case, the second substrate is preferably a substrate obtained by cutting a single silicon single crystal substrate into a plurality of substrates and thinning the substrate before bonding the substrate to the first substrate, which is the base wafer. The method of thinning the substrate is not particularly limited, but thinning by polishing, ion implantation technology such as the Smart Cut method (registered trademark), and laser cutting technology can be used. However, from the viewpoint of manufacturing cost, it is more cost-effective to produce a plurality of thinned second substrates from a single silicon substrate before bonding to the first substrate than to thin the substrate to the same thickness after bonding.

[0092] The thickness of the thinned second substrate is not particularly limited and can be adjusted according to the application and thinning method. In this way, if a silicon substrate thinned to about 60 μm is cut out from one silicon substrate (775 μm thick) by laser cutting technology before bonding, at least 10 or more second substrates required for manufacturing SOI wafers can be produced, which is preferable because it has a significant advantage in terms of manufacturing costs. In this case, the second substrate becomes a bond wafer.

[0093] The second substrate can be further thinned after bonding, in which case it can be made to a desired thickness depending on the application by polishing, etching, or ion implantation delamination. The ion implantation delamination can be carried out, for example, by injecting hydrogen ions or the like into the side of the thinned silicon substrate that contacts the oxide film (dielectric layer) of the first substrate before bonding to form an ion implantation layer in the silicon substrate, and then peeling the substrate along the ion implantation layer by heat treatment or the like after bonding.

[0094] In the manufacturing process of the SOI wafer of the second embodiment, the order in which the first substrate and the second substrate in FIG. 3 are manufactured does not matter. Either may be performed first, or they may be performed in parallel. Furthermore, the order in which the thinning of the second substrate and the bonding are performed does not matter. It is possible to perform the thinning first and then the bonding, or to perform the bonding first and then the thinning.

[0095] The SOI wafer can be manufactured by the method for manufacturing an SOI wafer according to the second embodiment of the present invention. The SOI wafer manufactured in this manner has a 2×10 19 atoms / cm 3 That's it, 3 x 10 20 atoms / cm 3 The epitaxial film has a structure in which minute carbon defects are formed, which are obtained by heat-treating an epitaxial film containing carbon at a concentration of less than 100 nm, a dielectric layer, and a silicon single crystal film are laminated in this order.

[0096] The tiny carbon defects contained in the epitaxial film are approximately 10 nm or less in size and have a density of approximately 1×10 10 cm -2 The above is preferable (when the carbon concentration of the epitaxial film is lower than that of the present invention, carbon defects of about 25 nm or more are included at a low density).

[0097] According to the method for manufacturing an SOI wafer of the second embodiment of the present invention, an SOI wafer having a high density of minute carbon defects formed in the epitaxial film can be easily manufactured without using a high resistivity substrate. The manufactured SOI wafer has a superior harmonic reduction capability to an SOI wafer using a conventional polysilicon layer as a trap rich layer, because the epitaxial film functions as a trap rich layer to reliably reduce harmonics. As a result, the SOI wafer is suitable as a wafer for high frequency devices.

[0098] [Third embodiment] The SOI wafer according to the present invention can also be manufactured by the method described below.

[0099] First, a method for manufacturing an epitaxial wafer of a first substrate that is a base wafer will be described. The method for manufacturing a carbon-doped silicon epitaxial film (hereinafter, simply referred to as an "epitaxial film") on a first substrate shown in Fig. 4 is the same as the method for manufacturing an epitaxial wafer in the manufacturing method of the first embodiment shown in Fig. 2.

[0100] In the method for manufacturing an SOI wafer according to the third embodiment, a dielectric layer is formed on a first substrate on which an epitaxial film is formed, as shown in Fig. 4. At this time, an oxide film is formed as the dielectric layer.

[0101] As a method for forming an oxide film (dielectric layer), an oxidation method for the entire substrate surface by thermal oxidation or pyrogenic oxidation can be used (oxidizing atmosphere, 1000°C, 1 to 12 hours), but there is no particular limitation as long as the treatment is performed in an oxidizing atmosphere. The thickness of the oxide film (dielectric layer) is also not particularly limited and can be adjusted according to the application, but can be 100 nm or more and 1 μm or less in consideration of productivity.

[0102] The first substrate on which the oxide film (dielectric layer) is formed is heat-treated at a temperature of 900° C. to 1100° C. for a time period of 3 hours to 36 hours, thereby forming carbon defects in the silicon epitaxial film. The heat treatment conditions in this case are as described in the first embodiment.

[0103] However, if a sufficient amount of minute carbon defects are formed in the silicon epitaxial film by the oxidation process for forming the oxide film (dielectric layer), this can be used as it is as the first substrate (base wafer). If the formation of carbon defects is insufficient, minute carbon defects can be formed in the epitaxial film by additional heat treatment in an oxidizing atmosphere. Alternatively, if it is not necessary to further increase the thickness of the oxide film (dielectric layer), an inert gas can be used as the additional heat treatment atmosphere. The implementation of the additional heat treatment and the additional heat treatment conditions can be adjusted according to the situation and are not particularly limited.

[0104] According to the above-described method for manufacturing an SOI wafer of the third embodiment, an epitaxial wafer (base wafer) that functions as a trap rich layer of an SOI wafer can also be manufactured.

[0105] In the third embodiment, an oxide film (dielectric layer) is formed on the surface of the epitaxial film on the first substrate, which allows the formation of the oxide film (dielectric layer) and the heat treatment required to form a high density of minute carbon defects in the epitaxial film to be carried out stepwise in the same chamber, thereby making it possible to reduce the number of steps required for manufacturing the SOI wafer.

[0106] Next, a method for manufacturing the second substrate in the method for manufacturing the SOI wafer according to the third embodiment will be described.

[0107] The second substrate to be the bond wafer shown in Fig. 4 can be, for example, a silicon substrate having a resistivity of about 10 Ω·cm, but is not limited to this. It can be appropriately determined in the range of 10 to 1000 Ω·cm depending on the device to be manufactured.

[0108] In the third embodiment, the second substrate does not have a dielectric layer formed thereon, but it is not intended to exclude the presence of a dielectric layer.

[0109] After preparing the first substrate, which is an epitaxial wafer fabricated by vapor phase growth and the formation of an oxide film (dielectric layer) and the subsequent heat treatment as described above, and the second substrate, the oxide film (dielectric layer) formed on the first substrate is bonded to the second substrate as shown in Figure 4. In this way, an SOI wafer can be manufactured.

[0110] At this time, the second substrate can be thinned before and after bonding using the same method as in the second embodiment.

[0111] In the manufacturing process of the SOI wafer of the third embodiment, the order in which the first substrate and the second substrate in FIG. 4 are manufactured does not matter. Either may be performed first, or they may be performed in parallel. Furthermore, the order in which the thinning of the second substrate and the bonding are performed does not matter. It is possible to perform the thinning first and then the bonding, or to perform the bonding first and then the thinning.

[0112] The SOI wafer according to the present invention can be manufactured by the manufacturing method of the SOI wafer according to the third embodiment of the present invention. The SOI wafer manufactured in this manner has a 2×10 19 atoms / cm 3 That's it, 3 x 10 20 atoms / cm 3 The epitaxial film contains carbon at a concentration of less than 1000 nm, and is subjected to heat treatment to form an epitaxial film with a high density of tiny carbon defects. The epitaxial film is then layered with an oxide film (dielectric layer), and a single crystal silicon film in that order.

[0113] The tiny carbon defects contained in the epitaxial film are approximately 10 nm or less in size and have a density of approximately 1×10 10 cm -2The above is preferable (when the carbon concentration of the epitaxial film is lower than that of the present invention, carbon defects of about 25 nm or more are included at a low density).

[0114] According to the method for manufacturing an SOI wafer according to the third embodiment of the present invention, an SOI wafer having a high density of minute carbon defects formed in the epitaxial film can be easily manufactured without using a high resistivity substrate. The manufactured SOI wafer has a superior harmonic reduction capability to an SOI wafer using a conventional polysilicon layer as a trap rich layer, because the epitaxial film functions as a trap rich layer to reliably reduce harmonics. As a result, the SOI wafer is suitable as a wafer for high frequency devices.

[0115] [High frequency characteristics] The high frequency characteristics of SOI wafers are explained.

[0116] In the SOI wafer of the present invention, minute carbon defects are formed at a high density in the carbon-doped silicon epitaxial film on the silicon substrate by heat treatment, so that the trap density of the trap rich layer is increased compared to before the heat treatment, and as a result, the carrier capture ability is improved. Therefore, even if the silicon substrate does not have a high resistivity, it is possible to significantly reduce harmonics and obtain excellent harmonic characteristics compared to a conventional SOI wafer in which a polysilicon layer is formed as a trap rich layer on a high resistivity substrate.

[0117] In this way, the SOI wafer of the present invention can improve the second harmonic characteristics and the third harmonic characteristics, and is suitable as a wafer for high frequency devices. EXAMPLES

[0118] The present invention will be specifically described below with reference to examples, but the present invention is not limited thereto.

[0119] Example 1 According to FIG. 2, an epitaxial wafer was manufactured to serve as a first substrate (base wafer) functioning as a trap rich layer in the manufacturing method of an SOI wafer according to the first embodiment of the present invention.

[0120] Specifically, a carbon-doped silicon epitaxial film (carbon concentration: 2.0 × 10 ) was grown on a 300 mm diameter silicon substrate (P type, resistivity: 10 Ω cm) obtained by slicing a single crystal ingot produced by the Czochralski method in a low-pressure CVD apparatus, using monomethylsilane as the carbon source gas. 19 ~1.0×10 20 atoms / cm 3 In this carbon concentration range, if the film thickness is 0.1 to 1.1 μm, no void defects are formed. After film formation, the epitaxial wafer obtained was subjected to a heat treatment in a non-oxidizing atmosphere at 1000°C for 12 hours, forming a high density of minute carbon defects in the silicon epitaxial film. At this time, no oxide film is formed on the silicon epitaxial film.

[0121] The concentration of the carbon-doped silicon epitaxial film is (1) 2.0×10 19 atoms / cm 3 , (2) 3.0 × 10 19 atoms / cm 3 , (3) 6.0 × 10 19 atoms / cm 3 , (4) 1.0 × 10 20 atoms / cm 3 The four types were:

[0122] Next, SOI wafers were fabricated using the heat-treated epitaxial wafer. As the second substrate to serve as the bond wafer, a silicon wafer was prepared in which a 400-nm-thick oxide film was formed as a dielectric layer on the surface of a 300-mm-diameter silicon substrate (P-type, resistivity 10 Ω·cm).

[0123] The surface of the silicon epitaxial film formed on the first substrate, in which minute carbon defects were formed, was bonded to the oxide film surface (surface of the dielectric layer) of the second substrate, and the silicon substrate of the second substrate was polished to produce an SOI wafer in which 1 μm of the silicon single crystal film remained. This was the SOI wafer of Example 1.

[0124] In order to investigate the high frequency characteristics of the SOI wafer of Example 1, the second harmonic characteristics and the third harmonic characteristics of the SOI wafer of Example 1 were measured. After removing the silicon single crystal film on the second substrate side of the manufactured SOI wafer, an aluminum electrode with a line length of 2200 μm was formed on the dielectric layer exposed on the surface of the silicon epitaxial film [carbon concentration: (1) to (4), film thickness: 1 μm] in which minute carbon defects were formed at a high density, and the high frequency characteristics were measured.

[0125] The measurement results are shown in Figure 7. As shown in Figure 7, when the input signal frequency was 1 GHz, the second harmonic characteristics of the wafer were (1) -55.0 dBm, (2) -47.3 dBm, (3) -52.4 dBm, and (4) -59.5 dBm for the carbon concentrations of the silicon epitaxial film (1) to (4), respectively. In addition, the third harmonic characteristics were (1) -85.2 dBm, (2) -87.1 dBm, (3) -91.2 dBm, and (4) -84.1 dBm for the carbon concentrations of the silicon epitaxial film (1) to (4), respectively. This result shows that the epitaxial wafer of Example 1 can significantly reduce harmonics, and it was found to be excellent as a trap rich layer when applied to the first substrate (base wafer) of an SOI wafer.

[0126] Comparative Example 1 An SOI wafer was manufactured using a method similar to that of Example 1, except that no heat treatment was performed on the first substrate after the silicon epitaxial layer was formed. This was used as the SOI wafer of Comparative Example 1.

[0127] The second harmonic characteristics and the third harmonic characteristics of the SOI wafer of Comparative Example 1 were measured in the same manner as in Example 1, and the results are shown in FIG. As shown in FIG. 6, the second harmonic characteristics of the wafer were (1) -18.3 dBm, (2) -18.8 dBm, (3) -20.4 dBm, and (4) -19.9 dBm when the carbon concentrations of the silicon epitaxial film were (1) to (4), respectively. The third harmonic characteristics were (1) -43.4 dBm, (2) -41.2 dBm, (3) -41.4 dBm, and (4) -47.0 dBm. From these results, it was found that Comparative Example 1 was inferior to Example 1 in both the second harmonic characteristics and the third harmonic characteristics.

[0128] From the above results, the carbon concentration of the carbon-doped silicon epitaxial film was set to 2 × 10 19 atoms / cm 3 More than 3×10 20 atoms / cm 3 and the relationship between the thickness of the silicon epitaxial film and the carbon concentration is less than 6.6×10 20 ×exp{-1.6×[thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm 3 It has been found that when an epitaxial layer in which minute carbon defects are formed at a high density by heat-treating the silicon epitaxial film satisfying the above condition (1) above) is applied to a first substrate (base wafer) of an SOI wafer, the epitaxial layer is superior as a trap rich layer compared to an epitaxial layer that does not contain carbon defects being applied to the first substrate (base wafer) of an SOI wafer.

[0129] Comparative Example 2 Using a method similar to that for producing the epitaxial wafers of Example 1 and Comparative Example 1, epitaxial wafers different only in the carbon concentration contained in the silicon epitaxial film were produced. First, a carbon-doped silicon epitaxial film (carbon concentration: 3.0 × 10) was grown on a silicon substrate (P type, resistivity: 10 Ω cm) with a diameter of 300 mm obtained by slicing a single crystal ingot produced by the Czochralski method in a low-pressure CVD apparatus, using monomethylsilane as the carbon source gas. 20 ~1.0×10 21 atoms / cm 3 A first substrate (base wafer) of the SOI wafer in Comparative Example 2 was prepared by forming a carbon layer having a thickness of 1 μm or more. It was found that in this carbon concentration range, void defects were formed when the layer was 1 μm or more thick. For all of the base wafers, a sample was prepared in which a heat treatment was performed at 1000° C. for 12 hours in an oxygen atmosphere, and a sample was prepared in which no heat treatment was performed.

[0130] The concentration of the carbon-doped silicon epitaxial film is (1) 3.0×10 20 atoms / cm 3 , (2) 1.0 × 10 21 atoms / cm 3 , and there were two types.

[0131] Next, a silicon wafer was prepared as a second substrate (bond wafer) by forming a 400 nm thick oxide film as a dielectric layer on the surface of a 300 mm diameter silicon substrate (P type, resistivity 10 Ω·cm). The surface of the silicon epitaxial film in the base wafer was bonded to the oxide film surface (surface of the dielectric layer) of the bond wafer, and the silicon substrate on the bond wafer side was polished to obtain an SOI wafer with 1 μm of silicon single crystal film remaining. This was the SOI wafer of Comparative Example 2.

[0132] The second harmonic characteristics and the third harmonic characteristics of the SOI wafer of Comparative Example 2 were measured in the same manner as in Example 1, and the results are shown in FIG. As shown in FIG. 7, when the input signal frequency was 1 GHz, the second harmonic characteristics of the wafer (without heat treatment) were (1) -26.0 dBm and (2) -26.3 dBm for the carbon concentrations of the silicon epitaxial film (1) and (2), respectively, and the second harmonic characteristics (with heat treatment) were (1) -29.5 dBm and (2) -28.5 dBm. In addition, the third harmonic characteristics (without heat treatment) were (1) -64.0 dBm and (2) -65.7 dBm, and the third harmonic characteristics (with heat treatment) were (1) -49.7 dBm and (2) -64.2 dBm. As a result, the second harmonic characteristics and the third harmonic characteristics of Comparative Example 2 were inferior to those of Example 1.

[0133] Example 2 According to FIG. 3, an epitaxial wafer serving as a first substrate (base wafer) functioning as a trap rich layer was manufactured using the SOI wafer manufacturing method according to the second embodiment of the present invention.

[0134] Specifically, a carbon-doped silicon epitaxial film (carbon concentration: 2.0 × 10 ) was grown on a 300 mm diameter silicon substrate (P type, resistivity: 10 Ω cm) obtained by slicing an ingot produced by the Czochralski method in a low-pressure CVD apparatus, using monomethylsilane as the carbon source gas. 19 ~1.0×10 20 atoms / cm 3 In this carbon concentration range, if the film thickness is 0.1 to 1.1 μm, no void defects are formed. After film formation, the epitaxial wafer obtained is subjected to a heat treatment in an oxidizing atmosphere at 1000°C for 12 hours, forming a high density of minute carbon defects in the silicon epitaxial film. At this time, an oxide film is formed on the silicon epitaxial film.

[0135] The surface of the silicon epitaxial film formed on the first substrate, which had an oxide film on its surface and minute carbon defects formed thereon, was bonded to a silicon substrate (P type, resistivity 10 Ω·cm) of a second substrate having a diameter of 300 mm, and the silicon substrate of the second substrate was polished to produce an SOI wafer with 1 μm of silicon single crystal film remaining. This was the SOI wafer of Example 2.

[0136] The second harmonic characteristics and the third harmonic characteristics of the SOI wafer of Example 2 were measured by the same method as in Example 1. As a result, it was confirmed that the SOI wafer exhibited high frequency characteristics almost equivalent to those of Example 1. From the above, it was shown that it is possible to manufacture SOI wafers exhibiting equivalent high frequency characteristics regardless of whether they are the first form or the second form.

[0137] Example 3 4, an epitaxial wafer was manufactured as a first substrate (base wafer) that functions as a trap rich layer, using the SOI wafer manufacturing method according to the third embodiment of the present invention. A carbon-doped silicon epitaxial film (carbon concentration: 2.0×10) was formed on a silicon substrate (P type, resistivity: 10 Ω cm) with a diameter of 300 mm obtained by slicing an ingot manufactured by the Czochralski method using a low-pressure CVD apparatus, using monomethylsilane as a carbon source gas. 19 ~1.0×10 20 atoms / cm 3 In this carbon concentration range, if the film thickness is 0.1 to 1.1 μm, no void defects are formed. After the film formation, an oxide film, which is a dielectric layer, was formed to a thickness of 400 nm on the surface of the carbon-doped silicon epitaxial film by pyrogenic oxidation (1000° C. / 4 hours). The obtained epitaxial wafer was subjected to a heat treatment in a non-oxidizing atmosphere at 1000° C. for 8 hours to form minute carbon defects in the silicon epitaxial film. This was used as the base wafer in Example 3. In the third embodiment, it is necessary that an oxide film is formed on this silicon epitaxial film.

[0138] Next, an SOI wafer was produced using the base wafer. As a second substrate (bond wafer), a silicon substrate (775 μm thick, P-type, resistivity 10 Ω·cm) with a diameter of 300 mm was thinned by laser cutting to produce a bond wafer with a thickness of about 100 μm. Next, the dielectric layer on the surface of the silicon epitaxial film on the first substrate, in which minute carbon defects were formed, was bonded to the bond wafer to produce an SOI wafer. This was the SOI wafer of Example 3.

[0139] The second harmonic characteristics and the third harmonic characteristics of the SOI wafer of Example 3 were measured in the same manner as in Example 1. As a result, it was confirmed that the SOI wafer exhibited high frequency characteristics almost equivalent to those of Example 1. From the above, it was shown that it is possible to manufacture SOI wafers exhibiting equivalent high frequency characteristics regardless of whether they are the first embodiment, the second embodiment, or the third embodiment.

[0140] Moreover, in the third embodiment, the second substrates required for manufacturing five SOI wafers can be manufactured from one silicon substrate, which is an extremely significant advantage in terms of manufacturing costs.

[0141] As described above, according to the embodiments of the present invention, a high resistivity substrate is not used, and a silicon epitaxial film containing a high density of minute carbon defects acts as a trap rich layer, so that an SOI wafer having higher high frequency characteristics than a conventional SOI wafer using a polysilicon layer as a trap rich layer can be easily manufactured.

[0142] The present invention is not limited to the above-described embodiment. The above-described embodiment is merely an example, and anything that has the same configuration as the technical idea described in the claims of the present invention and exhibits similar effects is included in the technical scope of the present invention. [Explanation of symbols]

[0143] 1...SOI wafer, 2...silicon single crystal substrate, 3...silicon epitaxial film containing carbon defects; 4...dielectric layer; 5...Silicon single crystal substrate.

Claims

1. A silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less is provided with a carbon concentration of 2×10 １９ atoms / cm ３ Above 3 x 10 ２０ atoms / cm ３ The present invention relates to a silicon epitaxial film having a thickness of less than 100 nm and including carbon defects, a dielectric layer, and a silicon single crystal film, in this order; The thickness of the silicon epitaxial film is 6.6×10 ２０ × exp{−1.6 × [thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm ３ ) ).

2. 2. The SOI wafer according to claim 1, which is a wafer for use in a high frequency device.

3. The carbon defects have a size of 10 nm or less and a density of 1×10 １０ cm －２ 3. The SOI wafer according to claim 1 or 2, characterized in that:

4. preparing a first substrate which is a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less; A carbon concentration of 2×10 １９ atoms / cm ３ Above 3 x 10 ２０ atoms / cm ３ vapor depositing a silicon epitaxial film having a thickness of less than 100 nm; A step of forming carbon defects in the silicon epitaxial film by subjecting the first substrate having the silicon epitaxial film formed thereon to a heat treatment temperature of 900° C. to 1100° C. for a heat treatment time of 3 hours to 36 hours; Providing a second substrate, which is a silicon single crystal substrate; forming a dielectric layer on a surface of the second substrate; and bonding the epitaxial film formed on the first substrate to a dielectric layer of a second substrate; In the step of growing the silicon epitaxial film in a vapor phase, the thickness of the silicon epitaxial film is 6.6×10 ２０ × exp{−1.6 × [thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm ３ ) ) ) is formed.

5. preparing a first substrate which is a silicon single crystal substrate having a resistivity of 10 Ω cm or more and 5000 Ω cm or less; A carbon concentration of 2×10 １９ atoms / cm ３ Above 3 x 10 ２０ atoms / cm ３ vapor depositing a silicon epitaxial film having a thickness of less than 100 nm; a step of subjecting the first substrate on which the silicon epitaxial film has been formed to a heat treatment in an oxidizing atmosphere at a heat treatment temperature of 900° C. to 1100° C. for a heat treatment time of 3 hours to 36 hours, thereby forming carbon defects in the silicon epitaxial film and forming an oxide film on the silicon epitaxial film; Providing a second substrate, which is a silicon single crystal substrate; a step of bonding an oxide film formed on an epitaxial film formed on the first substrate to the second substrate; In the step of growing the silicon epitaxial film in a vapor phase, the thickness of the silicon epitaxial film is 6.6×10 ２０ × exp{−1.6 × [thickness of epitaxial film (μm)]}>[carbon concentration of epitaxial film (atoms / cm ３ ) ) ) is formed.

6. 6. The method for producing an SOI wafer according to claim 5, wherein the second substrate is a substrate obtained by cutting a single silicon single crystal substrate into a plurality of thin substrates before bonding the second substrate to the first substrate.

7. 6. A method for producing an SOI wafer, comprising the steps of: forming an SOI wafer produced by the method for producing an SOI wafer according to claim 4 or 5 into a wafer for use in a high frequency device.

8. The carbon defects are set to have a size of 10 nm or less and a density of 1×10 in the epitaxial film. １０ cm －２ 6. The method for producing an SOI wafer according to claim 4 or 5, characterized in that:

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