Multilayer ceramic electronic component

Abstract

To provide a multilayer ceramic electronic component having high reliability.SOLUTION: A multilayer ceramic electric component 1 includes: a laminate 2 formed by alternately stacking a plurality of dielectric layers 4 and a plurality of internal electrode layers 5 and having a pair of edge faces 8a, 8b facing each other; and a pair of external electrodes 3a, 3b respectively covering at least the pair of the edge faces 8a, 8b and being respectively connected to different internal electrode layers 5. The dielectric layer 4 includes a high-resistance dielectric layer 41, and a low-resistance dielectric layer 42. The internal electrode layer 5 contains a metal material. One of two internal electrode layers 5 sandwiching at least one low-resistance dielectric layer 42 has a hydroxide region 51h containing hydroxide of the metal material at a connection part with the external electrode 3a being one of the pair of the external electrodes 3a, 3b.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to multilayer ceramic electronic components. [Background technology]

[0002] In recent years, as electronic devices have become smaller and more functional, there has been a demand for smaller electronic components mounted in the electronic devices. For multilayer ceramic capacitors, which are one example of multilayer ceramic electronic components, there is a demand for them to be smaller and have larger capacitance.

[0003] A multilayer ceramic capacitor includes a laminate in which dielectric layers and internal electrodes are alternately laminated, and a pair of external electrodes formed to be electrically connected to the internal electrodes. The capacitance of a multilayer ceramic capacitor can be increased by reducing the thickness of the dielectric layers, but reducing the thickness of the dielectric layers makes it easier for short circuits to occur between the internal electrodes and easier for short circuits to occur between the external electrodes. Patent Document 1 discloses forming a gap between the internal electrode and the external electrode that may cause a short circuit between the external electrodes, and filling the formed gap with an insulator made of an organic resin or the like. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2005-210026 A Summary of the Invention [Problem to be solved by the invention]

[0005] In conventional multilayer ceramic capacitors, cracks may occur from voids or due to stress caused by the difference in thermal expansion coefficient between the internal electrodes and the insulator. Therefore, the above conventional techniques have room for improvement in terms of improving the reliability of multilayer ceramic capacitors. [Means for solving the problem]

[0006] The multilayer ceramic electronic component of the present disclosure includes a laminate including a plurality of dielectric layers and a plurality of internal electrode layers alternately laminated together, the laminate having a pair of end faces opposed to each other; a pair of external electrodes covering at least the pair of end faces, respectively, and connected to different internal electrode layers, the plurality of dielectric layers include a plurality of high-resistance dielectric layers and at least one low-resistance dielectric layer having an electrical resistance lower than that of the high-resistance dielectric layers; The multiple internal electrode layers contain a metal material, and one of the two internal electrode layers sandwiching the at least one low-resistance dielectric layer has a hydroxide region containing a hydroxide of the metal material at a connection portion with one of the pair of external electrodes. Effect of the Invention

[0007] According to the present disclosure, it is possible to improve the reliability of multilayer ceramic electronic components. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment of the present disclosure. [Diagram 2] 2 is a perspective view showing a laminate of the multilayer ceramic capacitor of FIG. 1. [Diagram 3] FIG. 2 is a cross-sectional view taken along the line III-III in FIG. [Figure 4] FIG. 4 is a cross-sectional view taken along the line IV-IV in FIG. [Diagram 5] FIG. 4 is a perspective view showing a process for producing a temporary laminate. [Figure 6] FIG. 2 is a perspective view showing a base laminate. [Figure 7] FIG. 2 is a perspective view showing a plurality of laminates obtained by cutting a base laminate. [Figure 8] FIG. 2 is a perspective view showing an unfired laminate. [Figure 9] 10A to 10C are cross-sectional views showing a step of forming a hydroxide region in one of the internal electrode layers sandwiching a low-resistance dielectric layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the multilayer ceramic electronic component of the present disclosure will be described with reference to the drawings. The drawings referred to below are schematic, and the dimensional ratios and the like shown in the drawings are not necessarily illustrated accurately. Hereinafter, a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component, will be described. However, the multilayer ceramic electronic component of the present disclosure is not limited to a multilayer ceramic capacitor, and may be a multilayer piezoelectric element, a multilayer thermistor element, a multilayer chip coil, a ceramic multilayer substrate, and the like. In this specification, an orthogonal coordinate system xyz is defined in some drawings for convenience. The x-axis direction is also referred to as the first direction or the length direction. The y-axis direction is also referred to as the second direction or the width direction. The z-axis direction is also referred to as the third direction, the height direction, or the stacking direction.

[0010] Fig. 1 is a perspective view showing a multilayer ceramic capacitor according to an embodiment of the present disclosure, Fig. 2 is a perspective view showing a laminate of the multilayer ceramic capacitor of Fig. 1, Fig. 3 is a cross-sectional view taken along the cutting line III-III in Fig. 1, and Fig. 4 is a cross-sectional view taken along the cutting line IV-IV in Fig. 3. In Fig. 2, for ease of illustration, the ends of the internal electrode layers exposed at the end faces of the laminate are shown hatched.

[0011] 1, the multilayer ceramic capacitor 1 of this embodiment includes a laminate 2 and a pair of external electrodes 3a, 3b. The pair of external electrodes 3a, 3b is a first external electrode 3a and a second external electrode 3b.

[0012] As shown in FIG. 2, the laminate 2 has a substantially rectangular parallelepiped shape. The laminate 2 has a pair of main surfaces 7a, 7b facing each other, a pair of end surfaces 8a, 8b facing each other, and a pair of side surfaces 9a, 9b facing each other. The pair of main surfaces 7a, 7b are the first surface 7a and the second surface 7b facing each other in the third direction (z-axis direction). The pair of end surfaces 8a, 8b are the first end surface 8a and the second end surface 8b facing each other in the first direction (x-axis direction). The pair of side surfaces 9a, 9b are the first side surface 9a and the second side surface 9b facing each other in the second direction (y-axis direction). The first surface 7a and the second surface 7b may be perpendicular to the third direction. The first end surface 8a and the second end surface 8b may be perpendicular to the first direction. The first side surface 9a and the second side surface 9b may be perpendicular to the second direction.

[0013] 3, the laminate 2 is configured by alternately stacking a plurality of dielectric layers 4 and a plurality of internal electrode layers 5. The plurality of dielectric layers 4 and the plurality of internal electrode layers 5 are stacked in the third direction (z-axis direction).

[0014] The dielectric layer 4 is made of an insulating material such as barium titanate (BaTiO 3 ), calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), barium zirconate (BaZrO 3 In the following, unless otherwise specified, the dielectric layer 4 is made of a ceramic material mainly composed of BaTiO 3 It is assumed that the ceramic material is composed of a ceramic material having a main component of the ceramic material. In this specification, the term "main component" refers to the component having the highest content in the material or member of interest. The content may be expressed, for example, in mol% or mass%.

[0015] The dielectric layer 4 may contain metal elements such as magnesium (Mg), manganese (Mn), vanadium (V), and rare earth elements such as yttrium (Y), dysprosium (Dy), holmium (Ho), terbium (Tb), ytterbium (Yb), etc. In this case, it is possible to improve the high temperature load life and temperature characteristics of the capacitance of the multilayer ceramic capacitor 1.

[0016] The thinner the dielectric layer 4, the greater the capacitance of the multilayer ceramic capacitor 1. The thickness of the dielectric layer 4 may be, for example, not less than about 0.1 μm and not more than about 10 μm.

[0017] The internal electrode layers 5 are composed of a metal material. The internal electrode layers 5 may be composed of metals such as nickel (Ni), copper (Cu), silver (Ag), tin (Sn), platinum (Pt), palladium (Pd), gold (Au), or alloys containing these metals.

[0018] The internal electrode layer 5 is exposed at a first end face 8a or a second end face 8b depending on the polarity. The end of the internal electrode layer 5 exposed at the first end face 8a is covered by one of the pair of external electrodes 3a, 3b (first external electrode 3a) and connected to the first external electrode 3a. The end of the internal electrode layer 5 exposed at the second end face 8b is covered by the other of the pair of external electrodes 3a, 3b (second external electrode 3b) and connected to the second external electrode 3b.

[0019] As long as the characteristics of the multilayer ceramic capacitor can be ensured, the thinner the internal electrode layers 5, the more the internal defects caused by the internal stress during firing of the laminate 2 or during voltage application can be suppressed, and the more the reliability of the multilayer ceramic capacitor 1 can be improved. The thickness of the internal electrode layers 5 may be, for example, about 1.5 μm or less.

[0020] The first external electrode 3a is located at least on the first end face 8a. The first external electrode 3a may be located from the first end face 8a to at least one of the first face 7a and the second face 7b. As shown in FIG. 1, the first external electrode 3a may be located from the first end face 8a to the first face 7a, the second face 7b, the first side face 9a, and the second side face 9b.

[0021] The second external electrode 3b is located at least on the second end face 8b. The second external electrode 3b may be located from the second end face 8b to at least one of the first face 7a and the second face 7b. As shown in FIG. 1, the second external electrode 3b may be located from the second end face 8b to the first face 7a, the second face 7b, the first side face 9a, and the second side face 9b.

[0022] The external electrodes 3a, 3b are composed of a single layer or multiple layers of conductive layers. As shown in FIG. 3, the external electrodes 3a, 3b may be composed of a first layer 31 and a second layer 32. The first layer 31 is also called an underlayer. The underlayer 31 is in contact with the surface of the laminate 2 and is connected to the end exposed at the end faces 8a, 8b of the internal electrode layer 5. The second layer 32 is also called an outer layer. The outer layer 32 covers the surface of the underlayer 31 opposite to the laminate 2 side. By forming the external electrodes 3a, 3b from multiple conductive layers, it is possible to increase the adhesion between the external electrodes 3a, 3b and the laminate 2 while increasing the wettability of a conductive bonding material such as solder to the external electrodes 3a, 3b. As a result, it is possible to improve the reliability of the multilayer ceramic capacitor 1 and the mounting structure including the multilayer ceramic capacitor 1.

[0023] The underlayer 31 may be configured to include a metal material. The underlayer 31 may be configured to include, for example, a metal such as Ni, Cu, Ag, Pd, or Au, or an alloy containing these metals. The underlayer 31 may be formed using a thin film formation technique such as a plating method, a sputtering method, or a vapor deposition method, or may be formed using a thick film formation technique such as a dipping method, a screen printing method, or a gravure printing method.

[0024] The outer layer 32 may be configured to include a metal material. The outer layer 32 may be configured to include, for example, a metal such as Ni, Cu, Au, Sn, or an alloy including these metals. The outer layer 32 may be formed using a thin film formation technique such as, for example, an electroless plating method or an electrolytic plating method. The outer layer 32 may be a single-layer plating layer or may be a multi-layer plating layer.

[0025] The multiple dielectric layers 4 include multiple high-resistance dielectric layers 41 and at least one low-resistance dielectric layer 42. The low-resistance dielectric layer 42 is a dielectric layer 4 having a lower electrical resistance than the high-resistance dielectric layer 41. The low-resistance dielectric layer 42 may be a dielectric layer 4 having a low-resistance portion 42a. The low-resistance portion 42a may be a portion where insulation deterioration occurs (i.e., a portion on the verge of a short circuit). Hereinafter, the low-resistance dielectric layer 42 is also simply referred to as a low-resistance layer.

[0026] When the dielectric layer 4 includes the low resistance layer 42, the first external electrode 3a and the second external electrode 3b are short-circuited through the low resistance layer 42 and the two internal electrode layers 5 sandwiching the low resistance layer 42, resulting in a short-circuit failure. The multilayer ceramic capacitor 1 is configured such that one of the two internal electrode layers 5 sandwiching the low resistance layer 42 in the stacking direction (z-axis direction) (the internal electrode layer 51 shown in FIG. 3) is not electrically connected to the external electrodes 3a and 3b. As shown in FIG. 3, the internal electrode layer 51 has a hydroxide region 51h containing a hydroxide of the metal material constituting the internal electrode layer 5 at a connection portion with one of the external electrodes 3a and 3b (the first external electrode 3a). As shown in FIG. 4, the hydroxide region 51h is located over the entire connection portion of the internal electrode layer 51 with the first external electrode 3a in the second direction (y-axis direction). The internal electrode layer 51 is connected to the first external electrode 3a, but is not electrically connected to the first external electrode 3a, and does not have the same potential as the first external electrode 3a. Therefore, the multilayer ceramic capacitor 1 can prevent a short circuit between the first external electrode 3a and the second external electrode 3b via the low resistance layer and the two internal electrode layers 5 that sandwich the low resistance layer .

[0027] In addition, when the internal electrode layer 5 is configured to contain Ni, the hydroxide region 51h is nickel hydroxide (Ni(OH)2 When the internal electrode layer 5 is configured to contain Cu, the hydroxide region 51h may be composed of copper hydroxide (Cu(OH) 2 The same applies when the internal electrode layer 5 is composed of Ag, Pd, Au, etc. The hydroxide region 51h may contain the ceramic material that composes the dielectric layer 4.

[0028] Multilayer ceramic capacitor 1 has a thermal expansion coefficient of Ni and Ni(OH) 2 Since the thermal expansion coefficient of Ni is close to that of Ni(OH), the internal electrode layer 51 is 2 Stress caused by the difference in thermal expansion coefficient between the internal electrode layer 5 and the hydroxide region 51h is unlikely to occur. The same is true when the internal electrode layer 5 contains Cu, Ag, Pd, Au, etc. Therefore, the multilayer ceramic capacitor 1 can suppress the occurrence of cracks, delamination (interlayer peeling), etc. in the vicinity of the hydroxide region 51h in the laminate 2.

[0029] The length L of the hydroxide region 51h in the first direction (x-axis direction) may be 0.1 μm or more. If the length L is less than 0.1 μm, the internal electrode layer 51 and the first external electrode 3a may be electrically connected, which may result in a short circuit between the first external electrode 3a and the second external electrode 3b. By setting the length L to 0.1 μm or more, it is possible to prevent the internal electrode layer 51 and the first external electrode 3a from being electrically connected. Furthermore, the length L of the hydroxide region 51h in the first direction may be 20 μm or less. If the length L exceeds 20 μm, even if the change in the thermal expansion coefficient of the internal electrode layer 51 (including the hydroxide region 51h) is small, a large stress is generated in the internal electrode layer 51, which may result in cracks, delamination, or the like occurring near the hydroxide region 51h in the laminate 2. By setting the length L to 20 μm or less, it is possible to prevent a large stress from being generated in the internal electrode layer 51.

[0030] The hydroxide region 51h has an elongated shape in the second direction (y-axis direction), and as shown in FIG. 4, the hydroxide region 51h exposed on the first end face 8a is generally strip-shaped. Hereinafter, the number of hydroxide regions 51h may be referred to as the number. The number of hydroxide regions 51h (the number of internal electrode layers 5 having hydroxide regions 51h) may be 5% or less of the number of the plurality of dielectric layers 4. In this case, the decrease in capacitance compared to the case where the low resistance layer 42 does not exist can be suppressed to about 10% or less. The number of the plurality of dielectric layers 4 refers to the number of dielectric layers 4 that are sandwiched between two internal electrode layers 5 that do not have hydroxide regions 51h and contribute to the formation of capacitance.

[0031] The internal electrode layer 51 includes metal particles made of a metal material such as Ni, Cu, Ag, Pd, or Au in a region different from the hydroxide region 51h, and the hydroxide region 51h includes hydroxide particles of the metal material. The hydroxide particles may have a particle size that is 80% or more and 120% or less of the particle size of the metal particles. In this case, the internal electrode layer 51 has a thermal expansion coefficient of Ni and Ni(OH) 2 As a result, it is possible to effectively prevent cracks, delamination, and the like from occurring in the vicinity of the hydroxide region 51h in the laminate 2.

[0032] Next, a method for manufacturing the multilayer ceramic capacitor 1 will be described. Fig. 5 is a perspective view showing a step of producing a temporary laminate, Fig. 6 is a perspective view showing a base laminate, Fig. 7 is a perspective view showing a plurality of main bodies obtained by cutting the base laminate, Fig. 8 is a perspective view showing an unfired main body, and Fig. 9 is a cross-sectional view showing a step of forming a hydroxide region in one of the internal electrode layers sandwiching a low-resistance dielectric layer.

[0033] First, BaTiO 3 , CaTiO 3 , SrTiO 3 The raw material powder is prepared by using a dielectric material such as magnesium carbonate (Mg 2 CO 3 ) powder, dysprosium oxide (Dy2 O 3 ) powder, manganese carbonate (MnCO 3 ) powder, glass powder, etc. may be added. The glass powder may be, for example, SiO 2 The raw material powder may be a -BaO-CaO glass powder. An organic vehicle is mixed with the prepared raw material powder to prepare a ceramic slurry. The organic vehicle used to prepare the ceramic slurry may be, for example, a butyral resin or other resin dissolved in a solvent made by mixing ethyl alcohol and toluene. The prepared ceramic slurry is used to form a ceramic green sheet (hereinafter also simply referred to as a green sheet) 13 that will become the dielectric layer 4 by a sheet forming method such as a doctor blade method or a die coater method. The green sheet 13 may have an average thickness of, for example, about 0.5 μm to 10 μm.

[0034] Next, a conductive paste is prepared by kneading a powder mainly composed of Ni and an organic vehicle as the material for the internal electrode layer 5. The organic vehicle used to prepare the conductive paste may be, for example, a resin such as ethyl cellulose dissolved in a solvent mixed with a dihydroterpineol-based solvent and butyl cellosolve. The dielectric material of the dielectric layer 4, a dispersant, etc. may be added to the powder mainly composed of Ni.

[0035] Next, an electrode pattern that will become the internal electrode layer 5 is printed on the main surface of the green sheet 13 using a conductive paste to produce a pattern sheet 14 (see FIG. 4). The electrode pattern can be printed using a printing method such as screen printing or gravure printing.

[0036] Next, as shown in FIG. 4, a predetermined number of pattern sheets 14 are laminated on the green sheets 13 that have been laminated in a predetermined number, and a predetermined number of green sheets 13 are further laminated to produce a provisional laminate. The green sheets 13 that have been laminated in a predetermined number become cover layers that protect both ends of the laminate 2 in the lamination direction. Next, the provisional laminate is pressed in the lamination direction to obtain a mother laminate 15 as shown in FIG. 5. The pressurization of the provisional laminate can be performed using, for example, a hydrostatic press. Next, the mother laminate 15 is cut along the virtual parting line 16 to produce a plurality of unfired laminates 2 as shown in FIG. 6. The mother laminate 15 can be cut using, for example, a press cutter, a dicing saw, or the like. FIG. 7 shows the unfired laminate 2. Since the unsintered laminate 2 has the same structure as the laminate 2 after sintering, in the following, the terms and reference symbols such as dielectric layer 4, internal electrode layer 5, main surfaces 7a, 7b, end faces 8a, 8b, and side surfaces 9a, 9b will also be used for the unsintered laminate 2.

[0037] Next, the laminate 2 of Fig. 7 is subjected to a degreasing treatment in an air atmosphere, an inert gas atmosphere, or a reducing atmosphere. The degreasing treatment may be performed under atmospheric pressure or under reduced pressure.

[0038] Next, the degreased laminate 2 is fired in a reducing atmosphere. The atmospheric gas is, for example, hydrogen (H 2 ) and nitrogen (N 2 The firing temperature may be, for example, about 1100 to 1300°C.

[0039] Next, the fired laminate 2 is 2 The reoxidation treatment is performed in an (oxygen) atmosphere. The temperature at which the reoxidation treatment is performed may be, for example, about 800 to 1000° C. By performing the reoxidation treatment, deterioration of the insulation and reduction in the capacitance of the multilayer ceramic capacitor 1 can be suppressed.

[0040] Next, the laminate 2 after the reoxidation treatment is subjected to barrel polishing treatment to fully expose the internal electrode layers 5 on the end faces 8a, 8b, and burrs of the laminate 2 are removed to obtain the laminate 2 as shown in Fig. 2. External electrodes 3a, 3b are formed on the obtained laminate to produce a multilayer ceramic capacitor with an appearance as shown in Fig. 1.

[0041] Next, the presence or absence of the low resistance layer 42 is determined by measuring the electrical resistance between the first external electrode 3a and the second external electrode 3b. The electrical resistance value that is the criterion for determining whether or not the low resistance layer 42 is present may be set appropriately according to the specifications of the multilayer ceramic capacitor 1. Multilayer ceramic capacitors that are determined not to have the low resistance layer 42 may be sent for inspection (HALT, thermal shock test, etc.) that is normally performed before shipping. For multilayer ceramic capacitors that are determined to have the low resistance layer 42, a hydroxide region 51h is formed as follows.

[0042] First, the first external electrode 3a is removed. The first external electrode 3a can be removed by, for example, a mechanical processing method such as grinding or polishing, a laser processing method such as laser trimming, or a chemical processing method using a plating remover such as sodium hydroxide. The first external electrode 3a may be removed in its entirety, or only the portion located on the first end surface 8a may be removed.

[0043] Next, a hydroxylation treatment is performed on the end portion on the first end face 8a side of one of the two internal electrode layers 5 sandwiching the low-resistance layer 42 (the internal electrode layer 5 exposed at the first end face 8a). First, as shown in FIG. 9, the multilayer ceramic capacitor from which the first external electrode 3a has been removed is held by a holder 6, and the first end face 8a is immersed in an electrolytic solution 10. Then, a current is passed through the second external electrode 3b as the anode and the electrolytic solution 10 as the cathode to perform electrolysis. This shorts out the low-resistance layer 42, conducting the two internal electrode layers 5 sandwiching the low-resistance layer 42 together, and a hydroxylation reaction (Ni 2+ +2OH - →Ni(OH) 2) to form an internal electrode layer 51 having a hydroxide region 51h. The voltage applied between the anode (second external electrode 3b) and the cathode (electrolyte 10) may be, for example, about 0.4 V. The electrolytic solution 10 may be, for example, an aqueous solution of sodium hydroxide (NaOH). The length L (see FIG. 3) of the hydroxide region 51h can be controlled by controlling the current application time, applied voltage, etc.

[0044] After forming the internal electrode layer 51 having the hydroxide region 51h, the first external electrode 3a is again formed, thereby manufacturing the multilayer ceramic capacitor 1. Note that a multilayer ceramic capacitor having a predetermined number or more of hydroxide regions 51h is likely to have a significantly reduced capacitance from the design value, so it may be determined to be defective before the first external electrode 3a is again formed. Note that, in the above, an example in which the first external electrode 3a is removed and the hydroxide region 51h is formed at the end of the internal electrode layer 5 exposed at the first end face 8a on the first end face 8a side has been described, but instead of removing the first external electrode 3a, the second external electrode 3b may be removed and the hydroxide region 51h may be formed at the end of the internal electrode layer 5 exposed at the second end face 8b on the second end face 8b side. EXAMPLES

[0045] Examples of the multilayer ceramic capacitor 1 will be described below, but the multilayer ceramic capacitor 1 of the present disclosure is not limited to the following examples.

[0046] [Table 1]

[0047] As examples, multilayer ceramic capacitors of samples No. 2 to No. 4, and No. 6 were fabricated, and as comparative examples, multilayer ceramic capacitors of samples No. 1, No. 5, and No. 7 were fabricated. Samples No. 1, No. 5, and No. 7 are outside the scope of the present disclosure. For each of samples No. 1 to No. 7, 100 samples (multilayer ceramic capacitors) were fabricated. The samples correspond to 1005-type multilayer ceramic capacitors, and have a length of 1.0±0.05 mm in the first direction and a length of 0.5±0.05 mm in the second and third directions. The number of dielectric layers 4 (dielectric layers 4 sandwiched between two internal electrode layers 5) of the samples was set to 200. In addition, the number of internal electrode layers 5 exposed to the first end face 8a and connected to the first external electrode 3a was set to 100, and the number of internal electrode layers 5 exposed to the second end face 8b and connected to the second external electrode 3b was set to 101. The sample was designed so that the capacitance would be 1 μF (1000 nF) when the number of hydroxide regions 51h was 0. The capacitance of each of Samples No. 1 to 7 was measured at a temperature of 25° C. using a thermostatic bath and an LCR meter. At this time, the frequency was set to 1.0 kHz, and the measurement voltage was set to 1 Vrms to measure the capacitance, and the average value of 100 samples was calculated.

[0048] In Table 1, "number of hydroxide regions" indicates the number of internal electrode layers 5 having hydroxide regions 51h among the internal electrode layers 5 exposed at the first end face 8a. "Ratio of hydroxide regions" indicates the ratio of the number of internal electrode layers 5 having hydroxide regions 51h to the number of internal electrode layers 5 exposed at the first end face 8a. "Length of hydroxide regions" indicates the length L of the hydroxide regions 51h in the first direction (x-axis direction). In addition, when two or more hydroxide regions 51h are present, "Length of hydroxide regions" indicates the average value of the length L of the hydroxide regions 51h in the first direction (x-axis direction). "Capacity" indicates the average value of the electrostatic capacitance of 100 samples (multilayer ceramic capacitors) for each of Samples No. 1 to 7. The "lifetime variation" indicates the m value when the failure time of 100 samples of each of Samples No. 1 to 7 was measured by HALT (Highly Accelerated Life Test) and a Weibull plot was created from the measurement results. The m value is also called the Weibull coefficient. The larger the m value, the smaller the variation in life and the higher the reliability of the product. The HALT test conditions were an environmental temperature of 170°C and an applied voltage (DC) of 45V. The "thermal shock resistance" indicates the number of samples for each of Samples No. 1 to 7 that were confirmed to have cracks by visual inspection after immersing 100 samples in a solder bath held at 305°C for 5 seconds and removing them from the solder bath. The visual inspection was performed by removing the first external electrode 3a and exposing the first end face 8a.

[0049] As shown in Table 1, samples Nos. 2 to 7 having the hydroxide region 51h have reduced lifetime variation compared to sample No. 1 not having the hydroxide region 51h. Samples Nos. 2 to 7 having the hydroxide region 51h have reduced capacity compared to sample No. 1 not having the hydroxide region 51h, but the capacity reduction is suppressed to about 10% or less when the ratio of the hydroxide region 51h is about 5% or less.

[0050] Moreover, the multilayer ceramic capacitors of the examples (samples Nos. 2 to 4 and 6) showed improved results in the thermal shock resistance test compared to the multilayer ceramic capacitors of the comparative examples (samples Nos. 5 and 7). This is believed to be because the length of the hydroxide region 51h was 20 μm or less, which prevented the internal electrode layer 51 from being subjected to large stress.

[0051] The multilayer ceramic electronic component of the present disclosure can be embodied in the following configurations (1) to (4).

[0052] (1) A laminate having a pair of end faces opposed to each other, the laminate being formed by alternately stacking a plurality of dielectric layers and a plurality of internal electrode layers; a pair of external electrodes covering at least the pair of end faces, respectively, and connected to different internal electrode layers, the plurality of dielectric layers include a plurality of high-resistance dielectric layers and at least one low-resistance dielectric layer having an electrical resistance lower than that of the high-resistance dielectric layers; the plurality of internal electrode layers contain a metal material, and one of the two internal electrode layers sandwiching the at least one low-resistance dielectric layer has a hydroxide region containing a hydroxide of the metal material at a connection portion with one of the pair of external electrodes.

[0053] (2) The multilayer ceramic electronic component according to (1) above, wherein the length of the hydroxide region in the direction perpendicular to the pair of end faces is 0.1 μm or more and 20 μm or less.

[0054] (3) The multilayer ceramic electronic component according to (1) or (2) above, wherein the number of the internal electrode layers having the hydroxide regions is less than 5% of the number of the plurality of dielectric layers.

[0055] (4) The internal electrode layer having the hydroxide region contains metal particles made of the metal material in a region different from the hydroxide region, The monolithic ceramic electronic component according to any one of the above (1) to (3), wherein the hydroxide has a particle size that is 80% or more and 120% or less of the particle size of the metal particles.

[0056] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to the above-described embodiments, and various modifications, improvements, etc. are possible without departing from the gist of the present disclosure. [Explanation of symbols]

[0057] 1. Multilayer ceramic electronic components (multilayer ceramic capacitors) 2. Laminate 3a 1st external electrode 3b 2nd external electrode 31 1st layer (base layer) 32 2nd layer (outer layer) 4 Dielectric Layer 41 Highly resistive dielectric layer 42 Low resistance dielectric layer (low resistance layer) 42a Low resistance point 5,51 Internal electrode layer 51h Hydroxide region 6 Holder 7a 1st page 7b 2nd side 8a 1st end face 8b 2nd end face 9a 1st side 9b Second side 10 Electrolyte 13 Ceramic green sheet (green sheet) 14 Pattern Sheet 15 Mother laminate 16 Virtual division line

Claims

1. a laminate formed by alternately laminating a plurality of dielectric layers and a plurality of internal electrode layers and having a pair of end faces facing each other; a pair of external electrodes covering at least the pair of end faces, respectively, and connected to different internal electrode layers, the plurality of dielectric layers include a plurality of high-resistance dielectric layers and at least one low-resistance dielectric layer having an electrical resistance lower than that of the high-resistance dielectric layers; the plurality of internal electrode layers contain a metal material, and one of the two internal electrode layers sandwiching the at least one low-resistance dielectric layer has a hydroxide region containing a hydroxide of the metal material at a connection portion with one of the pair of external electrodes.

2. 2. The multilayer ceramic electronic component according to claim 1, wherein the length of said hydroxide region in a direction perpendicular to said pair of end faces is 0.1 μm or more and 20 μm or less.

3. 3. The multilayer ceramic electronic component according to claim 1, wherein the number of said internal electrode layers having said hydroxide regions is less than 5% of the number of said plurality of dielectric layers.

4. the internal electrode layer having the hydroxide region includes metal particles made of the metal material in a region different from the hydroxide region, 3. The multilayer ceramic electronic component according to claim 1, wherein the hydroxide has a particle size which is 80% or more and 120% or less of the particle size of the metal particles.

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