Wide-band-gap diode and manufacturing method thereof
Patent Information
- Application Number
- JP2024077046
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-08-30
- Filing Date
- 2024-05-10
- Publication Date
- 2025-03-14
- Estimated Expiration
- 2044-05-10
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Figure 2025036072000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a wide bandgap diode, and more particularly to a wide bandgap diode whose active region has an axially symmetric graticule pattern. [Background technology]
[0002] Wide-bandgap diodes have the characteristics of wide-bandgap semiconductor materials and Schottky barriers. Wide-bandgap semiconductor materials such as silicon carbide, gallium nitride, aluminum gallium nitride, and zirconium nitride have high electron drift velocity, high electric field characteristics, and high temperature resistance. Schottky barriers are usually suitable for high frequency and high speed switching because of their fast switching speed and low forward voltage loss. Therefore, wide-bandgap diodes, which combine wide-bandgap semiconductors and Schottky barriers, perform better than other semiconductor materials at high power, high frequency, high temperature, and high pressure.
[0003] Currently, Junction Barrier Schottky (JBS) / Merged PiN Schottky (MPS) diodes using silicon carbide substrates are used in high power rectifier circuits with voltages from 1200V to 1700V, currents from 20A to 200A, and powers from 200W to 500W. The main performance indicators of JBS / MPS diodes are reverse breakdown voltage, forward current rating, and forward surge current. The ability to withstand forward surge current has been an issue that has been improved in this field for many years.
[0004] In existing technologies, plasma spreading layer (PSL), unbalance layout method (ULM), and enhanced packaging are mainly adopted to improve the heat dissipation speed and surge current resistance of wide bandgap diodes. However, plasma spreading layer and unbalance layout method may cause uneven ratio of Schottky contact and ohmic contact from inside to outside and poor spatial symmetry. Therefore, current spreading and heat conduction efficiency still need to be improved. In addition, packages for improving heat dissipation are expensive and not compatible with general packages.
[0005] In view of the above circumstances, the present invention provides a wide bandgap diode with an optimized plasma diffusion layer and unbalanced layout design, which increases current spreading and improves heat conduction efficiency, thereby improving the surge current resistance of the wide bandgap diode. Summary of the Invention
[0006] The object of the present invention is to provide a wide bandgap diode and a method for manufacturing the same. In the wide bandgap diode of the present invention, the active region is designed to have a graticule pattern. Therefore, when a plasma spreading layer (PSL) and an unbalance layout method (ULM) are adopted to improve the heat dissipation speed and surge current resistance of the wide bandgap diode, the ratio of Schottky contacts and ohmic contacts from the center to the outside of the active region changes more uniformly and continuously. In addition, since the graticule pattern is axially symmetric, the spatial symmetry of the active region is better.
[0007] In order to achieve the above object, the present invention provides a wide bandgap diode including a substrate, an epitaxial layer, an active area, a junction termination extension (JTE), an edge region, an oxide layer, a first metal layer, an insulating layer, a passivation layer, and a second metal layer. The substrate has a first surface and a second surface. The epitaxial layer is disposed on the first surface of the substrate. The active area is disposed on the epitaxial layer and has a plurality of doped regions and a plurality of undoped regions. The doped regions and the undoped regions form an axially symmetric graticule-like pattern. The junction termination extension surrounds the active area and is connected to the doped regions. The edge region is disposed on the epitaxial layer and surrounds the active area. The oxide layer is disposed on the epitaxial layer and etched to form an opening. The first metal layer is disposed in the opening, contacts the doped region, and functions as the anode of the wide bandgap diode. The insulating layer is disposed over the oxide layer and the first metal layer. The protective layer covers the insulating layer. The second metal layer is disposed on the second surface of the substrate and functions as the cathode of the wide bandgap diode.
[0008] In an embodiment of the present invention, the pattern of the graticule network is circular or hexagonal.
[0009] In an embodiment of the invention, the edge region includes a plurality of field limiting rings (FLRs) surrounding the active region and the junction termination extension region, the field limiting rings having equal spacing between each other, the doped region of the active region having a first doping concentration, the junction termination extension region having a second doping concentration, and the field limiting rings having a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
[0010] In an embodiment of the invention, the edge region includes a plurality of field confinement rings surrounding the active region and the junction termination extension region, the spacing between each of the field confinement rings increasing with distance from the active region, the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field confinement rings have a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
[0011] In an embodiment of the present invention, the active region includes at least one surge protection region without ion doping to improve the upper limit of the resistance of the wide bandgap diode to surge currents.
[0012] In an embodiment of the invention, the substrate is made of one of silicon carbide, gallium oxide, and zinc oxide.
[0013] In an embodiment of the present invention, the substrate and the epitaxial layer are doped N-type.
[0014] In an embodiment of the present invention, the material of the first metal layer is one of aluminum, titanium nitride, and titanium.
[0015] In an embodiment of the present invention, the material of the second metal layer is one of silver, nickel, and titanium.
[0016] The present invention discloses a method for manufacturing a wide band gap diode, the method comprising the steps of: forming an epitaxial layer on a first surface of a substrate; implanting a plurality of first ions into the epitaxial layer at intervals to form a plurality of first doped regions; defining a plurality of first undoped regions between the first doped regions; and forming an axially symmetric graticule-like pattern (Graticule-Like) between the first doped regions and the first undoped regions. implanting a plurality of second ions into the epitaxial layer at spaced intervals to form a junction termination extension region surrounding the active region and connected to the first doped region; implanting a plurality of third ions into the epitaxial layer at spaced intervals to form a plurality of second doped regions defining a plurality of second undoped regions between the second doped regions, the second doped regions and the second undoped regions forming an edge region surrounding the junction termination extension region and the active region; forming an oxide layer on the epitaxial layer by deposition; etching the oxide layer to form an opening; forming a first metal layer in the opening in contact with the first doped region and functioning as an anode of the wide band gap diode by deposition; forming an insulating layer on the oxide layer and the first metal layer by deposition; forming a protective layer covering the insulating layer; and forming a second metal layer on a second surface of the substrate to function as a cathode of the wide band gap diode.
[0017] In an embodiment of the present invention, the graticule pattern is formed in a circular or hexagonal shape.
[0018] In an embodiment of the invention, the edge region includes a plurality of field limitation rings (FLRs) surrounding the active region and the junction termination extension region, the field limitation rings being equally spaced from each other, the doped region of the active region having a first doping concentration, the junction termination extension region having a second doping concentration, and the field limitation rings having a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
[0019] In an embodiment of the invention, the edge region includes a plurality of field limitation rings surrounding the active region and the junction termination extension region, the spacing between the field limitation rings increasing with distance from the active region, the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field limitation rings have a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
[0020] In an embodiment of the present invention, the active region includes at least one surge protection region without ion doping to improve the upper limit of the resistance of the wide bandgap diode to surge currents.
[0021] Those skilled in the art can understand other objects of the present invention, as well as the technical means and embodiments of the present invention, by referring to the drawings and the embodiments described below. [Brief description of the drawings]
[0022] [Figure 1] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Diagram 2] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Diagram 3]FIG. 1 is a top view showing a wide band gap diode according to the present invention; [Figure 4] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Diagram 5] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Figure 6] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Figure 7] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Figure 8] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Figure 9] 1 is a cross-sectional view showing a manufacturing process of a wide band gap diode according to the present invention; [Figure 10] FIG. 1 is a top view showing a wide band gap diode according to the present invention; [Figure 11] Schematic diagram showing wide band gap diodes according to the present invention arranged on a wafer. [Figure 12] Schematic diagram showing wide band gap diodes according to the present invention arranged on a wafer. [Figure 13] FIG. 1 is a top view showing a wide band gap diode according to the present invention; [Figure 14] FIG. 1 is a top view showing a wide band gap diode according to the present invention; [Figure 15] FIG. 1 is a top view showing a wide band gap diode according to the present invention; [Figure 16] Flowchart of a method for manufacturing a wide band gap diode according to the present invention [Figure 17] Flowchart of a method for manufacturing a wide band gap diode according to the present invention DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] The contents of the present invention will be described below through examples. The examples of the present invention are examples of embodiments, and are not intended to limit the present invention to the environments, applications, or specific aspects described in the examples. Therefore, the explanation of the examples is for explaining the present invention, but does not limit the present invention. In the embodiments and drawings, components that are not directly related to the present invention are omitted and not shown. The dimensional relationship between the components in the drawings is for ease of understanding, and does not limit the actual dimensions.
[0024] 1 to 9 show a first embodiment of the present invention. The wide bandgap diode 1000 includes a substrate 1010, an epitaxial layer 1020, an active area 1030, a junction termination extension (JTE) 1023, an edge region 1050, an oxide layer 1060, a first metal layer 1070, an insulating layer 1080, a protective layer 1090, and a second metal layer 1100. The substrate 1010 has a first surface 1011 and a second surface 1013.
[0025] In the present invention, the active region 1030 of the wide bandgap diode 1000 is formed to have an axially symmetric graticule-like pattern by designing a mask pattern. The P-type doped region at the center (inner) of the active region 1030 is connected to the outer P-type doped region. When a surge current destroys the PN region, the electrical energy flows out through the P-type doped region. In addition, by adopting the graticule-like pattern, the ohmic ratio of the active region gradually decreases at a constant rate from the inside to the outside, and heat can be transferred outward. Therefore, the wide bandgap diode 1000 according to the present invention can improve the instantaneous dissipation and heat dissipation of the surge current.
[0026] 1 to 9 are cross-sectional views showing various stages in the manufacturing process of a wide bandgap diode 1000. In the manufacturing process of the wide bandgap diode 1000 according to the present invention, first, an epitaxial layer 1020 is formed on a first surface 1011 of a substrate 1010. Next, as shown in FIGS. 1 to 2, a plurality of first ions are implanted into the epitaxial layer 1020 at intervals to form a plurality of first doped regions 1021. A plurality of second ions are implanted into the epitaxial layer 1020 at intervals to form a junction termination extension region 1023. A plurality of third ions are implanted into the epitaxial layer 1020 at intervals to form a plurality of second doped regions 1025.
[0027] In this embodiment, the substrate 1010 and the epitaxial layer 1020 are doped N-type. The substrate 1010 is made of one of silicon carbide, gallium oxide, and zinc oxide. The first doped region 1021, the junction termination extension region 1023, and the second doped region 1025 are P-type doped regions formed by implanting P-type ions, which are positively charged ions such as boron ions, aluminum ions, gallium ions, and indium ions, by ion implantation.
[0028] 2 and 3. FIG. 3 is a top view showing the active region 1030, the junction termination extension region 1023, and the edge region 1050. A plurality of first undoped regions 1022 are defined between the first doped regions 1021. The first doped regions 1021 and the first undoped regions 1022 constitute the active region 1030. The first undoped regions 1022 are regions in which P-type ions are not implanted. In other words, the first undoped regions 1022 are portions of the epitaxial layer 1020 located in the active region 1030. The active region 1030 has an axially symmetric graticule pattern. In this embodiment, the graticule pattern is circular. The junction termination extension region 1023 is connected to the first doped regions 1021 and surrounds the active region 1030, which can enhance the insulation effect and improve the voltage resistance of the wide band gap diode 1000.
[0029] Similarly, as shown in Figures 2 and 3, a plurality of second undoped regions 1026 are defined between the second doped regions 1025. The second doped regions 1025 and the second undoped regions 1026 constitute an edge region 1050. The second undoped regions 1026 are regions into which P-type ions are not implanted. In other words, the second undoped regions 1026 are portions of the epitaxial layer 1020 located within the edge region 1050. The edge region 1050 surrounds the junction termination extension region 1023 and the active region 1030, thereby limiting the spread of the electric field, reducing the concentration of the electric field, and reducing the risk of voltage breakdown.
[0030] As shown in Figures 4 and 5, an oxide layer 1060 is formed by deposition on the epitaxial layer 1020, and the oxide layer 1060 is etched to form an opening 1610. As shown in Figure 6, a first metal layer 1070 is formed by deposition in the opening 1610, contacting the first doped region 1021 and serving as the anode of the wide band gap diode 1000. The material of the first metal layer 1070 is one of aluminum, titanium nitride, and titanium.
[0031] Next, as shown in Figures 7 and 8, an insulating layer 1080 is formed by evaporation on the oxide layer 1060 and the first metal layer 1070. A protective layer 1090 is formed to cover the insulating layer 1080. Finally, as shown in Figure 9, a second metal layer 1100 is formed on the second surface 1013 of the substrate 1010, which serves as the cathode of the wide band gap diode 1000. The material of the second metal layer 1100 is one of silver, nickel, and titanium.
[0032] FIG. 3 and FIG. 10 to FIG. 12 are diagrams showing a second embodiment of the present invention. The second embodiment is an extension of the first embodiment. FIG. 10 shows another embodiment of the graticule network pattern. Unlike the first embodiment in which the graticule network pattern was circular, the graticule network pattern in this embodiment is hexagonal. In detail, FIG. 11 and FIG. 12 are schematic diagrams showing hexagonal and circular graticule network patterns formed on a wafer, respectively. Due to the limitations of wafer dicing technology, when the graticule network pattern is circular, it is common to cut the wafer into multiple chips with the smallest circumscribing rectangle. When the graticule network pattern is a polygon, such as the hexagon shown in FIG. 10, it can be cut along the edge of the wafer by plasma cutting technology. More hexagonal graticule network patterns can be arranged on a wafer 2000 of the same size than circular graticule network patterns. Therefore, in this embodiment, the manufacturing cost of the wide band gap diode 1000 can be further reduced by using a hexagonal graticule network pattern.
[0033] 13 illustrates a third embodiment of the present invention. The third embodiment is an extension of the first and second embodiments. In this embodiment, an edge region 1050 includes a plurality of field limiting rings (FLR) 1051. The field limiting rings 1051 surround the active region 1030 and the junction termination extension region 1023. The spacing D1 between each field limiting ring 1051 is equal.
[0034] The first doped region 1021 of the active region 1030 has a first doping concentration. The junction termination extension region 1023 has a second doping concentration. The field confinement ring 1051 has a third doping concentration. The first doping concentration is the same as the second doping concentration. The first doping concentration is different from the third doping concentration. In other embodiments, the first doping concentration may be different from the second doping concentration, or the first doping concentration and the second doping concentration may be less than the third doping concentration.
[0035] In addition, in Fig. 13, an example will be described in which the graticule pattern is circular. In other embodiments, the design of this embodiment can be adopted even when the graticule pattern is hexagonal.
[0036] FIG. 14 shows a fourth embodiment of the present invention. The fourth embodiment is an extension of the first to third embodiments. Unlike the third embodiment in which the spacing D1 between the field-limiting rings 1051 is equal, in this embodiment, the spacing between each field-limiting ring 1051 increases with distance from the active region 1030. Specifically, as shown in FIG. 14, the spacing D2 between the two field-limiting rings closest to the active region 1030 is smaller than the spacing D3 between the two outer field-limiting rings. In this case, the wide bandgap diode with the graticule pattern of FIG. 14 has a higher resistance to surge current than the wide bandgap diode with the graticule pattern of FIG. 13.
[0037] In addition, in Fig. 14, an example will be described in which the graticule pattern is circular. In other embodiments, the design of this embodiment can be adopted even when the graticule pattern is hexagonal.
[0038] Also, in the above examples and figures, the number of field-limiting rings and the ratio of doped and undoped regions in the active region are for illustrative purposes only and are not intended to limit the present invention. In practice, the number of field-limiting rings and the ratio of doped and undoped regions in the active region can be adjusted according to the circuits or electronic components used in the wide bandgap diode.
[0039] 15 is a diagram showing a fifth embodiment of the present invention. The fifth embodiment is an extension of the third and fourth embodiments. In this embodiment, the active region 1030 includes at least one surge protection region 1031. The surge protection region 1031 is free of ion doping and can pass an increased surge current, thereby improving the upper limit of the resistance of the wide band gap diode 1000 to the surge current.
[0040] In the sixth embodiment of the present invention, Figures 16 and 17 are flow charts of a method for manufacturing a wide band gap diode according to the present invention. The method for manufacturing a wide band gap diode is suitable for manufacturing the wide band gap diode 1000 of the above embodiment. In the method for manufacturing a wide band gap diode, for example, a deposition device, an ion implantation device, a photolithography device, an etching device, a cleaning device, a sputtering device, a testing device, a packaging device, and other semiconductor devices are used, but are not limited thereto.
[0041] Beginning at Step 1602, an epitaxial layer is formed on a first surface of a substrate. At Step 1604, a plurality of first ions are implanted into the epitaxial layer at spaced intervals to form a plurality of first doped regions. At Step 1606, a plurality of second ions are implanted into the epitaxial layer at spaced intervals to form a junction termination extension region. At Step 1608, a plurality of third ions are implanted into the epitaxial layer at spaced intervals to form a plurality of second doped regions.
[0042] Next, in Step 1702, an oxide layer is formed by deposition on the epitaxial layer. In Step 1704, the oxide layer is etched to form an opening. In Step 1706, a first metal layer is formed by deposition in the opening. In Step 1708, an insulating layer is formed by deposition on the oxide layer and the first metal layer. In Step 1710, a protective layer is formed over the insulating layer. In Step 1712, a second metal layer is formed on a second surface of the substrate.
[0043] In the embodiment of the present invention, the graticule pattern is formed in a circular or hexagonal shape.
[0044] In another embodiment, the edge region includes a plurality of field confinement rings. The field confinement rings surround the active region and the junction termination extension region. The field confinement rings are formed with equal spacing between each of the field confinement rings. The doped regions of the active region have a first doping concentration. The junction termination extension region has a second doping concentration. The field confinement rings have a third doping concentration. The first doping concentration is the same as the second doping concentration. The first doping concentration is different from the third doping concentration.
[0045] In another embodiment, the edge region includes a plurality of field limitation rings. The field limitation rings surround the active region and the junction termination extension region. The spacing between each field limitation ring increases with distance from the active region. The doped regions of the active region have a first doping concentration. The junction termination extension region has a second doping concentration. The field limitation rings have a third doping concentration. The first doping concentration is the same as the second doping concentration. The first doping concentration is different from the third doping concentration.
[0046] In another embodiment, the active area includes at least one surge protection region that is free of ion doping and that can improve the upper limit of the surge current resistance of the wide bandgap diode.
[0047] In addition to the above steps, the method for manufacturing a wide band gap diode in this embodiment can perform the steps described in the previous embodiment to achieve the same functions. Based on the above embodiment, those skilled in the art can easily understand how to perform these steps and functions, so the description is omitted.
[0048] The above examples are for explaining the embodiments of the present invention and for explaining the characteristic configuration of the present invention. The present invention is not limited to the above examples. Modifications or equivalent arrangements that can be easily made by those skilled in the art are also within the scope of the present invention. The scope of protection of the rights of the present invention is based on the claims. [Explanation of symbols]
[0049] 1000 Wide Bandgap Diodes 1010 Board 1011 1st surface 1013 Second surface 1020 Epitaxial layer 1021 First doped region 1022 First undoped region 1023 Junction termination extension region 1025 Second doped region 1026 Second Undoped Region 1030 active area 1031 Surge Protection Area 1050 Edge Area 1051 Field Limit Ring 1060 Oxide layer 1070 1st metal layer 1080 Insulation layer 1090 protective layer 1100 2nd metal layer 2000 wafers D1 Interval D2 interval S1602~S1608 Step S1702~S1712 Step
Claims
1. A wide band gap diode, a substrate having a first surface and a second surface; an epitaxial layer disposed on the first surface of the substrate; an active region disposed in the epitaxial layer and having a plurality of doped regions and a plurality of undoped regions that form an axially symmetric graticule-like pattern; a junction termination extension (JTE) surrounding the active region and connected to the doped region; an edge region disposed in the epitaxial layer and surrounding the active region; an oxide layer disposed on the epitaxial layer and etched to form an opening; a first metal layer disposed in the opening, in contact with the doped region, and functioning as an anode of the wide bandgap diode; an insulating layer (SiN) disposed on the oxide layer and the first metal layer; a protective layer (polyimide) covering the insulating layer; a second metal layer disposed on the second surface of the substrate and functioning as a cathode of the wide bandgap diode.
2. The wide band gap diode of claim 1 , wherein the graticule pattern is circular or hexagonal.
3. 2. The wide bandgap diode of claim 1, wherein the edge region includes a plurality of field limiting rings (FLRs) surrounding the active region and the junction termination extension region, the field limiting rings being equally spaced from each other.
4. 4. The wide bandgap diode of claim 3, wherein the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field confinement ring has a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
5. 2. The wide bandgap diode of claim 1, wherein the edge region includes a plurality of field limiting rings surrounding the active region and the junction termination extension region, the spacing between each of the field limiting rings increasing with distance from the active region.
6. 6. The wide bandgap diode of claim 5, wherein the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field confinement ring has a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
7. 2. The wide bandgap diode of claim 1, wherein the active region includes at least one surge protection region free of ion doping to improve the upper limit of the wide bandgap diode's ability to withstand surge currents.
8. 2. The wide bandgap diode of claim 1, wherein the substrate is made of one of silicon carbide, gallium oxide, and zinc oxide.
9. 2. The wide bandgap diode of claim 1, wherein said substrate and said epitaxial layer are doped N-type.
10. 2. The wide band gap diode of claim 1, wherein the material of the first metal layer is one of aluminum, titanium nitride, and titanium.
11. 2. The wide band gap diode of claim 1, wherein the material of the second metal layer is one of silver, nickel, and titanium.
12. A method for manufacturing a wide band gap diode, comprising the steps of: forming an epitaxial layer on a first surface of a substrate; implanting a plurality of first ions into the epitaxial layer at intervals to form a plurality of first doped regions, defining a plurality of first undoped regions between the first doped regions, and forming an active region having an axially symmetric graticule-like pattern in the first doped regions and the first undoped regions; implanting a plurality of second ions into the epitaxial layer at spaced intervals to form a junction termination extension region surrounding the active region and connected to the first doped region; implanting a plurality of third ions into the epitaxial layer at spaced intervals to form a plurality of second doped regions and define a plurality of second undoped regions between the second doped regions, the second doped regions and the second undoped regions constituting the junction termination extension region and an edge region surrounding the active region; forming an oxide layer on the epitaxial layer by deposition; Etching the oxide layer to form an opening; depositing a first metal layer in the opening, the first metal layer contacting the first doped region and functioning as an anode of the wide band gap diode; forming an insulating layer (SiN) on the oxide layer and the first metal layer by deposition; forming a protective layer (polyimide) covering the insulating layer; forming a second metal layer on a second surface of the substrate, the second metal layer functioning as a cathode of the wide bandgap diode.
13. 13. The method for manufacturing a wide bandgap diode according to claim 12, wherein the graticule pattern is a circle or a hexagon.
14. 13. The method of claim 12, wherein the edge region includes a plurality of field limitation rings (FLRs) surrounding the active region and the junction termination extension region, the field limitation rings being equally spaced apart from each other.
15. 15. The method of claim 14, wherein the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field confinement ring has a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
16. 13. The method of claim 12, wherein the edge region includes a plurality of field limiting rings surrounding the active region and the junction termination extension region, the spacing between each of the field limiting rings increasing with distance from the active region.
17. 17. The method of claim 16, wherein the doped region of the active region has a first doping concentration, the junction termination extension region has a second doping concentration, and the field confinement ring has a third doping concentration, the first doping concentration being the same as the second doping concentration and the first doping concentration being different from the third doping concentration.
18. 13. The method of claim 12, wherein the active region includes at least one surge protection region without ion doping to improve the upper limit of the surge current resistance of the wide band gap diode.
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