Printed circuit board
By forming a post and resist layer with protrusions around the pads on printed circuit boards, the solution addresses short circuit defects in bump bonding structures, improving assembly reliability.
Patent Information
- Application Number
- JP2024090707
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-09-07
- Filing Date
- 2024-06-04
- Publication Date
- 2025-03-19
AI Technical Summary
Bump bonding structures on printed circuit boards often lead to short circuit defects due to issues such as abnormal solder ball volumes or shapes, and misalignment between the die and substrate.
Forming a post around the outermost pad of the substrate for bump bonding, covering it with a resist layer, and creating a protrusion that acts as a dam around the opening exposing the pad, thereby preventing solder bumps from coming into contact with each other.
This solution effectively reduces short circuit defects in bump junction structures by preventing solder bumps from connecting improperly, thereby enhancing the reliability of die assembly on printed circuit boards.
Smart Images

Figure 2025038861000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to printed circuit boards. [Background technology]
[0002] Typically, a bump bonding structure is used to bond a die to a substrate. For example, the die and the substrate can be connected by contacting pads formed on the die with microballs attached to the top of the substrate. However, this bump bonding structure can cause defects in die assembly if the volume of the solder balls is not properly adjusted, if the solder balls have an abnormal shape, or if there is an abnormality in the alignment of the die and the substrate. For example, adjacent solder balls can come into contact with each other, causing short-circuiting defects. Summary of the Invention [Problem to be solved by the invention]
[0003] One of the various objectives of the present disclosure is to provide a printed circuit board capable of improving short-circuit defects in a bump bonding structure. [Means for solving the problem]
[0004] One of the various solutions proposed throughout this disclosure is to form posts around the outermost pads of the substrate for bump bonding, cover them with a resist layer, and form protrusions around the openings exposing the pads that can act as dams.
[0005] For example, a printed circuit board according to one example may include an insulating layer, a wiring layer arranged on the outermost side of the insulating layer and including a first pad and a first pattern, a first post arranged on the first pattern, and a resist layer arranged on the insulating layer and covering the wiring layer and the first post, wherein the resist layer has a first protrusion in an area covering the first post and has a first opening exposing the first pad from the resist layer.
[0006] For example, a printed circuit board according to one example may include an insulating layer, a metal pad arranged on an upper side of the insulating layer, a metal post arranged on the upper side of the insulating layer, arranged around the metal pad, and having an upper surface located higher than an upper surface of the metal pad, and a resist layer arranged on the upper surface of the insulating layer and covering the metal pad and the metal post, wherein the resist layer has an upper surface protruding from the area covering the metal post and has an opening exposing the metal pad from the resist layer. Effect of the Invention
[0007] One of the various effects of the present disclosure is that it is possible to provide a printed circuit board capable of improving short-circuit defects in a bump bonding structure. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4] FIG. 4 is a plan view showing a schematic top view of the printed circuit board of FIG. [Diagram 5] 4 is a process diagram illustrating an example of a method for manufacturing the printed circuit board shown in FIG. 3. [Figure 6] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 7] FIG. 7 is a plan view showing a schematic top view of the printed circuit board of FIG. 6. [Figure 8] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 9] FIG. 9 is a plan view showing a schematic top view of the printed circuit board of FIG. 8. [Figure 10] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 11] FIG. 11 is a plan view showing a schematic top view of the printed circuit board of FIG. [Figure 12] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 13] FIG. 13 is a plan view showing a schematic top view of the printed circuit board of FIG. 12. [Figure 14] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 15] FIG. 15 is a plan view showing a schematic top view of the printed circuit board of FIG. 14. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] Hereinafter, the present disclosure will be described with reference to the accompanying drawings. The shapes and sizes of elements in the drawings may be scaled (or highlighted or simplified) for a clearer description.
[0010] [Electronic equipment] FIG. 1 is a block diagram illustrating an example of an electronic device system.
[0011] Referring to the drawing, an electronic device 1000 houses a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also coupled to other electronic components described below to form various signal lines 1090.
[0012] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). In addition, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.
[0013] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (such as the IEEE 802.11 family), WiMAX (such as the IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, and may include any of numerous other wireless or wired standards and protocols. The network-related components 1030 may also be combined with the chip-related components 1020 together.
[0014] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may include passive elements in the form of chip components used for various other applications. In addition, the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.
[0015] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically connected to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. Other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. In addition, other electronic components used for various purposes may be included depending on the type of electronic device 1000.
[0016] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.
[0017] FIG. 2 is a perspective view that illustrates an example of an electronic device.
[0018] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components, such as a camera module 1130 and / or a speaker 1140, which may or may not be physically and / or electrically connected to the motherboard 1110, are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are mounted on a surface. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built in. Meanwhile, the electronic device is not necessarily limited to the smartphone 1100, but may be other electronic devices as described above.
[0019] [Printed circuit board] FIG. 3 is a cross-sectional view that shows a schematic example of a printed circuit board, and FIG. 4 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0020] Referring to the drawing, the printed circuit board 100A according to an example may include an insulating layer 110, a wiring layer 120 including first and second pads 121, 122 and a first pattern 123 disposed at the outermost side of the insulating layer 110 and spaced apart from each other, first and second posts 131, 132 disposed at a distance from each other on the first pattern 123, and a resist layer 140 disposed on the insulating layer 110, having first and second openings h1, h2 exposing the first and second pads 121, 122, respectively, and having first and second protrusions 141, 142 in areas covering the first and second posts 131, 132, respectively. The first and second posts 131, 132 may be disposed to surround the periphery of the first and second pads 121, 122, respectively, and the first and second protrusions 141, 142 may be disposed to surround the first and second openings h1, h2, respectively. First and second surface treatment layers P1 and P2 may be disposed on the exposed surfaces of the first and second pads 121 and 122, respectively, and first and second solder bumps 151 and 152 may be disposed on the resist layer 140, filling the first and second openings h1 and h2, respectively, and connected to the first and second surface treatment layers P1 and P2.
[0021] In this way, the printed circuit board 100A according to an example may have a bump bonding structure on which electronic components such as dies can be mounted. In this case, the first and second posts 131 and 132 may be disposed around the first and second pads 121 and 122 at a higher level than the first and second pads 121 and 122. For example, the upper surfaces of the first and second posts 131 and 132 may be disposed higher than the upper surfaces of the first and second pads 121 and 122. Therefore, the first and second protrusions 141 and 142 having a dam shape may be disposed around the first and second openings h1 and h2. For example, the first and second posts 131 and 132 may surround the first and second pads 121 and 122 in a ring shape, and as a result, the first and second protrusions 141 and 142 may also surround the first and second openings h1 and h2 in a ring shape. Therefore, during a bump bonding process in which electronic components such as dies are attached to the first and second solder bumps 151 and 152, the first and second solder bumps 151 and 152 are connected to each other, and thus it is possible to effectively prevent a short circuit from occurring.
[0022] Meanwhile, the printed circuit board 100A according to an example may further include a wiring structure 180, if necessary, and the insulating layer 110 may be the uppermost insulating layer of the wiring structure 180. For example, the wiring structure 180 may be a multi-layer substrate including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers. Therefore, the printed circuit board 100A according to an example may also be a multi-layer package substrate. The wiring structure 180 may be a core-type substrate or a coreless-type substrate. The wiring structure 180 may be an organic substrate, but may also be a silicon or ceramic substrate if necessary.
[0023] The components of the printed circuit board 100A according to an example will be described in more detail below with reference to the drawings.
[0024] The insulating layer 110 may include an insulating material. The insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the insulating material may be a non-photosensitive insulating material such as ABF (Ajinomoto Build-up Film) or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used.
[0025] The wiring layer 120 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the wiring layer 120 may include copper (Cu), but is not limited thereto. The wiring layer 120 may perform various functions according to the design. For example, the wiring layer 120 may include a signal pattern, a power pattern, a ground pattern, and the like. Each of these patterns may have various forms, such as a line, a plane, and a pad. For example, the first and second pads 121 and 122 may be signal patterns in a pad form, and the first pattern 123 may be a ground pattern in a plane form, but is not limited thereto. The wiring layer 120 may include a seed layer m and a plating layer M formed on the seed layer. The seed layer m may be an electroless plating layer (or chemical copper) and / or a sputtering layer, and the plating layer M may be an electrolytic plating layer (or electrolytic copper), but is not limited thereto. The wiring layer 120 may protrude upward with respect to the upper surface of the insulating layer 110. For example, the wiring layer 120 may be a protruding pattern.
[0026] The first and second posts 131, 132 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material may include, but is not limited to, copper (Cu). The first and second posts 131, 132 may include, but is not limited to, an electrolytic plating layer (or electrolytic copper).
[0027] The resist layer 140 may include, but is not limited to, a liquid type solder resist. The resist layer 140 may have first and second openings h1 and h2, which may be formed of solder mask defined (SMD) and / or non-solder mask defined (NSMD). The upper surface of the resist layer 140 may protrude at first and second protrusions 141 and 142.
[0028] The first and second surface treatment layers P1, P2 are not particularly limited as long as they are known in the art, and may be formed by, for example, electrolytic gold plating, electroless gold plating, OSP (Organic Solderability Preservative) or electroless tin plating, electroless silver plating, electroless nickel plating / substitution gold plating, DIG (Direct Immersion Gold) plating, HASL (Hot Air Solder Leveling), etc., but are not limited thereto.
[0029] The first and second solder bumps 151 and 152 may be formed of a low melting point metal, for example, solder such as tin (Sn)-aluminum (Al)-copper (Cu), but this is merely an example and the material is not particularly limited thereto.
[0030] FIG. 5 is a process diagram that illustrates an example of a method for manufacturing the printed circuit board of FIG.
[0031] Referring to the drawing, first, a wiring layer 120 including a first pad 121 and a first pattern 123 is formed on an insulating layer 110 by a circuit forming method, for example, SAP (Semi Additive Process), MSAP (Modified Semi Additive Process), ETS (Embedded Trace Substrate), etc. Next, a resist film 210 is formed on the insulating layer 110 to cover the wiring layer 120, and an opening pattern 211 is formed in the resist film 210 by an exposure and development process to expose the first pattern 123 in a form surrounding the first pad 121. Next, the opening pattern 211 is filled with plating to form a first post 131 on the first pattern 123. Next, a resist layer 140 is formed on the insulating layer 110 to cover the first pad 121, the first pattern 123, and the first post 131. The resist layer 140 can be formed by applying a liquid material. Next, a first opening h1 is formed in the resist layer 140 by an exposure and development process to expose the first pad 121. Also, a surface treatment layer is formed on the surface of the first pad 121 exposed through the first opening h1. Meanwhile, the second pad 122, the second post 132, the second opening h2, the second surface treatment layer P2, etc. can be formed in substantially the same manner as the manufacturing method of the first pad 121, the first post 131, the first opening h1, the first surface treatment layer P1, etc. described above. Meanwhile, the wiring structure 180 and the first and second solder bumps 151, 152, etc. are omitted for convenience of explanation, and these can be formed by a known substrate process. The printed circuit board 100A according to the above-mentioned example can be manufactured through a series of processes, and other overlapping explanations will be omitted.
[0032] FIG. 6 is a cross-sectional view that shows a schematic diagram of another example of a printed circuit board, and FIG. 7 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0033] Referring to the drawings, in the printed circuit board 100B according to another example, the wiring layer 120 in the printed circuit board 100A according to the above example may further include a second pattern 124 spaced apart from the first pattern 123, and the second post 132 may be disposed on the second pattern 124. The second pattern 124 may be a ground pattern having a plain shape similar to the first pattern 123, but is not limited thereto. Other details are substantially the same as those described above, and therefore repeated description will be omitted.
[0034] FIG. 8 is a cross-sectional view that shows a schematic diagram of still another example of a printed circuit board, and FIG. 9 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0035] Referring to the drawings, in the printed circuit board 100C according to another example, the second post 132 may be omitted from the printed circuit board 100A according to the above example, and the first post 131 may be disposed to surround the periphery of the first and second pads 121 and 122. Similarly, the second protrusion 142 may be omitted, and the first protrusion 141 may be disposed to surround the periphery of the first and second openings h1 and h2. For example, the solder bumps connected to the ground and the power may be connected to each other, and in this case, more various designs may be applied according to the situation. Alternatively, the entire area where the electronic components are mounted may be entirely surrounded by the first post 131 as necessary. In this case, the first protrusion 141 may prevent the underfill from flowing. Other contents are substantially the same as those described above, and therefore, a duplicated description will be omitted.
[0036] FIG. 10 is a cross-sectional view that shows a schematic diagram of still another example of a printed circuit board, and FIG. 11 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0037] Referring to the drawings, in the printed circuit board 100D according to another example, the wiring layer 120 in the printed circuit board 100A according to the above example may be embedded in the insulating layer 110 based on the upper surface of the insulating layer 110. For example, the first and second pads 121 and 122 and the first pattern 123 may be embedded patterns. Other contents are substantially the same as those described above, so duplicated descriptions will be omitted.
[0038] FIG. 12 is a cross-sectional view that shows a schematic diagram of still another example of a printed circuit board, and FIG. 13 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0039] Referring to the drawings, in the printed circuit board 100E according to another example, the wiring layer 120 in the printed circuit board 100B according to the above-mentioned another example may be embedded in the insulating layer 110 based on the upper surface of the insulating layer 110. For example, the first and second pads 121, 122 and the first and second patterns 123, 124 may be embedded patterns. Other contents are substantially the same as those described above, so duplicated descriptions will be omitted.
[0040] FIG. 14 is a cross-sectional view that shows a schematic diagram of still another example of a printed circuit board, and FIG. 15 is a plan view that shows a schematic top view of the printed circuit board of FIG.
[0041] Referring to the drawings, in the printed circuit board 100F according to another example, the wiring layer 120 in the printed circuit board 100C according to the above-mentioned another example may be embedded in the insulating layer 110 based on the upper surface of the insulating layer 110. For example, the first and second pads 121 and 122 and the first pattern 123 may be embedded patterns. Other contents are substantially the same as those described above, so duplicated descriptions will be omitted.
[0042] In the present disclosure, the term "cover" may include not only the case of covering entirely but also the case of covering at least a part, and may include not only the case of covering directly but also the case of covering indirectly. The term "fill" may include not only the case of filling completely but also the case of filling roughly, for example, the case where there are some gaps or voids. The term "surround" may include not only the case of surrounding completely but also the case of surrounding roughly. Furthermore, "expose" may include not only the case of exposing completely but also the case of exposing a part, and "expose" may mean exposing from embedding the corresponding structure. For example, "exposing the pad through the opening" may mean exposing the pad from the resist layer, and a surface treatment layer or the like may be further disposed on the exposed pad.
[0043] In the present disclosure, the meaning of a cross section can mean the cross-sectional shape of an object cut vertically, or the cross-sectional shape of an object cut vertically, or the cross-sectional shape of an object when viewed from a side, and the meaning of a plane can mean the planar shape of an object cut horizontally, or the planar shape of an object when viewed from a top view or a bottom view.
[0044] In the present disclosure, the thickness, width, length, depth, etc. can be measured using a scanning microscope, optical microscope, etc. based on a cross section obtained by polishing or cutting the printed circuit board. The cut section can be a vertical section or a horizontal section, and the numerical values can be measured based on the required cut section. If the numerical value is not constant, the numerical value can be determined as an average value of values measured at any five points. The width of the upper end and / or lower end of the through hole can be measured on a cross section obtained by cutting the central axis of the through hole in the thickness direction of the board. The depth of the through hole can be measured as the distance from the upper end to the lower end of each object on a cross section obtained by cutting the central axis of each object in the thickness direction of the board.
[0045] In this disclosure, for convenience, terms such as lower, bottom, and lower surface are used to mean a downward direction based on a cross section of the drawing, and terms such as upper, top, and upper surface are used to mean the opposite direction. In addition, terms such as side and side surface are used to mean a direction perpendicular to the upper and lower surfaces. In addition, terms such as lower, bottom, lower surface, upper, top, and upper surface are used to mean a downward and / or upward direction based on a cross section of the drawing. However, these are merely definitions of directions for convenience of explanation, and it goes without saying that the scope of the claims is not particularly limited by the description of such directions, and the concepts of up / down may be changed at any time.
[0046] In the present disclosure, the term "connected" refers not only to a direct connection but also to an indirect connection via an adhesive layer or the like. The term "electrically connected" refers to a physical connection and a non-connection. Furthermore, the terms "first" and "second" are used to distinguish one component from another, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly the second component may be named the first component, without departing from the scope of the right.
[0047] The expression "one example" used in the present disclosure does not mean the same embodiment as the other, but is provided to emphasize and describe the unique features that are different from each other. However, the above-mentioned one example does not exclude being realized in combination with the features of another example. For example, even if the matter described in a particular example is not described in another example, it can be understood as being related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.
[0048] The terms used in the present disclosure are merely used to describe an example and are not intended to limit the present disclosure. In this case, the singular expression includes the plural expression unless the context clearly indicates otherwise. [Explanation of symbols]
[0049] 1000 electronic equipment 1010 Mainboard 1020 Chip related parts 1030 Network related parts 1040 Other parts 1050 Camera 1060 Antenna 1070 display 1080 Battery 1090 Signal Line 1100 Smartphone 1110 Motherboard 1120 parts 1121 Parts Package 1130 Camera Module 1140 Speaker 100A, 100B, 100C, 100D, 100E, 100F Printed Circuit Boards 110 Insulating layer 120 wiring layer 121, 122 Pad 123, 124 patterns 131, 132 posts 140 Resist layer 141, 142 Protrusion h1, h2 opening P1, P2 surface treatment layer 151, 152 Solder bump 180 Wiring structure 210 Resist film 211 Opening Pattern
Claims
1. An insulating layer; a wiring layer disposed on the outermost side of the insulating layer and including a first pad and a first pattern; a first post disposed on the first pattern; a resist layer disposed on the insulating layer and covering the wiring layer and the first post; Including, The resist layer has a first protrusion in an area covering the first post and a first opening exposing the first pad from the resist layer.
2. the wiring layer further includes a second pad spaced apart from the first pad, A second post is further disposed on the first pattern, the second post being spaced apart from the first post; The printed circuit board of claim 1 , wherein the resist layer further has a second protrusion in a region covering the second post, and further has a second opening exposing the second pad from the resist layer.
3. the first posts are disposed so as to surround the periphery of the first pad, the second posts are disposed so as to surround the periphery of the second pad, The first protrusion is disposed so as to surround the periphery of the first opening, The printed circuit board according to claim 2 , wherein the second protrusion is disposed so as to surround a periphery of the second opening.
4. a first surface treatment layer disposed on the exposed surface of the first pad; a second surface treatment layer disposed on the exposed surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer; The printed circuit board of claim 2 further comprising:
5. the wiring layer further includes a second pad spaced apart from the first pad and a second pattern spaced apart from the first pattern, A second post spaced apart from the first post is further disposed on the second pattern, The printed circuit board of claim 1 , wherein the resist layer further has a second protrusion in a region covering the second post, and further has a second opening exposing the second pad from the resist layer.
6. the first posts are disposed so as to surround the periphery of the first pad, the second posts are disposed so as to surround the periphery of the second pad, The first protrusion is disposed so as to surround the periphery of the first opening, The printed circuit board according to claim 5 , wherein the second protrusion is disposed so as to surround a periphery of the second opening.
7. a first surface treatment layer disposed on the exposed surface of the first pad; a second surface treatment layer disposed on the exposed surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer; The printed circuit board of claim 5 further comprising:
8. the wiring layer further includes a second pad spaced apart from the first pad, The printed circuit board of claim 1 , wherein the resist layer further includes a second opening exposing the second pad from the resist layer.
9. the first post is disposed so as to surround the periphery of the first and second pads; The printed circuit board according to claim 8 , wherein the first protrusion is disposed so as to surround a periphery of the first and second openings.
10. a first surface treatment layer disposed on the exposed surface of the first pad; a second surface treatment layer disposed on the exposed surface of the second pad; a first solder bump disposed on the resist layer, filling the first opening, and connected to the first surface treatment layer; a second solder bump disposed on the resist layer, filling the second opening, and connected to the second surface treatment layer; The printed circuit board of claim 8 further comprising:
11. The printed circuit board according to claim 1 , wherein the wiring layer protrudes upward from an upper surface of the insulating layer.
12. The printed circuit board according to claim 1 , wherein the wiring layer is embedded in the insulating layer with respect to an upper surface of the insulating layer.
13. A wiring structure including a plurality of insulating layers, a plurality of wiring layers, and a plurality of via layers is further included, The printed circuit board according to claim 1 , wherein the insulating layer is an outermost insulating layer among the plurality of insulating layers.
14. An insulating layer; a metal pad disposed on the insulating layer; a metal post disposed on the insulating layer and surrounding the metal pad, the metal post having a top surface located above a top surface of the metal pad; a resist layer disposed on the upper surface of the insulating layer and covering the metal pads and the metal posts; Including, The resist layer has an upper surface protruding from an area covering the metal post and has an opening exposing the metal pad from the resist layer.
15. The printed circuit board of claim 14 , wherein the metal post surrounds the metal pad in a ring shape.
16. The metal pads and the metal posts are each a plurality of pieces, The printed circuit board of claim 15 , wherein each of the metal posts surrounds each of the metal pads in a ring shape.