Printed circuit board

By inserting a metal wire into through holes in glass substrates and using it as a seed layer for plating, the challenges of forming high-quality through vias in printed circuit boards are addressed, resulting in improved substrate quality and reduced costs.

JP2025044110APending Publication Date: 2025-04-01SAMSUNG ELECTRO MECHANICS CO LTD
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Patent Information

Application Number
JP2024031320
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-09-19
Filing Date
2024-03-01
Publication Date
2025-04-01

AI Technical Summary

Technical Problem

The challenge lies in forming through vias within thick glass substrates for printed circuit boards, as the smooth glass surface and high aspect ratio of the via holes make it difficult to create a seed layer for plating, resulting in voids, seams, and increased time and cost.

Method used

The solution involves forming a through hole in an insulating layer, inserting a metal wire, and then filling the hole with plating, using the metal wire as a seed layer to form a metal via without the need for a separate seed metal layer.

Benefits of technology

This approach effectively suppresses the formation of voids and seams, improves substrate quality, and reduces process time and cost by eliminating the need for a seed metal layer, especially for high-aspect-ratio through holes in glass substrates.

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Abstract

To provide a printed circuit board that may improve the quality of a substrate by suppressing the formation of voids or seams even when fill plating is performed on a through-hole having a high aspect ratio, such as a through-hole formed in a glass substrate, and that may also minimize costs by omitting the formation of a metal seed layer in a through-hole having a high aspect ratio, such as a through-hole formed in a glass substrate.SOLUTION: A printed circuit board 100A includes: an insulating layer 110; a through-hole H1 penetrating between an upper surface and a lower surface of the insulating layer; a metal wire 150 disposed inside the through-hole; and a metal via 140 filling the through-hole and covering the metal wire.SELECTED DRAWING: Figure 3
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Description

[Technical field]

[0001] The present invention relates to printed circuit boards. [Background technology]

[0002] Packaging technology is constantly evolving, and in particular, traditional substrate manufacturing methods are attempting to move away from organic materials and use silicon or glass. As is known, glass has better warpage characteristics and flatness than existing organic materials, which may be advantageous for reducing trace lines and spaces. However, currently, when manufacturing substrates using glass cores, there is a problem that it is difficult to form through vias in thick glass cores. For example, a seed layer is required to perform plating in via holes, but the glass surface is smooth and the via holes have a high aspect ratio, which may make it difficult to form the seed. In addition, when forming a seed using a sputtering process or the like, it may take a lot of time and cost to form a seed of the desired thickness. Summary of the Invention [Problem to be solved by the invention]

[0003] One of several objects of the present invention is to provide a printed circuit board capable of improving the quality of the board by suppressing the formation of voids and seams even when fill plating is performed on a through hole having a high aspect ratio, such as a through hole formed in a glass substrate.

[0004] Another of several objects of the present invention is to provide a printed circuit board that can minimize costs by omitting the formation of a metal seed layer in a through hole having a high aspect ratio, such as a through hole formed in a glass substrate. [Means for solving the problem]

[0005] One of the solutions proposed in this invention is to form a through hole in an insulating layer such as a glass substrate, insert and place a metal wire inside the through hole, and then perform fill plating or the like in the through hole using the metal wire as a seed layer to form a metal via that covers the metal wire.

[0006] For example, an example printed circuit board may include an insulating layer, a through hole penetrating between an upper surface and a lower surface of the insulating layer, a metal wire disposed within the through hole, and a metal via filling the through hole and covering the metal wire.

[0007] For example, a printed circuit board according to one example may include an insulating layer having a through hole, a metal wire disposed in the through hole, a first metal layer filling the through hole and covering the metal wire, a first seed metal layer disposed on upper surfaces of the insulating layer and the first metal layer, a second seed metal layer disposed on lower surfaces of the insulating layer and the first metal layer, a second metal layer disposed on the upper surface of the first seed metal layer, and a third metal layer disposed on a lower surface of the second seed metal layer. Effect of the Invention

[0008] Among the various effects of the present invention, one effect is that a printed circuit board can be provided that can improve the quality of the board by suppressing the formation of voids and seams even when fill plating is performed on a through hole with a high aspect ratio, such as a through hole formed in a glass substrate.

[0009] Another advantage of the present invention is that it is possible to provide a printed circuit board that can minimize process time and costs by omitting the need to form a metal seed layer in a through hole with a high aspect ratio, such as a through hole formed in a glass substrate. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4a] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4b] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4c] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4d] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4e] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4f] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 4g] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Diagram 5] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 6] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The present invention will now be described with reference to the accompanying drawings, in which the shapes and sizes of elements may be exaggerated or reduced for clarity.

[0012] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0013] Referring to the drawing, an electronic device 1000 accommodates a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also connected to other electronic components described below to form various signal lines 1090.

[0014] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Needless to say, the chip-related components 1020 may include other types of chip-related electronic components. Needless to say, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.

[0015] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, as well as any of a number of other different wireless or wired standards and protocols. It should be understood that the network-related components 1030 may also be combined with the chip-related components 1020 and with each other.

[0016] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may also include passive elements in the form of chip components used for various other different applications. It goes without saying that the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.

[0017] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. The other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. Needless to say, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0018] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0019] FIG. 2 is a perspective view that illustrates an example of an electronic device.

[0020] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components such as a camera module 1130 and / or a speaker 1140 that may or may not be physically and / or electrically connected to the motherboard 1110 are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built-in. Meanwhile, it goes without saying that the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.

[0021] Printed Circuit Board FIG. 3 is a cross-sectional view that illustrates an example of a printed circuit board.

[0022] Referring to the drawing, the printed circuit board 100A according to an example may include an insulating layer 110, a through hole H1 penetrating between the upper surface and the lower surface of the insulating layer 110, a metal wire 150 disposed in the through hole H1, a metal via 140 filling the through hole H1 and covering the metal wire 150, a first metal wiring 120 disposed on the upper surface of the insulating layer 110 and connected to an upper end of the metal via 140, and a second metal wiring 130 disposed on the lower surface of the insulating layer 110 and connected to a lower end of the metal via 140. The through hole H1 may have a tapered shape such that the width of the upper end is wider than the width of the lower end in a cross section. The metal wire 150 may include a joint portion 151 and a wire portion 152 connected to the joint portion 151.

[0023] In this way, in the case of forming a high aspect ratio metal via 140 in an insulating layer 110 of a considerable thickness, such as a glass substrate, the printed circuit board 100A according to the example has a metal wire 150 inserted in advance into the through hole H1 and then plated. For example, after inserting the metal wire 150, the through hole H1 can be filled using fill plating or the like. This can effectively prevent voids and seams from occurring in the through hole H1. Therefore, the quality of the board can be further improved.

[0024] Meanwhile, the metal via 140 may include the first metal layer M1 filling the through hole H1 and covering the metal wire 150, and may not include a seed metal layer. For example, the first metal layer M1 may be a single layer formed by electrolytic plating (or electrolytic copper), and the first metal layer M1 may contact the wall surface of the through hole H1. For example, the metal wire 150 may serve as a seed for plating the first metal layer M1. Therefore, the seed process can be omitted to minimize the process time and cost. Meanwhile, when the end of the wire portion 152 is disposed at a level higher than the center of the insulating layer 110 and the upper surface of the insulating layer 110 in the thickness direction, the above-mentioned role as a seed can be performed more effectively. If necessary, the end of the wire portion 152 may be disposed at a level lower than the upper surface of the insulating layer 110 in the thickness direction, in which case the metal wire 150 can be more stably placed in the through hole H1. However, the present invention is not limited thereto, and the end of the wire portion 152 may protrude above the upper surface of the insulating layer 110 and be covered by the first metal wiring 120. Meanwhile, the end may refer to the uppermost portion of the wire portion 152 in cross section.

[0025] Meanwhile, the upper and lower surfaces of the first metal layer M1, for example, the metal via 140, may be substantially coplanar with the upper and lower surfaces of the insulating layer 110, respectively. Also, the lower surface of the junction 151 of the metal wire 150 may be substantially coplanar with the lower surface of the first metal layer M1, for example, the metal via 140, and the lower surface of the insulating layer 110, respectively. For example, by disposing the metal wire 150 in the through hole H1 of the insulating layer 110 using a carrier and performing plating, the lower side can be coplanar as described above after removing the carrier. Also, after filling the through hole H1 of the insulating layer 110 by plating to form the first metal layer M1, for example, the metal via 140, a planarization process can be performed as necessary, so that the upper side can be coplanar as described above. In this case, unevenness can be minimized to more easily form the first metal wiring and the second metal wiring 120, 130, and build-up layers can be more easily formed on both sides of the insulating layer 110 as necessary.

[0026] Meanwhile, the first metal wiring 120 may include a first seed metal layer m1 that is disposed on the upper surfaces of the insulating layer 110 and the metal via 140, and a second metal layer M2 that is disposed on the upper surface of the first seed metal layer m1 and that is thicker than the first seed metal layer m1 and that covers the first metal wiring 120. Also, the second metal wiring 130 may include a second seed metal layer m2 that is disposed on the lower surfaces of the insulating layer 110, the metal via 140, and the metal wire 150, and that covers the first metal wiring 120 and the metal via 140, and a third metal layer M3 that is disposed on the lower surface of the second seed metal layer m2 and that is thicker than the second seed metal layer m2 and that covers the second metal wiring 130. For example, the first metal wiring and the second metal wiring 120, 130 may be formed by a plating process in the planarized region. Meanwhile, the lower surface of the junction portion 151 of the metal wire 150 may contact the second seed metal layer m2. Also, the upper surface of the wire portion 152 of the metal wire 150 may be separated from the first seed metal layer m1, but is not limited thereto, and may contact the first seed metal layer m1 as necessary.

[0027] Meanwhile, the printed circuit board 100A according to an embodiment may be applied as any one layer of a multi-layer circuit board. For example, it may be applied as a core layer of a multi-layer circuit board, in which case a build-up process may be performed on one or both sides of the printed circuit board 100A. Such a multi-layer circuit board may be used as a film-chip board (FCB), a ball grid array (BGA), an interposer board, a package board, etc. However, it is not limited thereto, and may be applied to various other types of boards.

[0028] The components of the example printed circuit board 100A are described in more detail below with reference to the drawings.

[0029] The insulating layer 110 may include an insulating material. The insulating material may include an inorganic insulating material, which may be, for example, but is not limited to, glass, ceramic, silicon, etc. The inorganic insulating material may preferably include glass. For example, the insulating layer 110 may include a glass substrate. The glass substrate may include glass, which is a non-crystalline solid. Glass may include, for example, pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, etc. However, without being limited thereto, alternative glass materials, such as fluoride glass, phosphate glass, chalcogenide glass, etc., may also be used as materials. In addition, other additives may be further included to form glasses having specific physical properties. Such additives may include calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), as well as magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of such elements and other elements. The glass substrate may be a layer distinct from an organic insulating material containing glass fiber (glass fiber, glass cloth, glass fabric), for example, CCL (Copper Clad Laminate), PPG (Prepreg), etc. For example, it may be plate glass.

[0030] Meanwhile, the insulating layer 110 may have a multi-layer structure as required. For example, a structure in which organic insulating layers are formed on both sides of a glass substrate may be used. The organic insulating layer may include an organic insulating material, which may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the organic insulating material may be a non-photosensitive insulating material such as PPG (Prepreg) or ABF (Ajinomoto Build-up Film), but is not limited thereto, and a photosensitive insulating material or other polymer material may be used.

[0031] The first metal wiring 120 and the second metal wiring 130 may each include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first seed metal layer m1 and the second seed metal layer m2 of the first metal wiring 120 and the second metal wiring 130 and the second metal layer M2 and the third metal layer M3 may each include the above-mentioned metal material, and may preferably include copper (Cu), but are not limited thereto. The first metal wiring 120 and the second metal wiring 130 may each perform various functions according to the design. For example, they may include a signal pattern, a power pattern, a ground pattern, etc. These patterns may each have various forms, such as a line, a plane, and a pad. The first seed metal layer m1 and the second seed metal layer m2 may be formed by sputtering, but are not limited thereto, and may be formed by electroless plating (or chemical copper) as necessary. The second and third metal layers M2 and M3 may be formed by electrolytic plating (or electrolytic copper).

[0032] The metal via 140 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. For example, the first metal layer M1 of the metal via 140 may include the above-mentioned metal material, and may preferably include, but is not limited to, copper (Cu). The metal via 140 may perform various functions according to the design. For example, it may include a ground via, a power via, a signal via, etc. The metal via 140 may be formed by electrolytic plating (or copper electroplating) using the metal wire 150 as a seed without a separate seed metal layer.

[0033] The metal wire 150 may include a metal material. The metal material may include copper (Cu), gold (Au), silver (Ag), palladium (Pd), and / or an alloy thereof. For example, the metal wire 150 may include, but is not limited to, a palladium (Pd)-copper (Cu) alloy. The metal wire 150 may include a joint portion 151 and a wire portion 152, each of which may include the same metal material. The metal wire 150 may have a size that allows it to be spaced apart from the wall surface of the through hole H1. For example, the size of the metal wire 150 may be determined according to the size of the through hole H1.

[0034] 4a to 4g are cross-sectional views illustrating steps of a manufacturing method for the printed circuit board of FIG.

[0035] Referring to the drawings, in FIG. 4a, an insulating layer 110 is prepared. The insulating layer 110 may be a glass substrate such as a sheet glass as described above. Next, in FIG. 4b, a through hole H1 is formed in the insulating layer 110. The through hole H1 may be formed in a tapered shape by etching after placing a mask on the upper surface of the insulating layer 110, for example, a glass layer, but is not limited thereto, and for example, other chemical methods or mechanical methods may be used. A plurality of through holes H1 may be formed, and each through hole H1 may be the same or different. Next, in FIG. 4c, a metal wire 150 is inserted into the through hole H1. For example, after the metal wire 150 is attached to the carrier 210 in advance, the insulating layer 110 may be laminated so that the metal wire 150 is inserted into the through hole H1. Next, in FIG. 4d, a first metal layer M1 is formed in the through hole H1. The first metal layer M1 may be formed by fill plating using the metal wire 150 as a seed. As a result, a metal via 140 may be formed. Next, in FIG. 4e, the carrier 210 is removed. For example, the carrier 210 can be physically separated. Thereafter, a planarization process can be performed as necessary. Next, in FIG. 4f, the first seed metal layer and the second seed metal layer m1, m2 and the second metal layer and the third metal layer M2, M3 are formed on both sides of the insulating layer 110, the metal via 140, and the metal wire 150. The first seed metal layer and the second seed metal layer m1, m2 can be formed by a sputtering process, and the second metal layer and the third metal layer M2, M3 can be formed by electrolytic plating (or copper electroplating). Next, in FIG. 4g, the first metal wiring and the second metal wiring 120, 130 are formed. For example, the first metal wiring and the second metal wiring 120, 130 can be formed by patterning by etching. For example, a TT (Tenting) process may be used. However, the present invention is not limited thereto, and the processes of FIG. 4f and FIG. 4g may be replaced by AP (Additive Process), SAP (Semi Additive Process), etc. Through a series of processes, the printed circuit board 100A according to the above-described example can be formed, and other details are substantially the same as those described above, so that repeated description will be omitted.

[0036] FIG. 5 is a cross-sectional view that illustrates a schematic diagram of another example of a printed circuit board.

[0037] Referring to the drawings, the printed circuit board 100B according to another example may have a tapered shape such that the width of the through hole H2 at the lower end is wider than the width at the upper end in the cross section of the printed circuit board 100A according to the above example. The other contents are substantially the same as those described above, so that the duplicated description will be omitted.

[0038] FIG. 6 is a cross-sectional view that illustrates a schematic diagram of still another example of a printed circuit board.

[0039] Referring to the drawings, in the printed circuit board 100C according to another example, the through hole H3 in the printed circuit board 100A according to the above example may have a tapered shape on both sides such that the width at each of the upper end and the lower end in the cross section is wider than the width at any part between the upper end and the lower end. For example, the through hole H3 may have an hourglass shape. The rest of the contents are substantially the same as those described above, so a repeated description will be omitted.

[0040] In the present invention, the term "cover" can include not only the case of covering entirely, but also the case of covering at least a part, and further, can include not only the case of covering directly, but also the case of covering indirectly. Furthermore, the term "fill" can include not only the case of filling completely, but also the case of filling at least a part, and further, can include the case of filling almost entirely. For example, the term "fill" can include the case where some gaps, voids, etc. are present.

[0041] In the present invention, the meaning of "on a cross section" can mean the cross-sectional shape of an object cut vertically, or the cross-sectional shape of an object cut vertically, or the cross-sectional shape of an object when viewed from a side, and the meaning of "on a plane" can mean the planar shape of an object cut horizontally, or the planar shape of an object when viewed from a top or bottom.

[0042] In the present invention, the thickness, width, length, depth, etc. can be measured with a scanning microscope or optical microscope based on a cross section obtained by polishing or cutting the printed circuit board. The cut section may be a vertical section or a horizontal section, and each value can be measured based on the required cut section. If the value is not constant, the value can be determined by averaging the values ​​measured at any five points. The width of the upper end and / or lower end of the through hole can be measured on a cross section cut along the central axis of the through hole in the thickness direction of the board. The depth of the through hole can be measured as the distance from the upper end to the lower end of each object on a cross section cut along the central axis of each object in the thickness direction of the board.

[0043] In the present invention, for convenience, the terms lower, bottom, and bottom surface are used to mean a downward direction based on a cross section of the drawing, and the terms upper, top, and top surface are used to mean the opposite direction. In addition, the terms side and side surface are used to mean a direction perpendicular to the top and bottom surfaces. In addition, the thickness direction is used to mean a downward and / or upward direction based on a cross section of the drawing, just like the terms lower, bottom, bottom surface, upper, top, and top surface. However, these are merely definitions of directions for convenience of explanation, and the scope of the claims is not particularly limited by the description of the directions, and the concepts of up / down can be changed at any time.

[0044] In the present invention, "connected" is a concept including not only direct connection but also indirect connection via an adhesive layer or the like. Furthermore, "electrically connected" is a concept including both physical connection and no connection. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component, within the scope of the right.

[0045] The term "one example" used in the present invention does not mean the same embodiment, but is provided to emphasize and describe each unique feature that is different from the others. However, the above-mentioned one example does not exclude that it is realized in combination with the features of another example. For example, even if the matter described in a specific example is not described in another example, it can be understood as a description related to the other example, unless there is a description that is opposite or contradictory to the matter in the other example.

[0046] The terms used in the present invention are merely used to describe an example and are not intended to limit the present invention. In this case, a singular expression includes a plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0047] 1000:Electronic equipment 1010: Main board 1020: Chip related parts 1030: Network related parts 1040:Other parts 1050: Camera 1060:Antenna 1070:Display 1080: Battery 1090: Signal line 1100: Smartphone 1110: Motherboard 1120: Parts 1121: Parts package 1130: Camera module 1140: Speaker 100A, 100B, 100C: Printed circuit boards 110: Insulating layer 120, 130: Metal wiring 140: Metal via 150: Metal wire 151: Connection 152: Wire section m1, m2: seed metal layers M1, M2, M3: Metal layers H1, H2, H3: Through holes 210: Carrier

Claims

1. An insulating layer; a through hole penetrating between an upper surface and a lower surface of the insulating layer; A metal wire disposed in the through hole; a metal via filling the through hole and covering the metal wire.

2. The printed circuit board of claim 1 , wherein the metal wire includes a joint portion and a wire portion connected to the joint portion.

3. The printed circuit board of claim 2 , wherein a bottom surface of the joint is substantially coplanar with a bottom surface of the insulating layer and a bottom surface of the metal via.

4. The printed circuit board according to claim 2 , wherein an end of the wire portion is disposed at a level between a center of the insulating layer and an upper surface of the insulating layer in a thickness direction.

5. The printed circuit board of claim 1 , wherein the metal via comprises a first metal layer and does not include a seed metal layer.

6. The printed circuit board of claim 1 , further comprising a first metal wiring and a second metal wiring disposed on the upper and lower surfaces of the insulating layer, respectively, and connected to each other through the metal via.

7. the first metal wiring includes a first seed metal layer covering an upper surface of the insulating layer and the metal via, and a second metal layer covering an upper surface of the first seed metal layer and being thicker than the first seed metal layer; 7. The printed circuit board of claim 6, wherein the second metal wiring includes a second seed metal layer covering the lower surfaces of the insulating layer, the metal via, and the metal wire, and a third metal layer covering the lower surface of the second seed metal layer and being thicker than the second seed metal layer.

8. the insulating layer includes a glass substrate; The metal wire includes an alloy including at least one of copper (Cu), gold (Au), silver (Ag), and palladium (Pd); The printed circuit board of claim 1 , wherein the metal vias comprise copper (Cu).

9. The printed circuit board according to claim 1 , wherein the through hole has a tapered shape such that a width at an upper end is wider than a width at a lower end in cross section.

10. The printed circuit board according to claim 1 , wherein the through hole has a tapered shape such that a width at a lower end is wider than a width at an upper end in cross section.

11. 2. The printed circuit board of claim 1, wherein the through hole has a tapered shape on both sides such that a width at each of an upper end and a lower end in cross section is wider than a width at any part between the upper end and the lower end.

12. an insulating layer having a through hole; A metal wire disposed in the through hole; a first metal layer filling the through hole and covering the metal wire; a first seed metal layer disposed on an upper surface of each of the insulating layer and the first metal layer; a second seed metal layer disposed on a lower surface of each of the insulating layer and the first metal layer; a second metal layer disposed on an upper surface of the first seed metal layer; a third metal layer disposed on a lower surface of the second seed metal layer.

13. the metal wire includes a joint portion and a wire portion connected to the joint portion, an upper surface of the wire portion is spaced apart from the first seed metal layer; The printed circuit board of claim 12 , wherein a bottom surface of the joint contacts the second seed metal layer.

14. an upper surface of the first metal layer is substantially coplanar with an upper surface of the insulating layer; 13. The printed circuit board of claim 12, wherein a lower surface of the first metal layer is substantially coplanar with a lower surface of the insulating layer.

15. the first metal layer is a single layer; The printed circuit board of claim 14 , wherein the first metal layer contacts a wall surface of the through hole.

16. the insulating layer includes a glass substrate; the metal wire comprises a palladium (Pd)-copper (Cu) alloy; the first seed metal layer and the second seed metal layer each include copper (Cu); The printed circuit board of claim 12 , wherein the first metal layer, the second metal layer, and the third metal layer each include copper (Cu).