Electronic circuit, distance measuring device, and apparatus

Abstract

To provide a technique advantageous for the stable operation of a time-to-digital converter.SOLUTION: An electronic circuit includes a plurality of time-to-digital converters. Each of the plurality of time-to-digital converters includes a voltage control type oscillator for generating a multiphase clock. Each oscillator is arranged between a first power supply line and a second power supply line, and includes a control transistor having a gate to which control voltage is input. Each oscillator further includes a supply circuit that supplies current to the gate.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to electronic circuits, distance measuring devices and instruments. [Background technology]

[0002] Patent Document 1 discloses a distance measuring device in which a plurality of time-to-digital converters (TDCs) are arranged to correspond to pixels arranged in each column among a plurality of pixels arranged in a two-dimensional lattice pattern. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2023-069488 A Summary of the Invention [Problem to be solved by the invention]

[0004] It is conceivable to input a reference clock to multiple TDCs and generate a multi-phase clock using a voltage-controlled oscillator in each TDC to increase the clock frequency. However, if a current starts to flow instantaneously when starting the oscillator in each TDC, the power supply voltage for operating each TDC may fluctuate. Fluctuations in the power supply voltage may cause fluctuations in the control voltage for controlling the oscillation frequency of the oscillator, which may cause malfunctions in the operation of the TDC.

[0005] An object of the present invention is to provide a technique that is advantageous for stable operation of a time-to-digital converter. [Means for solving the problem]

[0006] In view of the above problems, an electronic circuit according to an embodiment of the present invention is an electronic circuit including a plurality of time-to-digital converters, each of which includes a voltage-controlled oscillator for generating a multi-phase clock, each oscillator including a control transistor arranged between a first power supply line and a second power supply line and having a gate to which a control voltage is input, and each oscillator further including a supply circuit for supplying a current to the gate. Effect of the Invention

[0007] According to the present invention, it is possible to provide a technique that is advantageous for stable operation of a time-to-digital converter. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a distance measuring device including an electronic circuit according to an embodiment of the present invention. [Diagram 2] 2 is a diagram showing an example of the configuration of pixels arranged in the distance measuring device of FIG. 1; [Diagram 3] FIG. 2 is a diagram explaining the problems with the oscillator of the electronic circuit shown in FIG. 1. [Figure 4] FIG. 2 is a circuit diagram showing an example of the configuration of an oscillator in the electronic circuit of FIG. 1. [Diagram 5] FIG. 2 is a diagram showing an example of the configuration of an oscillator in the electronic circuit of FIG. 1. [Figure 6] FIG. 2 is a diagram showing an example of the operation of the oscillator of the electronic circuit of FIG. 1. [Figure 7] FIG. 2 is a diagram showing a modification of the oscillator of the electronic circuit of FIG. [Figure 8] 8 is a diagram showing an example of the operation of the oscillator of the electronic circuit of FIG. 7. [Figure 9] FIG. 1 is a diagram showing an example of the configuration of a device incorporating a photoelectric conversion device according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.

[0010] An electronic circuit according to an embodiment of the present disclosure will be described with reference to Figures 1 to 8. Figure 1 is a block diagram that shows a schematic configuration example of a distance measuring device 200 including an electronic circuit 100 in this embodiment. The distance measuring device 200 may include a pixel circuit 201, the electronic circuit 100, a synchronization circuit 150, a readout circuit 202, and the like.

[0011] A pixel circuit 201 is provided with a plurality of pixels 211. The electronic circuit 100 and the synchronization circuit 150 are provided to measure the time from when the light source emits light to when the plurality of pixels 211 receive light. The readout circuit 202 reads out data obtained by the electronic circuit 100 and supplies the data to an external device such as a personal computer. The external device obtains information such as distance from the data obtained by the electronic circuit 100. The electronic circuit 100, the synchronization circuit 150, and the readout circuit 202 each constitute a part of a generation circuit for generating distance information based on signals obtained by the plurality of pixels 211.

[0012] A photoelectric conversion element for converting incident light into an electric signal is disposed in the pixel 211 disposed in the pixel circuit 201. FIG. 2 is an example of a block diagram including an equivalent circuit of the pixel 211. In this embodiment, a case where an avalanche photodiode (APD) 212 is used as the photoelectric conversion element will be described. However, this is not limited thereto, and a PN diode, a PIN diode, or the like may be used as the photoelectric conversion unit. In addition to the APD 212, for example, a quench element 213, a waveform shaping circuit 214, and the like may be disposed in the pixel 211.

[0013] The APD 212 generates charge pairs according to the incident light by photoelectric conversion. An electric potential VL is supplied to the anode of the APD 212. An electric potential VH higher than the electric potential VL supplied to the anode is supplied to the cathode of the APD 212. A reverse bias voltage that causes the APD 212 to perform an avalanche multiplication operation is supplied to the anode and cathode. By supplying such a reverse bias voltage, the electric charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0014] When a reverse bias voltage is supplied to the APD212, there are two modes: Geiger mode, in which the potential difference (voltage) between the anode and cathode is greater than the breakdown voltage, and linear mode, in which the potential difference between the anode and cathode is close to or less than the breakdown voltage. An APD operated in Geiger mode is called a Single Photon Avalanche Diode (SPAD). For example, the potential VL is −30 V, and the potential VH is 1 V. The APD212 may be operated in either the linear mode or the Geiger mode.

[0015] The quench element 213 is connected between a power supply that supplies a potential VH and the APD 212. The quench element 213 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing the voltage supplied to the APD 212 and suppressing avalanche multiplication (quench operation). The quench element 213 also has a function of returning the voltage supplied to the APD 212 to a voltage (VH-VL) by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation). The quench element 213 can be configured, for example, by a MOS transistor.

[0016] The waveform shaping circuit 214 shapes the potential change of the cathode of the APD 212 obtained at the time of photon detection, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping circuit 214. In the configuration shown in FIG. 2, an example is shown in which one inverter is used as the waveform shaping circuit 214. However, this is not limited to this, and a circuit in which a plurality of inverters are connected in series may be used as the waveform shaping circuit 214, or another circuit having a waveform shaping effect may be used. The pulse signal output from the waveform shaping circuit 214 is input to the electronic circuit 100 via a signal line 221.

[0017] The electronic circuit 100 includes a plurality of time-to-digital converters (TDCs) 101. The plurality of TDCs 101 are controlled by a synchronization circuit 150 (which may also be called a PLL circuit). For example, pulse signals output from pixels 211 arranged in a corresponding column among a plurality of pixels 211 arranged in a pixel circuit 201 are input to the plurality of TDCs 101. Therefore, each TDC 101 may also be called a column TDC. Each TDC 101 converts into a digital signal the time difference between a start signal indicating the timing of emitting light in the distance measuring device 200 and a pulse signal input from the pixel 211, in synchronization with a clock signal input from the synchronization circuit 150. From this time difference, distance information to an object can be obtained.

[0018] Each TDC 101 includes a flip-flop (FF) circuit 111 for measuring a time difference. Also, each TDC 101 includes a voltage-controlled oscillator (VCO) 110 for generating a multi-phase clock. By including the VCO 110 in each TDC 101, a clock faster than the common clock input from the synchronization circuit 150 is supplied to the FF circuit 111 based on the common clock input from the synchronization circuit 150. This enables the distance measuring device 200 to perform distance measurement with higher accuracy than when the common clock supplied from the synchronization circuit 150 is used.

[0019] Fig. 3 is a block diagram showing an example of the configuration of the VCO 110. Fig. 4 is a circuit diagram showing an example of the configuration of the VCO 110. The VCO 110 includes a control transistor 121 arranged between the power supply line V1 and the power supply line V2 and having a gate to which a control voltage VPB is input, and a ring oscillator 122 arranged between the control transistor 121 and the power supply line V2. The ring oscillator 122 is not limited to the eight-stage configuration shown in Fig. 4, and any appropriate configuration may be used as long as it is capable of generating a clock faster than the common clock supplied from the synchronization circuit 150.

[0020] When the VCO 110 is started, a current starts to flow instantaneously between the power supply line V1 and the power supply line V2. Therefore, as shown in FIG. 3, when the VCO 110 is started, the potential of the gate of the control transistor 121 may fluctuate due to charge injection via the capacitance of the gate of the control transistor 121. That is, the control voltage VPB that controls the oscillation frequency of the VCO 110 may fluctuate. Furthermore, the power is supplied to the multiple TDCs 101 arranged in the electronic circuit 100 from a common synchronization circuit 150. Therefore, between the VCOs 110 arranged in each TDC 101, the voltage fluctuation between the power supply line V1 and the power supply line V2 accompanying the start of any one of the VCOs 110 may appear as a fluctuation of the power supply voltage or the control voltage VPB supplied to the other VCOs 110. That is, when the VCO 110 arranged in a certain TDC 101 is started, crosstalk that affects the operation of the VCOs 110 of the other TDCs 101 may occur. If the control voltage VPB fluctuates in the VCO 110, the oscillation frequency fluctuates, the operation of the TDC 101 becomes unstable, and the accuracy of distance measurement may decrease.

[0021] When the VCO 110 is provided for each TDC 101 arranged in each column, in order to suppress an increase in power consumption, it is possible to start the VCO 110 provided for the required TDC 101 first, and then start the VCO 110 provided for the other TDC 101. For example, the TDC 101 for calibration may be operated first. In that case, crosstalk may occur due to the VCO 110 that is started after the calibration. In addition, when multiple TDCs 101 are started at the same time, it may take time for the power supply voltage supplied from the synchronization circuit 150 to stabilize, and it may take time to standby until distance measurement with high accuracy is possible.

[0022] Therefore, in this embodiment, the VCO 110 arranged in each TDC 101 further includes a supply circuit 130 that supplies a current to the gate of the control transistor 121, as shown in Fig. 5. Fig. 5 is a circuit diagram showing an example of the configuration of the supply circuit 130.

[0023] The supply circuit 130 supplies a current to the gate of the control transistor 121 in order to reduce fluctuations in the potential of the gate due to charge injection via the capacitance of the gate of the control transistor 121 when the VCO 110 is started. The supply circuit 130 supplies a current to the gate of the control transistor 121 in the opposite direction to the current flowing between the gate of the control transistor 121 and the supply circuit 130 due to charge injection when the VCO 110 is started. By supplying a current in the opposite direction, fluctuations in the potential of the gate of the control transistor 121 are suppressed, as shown by the image of the potential surrounded by a circle in FIG. 5. This suppresses instability in the operation of the TDC 101 when the VCO 110 is started. Furthermore, crosstalk to the VCO 110 arranged in the other TDC 101 is also suppressed. For example, even if the VCOs 110 arranged in the TDC 101 each have a terminal to which a signal for starting operation is input and start at different timings as described above, it is possible to suppress crosstalk to the other VCOs 110.

[0024] The supply circuit 130 includes, for example, a capacitance element arranged between the power supply line V1 and the gate of the control transistor 121, a switch element 132 for charging the capacitance element, and a switch element 133 for supplying a current to the gate of the control transistor 121. More specifically, the supply circuit 130 includes a supply transistor 131 for supplying a current to the gate of the control transistor 121. The gate capacitance of the supply transistor 131 functions as a capacitance element arranged between the power supply line V1 and the gate of the control transistor 121. The source and drain of the supply transistor 131 are connected to the power supply line VPRECH via the switch element 132, and are connected to the power supply line V1 via the switch element 133. The gate of the supply transistor 131 is connected to the gate of the control transistor 121. The body of the supply transistor 131 is connected to the power supply line V1. For example, the gate width of the supply transistor 131 may be half the gate width of the control transistor 121. However, the configuration of the supply circuit 130 is not limited to the configuration shown in Fig. 5, and it is sufficient if an appropriate current can be supplied to the gate of the control transistor 121. In the configuration shown in Fig. 5, the supply transistor 131 of the supply circuit 130 uses a p-channel type transistor, which is the same as the control transistor 121. However, the control transistor 121 and the supply transistor 131 do not need to be of the same conductivity type. For example, when the control transistor 121 is a p-channel type transistor, the supply transistor 131 may be an n-channel type transistor, and the circuit configuration of the supply circuit 130 may be changed accordingly.

[0025] FIG. 6 is a timing diagram focusing on the operation of the VCO 110 of one TDC 101. In FIG. 6, control signals EN, PCH, IENB, and ROEN are shown. Each of the control signals EN, PCH, IENB, and ROEN can be supplied from the synchronization circuit 150. The control signal EN is a signal that controls the operation of the entire TDC 101, and when it is in a High state, the TDC 101 operates. The control signal PCH is a signal that controls the operation of the switch element 132, and during the High state, the switch element 132 is conductive, and the gate capacitance of the supply transistor 131 is charged. The control signal IENB is a signal for controlling the operation of the switch element 133, and is shown as a signal obtained by inverting the control signal IEN shown in FIG. 5. While the control signal IENB is in a Low state, the switch element 133 is conductive. The control signal ROEN is a signal that controls the operation of the ring oscillator 122, and when it is in a High state, the ring oscillator 122 operates. In other words, when the control signal ROEN is in a High state, the VCO 110 operates.

[0026] At time T1, the control signal EN goes to a high state, and the TDC 101 starts operating. The control signal PCH is in a high state before the control signal EN is supplied, but may go to a high state in response to the control signal EN going to a high state. Next, at time T2, the control signal PCH goes to a low state, and then, at time T3, the control signal IENB goes to a low state and the control signal ROEN goes to a high state. For example, the control signal PCH is a signal obtained by delaying the control signal EN for a predetermined time. Also, the control signal IENB and the control signal ROEN are signals obtained by delaying the control signal EN for a further predetermined time than the control signal PCH. The control signal IENB and the control signal ROEN may be, for example, common signals whose signal states change at the same timing. Therefore, it can be said that in response to the common signal, the ring oscillator 122 starts operating, and the supply circuit 130 starts supplying a current to the gate of the control transistor 121.

[0027] In response to the control signal ROEN, the ring oscillator 122 starts operating. In other words, the VCO 110 starts up. At this time, as shown in FIG. 6, a charge injection current flows due to the start of operation (start-up) of the VCO 110. Meanwhile, in response to the control signal IENB, the switch element 133 becomes conductive. This causes a charge injection current to flow from the gate capacitance of the supply transistor 131 of the supply circuit 130. As a result, both charge injection currents are offset, and fluctuations in the control voltage VPB and the power supply voltage supplied to each TDC 101 are suppressed.

[0028] After that, at time T4, the control signal IENB changes to a high state, the control signal ROEN changes to a low state, and the operation of the ring oscillator 122 (VCO 110) stops. Next, at time T5, the control signal PCH changes to a high state, and the gate capacitance of the supply transistor 131 of the supply circuit 130 may be charged in preparation for the next operation of the VCO 110. At time T6, the control signal EN changes to a low state, causing the TDC 101 to stop operating.

[0029] The period between time T2 and time T3 is provided to prevent switch element 132 and switch element 133 from simultaneously becoming conductive and causing a shoot-through current to flow. The same is true for the period between time T4 and time T5.

[0030] In this way, when the ring oscillator 122 (VCO 110) starts operating, a current is supplied from the supply circuit 130 to the gate of the control transistor 121 of the VCO 110, and fluctuations in the potential of the gate of the control transistor 121 are suppressed. This prevents the operation of the TDC 101 from becoming unstable when it is started up. In addition, crosstalk between the multiple TDCs 101 arranged in the electronic circuit 100 is reduced. This improves the ranging accuracy of the distance measuring device 200 in which the electronic circuit 100 is arranged.

[0031] FIG. 7(a) is a diagram showing a modified example of the VCO 110 shown in FIG. 5. As described above, the VCOs 110 arranged in the multiple TDCs 101 arranged in the electronic circuit 100 may operate at different timings. It has also been described that when the VCO 110 is started, a current starts to flow instantaneously between the power supply line V1 and the power supply line V2, and the potential of the gate of the control transistor 121 fluctuates due to charge injection through the capacitance of the gate of the control transistor 121. For this reason, the VCO 110 includes a supply circuit 130 that supplies a current to offset the charge injection current through the capacitance of the gate of the control transistor 121. On the other hand, the VCO 110 shown in FIG. 7(a) further includes a replica circuit 140 of the ring oscillator 122 to further stabilize the operation of the VCO 110 at the start. Since the other configurations may be the same as those described above, the replica circuit 140 will be mainly described here.

[0032] The replica circuit 140 is arranged between the power supply line V1 and the power supply line V2 so that a current flows through the control transistor 121 when the ring oscillator 122 is not operating. For example, the replica circuit 140 can be configured so that the current flowing through the control transistor 121 when the replica circuit 140 is operating is at least half the current flowing through the control transistor 121 when the ring oscillator 122 is operating. Also, for example, the replica circuit 140 can be configured so that the current flowing through the control transistor 121 when the ring oscillator 122 is operating is approximately the same as the current flowing through the control transistor 121 when the replica circuit 140 is operating.

[0033] The replica circuit 140 operates according to the control signal REPEN as shown in Fig. 7(a). Fig. 7(b) is a circuit diagram showing a configuration example of the replica circuit 140. When the control signal REPEN goes to a High state, the transistor of the replica circuit 140 shown in Fig. 7(b) becomes conductive, and a current flows through the control transistor 121. The control signal REPENB is an inverted signal of the control signal REPEN. The control signal REPEN (REPENB) can be supplied from the synchronization circuit 150, similar to the above-mentioned control signals EN, PCH, IENB, and ROEN.

[0034] For example, the transistors arranged in the replica circuit 140 and the transistors arranged in the ring oscillator 122 may have substantially the same structure. For example, the transistors arranged in the replica circuit 140 and the transistors arranged in the ring oscillator 122 may have the same gate length or the same gate width. However, this is not limited thereto, and it is sufficient that a current flows through the control transistor 121 between the power supply line V1 and the power supply line V2 when the ring oscillator 122 is not operating. This suppresses the above-mentioned charge injection current caused by the current starting to flow instantaneously when the ring oscillator 122 is started. As a result, the fluctuation of the power supply voltage supplied to the TDC 101 and the fluctuation of the control voltage VPB of the VCO 110 are suppressed.

[0035] 8 is a timing diagram showing the operation of the VCO 110 including the replica circuit 140. At time T1, the control signal EN goes to a high state, causing the TDC 101 to start operating. When the TDC 101 starts operating, the control signal PCH goes to a low state at time T2, and then, at time T3, the control signal IENB goes to a low state and the control signal REPEN goes to a high state. As a result, the replica circuit 140 starts operating before the ring oscillator 122 starts operating.

[0036] At time T3, the replica circuit 140 starts operating in response to the control signal REPEN. When the replica circuit 140 starts up after the TDC 101 starts operating, a charge injection occurs due to a momentary current flow, similar to the start of the ring oscillator 122 shown in FIG. 6. Meanwhile, the switch element 133 is turned on in response to the control signal IENB. This causes a charge injection current to flow from the gate capacitance of the supply transistor 131 of the supply circuit 130. As a result, both charge injection currents are offset, and fluctuations in the control voltage VPB and the power supply voltage supplied to each TDC 101 are suppressed.

[0037] For example, the control signal IENB and the control signal REPEN are signals obtained by delaying the control signal EN by a predetermined time further than the control signal PCH. The control signal IENB and the control signal REPEN may be common signals whose signal states change at the same timing. It can be said that the supply circuit 130 and the replica circuit 140 start operating in response to the common signal. More specifically, before the ring oscillator 122 starts operating, the replica circuit 140 starts operating and the supply circuit 130 starts supplying a current to the gate of the control transistor 121 in response to the common signal.

[0038] After the replica circuit 140 is started, the control signal REPEN changes to a low state at time T4, and then the control signal ROEN changes to a high state at time T5. That is, the ring oscillator 122 starts operating in response to the replica circuit 140 being stopped. This suppresses the change in the current flowing through the control transistor 121, and suppresses the fluctuation in the control voltage VPB and the fluctuation in the power supply voltage supplied to each TDC 101.

[0039] Next, at time T6, the control signal ROEN changes to a low state, and then, at time T7, the control signal REPEN changes to a high state. That is, the replica circuit 140 starts operating in response to the ring oscillator 122 stopping. This prevents the current flowing through the control transistor 121 from disappearing instantaneously due to the ring oscillator 122 stopping. This makes it possible to suppress fluctuations in the power supply voltage common to the multiple TDCs 101 when the ring oscillator 122 (VCO 110) of one of the multiple TDCs 101 stops. That is, it is possible to suppress crosstalk with respect to the operation of other TDCs 101 (VCO 110) that are in operation.

[0040] Thereafter, at time T8, before the control signal EN goes low, the control signal IENB goes high and the control signal REPEN goes low, and the operation of the replica circuit 140 stops. Next, at time T9, the control signal PCH goes high, and the gate capacitance of the supply transistor 131 of the supply circuit 130 may be charged in preparation for the next operation of the VCO 110. At time T10, the control signal EN goes low, causing the TDC 101 to stop operating.

[0041] The control signal EN may be a common signal in the multiple TDCs 101 arranged in the electronic circuit 100. Also, the change in the control signal PCH supplied at time T2, and the changes in the control signals IENB and REPEN supplied at time T3 may be common signals in the multiple TDCs 101 arranged in the electronic circuit 100. That is, the replica circuits 140 arranged in each of the multiple TDCs 101 arranged in the electronic circuit 100 may be configured to start operating simultaneously before the ring oscillator 122 starts operating. On the other hand, the ring oscillator 122 may operate at different times among the multiple TDCs 101. That is, the timing at which the control signal ROEN becomes High from time T5 to time T6 may be different among the multiple TDCs 101. The timing at which the control signal REPEN, indicated at time T4, becomes Low may be different among the multiple TDCs 101 depending on the timing of time T5. Similarly, depending on the timing of time T6, the timing at which the control signal REPEN indicated at time T7 goes low may differ among the multiple TDCs 101. Through the above operation, fluctuations in the control voltage VPB and power supply potential, and crosstalk among the multiple TDCs 101 are suppressed not only when the ring oscillator 122 is started, but also when the ring oscillator 122 is stopped.

[0042] 8 is provided to prevent the ring oscillator 122 and the replica circuit 140 from operating simultaneously, causing a large current to flow through the control transistor 121. The same is true for the period between time T6 and time T7.

[0043] Here, an application example of the distance measuring device 200 including the electronic circuit 100 having a plurality of TDCs 101 according to the above-mentioned embodiment will be described below. FIG. 9 is a schematic diagram of an apparatus EQP equipped with the distance measuring device 200. The distance measuring device 200 may be a semiconductor chip having a stacked structure in which a pixel circuit 201 in which pixels 211 are arranged is provided. As shown in FIG. 9, the distance measuring device 200 is accommodated in a semiconductor package PKG. The package PKG may include a base to which the distance measuring device 200 is fixed, a cover such as glass facing the distance measuring device 200, and a conductive connection member such as a bonding wire or bump that connects a terminal provided on the base to a terminal provided on the distance measuring device 200. The apparatus EQP may further include at least one of a control device CTRL, a processing device PRCS, a display device DSPL, and a memory device MMRY.

[0044] The optical system OPT forms an image on the pixel circuit 201 and may be, for example, a lens, a shutter, or a mirror. The control device CTRL controls the operation of the distance measuring device 200 and may be, for example, a semiconductor device such as an ASIC. The processing device PRCS processes a signal output from the distance measuring device 200 and may be, for example, a semiconductor device such as a CPU or an ASIC. The display device DSPL may be an EL display device or a liquid crystal display device that displays data obtained by the distance measuring device 200. The memory device MMRY is a magnetic device or a semiconductor device that stores data obtained by the distance measuring device 200. The memory device MMRY may be a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive. The mechanical device MCHN may have a moving part or a propulsion part such as a motor or an engine. The mechanical device MCHN also drives parts of the optical system OPT for, for example, zooming, focusing, and shutter operation. In the device EQP, the data output from the distance measuring device 200 is displayed on the display device DSPL, or transmitted to the outside by a communication device (not shown) included in the device EQP. For this reason, the device EQP may include a memory device MMRY and a processing device PRCS.

[0045] The device EQP incorporating the distance measuring device 200 may be applied to a surveillance camera, or an on-board camera mounted on transportation equipment such as an automobile, a railroad vehicle, a ship, an aircraft, or an industrial robot. In addition, the device EQP incorporating the distance measuring device 200 may be applied not only to transportation equipment but also to a wide range of equipment that uses object recognition, such as an intelligent transport system (ITS).

[0046] Moreover, the TDC 101 including the supply circuit 130 and the replica circuit 140 described above is not limited to being used in the distance measuring device 200. The TDC 101 may be used in, for example, a PLL circuit. A PLL circuit including the TDC 101 including the supply circuit 130 and the replica circuit 140 may be used in, for example, a circuit for wireless communication. Furthermore, for example, the TDC 101 including the supply circuit 130 and the replica circuit 140 may be applied to an AD conversion circuit.

[0047] The disclosure herein includes the following electronic circuits, distance measuring devices and instruments.

[0048] (Item 1) 1. An electronic circuit including a plurality of time-to-digital converters, each of the plurality of time-to-digital converters includes a voltage-controlled oscillator for generating a multi-phase clock; Each of the oscillators includes a control transistor that is disposed between a first power supply line and a second power supply line and has a gate to which a control voltage is input; 4. The electronic circuit according to claim 1, wherein each oscillator further comprises a supply circuit for supplying a current to said gate.

[0049] (Item 2) The electronic circuit described in item 1, characterized in that the supply circuit includes a capacitive element arranged between the first power supply line and the gate, a first switch element for charging the capacitive element, and a second switch element for supplying a current to the gate.

[0050] (Item 3) the supply circuit includes a supply transistor for supplying a current to the gate of the control transistor; a source and a drain of the supply transistor are connected to a third power supply line via the first switch element, and are connected to the first power supply line via the second switch element; a gate of the supply transistor is connected to the gate of the control transistor; a body of the supply transistor is connected to the first power supply line; 3. The electronic circuit according to item 2, wherein a gate capacitance of the supply transistor functions as the capacitive element.

[0051] (Item 4) The electronic circuit according to any one of claims 1 to 3, wherein the supply circuit reduces fluctuations in the potential of the gate due to charge injection through the capacitance of the gate when the oscillator is started.

[0052] (Item 5) 5. The electronic circuit according to item 4, wherein the supply circuit supplies a current to the gate of the control transistor in a direction opposite to a current flowing between the gate of the control transistor and the supply circuit by the charge injection.

[0053] (Item 6) The electronic circuit described in any one of items 1 to 5, characterized in that the oscillators arranged in each of the multiple time-to-digital converters each have a terminal to which a signal to start operation is input.

[0054] (Item 7) 7. The electronic circuit according to any one of claims 1 to 6, wherein the oscillator further includes a ring oscillator arranged between the control transistor and the second power supply line.

[0055] (Item 8) 8. The electronic circuit according to item 7, characterized in that in response to a common signal, the ring oscillator starts operating and the supply circuit starts supplying current to the gate of the control transistor.

[0056] (Item 9) Each oscillator further includes a replica circuit of the ring oscillator; The electronic circuit described in item 7, characterized in that the replica circuit starts operating before the ring oscillator starts operating, and then the ring oscillator starts operating in response to the replica circuit stopping.

[0057] (Item 10) 10. The electronic circuit according to item 9, further characterized in that the replica circuit starts operating in response to the ring oscillator stopping.

[0058] (Item 11) The electronic circuit described in item 9 or 10, characterized in that the replica circuits arranged in each of the multiple time-to-digital converters are configured to start operating simultaneously before the ring oscillator starts operating.

[0059] (Item 12) 12. The electronic circuit according to any one of claims 9 to 11, characterized in that the current flowing through the control transistor when the replica circuit is operating is equal to or greater than half the current flowing through the control transistor when the ring oscillator is operating.

[0060] (Item 13) The electronic circuit described in any one of items 9 to 12, characterized in that the replica circuit is configured so that a current flowing through the control transistor when the ring oscillator is operating is the same as a current flowing through the control transistor when the replica circuit is operating.

[0061] (Item 14) The electronic circuit of any one of items 9 to 13, characterized in that, before the ring oscillator starts operating, in response to a common signal, the replica circuit starts operating and the supply circuit starts supplying current to the gate of the control transistor.

[0062] (Item 15) A distance measuring device comprising: a plurality of pixels; and a generating circuit for generating distance information based on signals obtained by the plurality of pixels, A distance measuring device, characterized in that the generation circuit includes an electronic circuit described in any one of items 1 to 14.

[0063] (Item 16) Item 16. The distance measuring device according to item 15, wherein each of the plurality of pixels includes an avalanche photodiode.

[0064] (Item 17) Item 15 or 16, a distance measuring device; a processing device for processing a signal output from the distance measuring device; An apparatus comprising:

[0065] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0066] 100: electronic circuit, 101: time-to-digital converter, 110: voltage-controlled oscillator (VCO), 121: control transistor, 130: supply circuit, V1, V2: power supply lines

Claims

1. 1. An electronic circuit including a plurality of time-to-digital converters, each of the plurality of time-to-digital converters includes a voltage-controlled oscillator for generating a multi-phase clock; Each of the oscillators includes a control transistor that is disposed between a first power supply line and a second power supply line and has a gate to which a control voltage is input; 4. The electronic circuit according to claim 1, wherein each oscillator further comprises a supply circuit for supplying a current to said gate.

2. 2. The electronic circuit according to claim 1, wherein the supply circuit includes a capacitance element arranged between the first power supply line and the gate, a first switch element for charging the capacitance element, and a second switch element for supplying a current to the gate.

3. the supply circuit includes a supply transistor for supplying a current to the gate of the control transistor; a source and a drain of the supply transistor are connected to a third power supply line via the first switch element, and are connected to the first power supply line via the second switch element; a gate of the supply transistor is connected to the gate of the control transistor; The body of the supply transistor is connected to the first power supply line; 3. The electronic circuit according to claim 2, wherein a gate capacitance of the supply transistor functions as the capacitive element.

4. 2. The electronic circuit according to claim 1, wherein the supply circuit reduces fluctuations in potential of the gate caused by charge injection via a capacitance of the gate when the oscillator is started.

5. 5. The electronic circuit according to claim 4, wherein the supply circuit supplies a current to the gate of the control transistor in a direction opposite to a current flowing between the gate of the control transistor and the supply circuit by the charge injection.

6. 2. The electronic circuit according to claim 1, wherein the oscillators arranged in the plurality of time-to-digital converters each have a terminal to which a signal for starting operation is input.

7. 2. The electronic circuit of claim 1, wherein the oscillator further comprises a ring oscillator disposed between the control transistor and the second power supply line.

8. 8. The electronic circuit of claim 7, wherein in response to a common signal, the ring oscillator starts operating and the supply circuit starts supplying current to the gate of the control transistor.

9. Each oscillator further includes a replica circuit of the ring oscillator; 8. The electronic circuit according to claim 7, wherein the replica circuit starts operating before the ring oscillator starts operating, and then the ring oscillator starts operating in response to the replica circuit being stopped.

10. 10. The electronic circuit according to claim 9, further comprising: a replica circuit that starts operating in response to the ring oscillator being stopped.

11. 10. The electronic circuit according to claim 9, wherein the replica circuits arranged in each of the plurality of time-to-digital converters are configured to simultaneously start operating before the ring oscillator starts operating.

12. 10. The electronic circuit according to claim 9, wherein a current flowing through the control transistor when the replica circuit is in operation is equal to or greater than half of a current flowing through the control transistor when the ring oscillator is in operation.

13. 10. The electronic circuit according to claim 9, wherein the replica circuit is configured so that a current flowing through the control transistor when the ring oscillator is in operation is the same as a current flowing through the control transistor when the replica circuit is in operation.

14. 10. The electronic circuit of claim 9, wherein, in response to a common signal, before the ring oscillator starts operating, the replica circuit starts operating and the supply circuit starts supplying current to the gate of the control transistor.

15. A distance measuring device comprising: a plurality of pixels; and a generating circuit for generating distance information based on signals obtained by the plurality of pixels, A distance measuring device, wherein the generating circuit includes an electronic circuit according to claim 1 .

16. 16. The distance measuring device according to claim 15, wherein each of the plurality of pixels includes an avalanche photodiode.

17. A distance measuring device according to claim 15; a processing device for processing a signal output from the distance measuring device; An apparatus comprising:

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