Packaging substrate and manufacturing method of the same

Abstract

To provide a packaging substrate capable of protecting a glass core or the packaging substrate from external impact, and substantially minimizing damage and breakage of the glass core, and a manufacturing method of the packaging substrate.SOLUTION: The packaging substrate includes: a glass core 21 including a first surface and a second surface facing each other; and an upper layer 70 stacked on the first surface or a lower layer 80 stacked under the second surface. The corners of the packaging substrate 20 are treated as curved surfaces or chamfered. Through this, it is possible to reduce external impact applied to the glass core 21 and minimize damage and breakage to the glass core.SELECTED DRAWING: Figure 8

Description

[Technical field]

[0001] The present embodiment relates to a semiconductor packaging substrate and a method for manufacturing the same, and is directed to a packaging substrate including a glass core and a method for manufacturing the same. [Background technology]

[0002] In manufacturing electronic components, the process of creating circuits on a semiconductor wafer is called the front-end process (FE: Front-End), and the process of assembling the wafer so that it can be used in an actual product is called the back-end process (BE: Back-End), which includes the packaging process.

[0003] The four core technologies of the semiconductor industry that have enabled the recent rapid development of electronic products are semiconductor technology, semiconductor packaging technology, manufacturing process technology, and software technology. Semiconductor technology has evolved into various forms, such as nano-level line widths below the micron level, over 10 million cells, high-speed operation, and large amounts of heat dissipation, but the technology to perfectly package these has not been supported. As a result, the electrical performance of semiconductors is sometimes determined by the packaging technology and the resulting electrical connections, rather than the performance of the semiconductor technology itself.

[0004] Ceramic or resin is currently used as a material for packaging substrates. Recently, however, research has been conducted into the application of silicon or glass to high-end packaging substrates. In particular, a packaging substrate having a cavity structure has been developed by applying a glass substrate.

[0005] Related prior art includes Korean Patent Registration No. 10-1458663 and Korean Patent Publication No. 10-2012-0096003. Summary of the Invention [Problem to be solved by the invention]

[0006] An object of the embodiment is to provide a packaging substrate capable of protecting a glass core or a packaging substrate from an external impact and substantially minimizing damage and breakage of the glass core, and a manufacturing method thereof.

[0007] Also, an object of the embodiment is to provide a packaging substrate capable of protecting corners or edge portions of a glass core or a packaging substrate and minimizing defects, and a manufacturing method thereof.

[0008] Another object of the embodiment is to provide a packaging substrate capable of absorbing external shock when a glass core or a packaging substrate is placed on or moved from a tray, and a manufacturing method thereof. [Means for solving the problem]

[0009] To achieve the above object, a packaging substrate according to one embodiment includes a glass core having a first surface and a second surface facing each other, and an upper layer laminated on the first surface or a lower layer laminated below the second surface.

[0010] The corners of the packaging substrate may be rounded or chamfered.

[0011] The corners of the glass core or packaging substrate may be rounded or chamfered.

[0012] The first surface and the second surface of the glass core may be generally rectangular, and some or all of the vertices of the glass core or the packaging substrate may be rounded.

[0013] The upper layer and / or the lower layer may each have a tapered shape in which the edge becomes thinner in the direction of the cut surface of the glass core.

[0014] The substrate radius of curvature is the radius of curvature at the rounded apex of the glass core or the packaging substrate.

[0015] The glass core or the packaging substrate may have a substrate curvature radius of 0.5 mm or more and 8 mm or less.

[0016] The side curvature radius is the radius of curvature at the corners of the packaging substrate.

[0017] The packaging substrate may have a side curvature radius of 0.05 mm or more.

[0018] In order to achieve the above object, a manufacturing method of a packaging substrate according to one embodiment includes the steps of: forming an upper layer on a first surface of a glass core having a first surface and a second surface facing each other, or a lower layer under the second surface; forming a cutting portion in which a predetermined cutting line is indicated on at least one of the upper layer, the lower layer, the first surface, and the second surface; cutting the glass core along the cutting portion so that a cut surface of the packaging substrate is exposed; and grinding the cut surface of the packaging substrate.

[0019] The upper layer or the lower layer may include an insulating layer, and the step of forming the cut portion may be a step of partially or entirely removing a portion of the insulating layer corresponding to the cut line.

[0020] The cutting step may be performed by a dicing sawing or laser cutting method.

[0021] Grinding the cut surface may include chamfering corners of the cut surface.

[0022] Alternatively, as another example, the step of grinding the cut surface may include the step of curving the cut surface.

[0023] The glass core may have a rectangular shape at the first surface and the second surface, and the step of grinding the cut surface may further include a step of rounding a vertex of the glass core.

[0024] The step of grinding the cut surface may include a first process of roughly grinding the cut surface with a wheel having a first mesh at a first speed or faster, and a second process of finish grinding the cut surface with a wheel having a second mesh at a speed slower than the first speed. The second mesh may have a larger number of meshes than the first mesh. Effect of the Invention

[0025] The packaging substrate and manufacturing method thereof according to the embodiment may protect the glass core or the packaging substrate from external impact and minimize damage and breakage of the glass core or the packaging substrate.

[0026] Also, embodiments provide a packaging substrate capable of protecting corners or edge portions of a glass core or a packaging substrate and minimizing defects, and a manufacturing method thereof.

[0027] In addition, the embodiment may mitigate external shock when the glass core or packaging substrate is placed on or moved from the tray. [Brief description of the drawings]

[0028] [Figure 1] 1 is a conceptual diagram illustrating a cross-sectional structure of a packaging substrate according to an embodiment; [Diagram 2] 13 is a conceptual diagram illustrating a cross-sectional structure of a packaging substrate according to another embodiment; FIG. [Diagram 3] 1A and 1B are schematic cross-sectional views illustrating a portion of a packaging substrate according to an embodiment. [Figure 4]1 is a flowchart illustrating a process of forming a core distribution layer in a process of manufacturing a packaging substrate according to an embodiment. [Diagram 5] 1 is a flowchart illustrating a process of forming an insulating layer in a process of manufacturing a packaging substrate according to an embodiment. [Figure 6] 1A to 1C are diagrams illustrating a cross section of a glass core according to an embodiment. [Figure 7] 1A and 1B are diagrams illustrating the movement of a packaging substrate according to an embodiment, in which (a) is an existing example placed on a tray (an example in which cracks or chipping occurs in the glass core), and (b) is an example of an embodiment placed on a tray (an example in which the packaging substrate is placed while sliding along the curved surface of the substrate). [Figure 8] FIG. 1 is a flowchart illustrating a cross-sectional view of a manufacturing process of a packaging substrate according to an embodiment, in which (a) illustrates laser ablation (V-Grooving), (b) illustrates snapping, and (c) illustrates grinding. [Figure 9A] This is a diagram illustrating a grinder according to an embodiment, in which S represents the spindle, W represents the wheel, and T represents the height of the processing portion (mesh) of the wheel, which is greater than or equal to the thickness of the substrate. [Figure 9B] 1 is a diagram illustrating grinding of a packaging substrate according to an embodiment, where the arrow indicates the direction of progress. [Figure 10A] FIG. 10A is a photograph showing a manufacturing process of a glass core according to an embodiment, and shows a cross section after V-grooving, where H stands for hackle and V stands for V-groove. [Figure 10B] FIG. 10B is a photograph showing a process for manufacturing a glass core according to an embodiment, and shows a cross section after snapping. [Figure 10C] FIG. 10C is a photograph showing a manufacturing process of a glass core according to an embodiment, and shows a cross section of a package substrate with rounded corners (a) and a cross section of a package substrate with chamfered corners (b). [Figure 11] 13A and 13B are schematic views of a glass substrate according to another embodiment as viewed from above and a photograph of a portion thereof; BEST MODE FOR CARRYING OUT THEINVENTION

[0029] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily understand the embodiments. However, the embodiments may be embodied in many different forms and are not limited to the embodiments described herein. The same reference numerals are used throughout the specification to refer to similar parts.

[0030] Throughout this specification, the term "combinations thereof" in a Markush form phrase means a mixture or combination of one or more selected from the group of elements set forth in the Markush form phrase, including one or more selected from the group of elements.

[0031] Throughout this specification, terms such as "first," "second," or "A," "B" are used to distinguish identical terms from one another, and singular expressions include plural expressions unless the context clearly indicates otherwise.

[0032] In this specification, the term "-" may mean that the compound includes a compound that corresponds to "-" or a derivative of "-".

[0033] In this specification, the term "B is located on A" means that B is located on A in direct contact therewith, or that B is located on A with another layer located therebetween, and is not to be interpreted as being limited to B being located in contact with the surface of A.

[0034] In this specification, the expression "B is linked to A" means that A and B are directly linked, or that A and B are linked via another component between them, and unless otherwise specified, it is not to be interpreted as being limited to A and B being directly linked.

[0035] In this specification, the term "singular" is to be construed as including the singular or plural as the context requires, unless otherwise specified.

[0036] The inventors recognized that in the process of developing a semiconductor device that can achieve high performance with a more integrated and thinner thickness, not only the element itself but also the packaging portion is an important factor in improving performance. As a result of their research, they discovered that unlike conventional interposers and organic substrates, which use two or more layers of cores on a motherboard as a packaging substrate, it is possible to make the packaging substrate thinner and help improve the electrical characteristics of the semiconductor device by applying a single layer of glass core and applying a cavity structure.

[0037] Meanwhile, the glass core may crack or chip due to internal stress and / or external impact during processing. In particular, since there is a high possibility of the substrate being damaged when the packaging substrate is placed on a tool such as a tray or boat for a post-process, it was recognized that there was a need to improve the damage and breakage phenomenon for substrate transfer and post-processing.

[0038] Therefore, the inventors have found that if the cut surface of the packaging substrate is not a straight cross section, but the corner or apex area is curved or chamfered, damage to the substrate can be minimized, and have completed the invention.

[0039] FIG. 1 is a conceptual diagram illustrating the cross-sectional structure of a packaging substrate according to an embodiment, FIG. 2 is a conceptual diagram illustrating the cross-sectional structure of a packaging substrate according to another embodiment, and FIGS. 3(a) and (b) are conceptual diagrams illustrating the cross-section of a portion of a packaging substrate according to an embodiment.

[0040] To achieve the above objective, the semiconductor device 100 of the embodiment includes a semiconductor element section 30 in which one or more semiconductor elements 32, 34, and 36 are located, a packaging substrate 20 electrically connected to the semiconductor elements, and a motherboard 10 electrically connected to the packaging substrate 20, which transmits external electrical signals to and connects the semiconductor elements 32, 34, and 36 to each other.

[0041] The packaging substrate 20 according to one embodiment includes a core layer 22, an upper layer 26 disposed on one surface of the core layer 22, and a cavity portion 28 in which a cavity element 40 can be disposed.

[0042] The semiconductor element section 30 means an element mounted on a semiconductor device, and is mounted on the packaging substrate 20 by connection electrodes or the like. Specifically, the semiconductor element section 30 may be, for example, a computing element such as a CPU or a GPU (first element: 32, second element: 34), a storage element such as a memory chip (third element: 36), or the like, but any semiconductor element mounted on a semiconductor device can be used without any restrictions.

[0043] The motherboard 10 may be a motherboard such as a printed circuit board or a printed wiring board.

[0044] The packaging substrate 20 may optionally further include a lower layer (not shown) located below the core layer.

[0045] The core layer 22 may include a glass core 21 including a first region 221 having a first thickness 211 and a second region 222 adjacent to the first region 221 and having a second thickness 212 that is thinner than the first thickness; a number of core vias 23 penetrating the glass core 21 in the thickness direction; and a core distribution layer 24 located on the surface of the glass core 21 or the core vias 23 and electrically connecting a first surface 213 of the glass core 21 to a second surface 214 facing the first surface through the core vias 23. That is, the core layer 22 may refer to a glass structure that is a glass core 21 including a first surface 213 and a second surface 214 facing each other, a core via 23, a cavity portion 28, or all of these.

[0046] The second region 222 of the core layer 22 may serve as a cavity structure.

[0047] Within the same area, the glass core 21 has a first surface 213 and a second surface 214 opposed to each other, the two surfaces being generally parallel to each other, so that the glass core 21 has a constant thickness throughout.

[0048] An internal space 281 formed by the difference in thickness between the first section 221 and the second section 222 serves to accommodate a part or the whole of the cavity element 40 .

[0049] The glass core 21 may include core vias 23 penetrating the first surface 213 and the second surface 214. The core vias 23 may be formed in both the first region 221 and the second region 222 and may be formed at any desired pitch and pattern.

[0050] Conventionally, packaging substrates for semiconductor devices have been applied in the form of a laminate of a silicon substrate and an organic substrate. In the case of a silicon substrate, due to the characteristics of a semiconductor, there is a risk of parasitic elements being generated when applied to high-speed circuits, and there is a drawback in that the power loss is relatively large. In addition, in the case of an organic substrate, a large area is required to form an increasingly complex distribution pattern, which does not fit with the trend of manufacturing electronic devices that are becoming ultra-miniaturized. In order to form a complex distribution pattern within a set size, it is necessary to substantially fine the pattern, but there is a practical limit to the fine pattern due to the characteristics of materials such as polymers applied to organic substrates.

[0051] In the embodiment, to solve this problem, the glass core 21 is used as a support for the core layer 22. In addition, by using the glass core 21 and the core via 23 formed penetrating the glass core 21, the length of electrical flow is further shortened, providing a packaging substrate 20 that is more compact, has faster response, and has less loss characteristics.

[0052] The glass core 21 is preferably a glass substrate used in semiconductors. For example, a borosilicate glass substrate or an alkali-free glass substrate may be used, but is not limited thereto.

[0053] The core via 23 penetrates the glass core 21. The core via 23 may be formed by removing a predetermined region of the glass core 21, specifically, by etching a plate-shaped glass by a physical and / or chemical method.

[0054] Specifically, the formation of the core via 23 may be achieved by forming a defect (groove) on the surface of the glass core using a laser or other method, followed by chemical etching, laser etching, etc., but is not limited thereto.

[0055] The core vias 23 may be positioned at 100 to 3,000, 100 to 2,500, or 225 to 1,024 per unit area (1 cm×1 cm) of the glass core 21. When such pitch conditions are satisfied, the formation of an electrically conductive layer and the performance of the packaging substrate can be improved.

[0056] The core distribution layer 24 includes a core distribution pattern 241, which is an electrically conductive layer that electrically connects the first and second surfaces of the glass core through a through via, and a core insulating layer 223 that surrounds the core distribution pattern. The core layer 22 has an electrically conductive layer formed therein through a core via, and serves as an electrical path across the glass core 21, and connects the upper and lower parts of the glass core over a relatively short distance, allowing for faster electrical signal transmission and low loss characteristics. The electrically conductive layer may be, for example, a copper plating layer, but is not limited thereto.

[0057] The shape of the cavity portion 28 is not limited and may be substantially circular, triangular, rectangular, hexagonal, octagonal, cross-shaped, or the like.

[0058] The cavity element 40 may be generally cylindrical, rectangular, or polygonal in shape.

[0059] The cavity portion 28 may include a cavity distribution pattern, which is an electrically conductive layer that electrically connects the cavity element 40 and the core distribution layer 24, and an insulating layer that surrounds the cavity distribution pattern.

[0060] Meanwhile, the cavity portion according to another embodiment may be embodied in a form penetrating the first surface 213 and the second surface 214 of the glass core 21. In this case, the cavity portion may be formed by the same process as the process of forming the core via 23, and the area and shape penetrating the glass core 21 may be different from those of the core via 23.

[0061] In this embodiment, an insulating layer may be formed in the cavity portion after the cavity element 40 is arranged in the cavity portion. That is, an insulating layer may be formed in the cavity portion through the process of forming the core insulating layer 223 described above.

[0062] The core distribution pattern 241 may be patterned so as to be electrically connectable with the cavity element 40 .

[0063] The cavity element 40 may include an active element such as a transistor, or a power transfer element, ie, a passive element, such as a multi-layer ceramic capacitor (MLCC).

[0064] When an element such as a transistor that converts electrical signals between the motherboard and the semiconductor element portion to an appropriate level is applied as the cavity element 40, a transistor or the like is applied to the passage of the packaging substrate 20, thereby providing a semiconductor device 100 that is more efficient and has a higher speed.

[0065] In addition, power transfer devices such as multilayer ceramic capacitors (MLCCs) play an important role in the performance of semiconductor devices. Power transfer devices, which are passive devices, are generally applied to semiconductor devices in numbers of at least 200, and the performance of the device is also affected by the characteristics of the electrical conductive layer around the device when transferring power. In one embodiment, a non-circular core via can be applied to such power transfer devices, where an electrical conductive layer with low resistance is required.

[0066] Meanwhile, the cavity element 40 may be applied by inserting passive elements such as capacitors individually, or an element group including a number of passive elements embedded between insulating layers (cavity element insulating layers) may be formed with electrodes exposed and then inserted into the cavity element. In the latter case, the workability of manufacturing the packaging substrate may be further improved, and it is more advantageous for insulating layers to be positioned sufficiently and reliably in spaces between complex elements.

[0067] The glass core 21 acts as an intermediate or mediating role connecting the semiconductor device part 30 and the motherboard 10 at the upper and lower parts, respectively, and the core vias 23 act as paths for transmitting these electrical signals, thereby ensuring smooth signal transmission. The core vias arranged in the first area 221 are referred to as first area core vias 231 to distinguish them from the core vias in the second area 222 described below.

[0068] A top layer 26 is positioned on the first surface 213 .

[0069] The upper layer 26 includes an upper distribution layer 25 and an upper surface connection layer 27 located on the upper distribution layer 25, and the top surface of the upper layer 26 can be protected by a cover layer 60 having an opening formed therein to which a connection electrode of a semiconductor element portion can directly abut.

[0070] The upper distribution layer 25 includes an upper insulating layer 253 located on the first surface, and an upper distribution pattern 251, which is an electrically conductive layer having a predetermined pattern and at least a part of which is electrically connected to the core distribution layer 24, embedded in the upper insulating layer 253. The upper distribution layers 25 arranged one above the other can be connected to each other through blind vias 252.

[0071] The upper insulating layer 253 may be any material that can be used as an insulating layer for a semiconductor device or a packaging substrate, such as, but not limited to, an epoxy resin containing a filler.

[0072] The insulator layer may be formed by forming a coating layer and curing it, or may be formed by laminating an insulator film in an uncured or semi-cured state onto the core layer 22 and curing it. In this case, if a reduced pressure lamination method is used, the insulator can be filled into the inner space of the core via 23, allowing for efficient process.

[0073] According to one embodiment, even if multiple insulating layers are applied by stacking, it may be difficult to substantially separate the insulating layers, and the multiple insulating layers are collectively referred to as the upper insulating layer. Also, the core insulating layer 223 and the upper insulating layer 253 may be made of the same insulating material, in which case the boundary between them is not substantially separated. Alternatively, according to another embodiment, the boundary between the insulating layers may be created by setting different pressures and temperatures for curing the multiple insulating layers.

[0074] The upper distribution pattern 251 means an electrically conductive layer located in the upper insulating layer 253 in a predetermined shape, and may be formed, for example, by a build-up layer method. In particular, an insulating layer is formed, unnecessary parts of the insulating layer are removed, an electrically conductive layer is formed by a method such as copper plating, and an unnecessary part of the electrically conductive layer is selectively removed, an insulating layer is formed again on the electrically conductive layer, the unnecessary parts are removed again, and an electrically conductive layer is formed by a method such as plating, and the like. By repeating these methods, the upper distribution pattern 251 having an electrically conductive layer formed vertically or horizontally in a desired pattern can be formed.

[0075] The upper distribution pattern 251 is located between the core layer 22 and the semiconductor device part 30, and is formed to include a fine pattern in at least a part thereof so that electrical signals can be smoothly transmitted to the semiconductor device part 30 and the intended complex pattern can be fully accommodated. In this case, the fine pattern may have a width and interval each of less than 4 μm, 3.5 μm or less, 3 μm or less, 2.5 μm or less, or 1 to 2.3 μm (the same applies to the following explanation of the fine pattern).

[0076] The upper connection layer 27 includes an upper connection pattern 272, at least a portion of which is electrically connected to the upper distribution pattern 251 and located on the upper insulating layer 253, and an upper connection electrode 271 that electrically connects the semiconductor device unit 30 and the upper connection pattern 272. The upper connection pattern 272 may be located on one surface of the upper insulating layer 253, or may be embedded with at least a portion thereof exposed on the upper insulating layer. For example, when the upper connection pattern is located on one surface of the upper insulating layer, the upper insulating layer may be formed by plating or the like, and when the upper connection pattern is embedded with a portion thereof exposed on the upper insulating layer, a copper plating layer or the like may be formed, and then a portion of the insulating layer or the electrically conductive layer may be removed by surface polishing, surface etching, or the like.

[0077] The upper connection pattern 272 may include a fine pattern at least in a portion thereof, like the above-mentioned upper distribution pattern 251. The upper connection pattern 272 including such a fine pattern can electrically connect more elements in a small area, facilitate the connection of electrical signals between elements or with the outside, and enable more integrated packaging.

[0078] The upper connection electrodes 271 may be directly connected to the semiconductor device part 30 via terminals or the like, or may be connected via device connection parts 51 such as solder balls.

[0079] The cavity portion 28 is located above and / or below the second region 222 and includes a cavity distribution layer 282 electrically connected to the core distribution pattern 241 and an internal space 281 in which the cavity element 40 is located. The cavity distribution layer 282 may be formed through a second region core via 232.

[0080] Specifically, the thickness of the glass core 21 in the second region 222 is thinner than that in the first region 221, and the cavity element 40 can be located in an internal space 281 formed by the difference in thickness. In addition, the core via 23 and the core distribution layer 24 formed in the glass core 21 serve as an electrical connection structure that connects the cavity element 40 to an external element.

[0081] Also, as described above, a cavity portion may be generated in the first area 221, i.e., penetrating the first surface 213 and the second surface 214 of the glass core 1, rather than the second area 222, and a cavity element 40 may be arranged in the cavity portion.

[0082] The packaging substrate 20 is also connected to the motherboard 10. The terminals of the motherboard 10 may be directly connected to a core distribution pattern 241 located on at least a portion of the second surface 214 of the core layer 22, or may be electrically connected to the motherboard 10 via a board connection part 52 such as a solder ball. The core distribution pattern 241 in contact with the motherboard 10 may be connected to the motherboard 10 via a lower layer (not shown) located under the core layer 22. The element connection part 51 and the board connection part 52 are collectively referred to as a connection part 50.

[0083] For example, the packaging substrate 20 located between the semiconductor device unit 30 and the motherboard 10 may not include any additional substrate other than the glass core 21 .

[0084] Conventionally, when connecting a device to a motherboard, an interposer and an organic substrate are laminated between them. It is understood that this multi-layered structure is applied for at least two reasons. One is that there is a scale problem when directly bonding a fine pattern of a device to a motherboard, and the other is that a problem of wiring damage may occur due to the difference in thermal expansion coefficient during the bonding process or the operation process of the semiconductor device. In the embodiment, this problem is solved by applying a glass core with a thermal expansion coefficient similar to that of a semiconductor device, and forming a fine pattern with a fine scale sufficient for mounting a device on the first surface of the glass core and its upper layer.

[0085] Hereinafter, a method for manufacturing a packaging substrate according to an embodiment of the present invention will be described.

[0086] 4 and 5 are flow charts illustrating a cross-sectional view of a manufacturing process of a packaging substrate according to an embodiment.

[0087] First, as shown in (a) of FIG. 4, a glass core 21a having flat first and second surfaces is prepared, and a defect (groove) 21b is formed on the glass surface at a predetermined position for forming a core via. The glass core may be a glass core applied to a substrate of an electronic device, for example, but is not limited to, an alkali-free glass core. As a commercially available product, a product manufactured by a manufacturer such as Corning, Schott, or AGC may be applied. The defect (groove) may be formed by mechanical etching, laser irradiation, or other methods.

[0088] As shown in Fig. 4(b), the glass core 21a having the defect (groove) 21b undergoes an etching step to form a core via 23 through a physical or chemical etching process. In the etching process, the glass core forms a via at the defect, and the surface of the glass core 21a may also be etched at the same time. In order to prevent such etching of the glass surface, a masking film or the like may be applied, but in consideration of the troublesome process of applying and removing the masking film, the glass core having the defect itself may be etched, and in this case, the thickness of the glass core having the core via may be somewhat thinner than the thickness of the initial glass core.

[0089] Thereafter, a core layer manufacturing step may be performed by forming an electrically conductive layer 21d on the glass core as shown in Fig. 4(c) and (d). The electrically conductive layer may be a metal layer typically including, but not limited to, copper metal.

[0090] The adhesion between the glass surface (including the glass core surface and the core via surface) and the copper metal surface is poor due to their different properties. In the present embodiment, the adhesion between the glass surface and the metal can be improved by two methods, a dry method and a wet method.

[0091] The dry method is a method of applying sputtering, i.e., forming a seed layer 21c on the glass surface and the inner diameter of the core via by metal sputtering. In forming the seed layer, a different metal such as titanium, chromium, or nickel may be sputtered together with copper, etc., and in this case, the adhesion between the glass and the metal may be improved due to an anchor effect in which the surface morphology of the glass and the metal particles interact with each other.

[0092] The wet method is a method of performing a primer treatment, and is a method of forming a primer layer 21c by pretreating with a compound having a functional group such as an amine. Depending on the intended degree of adhesion, a primer treatment can be performed with a compound or particles having an amine functional group after pretreating with a silane coupling agent. As mentioned above, the support substrate of the embodiment needs to have high performance to be able to form a fine pattern, and this should be maintained even after the primer treatment. Therefore, when such a primer includes nanoparticles, it is preferable that nanoparticles having an average diameter of 150 nm or less are applied, and for example, it is preferable that nanoparticles are applied as particles having an amine group. The primer layer may be formed by applying an adhesion improver manufactured, for example, by MEC's ​​CZ series.

[0093] The seed layer / primer layer 21c may selectively form an electrically conductive layer or a metal layer with or without removing portions that do not require the formation of an electrically conductive layer. In addition, the seed layer / primer layer 21c may be selectively treated with portions that require or do not require the formation of an electrically conductive layer in an activated or inactivated state for metal plating, and the subsequent steps may be performed. For example, the activation or inactivation treatment may be a light irradiation treatment using a laser of a certain wavelength, a chemical treatment, or the like. The formation of the metal layer may be performed using a copper plating method or the like that is applied to the manufacture of semiconductor devices, but is not limited thereto.

[0094] As shown in (e) of Figure 4, a portion of the core distribution layer may be removed if unnecessary, or the seed layer may be partially removed or passivated, and then metal plating may be performed to form an electrically conductive layer in a predetermined pattern, thereby forming an etched layer 21e of the core distribution layer.

[0095] FIG. 5 illustrates a manufacturing step of forming an insulating layer and an upper distribution pattern according to one embodiment.

[0096] As shown in (a) of Fig. 5, the core via may undergo an insulating layer formation step in which an insulating layer is used to fill empty spaces after the formation of the core distribution layer, which is the electrically conductive layer. The insulating layer may be in the form of a film, and may be, for example, a method of vacuum laminating an insulating layer in the form of a film. When vacuum lamination is performed in this manner, the insulating layer is sufficiently filled into the empty spaces inside the core via, thereby forming a core insulating layer without the formation of voids.

[0097] 5(b)-(e) illustrate the top layer fabrication steps.

[0098] The upper layer manufacturing step is a step of forming an upper distribution layer including an upper insulating layer and an upper distribution pattern on the core layer. The upper insulating layer may be formed by coating a resin composition forming the insulating layer 23a or laminating an insulating film, and the method of laminating an insulating film is preferable for simplicity. The lamination of the insulating film may be performed by laminating and curing the insulating film, and if a reduced pressure lamination method is applied, the insulating resin may be sufficiently embedded even in layers in which no electrically conductive layer is formed inside the core via. The upper insulating layer also directly contacts the glass core at least partially, and therefore has sufficient adhesion. Specifically, the glass core and the upper insulating layer preferably have a characteristic that satisfies an adhesion test value of 4B or more according to ASTM D3359.

[0099] The upper distribution pattern may be formed by repeating the process of forming the insulating layer 23a, forming the electrically conductive layer 23c in a predetermined pattern, and etching unnecessary portions to form an etched layer 23d of the electrically conductive layer, and in the case of electrically conductive layers formed adjacent to each other with an insulating layer in between, the upper distribution pattern may be formed by forming blind vias 23b in the insulating layer and then performing a plating process. The blind vias may be formed by dry etching such as laser etching or plasma etching, or wet etching using a masking layer and an etchant.

[0100] Thereafter, a top connection layer and a cover layer may be formed, not shown.

[0101] The upper connection pattern and the upper connection electrodes may also be formed by a process similar to that for forming the upper distribution layer. Specifically, they may be formed by forming an etching layer of the insulating layer on the insulating layer 23e, forming an electrically conductive layer thereon again, and then forming an etching layer of the electrically conductive layer, or by selectively forming only the electrically conductive layer without applying an etching method. The cover layer may be formed by forming openings (not shown) at positions corresponding to the upper connection electrodes to expose the upper connection electrodes and to allow direct connection to the element connection parts or terminals of the elements.

[0102] After the upper layer is formed, a process of forming a lower connection layer and a cover layer to form a lower layer can be performed. In a similar manner to the above-mentioned upper connection layer and cover layer formation steps, a lower distribution layer and / or a lower connection layer, and optionally a cover layer (not shown) can be formed.

[0103] According to an embodiment, one or a number of semiconductor devices are mounted on the packaging substrate 20 during manufacturing. Before or after mounting, a large-area substrate may be cut into packaging substrates 20 of a predetermined size, i.e., unit. That is, a packaging substrate or a glass core (core substrate or core layer) may be cut into individual packaging substrates or packaging substrate units having a pattern of a certain size. Such a substrate cutting, separation, and division process may be referred to as dicing or singulation.

[0104] In this specification, dicing or singulation means dividing a packaging substrate including a glass substrate as a core layer into a plurality of units. In addition, the glass substrate used as the core layer may be referred to as a core substrate, a glass core, etc., and a substrate having an upper layer and / or a lower layer disposed on the core layer may be referred to as a packaging substrate, etc.

[0105] 6(a) to 6(c) are diagrams illustrating a cross section of a packaging substrate according to an embodiment.

[0106] 1 to 5, the glass core 21 may have a core via and a cavity, the upper layer may have a core distribution layer and a cover layer, and the lower layer may have a multi-layer structure including an insulating layer and a metal distribution pattern. In the following drawings, for convenience of explanation, the packaging substrate 20 including the glass core 21, the upper layer 70 formed on the first surface of the glass core 21, and the lower layer 80 formed on the second surface is simply explained, and detailed explanation of the remaining detailed configuration is omitted.

[0107] According to the embodiment shown in FIG. 6, a top layer 70 may be disposed over a first surface of the glass core 21, and optionally a bottom layer 80 may be disposed under a second surface.

[0108] The upper layer 70 may include an upper distribution layer 71, which is a multi-layer laminate structure including an upper metal pattern (upper distribution pattern) and an upper insulating layer, and a first cover layer 72 formed on the upper part of the upper distribution layer 71 to protect the substrate. The lower layer 80 may also include a lower distribution layer 81, which is a multi-layer structure including a lower metal pattern (lower distribution pattern) and a lower insulating layer, and a second cover layer 82 formed on the upper part of the lower distribution layer 81 to protect the substrate. The specific arrangement of the upper distribution pattern and the upper insulating layer in the upper distribution layer is omitted in the drawings. Also, the arrangement of the lower distribution pattern and the lower insulating layer in the lower distribution layer is omitted in the drawings.

[0109] The first cover layer 72 and the second cover layer 82 may be implemented as a solder resist for protecting the surface circuit from the external environment, or may be implemented as a polyimide film (PI film), which is a heat-resistant insulating film having high thermal stability and high mechanical strength, depending on the embodiment.

[0110] A core via, a cavity, and / or a metal pattern layer are formed in the glass core 21, and a semiconductor element (not shown) is selectively mounted on the upper layer 70 to manufacture a packaging substrate, which is then cut into specific units. The cut packaging substrate 20 may have a cross section as shown in FIG. 6(a). The packaging substrate may be cut along a predetermined cutting line, and a metal pattern layer may not be formed on a portion of the upper layer 70 and / or the lower layer 80 that corresponds to the cutting line. That is, the cut portion of the upper layer 70 and / or the lower layer 80 may include only an insulating layer and / or a protective layer. Also, as shown in the figure, a cut surface A of the cut region (dotted line portion) of the packaging substrate 20 may be substantially perpendicular to the first surface or the second surface, and the corner may have a sharp straight line shape.

[0111] In a structure such as that shown in FIG. 6(a), there is a high possibility of damage due to external impact at the edge region of the cut surface A during movement and post-processing of the packaging substrate 20 (see FIG. 7(a)). Damage to the packaging substrate or glass core, even if it is only damage to a corner, can affect many other packaging substrates or glass cores arranged in the chamber. In addition, due to the nature of the manufacturing process of the packaging substrate, which is usually performed in a reduced pressure clean room using automated equipment, such damage can cause unintentional particle defects, and therefore cleaning of the process space is required, which leads to a decrease in yield. Therefore, in order to reduce the possibility of such damage, a packaging substrate as shown in FIG. 6(b) or (c) is proposed according to an embodiment of the present invention.

[0112] As shown in (b) of Fig. 6, the cut surface A of the packaging substrate 20 may have rounded corners and be curved, or as shown in (c) of Fig. 6, the edge region B may be chamfered. That is, the cut surface of the packaging substrate 20 may be entirely or partially processed into a curved surface, or the corners may be chamfered so that they are obtuse angles rather than right angles.

[0113] After being cut, the cut surface or corner region of the packaging substrate 20 may be provided with a shape as shown in Fig. 6(b) or 6(c) through a grinding process. In other words, the glass core 21, the upper layer 70, and the lower layer 80 constituting the packaging substrate 20 may be ground so that the edges thereof become tapered in the direction of the cut surface.

[0114] When curving or chamfering the cut surface, the upper layer 70 and / or the lower layer 80 of the glass core 21 may be ground, i.e., curved or chamfered, together with the glass core 21. Alternatively, according to another embodiment, the packaging substrate 20 may be ground only by the upper layer 70 or the lower layer 80, without grinding the glass core 21.

[0115] Alternatively, depending on the embodiment, the packaging substrate 20 may have the upper layer 70 formed only on the first surface of the glass core 21, and the lower layer 80 may not be formed on the second surface. In this case, the upper layer 70 and the second surface of the glass core 21 may be ground when processing the corners as shown in FIG. 6(c).

[0116] Also, depending on the embodiment, the glass core 21 and the packaging substrate 20 may have a rectangular shape when viewed from above, and some or all of the vertices of the rectangular shape may be rounded. The curvature of the rounded vertex portion may be set based on a diameter that generates the smallest deviation from a predetermined target value, so that an appropriate value may be derived. Also, the rounding may be performed together with grinding the edge region of the cut surface, or may be performed separately.

[0117] FIG. 7 is a diagram illustrating movement of a packaging substrate according to an embodiment.

[0118] FIG. 7(a) shows a case where a conventional packaging substrate, i.e., a core substrate having a glass structure, is placed on a tray T, and FIG. 7(b) shows a case where a core substrate is placed on a tray T according to an embodiment of the present invention.

[0119] As shown in the figure, if the cut surface of the packaging substrate has a straight cross section rather than a curved one, i.e., if the edges where the upper and lower surfaces of the packaging substrate meet the cut surface are sharp rather than rounded, the glass core is more likely to be impacted, which may cause cracks or chipping in the glass core. That is, when an existing packaging substrate is incorrectly placed on a tray or boat, the sharp edges may increase the likelihood of the glass core being broken.

[0120] Meanwhile, when the cut surface is rounded or chamfered according to an embodiment, the packaging substrate may be placed on a tray or boat while sliding along the curved surface of the substrate, thereby reducing the impact between the tray and the packaging substrate and reducing the possibility of defects due to breakage.

[0121] FIG. 8 is a flowchart illustrating a process for manufacturing a packaging substrate according to an embodiment in cross section.

[0122] 8(a), an upper layer 70 is formed on a first surface of the glass core 21, and a lower layer 80 is formed on a second surface. In another embodiment, only the upper layer 70 may be formed on the first surface of the glass core 21, and no lower layer may be formed on the lower surface. A semiconductor element may be mounted on the upper layer 70 (not shown).

[0123] 8(a), a V-grooving can be formed in the glass core 21 by removing the upper layer 70 by a predetermined width along a predetermined cutting line using a laser or the like (Laser Ablation, V-Grooving). The V-grooving acts as a cutting part that marks the cutting line in the upper or lower layer, and a part of the first or second surface of the glass core can be removed to mark the cutting line along with the removal of the upper or lower layer.

[0124] Specifically, a green laser or an ultraviolet laser can be used to remove the laminated upper layer 70, specifically an insulating layer such as ABF, along a cutting line such as a dicing street, to form a V-grooving in the glass core 21.

[0125] The depth of the V groove may be formed to a depth of about 1% to 25% of the thickness of the glass core 21. The depth of the V groove may be 1% or more, 3% or more, 5% or more, or 10% or more of the thickness of the glass core 21. The depth of the V groove may be 25% or less, 20% or less, or 15% or less of the thickness of the glass core 21. The output intensity of the laser and the number of processing times may be optimized according to the thicknesses of the upper layer 70 and the glass core 21, and the depth of the V groove may be adjusted accordingly.

[0126] 8(a), the process of removing the upper layer 70 and the process of generating defects in the glass core 21 may be performed simultaneously in a single process. In another example, the process of removing the upper layer 70 and the process of generating defects in the glass core 21 may be performed separately by using different laser intensities and types.

[0127] After the top layer 70 is removed, the top layer 70 may have a tapered shape that thins along the cut surface of the glass core 21 .

[0128] 8(b), the packaging substrate 20 can be cut and separated along a cutting portion such as a V-groove (snapping). At this time, the packaging substrate 20 can be separated into a predetermined product unit based on a physical force such as tension or rotation.

[0129] After the packaging substrate 20 is separated in this manner, the cut surface may have a V-groove mark made by a laser, a hackle H resembling bird feathers, etc. (see FIG. 10A). A slant cut may occur in which the glass core 21 is cut into an inclined shape rather than being broken vertically (see FIG. 10B). In other words, if the glass core 21 is cut using an external torque, the appearance may be incomplete.

[0130] In other embodiments, the glass core 21 may be separated using a laser or a dicing saw.

[0131] When the packaging substrate 20 is separated based on various methods, the cut surface may be ground to have a curved surface, as shown in FIG. 8(c).

[0132] Grinding the cut surface may include forming a chamfer at the corner of the cut surface. In another example, grinding the cut surface may include applying a grinding device to curve the cut surface.

[0133] The cut surface of a glass core that has not been cut and processed has a non-uniform right-angle deviation, and hackles also occur at the cut corners, which creates a risk of further damage such as cracking or chipping of the glass core. Through grinding, a glass core having a curved edge or chamfered cut surface can be provided (see FIG. 10C). This significantly reduces the risk of further damage. In addition, when the glass core or packaging substrate is moved or transported on a tray for additional processes, external impacts can be appropriately dispersed, minimizing defects due to cracks or chipping.

[0134] In another embodiment, the packaging substrate 20 having a cut surface may be rounded to have curved corners when viewed from above (see FIG. 11). A packaging substrate having a rectangular shape has four corners when viewed from above, and the corners may be processed to have a predetermined curvature to remove the sharp edges. This radius of curvature is called the substrate radius of curvature. The substrate radius of curvature may be 0.5 mm or more, 1 mm or more, 1.2 mm or more, or 1.5 mm or more. The substrate radius of curvature may be 8 mm or less, 7 mm or less, 6 mm or less, or 5 mm or less. In this case, it is possible to minimize the occurrence of cracks at the corners and at the same time stably secure the area where the upper and / or lower electrically conductive layers are disposed.

[0135] In another embodiment, the packaging substrate 20 having a cut surface may have a side surface corresponding to the thickness in a side (or cross-sectional) view that is ground. Exemplarily, the shape of the ground side surface may be a shape in which a corner where the side surface and the top surface of the packaging substrate intersect is chamfered (Flat Edge), a shape in which a side surface connecting the top surface and the bottom surface is rounded so that a central portion of the side surface protrudes (Pencil Edge), etc.

[0136] The side (edge) of the packaging substrate 20 may be a straight line or a broken glass shape immediately after the cut surface is formed, and may be manufactured into a shape having a certain radius of curvature by grinding. In this case, the radius of curvature is called the side radius of curvature.

[0137] The side curvature radius of the packaging substrate 20 may be 0.05 mm or more, 0.1 mm or more, 0.15 mm or more, or 0.2 mm or more. The side curvature radius may be 2.0 mm or less, 1.8 mm or less, 1.6 mm or less, 1.2 mm or less, 1 mm or less, 0.8 mm or less, or 0.6 mm or less. In this case, it is possible to improve workability by minimizing the occurrence of cracks in the packaging substrate or glass substrate during manufacturing, transportation, etc.

[0138] For example, when grinding is performed with the blade design angle set to 90°±1° and the cutting amount set to 0.08 to 0.14 mm, a packaging substrate with an edge curvature radius of 0.241 mm can be manufactured.

[0139] Also, for example, when grinding is performed with the blade design angle set to 120°±1° and the cutting amount set to 0.05 to 0.12 mm, a packaging substrate with an edge curvature radius of 0.522 mm can be manufactured.

[0140] FIG. 9A is a diagram illustrating a grinder according to an embodiment, and FIG. 9B is a diagram illustrating grinding of a packaging substrate according to an embodiment.

[0141] As shown, the grinder 200 may be composed of a wheel (WHELL) 220 for grinding a packaging substrate, a shaft (SPINDLE) 210 for rotating the wheel 220, and a drive unit for the wheel 220 (not shown).

[0142] The wheel 220, which is a processing unit for processing the packaging substrate, is processed to have a shape that matches the curvature of the final packaging substrate so that the corners of the packaging substrate can be curved. That is, the cross section of the wheel 220 has a rounded shape that corresponds to the curvature of the packaging substrate to be processed, and it is preferable that the height of the wheel 220 that comes into contact with the cutting surface of the packaging substrate is equal to or greater than the thickness of the substrate.

[0143] Depending on the embodiment, the diameter of the imaginary curved surface in contact with the cutting surface of the wheel 220 may be 5 mm to 20 mm. The diameter may be 5 mm or more, 8 mm or more, or 10 mm or more. The diameter may be 20 mm or less, 18 mm or less, or 15 mm or less.

[0144] The roughness of the wheel 220 can be represented by a mesh.

[0145] Depending on the embodiment, the roughness of the cutting surface of the wheel 220 may be about 600 mesh to 1400 mesh. The roughness of the cutting surface may be 600 mesh or more, 700 mesh or more, 800 mesh or more, or 900 mesh or more. The roughness of the cutting surface may be 1400 mesh or less, 1300 mesh or less, 1200 mesh or less, or 1100 mesh or less.

[0146] As shown in FIG. 9B, the packaging substrate (unit size or quarter panel size) to be processed is positioned on the wheel 220 of the grinder 200, and then the corners of the packaging substrate 20 can be ground by moving the grinder 200 along a predetermined traveling direction.

[0147] As an example, a wet grinding method may be applied in which cutting water or cutting oil is sprayed onto the wheel 220 .

[0148] The grinding speed may be from 10 mm / min to 500 mm / min.

[0149] The cut surface of the packaging substrate 20 may be polished (removed) by 50 μm to 300 μm, or the cut surface may be polished (removed) by 100 μm to 200 μm.

[0150] Depending on the embodiment, the grinding process may include a step of roughly grinding the cut surface of the packaging substrate 20 with a wheel having a first mesh at a first speed or faster, and a step of finish grinding the cut surface with a wheel having a second mesh larger than the first mesh at a first speed or slower.

[0151] By way of example, the roughness of the wheels may have mesh values ​​in the ranges mentioned above, and the difference between the first mesh and the second mesh may be 400 mesh or more, 450 mesh or more, or 500 mesh or more.

[0152] A larger mesh value indicates a weaker degree of roughness of the wheel 220. The packaging substrate 20 may be first roughly cut using a wheel having a strong roughness, and then finish cut using a wheel having a larger mesh and smoother roughness than the mesh applied during the rough cutting process.

[0153] The moving speed of the wheel 220 during rough cutting may be a predetermined speed, for example, 200 mm / sec to 400 mm / sec. The speed may be 200 mm / sec or more, 220 mm / sec or more, 240 mm / sec or more, 260 mm / sec or more, or 280 mm / sec or more. The speed may be 400 mm / sec or less, 380 mm / sec or less, 360 mm / sec or less, or 340 mm / sec or less. The finish cutting may be performed at a speed equal to or less than the speed of the rough cutting.

[0154] In another example, the grinding process may be performed in one processing step, or may be performed in three or more processing steps, or the number of processing steps may be set differently depending on the portion of the packaging substrate.

[0155] 10A to 10C are photographs showing a manufacturing process of a packaging substrate according to an embodiment.

[0156] Fig. 10A is a photograph of a sectional view of a packaging substrate in which a V-grooving is formed according to process (a) of Fig. 8. For the purpose of observation, a cut surface was formed on a packaging substrate sample and observed. As shown in Fig. 10A, an upper layer in which ABF and SR are arranged is formed on a first surface, which is the upper surface of the glass core, and a lower layer in which ABF and SR are arranged is also formed on a second surface, which is the lower surface.

[0157] When a laser is irradiated onto the upper layer of a packaging substrate having such a structure, a V-shaped groove, i.e., a cut portion (defect), is generated, and along with the V-groove, a hackle H resembling a bird's feather is observed in the glass core.

[0158] 10B is a photograph of a cross section of a packaging substrate separated by the snapping process of FIG. 8(b). In the embodiment, when the packaging substrate is separated by a force applied to the defect, rather than by cutting with a laser or a dicing saw, the cut surface may not bend vertically, but may be inclined or may be biased to one side and separated in an oblique line, as shown in the figure. In addition, the cut surface of the packaging substrate may have an uneven appearance, and may have damage such as cracks or splitting into pieces.

[0159] FIG. 10C is a photograph of a cross section of the packaging substrate after a grinding process is performed as in FIG. 8(c).

[0160] As shown in the left picture of Fig. 10C, the packaging substrate may be rounded to have a rounded shape, or the corners may be chamfered as shown in the right picture of Fig. 10C. Through such grinding, various imperfections that occur on the cut surface may be removed.

[0161] The packaging substrate may have its corners removed by grinding to a depth of about 10 μm to 400 μm, for example about 50 μm to 300 μm. After grinding, the packaging substrate has a tapered shape that is thinner in the direction of the cut surface.

[0162] As shown in the right-hand photograph of FIG. 10C, the corners of the packaging substrate may be deformed into a C-shape or R-shape chamfer shape through grinding.

[0163] Meanwhile, depending on the embodiment, the apex of the rectangular packaging substrate may also be curved through grinding. When the apex portion is ground, the risk of damage or cracking may be reduced when the packaging substrate is moved or transported on a tray, etc. An appropriate value for the curvature of the ground apex portion may be derived by setting a diameter at which the deviation from a predetermined target value is smallest.

[0164] The above-described embodiments can minimize defects such as cracks and chipping that occur at edges and corners of a substrate when the packaging substrate is placed on a jig such as a tray or a boat for post-processing after mounting semiconductor chips, thereby protecting the packaging substrate from external impact and ensuring durability and reliability of the packaging substrate.

[0165] The present invention described above has been described with reference to the embodiments shown in the drawings, but these are merely illustrative, and a person having ordinary skill in the art will understand that various modifications and variations of the embodiments are possible. That is, the scope of the present invention is not limited to the above-mentioned embodiments, and various modifications and improvements made by those skilled in the art using the basic concept of the embodiments defined in the accompanying claims also belong to the scope of the embodiments. Therefore, the true technical scope of protection of the present invention must be determined by the technical ideas of the accompanying claims. [Explanation of symbols]

[0166] 100 Semiconductor device 10 Motherboard 30 Semiconductor Device Section 32 First semiconductor element 34 Second semiconductor element 36 Third semiconductor element 20 Packaging Substrate 21,21a Glass core 22 Core Layer 223 Core insulation layer 213 Page 1 214 2nd page 23 Corebia 24 Core Distribution Layer 241 Core Distribution Pattern 26 Upper layer 25 Upper distribution layer 251 Upper distribution pattern 253 Upper insulating layer 27 Top connection layer 271 Top connection electrode 272 Top connection pattern 28 Cavity 281 Interior Space 282 Cavity Distribution Layer 40 Cavity element 42 Connection electrode 60 Cover Layer 70 Upper layer 80 Lower Tier

Claims

1. 1. A packaging substrate, comprising: a glass core including a first surface and a second surface opposed to each other; an upper layer laminated on the first surface or a lower layer laminated below the second surface; A packaging substrate, wherein the corners of the packaging substrate are curved or chamfered.

2. The glass core has the first surface and the second surface each having a rectangular shape, The packaging substrate of claim 1 , wherein a vertex of the glass core or the packaging substrate is rounded.

3. The packaging substrate according to claim 1 , wherein the upper layer or the lower layer has a tapered shape in which the edge becomes thinner in a direction of a cut surface of the glass core.

4. The substrate radius of curvature is the radius of curvature at the rounded apex of the glass core or the packaging substrate; The packaging substrate according to claim 2 , wherein a substrate curvature radius of the glass core or the packaging substrate is 0.5 mm or more and 8 mm or less.

5. The side curvature radius is the curvature radius at the corner of the packaging substrate; The packaging substrate according to claim 1 , wherein the side curvature radius of the packaging substrate is 0.05 mm or more.

6. A method for manufacturing a packaging substrate, comprising: forming a top layer over the first surface of a glass core having opposing first and second surfaces, or a bottom layer below the second surface; forming a cut portion with a predetermined cut line indicated on at least one of the upper layer, the lower layer, the first surface, and the second surface; cutting the glass core along the cut portion so that a cut surface of the packaging substrate is exposed; and grinding the cut surface of the packaging substrate.

7. the upper layer or the lower layer comprises an insulating layer; The method for manufacturing a packaging substrate according to claim 6 , wherein the step of forming the cut portion is a step of partially or entirely removing a portion of the insulating layer corresponding to the cut line.

8. The method for manufacturing a packaging substrate according to claim 6 , wherein the cutting step is performed by a dicing sawing or laser cutting method.

9. The method for manufacturing a packaging substrate according to claim 6 , wherein the step of grinding the cut surface includes the step of chamfering corners of the cut surface.

10. The method for manufacturing a packaging substrate according to claim 6 , wherein the step of grinding the cut surface includes a step of curving the cut surface.

11. The glass core has the first surface and the second surface each having a rectangular shape, The method of claim 6 , wherein the step of grinding the cut surface further comprises the step of rounding an apex of the glass core.

12. The step of grinding the cut surface includes: a first step of roughly cutting the cut surface with a wheel having a first mesh at a first speed or faster; a second step of finish machining the cut surface with a wheel having a second mesh at a speed equal to or less than the first speed; The method for manufacturing a packaging substrate according to claim 6 , wherein the second mesh has a larger number of meshes than the first mesh.

Images