Doping of metal barrier layer

Abstract

To provide a method of processing and / or doping a barrier layer.SOLUTION: Disclosed is a method for doping a barrier layer such as tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), or molybdenum nitride (MoN). As a dopant, one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like can be included. When the doped barrier layer has a thickness of less than about 15Å, the adhesion can be improved.SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] FIELD OF THE DISCLOSURE Embodiments of the present disclosure generally relate to methods for treating and / or doping barrier layers. More particularly, embodiments of the present disclosure relate to methods for treating and doping ALD metal barrier films with ruthenium. [Background technology]

[0002] Microelectronic devices such as semiconductors or integrated circuits can contain millions of electronic circuit devices such as transistors, capacitors, etc. Smaller feature sizes are desired to further increase the density of devices found on integrated circuits. To achieve these smaller feature sizes, the size of conductive lines, vias, and interconnects, gates, etc. must be reduced. Reliable formation of multi-level interconnect structures is also necessary to increase circuit density and quality. Advances in manufacturing technology have made it possible to use copper for conductive lines, interconnects, vias, and other structures. However, electromigration in interconnect structures has become a major obstacle to overcome with the shrinking feature sizes and increasing use of copper for interconnects. Such electromigration can adversely affect the electrical properties of various components of integrated circuits.

[0003] Specifically, at the 5nm node and below, the thickness of the barrier and liner for copper interconnects becomes more challenging with respect to device reliability and barrier layer adhesion. Also, the baseline thickness of the barrier film and liner at 5nm is about 45 Å. The increased thickness leaves less space for gap filling and can increase resistivity.

[0004] Tantalum nitride (TaN) is a copper barrier with a thickness greater than 10 Å, and the film is continuous. However, for nodes below 22 nm, TaN deposited by thermal atomic layer deposition (thermal ALD) is not a good copper barrier layer. Therefore, new methods are needed to deposit films that are effective copper barriers. Summary of the Invention

[0005]

[0005] Embodiments of the present disclosure provide a method of forming a doped barrier layer. In one or more embodiments, the method includes forming a first barrier film on a substrate by atomic layer deposition, doping the first barrier film with a dopant metal by exposing the first barrier film to a metal precursor during a flash chemical vapor deposition process, and forming a second barrier film on the doped first barrier film by atomic layer deposition to form the doped barrier layer.

[0006] Further embodiments of the present disclosure relate to a method of forming a doped metal nitride layer, in one or more embodiments, the method includes exposing a substrate including a dielectric layer having at least one feature to a first metal precursor and ammonia to form a first metal nitride film on the substrate, doping the first barrier film with a dopant metal by exposing the first metal nitride film to a dopant metal precursor during a flash chemical vapor deposition process, and exposing the substrate to the first metal precursor and ammonia to form a second metal nitride film on the doped first metal nitride film to form a doped metal nitride layer.

[0007] A further embodiment of the present disclosure is directed to a non-transitory computer readable medium including instructions that, when executed by a controller of a processing system, cause the processing system to perform operations of forming a first barrier film on a substrate, doping the first barrier film with a dopant metal to form a doped first barrier film, and forming a second barrier film on the doped first barrier film to form a doped barrier layer.

[0008] So that the recited features of the invention may be understood in detail, a more particular description of the invention briefly summarized above can be had by reference to embodiments, some of which are illustrated in the accompanying drawings. It should be noted, however, that the appended drawings illustrate only typical embodiments of the invention and are not to be considered as limiting its scope, since the invention is susceptible to other equally effective embodiments. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a process flow diagram according to one or more embodiments of the present disclosure. [Diagram 2] 1 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3A] 1 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3B] 1 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 3C] 1 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Figure 4] 1 is a cross-sectional view of an electronic device according to one or more embodiments of the present disclosure. [Diagram 5] FIG. 1 is a cross-sectional view of a cluster tool according to one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Before describing certain example embodiments of the present disclosure, it is to be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description as being capable of other embodiments and of being practiced and carried out in various ways.

[0011] As used herein and in the appended claims, the terms "substrate" and "wafer" are used interchangeably and both refer to a surface or a portion of a surface on which a process acts. Those skilled in the art will understand that a reference to a substrate can also refer to only a portion of the substrate, unless the context clearly indicates otherwise. In addition, a reference to depositing on a substrate can refer to both a bare substrate and a substrate on which one or more films or features have been deposited or formed.

[0012] "Substrate" as used herein refers to any substrate on which a film treatment is performed during a manufacturing process, or to the surface of a material formed on a substrate. For example, substrate surfaces on which treatment can be performed include materials such as silicon, silicon oxide, strained silicon, silicon-on-insulator (SOI), carbon-doped silicon oxide, silicon nitride, doped silicon, germanium, gallium arsenide, glass, sapphire, as well as any other materials such as metals, metal nitrides, metal alloys, and other conductive materials, depending on the application. Substrates include, but are not limited to, semiconductor wafers. Substrates may be exposed to pretreatment processes to polish, etch, reduce, oxidize, hydroxylate (or otherwise generate or graft targeted chemical moieties to impart chemical functionality), anneal, and / or bake the substrate surface. In addition to performing film treatments directly on the surface of the substrate itself, the present disclosure also allows any of the disclosed film treatment steps to be performed on an underlayer formed on the substrate, as disclosed in more detail below, and the term "substrate surface" is intended to include the underlayer as the context indicates. Thus, for example, if a film / layer or partial film / layer is deposited on a substrate surface, the exposed surface of the newly deposited film / layer becomes the substrate surface. What a given substrate surface comprises depends on what film is being deposited as well as the particular chemistry used.

[0013] As used herein and in the appended claims, the terms "reactive gas," "precursor," "reactant," and the like are used interchangeably to mean gases that contain species that react with the substrate surface. For example, a first "reactive gas" may simply adsorb to the substrate surface and be available for further chemical reaction with a second reactive gas.

[0014] The term "about" as used herein means approximately or approximately, and in the context of a stated numerical value or range, refers to a variation of no more than ±15% of the numerical value. For example, values ​​that differ by ±14%, ±10%, ±5%, ±2%, or ±1% meet the definition of about.

[0015] As used herein, "atomic layer deposition" or "cyclic deposition" refers to the sequential exposure of two or more reactive compounds to deposit layers of material on a substrate surface. A substrate or a portion of a substrate is separately exposed to two or more reactive compounds introduced into a reaction zone of a processing chamber. In a time-domain ALD process, exposure to each reactive compound is separated by a time delay so that each compound can be allowed to adhere and / or react with the substrate surface and then purged from the processing chamber. These reactive compounds are said to be sequentially exposed to the substrate. In a spatial ALD process, different portions of the substrate surface or materials on the substrate surface are simultaneously exposed to two or more reactive compounds such that any given point on the substrate is not substantially exposed to two or more reactive compounds simultaneously. As used herein and in the appended claims, the term "substantially" as used in this respect means that it is possible that only a portion of the substrate may be simultaneously exposed to multiple reactive gases due to diffusion, as will be understood by those skilled in the art, and that simultaneous exposure is not intended.

[0016] In one aspect of a time-domain ALD process, a first reactive gas (i.e., a first precursor or compound A) is pulsed into the reaction zone, followed by a first time delay. Then, a second precursor or compound B is pulsed into the reaction zone, followed by a second delay. During each time delay, a purge gas, such as argon, is introduced into the process chamber to purge the reaction zone or otherwise remove any residual reactive compounds or reaction by-products from the reaction zone. Alternatively, the purge gas may flow continuously throughout the deposition process, such that only the purge gas flows during the time delay between pulses of reactive compounds. The reactive compounds are pulsed alternately until a desired film or film thickness is formed on the substrate surface. In either scenario, the ALD process of pulsing compound A, purge gas, compound B, and purge gas is a cycle. The cycle can start with either compound A or compound B, and continue with each turn of the cycle until a film having a predetermined thickness is achieved.

[0017] In one embodiment of a spatial ALD process, a first reactive gas and a second reactive gas (e.g., nitrogen gas) are simultaneously supplied to a reaction zone but separated by an inert gas curtain and / or a vacuum curtain. The substrate is moved relative to the gas supply such that any given point on the substrate is exposed to the first reactive gas and the second reactive gas.

[0018] It has been found that the adhesion of the barrier layer is advantageously improved by doping the barrier layer with one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like.

[0019] In one or more embodiments, the barrier layer can be deposited via ALD. In a typical ALD process, a film can be deposited using alternating pulses or flows of "A" and "B" precursors. Alternating exposure of the surface to reactants "A" and "B" is continued until a film of the desired thickness is reached. However, instead of pulsing the reactants, the gases can be flowed simultaneously from one or more gas delivery heads or nozzles, and the substrate and / or gas delivery head can be moved such that the substrate is sequentially exposed to each of the reactive gases. Of course, the aforementioned ALD cycles are merely illustrative of the wide variety of ALD process cycles in which a deposition layer is formed by alternating layers of precursors and co-reactants.

[0020] In one or more embodiments, the co-reactant is in the form of a vapor or gas. The reactants may be delivered with a carrier gas. The carrier gas, purge gas, deposition gas, or other process gas may include nitrogen, hydrogen, argon, neon, helium, or combinations thereof. The various plasmas described herein, such as nitrogen plasma or inert gas plasma, may be ignited from and / or may include plasma co-reactant gases.

[0021] In one or more embodiments, the various gases for the process may be pulsed from the inlets, through the gas channels, from the various holes or outlets, and into the central channel. In one or more embodiments, the deposition gases may be pulsed sequentially into and through the showerhead. Alternatively, as described above, the gases can be flowed simultaneously through the gas delivery nozzles or heads, and the substrate and / or gas delivery head can be moved so that the substrate is exposed to the gases sequentially.

[0022] In one or more embodiments, the barrier layer material and the dopant metal are deposited using a multi-chamber process with the barrier layer material (e.g., tantalum nitride (TaN)) and the dopant metal separated. In other embodiments, a single chamber approach is used where all processes are performed in one chamber and the different layers are separated in the process by gas purging.

[0023] Some embodiments of the present invention are directed to barrier applications, such as copper barrier applications. The barrier layer formed by one or more embodiments can be used as a copper barrier. Barrier films suitable for copper barrier applications include, but are not limited to, TaN and MnN. For copper barrier applications, suitable dopants include, but are not limited to, Ru, Cu, Co, Mn, Al, Ta, Mo, Nb, V, or combinations thereof. Plasma treatments can be used after doping to promote intermetallic compound formation between the matrix and the dopants, remove film impurities, and improve the density of the barrier layer. In other embodiments, post-treatments can include, but are not limited to, physical vapor deposition (PVD) treatments, thermal annealing, chemical strengthening, and the like. In some copper barrier applications, high frequency plasma (defined as greater than about 14 MHz or greater than or equal to about 40 MHz) can be used with any inert gas, including, but not limited to, one or more of neon (Ne), hydrogen (H2), and argon (Ar) gases. In one or more embodiments, higher plasma frequencies (greater than 13.56 MHz) can be used to prevent low-k damage. In some embodiments, the barrier film is a copper barrier and comprises TaN doped with Ru.

[0024] Suitable precursors for depositing the barrier film include metal-containing precursors and nitrogen-containing precursors. For example, when the barrier film is tantalum nitride (TaN), the tantalum-containing precursor can be pentakis(dimethylamino)tantalum (PDMAT), and the nitrogen-containing precursor can be ammonia. When the barrier film is manganese nitride (MnN), the manganese-containing precursor can be bis]bis(trimethylsilyl)amido]manganese(II) (Mn(TMSA)2). Other suitable precursors are known to those skilled in the art. The organic species in the organic-containing precursor for the barrier film can be partially incorporated into the underlayer (such as the dielectric layer), which can enhance adhesion at the barrier layer-underlayer interface.

[0025] In one or more embodiments, the dopant metal may be incorporated into the barrier layer by any suitable method known to those skilled in the art. For example, in one or more embodiments, the dopant metal may be incorporated into the barrier layer by one or more of alternating and / or co-flowing of precursors in atomic layer deposition (ALD), chemical vapor deposition (CVD), and plasma enhanced atomic layer deposition (PEALD), precursors with multi-metallic ligands, and dopant injection / thermal diffusion. In one or more embodiments, when the dopant metal is incorporated into the barrier layer by alternating and / or co-flowing of precursors in atomic layer deposition (ALD), chemical vapor deposition (CVD), and plasma enhanced atomic layer deposition (PEALD), a suitable metal-containing precursor may be used. Examples of suitable precursors include metal complexes containing the desired dopant, such as the dopant metal coordinated with an organic or carbonyl ligand. In one or more embodiments, the dopant precursor may include a multi-metallic ligand. A suitable dopant precursor should have a sufficient vapor pressure to be deposited by a suitable process, such as ALD, plasma enhanced atomic layer deposition (PEALD), or chemical vapor deposition (CVD). In one or more embodiments, the dopant is deposited using a chemical vapor deposition (CVD) process.

[0026] As used herein, "chemical vapor deposition" refers to a process in which a substrate surface is exposed to precursors and / or co-reagents simultaneously or substantially simultaneously. As used herein, "substantially simultaneously" refers to either co-flow or where there is overlap for the majority of the exposure of the precursors.

[0027] Depending on the dopant precursor used, a co-reactant may be used to deposit the dopant. For example, reducing gases such as hydrogen and ammonia can be used as co-reactants to deposit some dopants. The metal dopant precursor and the co-reactant may be flowed simultaneously or sequentially.

[0028] In one or more embodiments, ion implantation may be used to incorporate the dopant metal into the barrier layer. In other embodiments, a physical vapor deposition (PVD) co-processing may be used to add a second metal dopant, such as cobalt (Co), to the doped barrier layer. In further embodiments, the barrier film may be annealed in an atmosphere containing the dopant metal to thermally diffuse the dopant into the film.

[0029] In one or more embodiments, a PVD process with dopant sputtering can be used as a way to incorporate the dopant into the matrix. For example, a PVD process with cobalt (Co) can inject Co into a ruthenium tantalum nitride (RuTaN) matrix to form a RuTaN\Co compound. This process can be used to add a first dopant or additional dopants other than the dopant within the film.

[0030] In one or more embodiments, the dopant is not limited to metals. In one or more embodiments, the dopant may also be a nonmetal, such as silicon (Si), boron (B), etc. The nonmetal dopant may also be used for thermal diffusion.

[0031] In some embodiments, instead of or in addition to using a reducing gas co-reactant, a plasma post-treatment step can be used after exposing the barrier film to the dopant metal precursor. According to one or more embodiments, the plasma comprises any suitable inert gas known to those skilled in the art. In one or more embodiments, the plasma comprises one or more of helium (He), argon (Ar), ammonia (NH3), hydrogen (H2), and nitrogen (N2). In some embodiments, the plasma can comprise a mixture of Ar and H2, such as a mixture having an Ar:H2 molar ratio in the range of 1:1 to 1:10. The plasma power can range from about 200 to about 1000 watts. The plasma frequency can range from 350 kHz to 40 MHz. The plasma treatment time can vary from 5 seconds to 60 seconds, such as from 10 seconds to 30 seconds. In some embodiments, the pressure during plasma treatment can range from 0.5 to 50 Torr, such as from 1 to 10 Torr. In some embodiments, the wafer spacing can range from 100 mils to 600 mils.

[0032] In one or more embodiments, the barrier film may be exposed to a dopant metal precursor during deposition, i.e., dopant metal precursors may be used sequentially in ALD cycles to provide a doped barrier film. For example, 1-10 cycles of a metal-containing precursor and a nitrogen-containing precursor may be used to form an initial metal nitride barrier layer, followed by exposure to 1-10 cycles of a dopant metal precursor, then resuming cycling of the metal-containing precursor and the nitrogen-containing precursor, and then optionally further doping, etc., until the desired doped barrier film thickness is reached. Alternatively, in other embodiments, the barrier film may be fully deposited to the desired thickness before exposure to the dopant metal precursor.

[0033] In various embodiments, the duration of exposure to the dopant metal-containing precursor can range from 1 to 60 seconds, such as 3 to 30 seconds or 5 to 10 seconds. Longer exposure to the dopant metal precursor increases the amount of doping in the barrier film, unless the barrier film reaches maximum doping relative to the density of the barrier film.

[0034] FIG. 1 illustrates a process flow diagram of a method according to one or more embodiments. FIGS. 2-4 illustrate a cross-sectional view of a microelectronic device 200 according to one or more embodiments of the present disclosure. Referring to FIG. 2, a dielectric layer 204 is formed on a substrate 202. In one or more embodiments, the dielectric layer 204 may include at least one feature 206. While the figure shows a substrate with a single feature for purposes of illustration, one of ordinary skill in the art will understand that there may be two or more features. The shape of the feature 206 may be any suitable shape, including, but not limited to, trenches and cylindrical vias. As used in this regard, the term "feature" refers to any intentional surface irregularity. Suitable examples of features include, but are not limited to, a trench having a top, two sidewalls and a bottom, a peak having a top and two sidewalls. The feature may have any suitable aspect ratio (the ratio of the depth of the feature to the width of the feature). In some embodiments, the aspect ratio is about 5:1, 10:1, 15:1, 20:1, 25:1, 30:1, 35:1 or 40:1 or greater.

[0035] In one or more embodiments, the at least one feature 206 includes a bottom 212 , a first sidewall 208 , and a second sidewall 210 .

[0036] In one or more embodiments, the dielectric layer 204 is a low-k dielectric layer. In certain embodiments, the dielectric layer 204 is a silicon oxide (SiO x Further embodiments include those in which the dielectric layer 204 is porous or carbon-doped SiO x In some embodiments, the dielectric layer 204 is a porous or carbon-doped SiO 2 layer having a k value of less than about 5.x In other embodiments, the dielectric layer 204 is a multi-layer structure. For example, in one or more embodiments, the dielectric layer 204 includes a multi-layer structure having one or more of a dielectric layer, an etch stop layer, and a hard mask layer.

[0037] 1-3A, in operation 104, a barrier film 214 is deposited on a dielectric layer 204 on a substrate 202. In some embodiments, the barrier film 214 is formed by a conformal deposition process. In some embodiments, the barrier film 214 is formed by one or more of atomic layer deposition or chemical vapor deposition.

[0038] In one or more embodiments, the deposition of the barrier film 214 is substantially conformal. In one or more embodiments, the barrier film 214 is formed on the first sidewall 208, the second sidewall 210, and the bottom 212 of at least one feature. As used herein, a "substantially conformal" layer refers to a layer that is about the same in thickness throughout (e.g., at the top, middle, and bottom of the sidewalls, and at the bottom of the opening 206). A substantially conformal layer varies in thickness by no more than about 5%, 2%, 1%, or 0.5%.

[0039] 3A illustrates the microelectronic device 200 after deposition of a barrier film 214 covering at least a portion of the first sidewall 208, the second sidewall 210, and the bottom 212 of the at least one feature 206. As illustrated in FIG. 3B, the barrier layer 214 can cover the entirety of the first sidewall 208, the second sidewall 210, and the bottom 212 of the at least one feature 206. In one or more embodiments, the barrier film 214 can include one or more of tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), molybdenum nitride (MoN), and the like.

[0040] In one or more embodiments, the barrier film 214 is deposited by atomic layer deposition (ALD) and has a thickness in the range of about 2 Å to about 10 Å. In some embodiments, the barrier film 214 is deposited in a single ALD cycle. In other embodiments, the barrier film 214 is deposited in 1 to 15 ALD cycles.

[0041] 1 and 3B, in operation 106, the barrier film 214 is doped by depositing a chemical vapor deposition of a doped barrier film 216. In one or more embodiments, the barrier film may be doped with one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like. In a particular embodiment, the barrier film may be doped with ruthenium (Ru). Thus, in one or more embodiments, the doped barrier film 216 includes one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), and the like.

[0042] In one or more embodiments, the metal dopant diffuses through the barrier fill 214 into the dielectric layer 204. Without intending to be bound by theory, it is believed that the metal dopant may selectively diffuse through the barrier layer 214 into the dielectric layer and form a complex with the dielectric material that is resistant to electromigration. One proposed mechanism is that exposed precursors may preferentially migrate to the dielectric / barrier interface via grain boundaries or other weak pathways.

[0043] In one or more embodiments, the complex formed is a metal oxide (MO x ) or metal silicates (MSi x Thus, the dopant may be ruthenium (Ru) and the dielectric layer may be silicon oxide (SiO xIn embodiments including ruthenium (Ru), ruthenium (Ru) diffuses through the barrier layer 214 and becomes ruthenium oxide (RuO x ) or ruthenium silicon oxide (RuSiO x ) may be formed. This ruthenium silicon oxide barrier layer may prevent electromigration of copper from the conductive material 222 into the dielectric layer 204.

[0044] In other embodiments, the metal dopant can form an intermetallic compound with the barrier layer matrix, resulting in a high density, low resistivity phase that exhibits excellent barrier properties against copper (Cu), oxygen (O), carbon (C), etc., such as Ta. x Ru y N or Ta x Ru y N z O is obtained.

[0045] In addition to being a barrier for the conductive material 222, the doped barrier layer 220 may also be a barrier to oxygen diffusion from the dielectric layer 204 into the conductive material 222. Diffusion of oxygen from the dielectric layer 204 into the conductive material 222 may result in oxygen reacting with components in the conductive material 222 and / or the seed layer (not shown). For example, if the conductive material includes copper (Cu), oxygen may react with the copper at the interface between the barrier layer and the conductive material 222, thus pinning the copper at the barrier layer / conductive material interface. As a result, the copper cannot segregate throughout the conductive material. Similarly, if a seed layer including copper is present, oxygen may react with the copper in the seed layer at the seed layer / barrier layer interface, thus pinning the copper at the interface.

[0046] In one or more embodiments, it is believed that oxygen that diffuses into the barrier layer reacts with the dopant, preventing the oxygen from diffusing into the conductive material 222. As a result, oxygen is unavailable to react with the seed layer or the conductive material 222.

[0047] In one or more embodiments, the doped barrier film 216 is deposited by chemical vapor deposition and has a thickness in the range of about 1 Å to about 3 Å.

[0048] In one or more embodiments, the doped barrier film 216 includes a range of about 0.01 to about 50 weight percent dopant based on the total weight of the barrier film. In certain embodiments, the doped barrier film 216 includes a range of about 5% to about 70% dopant, such as a range of about 10 to about 30 weight percent dopant, such as a range of about 8 to about 25 weight percent dopant, or a range of about 10 to about 20 weight percent dopant. In some embodiments, the barrier film 214 includes a range of about 5 to about 30% by weight of the dopant, e.g., about 5% by weight, about 6% by weight, about 7% by weight, about 8% by weight, about 9% by weight, about 10% by weight, about 11% by weight, about 12% by weight, about 13% by weight, about 14% by weight, about 15% by weight, about 16% by weight, about 17% by weight, about 18% by weight, about 19% by weight, about 20% by weight, about 21% by weight, about 22% by weight, about 23% by weight, about 24% by weight, 25% by weight, about 26% by weight, about 27% by weight, about 28% by weight, about 29% by weight, or about 30% by weight of the dopant.

[0049] 1 and 3C, in operation 108, a second barrier film 218 is deposited on the doped barrier film 216. In one or more embodiments, the second barrier film 218 comprises the same material as the barrier film 214. In one or more embodiments, the second barrier film 218 may comprise one or more of tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), molybdenum nitride (MoN), and the like.

[0050] In one or more embodiments, the second barrier film 218 is deposited by atomic layer deposition (ALD) and has a thickness in the range of about 2 Å to about 6 Å. In some embodiments, the second barrier film 218 is deposited in a single ALD cycle. In other embodiments, the second barrier film 218 is deposited in 1 to 15 ALD cycles.

[0051] In one or more embodiments, the doped barrier layer 220, including the barrier film 216, the doped barrier film 216, and the second barrier film 218, has a combined thickness in a range from about 5 Å to about 15 Å, or from about 8 Å to about 10 Å. In further embodiments, the combined thickness is less than about 15 Å.

[0052] In one or more embodiments, the doped barrier layer 220 has a high metal content and amorphous crystallinity. Without intending to be bound by theory, it is believed that doping the barrier layer reduces the ALD crystallinity of the deposited barrier layer, which may reduce diffusion shortcuts at grain boundaries. Doping within the barrier layer, rather than on top of the barrier, can reduce the risk of integration and corrosion by minimizing dopant diffusion.

[0053] In one or more embodiments, the doped barrier layer 220 includes a dopant metal in the barrier film, where the dopant metal is in a nanocrystalline amorphous matrix. In a particular embodiment, the doped tantalum nitride (TaN) barrier film includes ruthenium (Ru) in the tantalum nitride film, where the ruthenium (Ru) is in a nanocrystalline amorphous matrix. The doped barrier film of one or more embodiments exhibits better diffusion barrier properties than the undoped barrier film. Additionally, the doped barrier film of one or more embodiments exhibits excellent adhesion to copper and oxide.

[0054] In operation 110, the device is optionally post-treated. The optional post-treatment operation 110 can be, for example, a process to modify the film properties (e.g., annealing) or a further film deposition process to grow additional films (e.g., additional ALD or CVD processes). In some embodiments, the optional post-treatment operation 110 can be a process to modify the properties of the deposited film. In some embodiments, the optional post-treatment operation 110 includes annealing the as-deposited film. In some embodiments, the annealing is performed at a temperature in the range of about 300° C., 400° C., 500° C., 600° C., 700° C., 800° C., 900° C., or 1000° C. The annealing environment in some embodiments includes one or more of an inert gas (e.g., molecular nitrogen (N2), argon (Ar)), or a reducing gas (e.g., molecular hydrogen (H2) or ammonia (NH3)), or an oxidizing agent such as, but not limited to, oxygen (O2), ozone (O3), or a peroxide. Annealing can be performed for any suitable length of time. In some embodiments, the film is annealed for a period of time ranging from about 15 seconds to about 90 minutes, or from about 1 minute to about 60 minutes. In some embodiments, annealing the as-deposited film increases the density, decreases the resistivity, and / or improves the purity of the film.

[0055] 4, a conductive fill material 222 fills at least a portion of the trench 206 lined with the barrier film 214, the doped barrier film 216, and the second barrier film 218. According to one or more embodiments, the conductive fill material 222 includes copper (Cu) or a copper alloy. In further embodiments, the conductive fill material 222 also includes manganese (Mn). In other embodiments, the conductive fill material 222 further includes aluminum (Al). In some embodiments, the conductive fill material 222 includes tungsten (W).

[0056] 4 is shown in direct contact with the barrier layer 220, an intermediate layer, such as an adhesion layer or seed layer, may be between the conductive fill material 222 and the barrier layer 220. For example, in one or more embodiments, the microelectronic device 200 further includes an adhesion layer including one or more of Ru and Co. In addition to Ru and / or Co, the adhesion layer may include one or more dopants, such as Mn, Al, Mg, Cr, Nb, Ti, or V. In some embodiments, the adhesion layer includes Ru and Mn. In other embodiments, the adhesion layer includes Co and Mn.

[0057] In certain embodiments, a seed layer (not shown) may be deposited over the doped barrier layer 220. According to one or more embodiments, the seed layer may include an alloy of copper, such as a Cu-Mn alloy.

[0058] In addition to being a barrier to copper, the doped barrier layer 220 may also be a barrier to the diffusion of oxygen from the dielectric layer 204 into the conductive fill material 222. Diffusion of oxygen from the dielectric layer 204 into the conductive fill material 222 may result in the oxygen reacting with components in the conductive fill material 222 and / or the seed layer.

[0059] In some embodiments, the substrate is transferred from the first chamber to a separate subsequent chamber for further processing. The substrate can be transferred directly from the first chamber to a separate processing chamber, or the substrate can be transferred from the first chamber to one or more transfer chambers and then to a separate processing chamber. In some embodiments, deposition of the barrier film and the dopant film can be performed in a single chamber, and then post-processing can be performed in separate chambers. Thus, the processing equipment can include multiple chambers in communication with the transfer station. This type of equipment can be referred to as a "cluster tool" or a "clustered system", or the like.

[0060] Generally, a cluster tool is a modular system with multiple chambers that perform various functions including center detection and orientation, degassing, annealing, deposition and / or etching of the substrate. According to one or more embodiments, the cluster tool includes at least a first chamber and a central transfer chamber. The central transfer chamber can house a robot that can shuttle the substrate between the processing chambers and the load lock chamber. The transfer chamber is typically maintained under vacuum and provides an intermediate stage for shuttle transfer of the substrate from one chamber to another and / or to the load lock chamber located at the front end of the cluster tool. Two well-known cluster tools that can be adapted for the present disclosure are Centura® and Endura®, both available from Applied Materials, Inc., Santa Clara, Calif. However, the exact arrangement and combination of chambers may be altered for the purpose of performing the specific steps of the processes described herein. Other processing chambers that can be used include, but are not limited to, cyclic layer deposition (CLD), atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), etching, precleaning, chemical cleaning, plasma nitridation, degassing, orientation, hydroxylation, and other substrate processes. By performing processes in chambers on a cluster tool, surface contamination of the substrate with atmospheric impurities can be avoided without oxidation prior to depositing a subsequent film.

[0061] According to one or more embodiments, the substrate is continuously under vacuum or "load-lock" conditions and is not exposed to ambient air when moving from one chamber to the next. The transfer chamber is therefore under vacuum and is "pumped down" under vacuum pressure. An inert gas may be present in the processing or transfer chamber. In some embodiments, an inert gas is used as a purge gas to remove some or all of the reactants (e.g., reactants). According to one or more embodiments, a purge gas is injected at the outlet of the deposition chamber to prevent the reactants (e.g., reactants) from moving from the deposition chamber to the transfer chamber and / or additional processing chambers. Thus, the flow of the inert gas forms a curtain at the outlet of the chamber.

[0062] Substrates can be processed in single-substrate deposition chambers, where a single substrate is loaded, processed, and unloaded before another substrate is processed. Substrates can also be processed sequentially, similar to conveyor systems, where multiple substrates are individually loaded into a first portion of the chamber, moved through the chamber, and unloaded from a second portion of the chamber. The geometry of the chamber and associated conveyor system can form a linear or curvilinear path. Additionally, the processing chamber can be a carousel, where multiple substrates move around a central axis and are exposed to processes such as deposition, etching, annealing, cleaning, etc. throughout the carousel path.

[0063] During processing, the substrate can be heated or cooled. Such heating or cooling can be accomplished by any suitable means, including but not limited to changing the temperature of the substrate support and flowing a heated or cooled gas over the substrate surface. In some embodiments, the substrate support includes a heater / cooler that can be controlled to conductively change the substrate temperature. In one or more embodiments, the gas used (either reactive or inert gas) is heated or cooled to locally change the substrate temperature. In some embodiments, a heater / cooler is located in the chamber adjacent to the substrate surface to convectively change the substrate temperature.

[0064] The substrate may also be stationary or rotating during processing. A rotating substrate may rotate (about the substrate axis) continuously or in discrete steps. For example, the substrate may rotate throughout the entire process, or the substrate may rotate only a small amount between exposures to different reactive or purge gases. Rotating the substrate (continuously or in steps) during processing may help to provide a more uniform deposition or etching, for example, by minimizing the effects of local variations in the geometry of the gas flow.

[0065] A further embodiment of the present disclosure is directed to a processing tool 900 for forming the described devices and performing the methods, as shown in Figure 5. The cluster tool 900 includes at least one central transfer station 921, 931 having multiple sides. Robots 925, 935 are disposed within the central transfer station 921, 931 and configured to move a robot blade and a wafer to each of the multiple sides.

[0066] The cluster tool 900 comprises multiple processing chambers, also referred to as process stations, 902, 904, 906, 908, 910, 912, 914, 916, and 918, connected to a central transfer station. The various processing chambers provide separate processing regions isolated from adjacent process stations. The processing chambers can be any suitable chambers, including, without limitation, atomic layer deposition chambers, chemical vapor deposition chambers, annealing chambers, and the like. The particular arrangement of processing chambers and components can vary depending on the cluster tool and should not be construed as limiting the scope of the present disclosure.

[0067] 5, a factory interface 950 is connected to the front of the cluster tool 900. The factory interface 950 includes a loading chamber 954 and an unloading chamber 956 at the front 951 of the factory interface 950. Although the loading chamber 954 is shown on the left and the unloading chamber 956 is shown on the right, one of ordinary skill in the art will appreciate that this is merely representative of one possible configuration.

[0068] The size and shape of the loading chamber 954 and the unloading chamber 956 can vary depending on, for example, the substrate being processed in the cluster tool 900. In the illustrated embodiment, the loading chamber 954 and the unloading chamber 956 are sized to hold a wafer cassette with multiple wafers disposed within the cassette.

[0069] The robot 952 is in the factory interface 950 and can move between a loading chamber 954 and an unloading chamber 956. The robot 952 can transfer wafers from a cassette in the loading chamber 954 to a load lock chamber 960 through the factory interface 950. The robot 952 can also transfer wafers from a load lock chamber 962 to a cassette in the unloading chamber 956 through the factory interface 950. As will be appreciated by those skilled in the art, the factory interface 950 can have more than one robot 952. For example, the factory interface 950 can have a first robot that transfers wafers between the loading chamber 954 and the load lock chamber 960 and a second robot that transfers wafers between the load lock 962 and the unloading chamber 956.

[0070] The illustrated cluster tool 900 has a first section 920 and a second section 930. The first section 920 is connected to a factory interface 950 via load lock chambers 960, 962. The first section 920 includes a first transfer chamber 921 with at least one robot 925 disposed therein. The robot 925 is also referred to as a robotic wafer transport mechanism. The first transfer chamber 921 is centrally located with respect to the load lock chambers 960, 962, the processing chambers 902, 904, 916, 918, and the buffer chambers 922, 924. The robot 925 of some embodiments is a multi-arm robot capable of independently moving two or more wafers at a time. In some embodiments, the first transfer chamber 921 includes two or more robotic wafer transfer mechanisms. The robot 925 in the first transfer chamber 921 is configured to move wafers between chambers around the first transfer chamber 921. Individual wafers are supported on a wafer transport blade located at the distal end of the first robotic mechanism.

[0071] After processing the wafer in the first section 920, the wafer may be passed through a pass-through chamber to the second section 930. For example, the chambers 922, 924 may be one-way or two-way pass-through chambers. The pass-through chambers 922, 924 may be used, for example, to cryogenically cool the wafer before processing in the second section 930 or to allow for cooling or post-processing of the wafer before returning to the first section 920.

[0072] A system controller 990 communicates with the first robot 925, the second robot 935, the first plurality of processing chambers 902, 904, 916, 918, and the second plurality of processing chambers 906, 908, 910, 912, 914. The system controller 990 can be any suitable component capable of controlling the processing chambers and robots. For example, the system controller 990 can be a computer including a central processing unit (CPU) 992, memory 994, input / output (I / O) 996, and support circuits 998. The controller 990 may directly control the processing tool 900 or may control it via a computer (or controller) associated with a particular processing chamber and / or support system components.

[0073] In one or more embodiments, the controller 990 may be one of any form of general-purpose computer processor that can be used in an industrial environment to control various chambers and sub-processors. The memory 994 or computer readable medium of the controller 990 may be one or more of readily available memory such as non-transitory memory (e.g., random access memory (RAM)), read-only memory (ROM), a floppy disk, a hard disk, an optical storage medium (e.g., a compact disk or digital video disk), a flash drive, or any other form of digital storage, local or remote. The memory 994 may hold a set of instructions operable by the processor (CPU 992) to control parameters and components of the processing tool 900.

[0074] The support circuits 998 are coupled to the CPU 992 for supporting the processor in a conventional manner. These circuits include cache, power supplies, clock circuits, input / output circuits and subsystems, etc. One or more processes may be stored in the memory 994 as software routines that, when executed or invoked by the processor, cause the processor to control the operation of the processing tool 900 or individual processing units in the manner described herein. The software routines may also be stored and / or executed by a second CPU (not shown) located remotely from the hardware controlled by the CPU 992.

[0075] Some or all of the processes and methods of the present disclosure may be performed in hardware. Thus, the processes may be implemented in software and may be performed using a computer system in hardware, for example as an application specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. The software routines, when executed by a processor, transform a general-purpose computer into a special-purpose computer (controller) that controls the operation of the chamber to perform the processes.

[0076] In some embodiments, the controller 990 has one or more configurations for performing individual processes or sub-processes to perform a method. The controller 990 can be connected to and configured to operate intermediate components to perform the functions of a method. For example, the controller 990 can be connected to and configured to control a physical vapor deposition chamber.

[0077] The processes may generally be stored in the memory 994 of the system controller 990 as software routines that, when executed by a processor, cause the processing chamber to perform the processes of the present disclosure. The software routines may also be stored and / or executed by a second processor (not shown) located remotely from the hardware controlled by the processor. Some or all of the methods of the present disclosure may be performed in hardware. Thus, the processes may be implemented in software and may be performed in hardware using a computer system, for example, as an application specific integrated circuit or other type of hardware implementation, or as a combination of software and hardware. The software routines, when executed by a processor, transform a general-purpose computer into a special-purpose computer (controller) that controls the operation of the chamber so that the processes are performed.

[0078] In some embodiments, the system controller 990 has a configuration for controlling the atomic layer deposition chamber to deposit a barrier film on the substrate. The controlled system 990 has a second configuration for controlling the chemical vapor deposition chamber to deposit a metal film on the barrier film at a temperature in the range of about 20° C. to about 400° C.

[0079] In one or more embodiments, the processing tool includes a central transfer station including a robot configured to move the wafer; a plurality of process stations, each connected to the central transfer station and providing a processing area isolated from the processing areas of adjacent process stations, the plurality of process stations including a deposition chamber, a plasma processing chamber, a remote plasma source, and an annealing chamber; and a controller connected to the central transfer station and the plurality of process stations, the controller configured to operate the robot to move the wafer between the process stations and to control the process performed at each of the process stations.

[0080] The present disclosure will now be described with reference to the following examples. Before describing certain exemplary embodiments of the present disclosure, it should be understood that the present disclosure is not limited to the details of construction or process steps set forth in the following description. The present disclosure is capable of other embodiments and of being practiced and carried out in various ways.

[0081] Working Example Example 1. Ruthenium doping of tantalum nitride (TaN): single layer About 3-4 Å of TaN was deposited via nine ALD cycles using PDMAT and ammonia precursors at 250-275 °C. The TaN was doped with Ru by flash CVD, resulting in about 1 Å to about 2 Å of Ru with a nanocrystalline structure. Another 3-4 Å of TaN was deposited via nine ALD cycles using PDMAT and ammonia precursors at 250-275 °C. The final Ru-doped TaN barrier layer thickness was about 8 Å to 10 Å.

[0082] Example 2. Ruthenium doping of tantalum nitride (TaN): single layer 7 Å of TaN was deposited via 12 ALD cycles using PDMAT and ammonia precursors at 250-275 °C. The TaN was doped with Ru by flash CVD, resulting in ~1 Å to ~2 Å of Ru with a nanocrystalline structure. Another 3 Å of TaN was deposited via 5 ALD cycles using PDMAT and ammonia precursors at 250-275 °C. The final Ru-doped TaN barrier layer thickness was ~11 Å to 12 Å.

[0083] Example 3. Ruthenium doping of tantalum nitride (TaN): multilayer 4 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. This TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 4 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. Another film of doped Ru was deposited by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure. Another 3 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. The final Ru-doped TaN barrier layer thickness was approximately 13 Å.

[0084] Example 4. Ruthenium doping of tantalum nitride (TaN): multilayers 3 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. This TaN was doped with Ru by flash CVD, resulting in about 1 Å of Ru with a nanocrystalline structure. Another 2 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. Another film of doped Ru was deposited by flash CVD, resulting in about 1 Å of Ru with a nanocrystalline structure. Another 3 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. Another film of doped Ru was deposited by flash CVD, resulting in about 1 Å of Ru with a nanocrystalline structure. Another 2 Å of TaN was deposited via ALD using PDMAT and ammonia precursor at 250-275 °C. The final Ru-doped TaN barrier layer thickness was about 12 Å.

[0085] Example 5. Ruthenium doping of tantalum nitride (TaN): intermediate post-treatment after Ru doping Approximately 5-7 Å of TaN was deposited via ALD using PDMAT and ammonia precursors at 250-275 °C. The TaN was doped with Ru by flash CVD, resulting in approximately 1 Å of Ru with a nanocrystalline structure, followed by exposure to hydrogen (H2) plasma for 10 seconds. Another 3-5 Å of TaN was deposited via ALD using PDMAT and ammonia precursors at 250-275 °C. The final Ru-doped TaN barrier layer thickness was approximately 9 Å to approximately 13 Å.

[0086] Example 6. Ruthenium doping of tantalum nitride (TaN): intermediate post-treatment after Ru doping Approximately 4 Å of TaN was deposited via ALD using PDMAT and ammonia precursors at 250-275 °C. This TaN was doped with Ru by flash CVD resulting in approximately 1 Å of Ru with nanocrystallite structure followed by exposure to hydrogen (H2) plasma for 10 seconds. Another 4 Å of TaN was deposited via ALD using PDMAT and ammonia precursors at 250-275 °C. Another film of doped Ru was deposited by flash CVD resulting in approximately 1 Å of Ru with nanocrystallite structure followed by exposure to hydrogen (H2) plasma for 10 seconds. Another 3 Å of TaN was deposited via ALD using PDMAT and ammonia precursors at 250-275 °C. The final Ru-doped TaN barrier layer thickness was approximately 13 Å.

[0087] Throughout this specification, references to "one embodiment," "a particular embodiment," "one or more embodiments," or "an embodiment" mean that a particular feature, structure, material, or characteristic described in connection with an embodiment is included in at least one embodiment of the disclosure. Thus, the appearances of phrases such as "in one or more embodiments," "in a particular embodiment," "in one embodiment," or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment of the disclosure. Furthermore, particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments.

[0088] Although the disclosure of the present specification has been described with reference to specific embodiments, it should be understood that these embodiments are merely illustrative of the principles and applications of the present disclosure. It will be apparent to those skilled in the art that various modifications and variations can be made to the disclosed method and apparatus without departing from the spirit and scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations that come within the scope of the appended claims and their equivalents.

Claims

1. 1. A method for forming a doped barrier layer, comprising: forming a first barrier film on a substrate by atomic layer deposition; doping the first barrier film with a dopant metal by exposing the first barrier film to a metal precursor during a flash chemical vapor deposition process; forming a second barrier film on the doped first barrier film by atomic layer deposition to form a doped barrier layer; A method comprising:

2. 2. The method of claim 1, wherein the first barrier film and the second barrier film comprise one or more of tantalum (Ta), tantalum nitride (TaN), tantalum carbide (TaC), niobium (Nb), niobium nitride (NbN), manganese (Mn), manganese nitride (MnN), titanium (Ti), titanium nitride (TiN), molybdenum (Mo), molybdenum nitride (MoN), and the like.

3. 2. The method of claim 1, wherein the dopant metal comprises one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like.

4. 2. The method of claim 1, wherein the first barrier film and the second barrier film comprise tantalum nitride (TaN) and the dopant metal comprises ruthenium (Ru).

5. The method of claim 1 , wherein the dopant metal diffuses through the first metal nitride film into a dielectric film.

6. The method of claim 1 , wherein the dopant metal forms an intermetallic compound with the first barrier film and the second barrier film.

7. The method of claim 1 , wherein the doped barrier layer has a thickness of less than about 15 Å.

8. 10. The method of claim 1, further comprising exposing the doped barrier layer after doping to one or more of a plasma treatment, a physical vapor deposition (PVD) treatment, a thermal anneal, and a chemical strengthening.

9. The method of claim 1 , wherein the substrate comprises at least one feature.

10. The method of claim 8 , wherein the at least one feature has an aspect ratio of about 10:1 or greater.

11. 1. A method for forming a doped metal nitride layer, comprising: exposing a substrate to a first metal precursor and ammonia to form a first metal nitride film on the substrate, the substrate including a dielectric layer having at least one feature; doping the first barrier film with a dopant metal by exposing the first metal nitride film to a dopant metal precursor during a flash chemical vapor deposition process; exposing the substrate to the first metal precursor and ammonia to form a second metal nitride film on the doped first metal nitride film to form a doped metal nitride layer; A method comprising:

12. 12. The method of claim 11 , wherein the first nitride film and the second metal nitride film comprise one or more of tantalum nitride (TaN), niobium nitride (NbN), manganese nitride (MnN), titanium nitride (TiN), molybdenum (Mo), and molybdenum nitride (MoN).

13. 12. The method of claim 11, wherein the dopant metal comprises one or more of ruthenium (Ru), manganese (Mn), niobium (Nb), cobalt (Co), vanadium (V), copper (Cu), aluminum (Al), carbon (C), oxygen (O), silicon (Si), molybdenum (Mo), and the like.

14. The method of claim 11 , wherein the doped metal nitride layer has a thickness of less than about 15 Å.

15. 12. The method of claim 11, further comprising exposing the doped metal nitride layer after doping to one or more of a plasma treatment, a physical vapor deposition (PVD) treatment, a thermal anneal, and a chemical strengthening.

16. 12. The method of claim 11, wherein the at least one feature includes a first sidewall, a second sidewall, and a bottom, and the first metal nitride film is substantially conformal.

17. The method of claim 16 , wherein the at least one feature has an aspect ratio of about 10:1 or greater.

18. 12. The method of claim 11, wherein the dopant metal diffuses through the first metal nitride film into a dielectric film or the dopant metal forms an intermetallic compound with the first metal nitride film and the second metal nitride film.

19. A non-transitory computer readable medium containing instructions that, when executed by a controller of a processing system, cause the processing system to: forming a first barrier film on the substrate; doping the first barrier film with a dopant metal to form a doped first barrier film; forming a second barrier film on the doped first barrier film to form a doped barrier layer; A non-transitory computer readable medium for causing operations to be performed.

20. 20. The non-transitory computer readable medium of claim 19, further comprising instructions that, when executed by a controller of a processing system, cause the processing system to perform an operation of exposing the doped barrier layer to one or more of a plasma treatment, a physical vapor deposition (PVD) treatment, a thermal anneal, and a chemical strengthening after doping.

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