Printed wiring board and manufacturing method thereof

Abstract

To eliminate the use of more flux than necessary and the need for more flux removal processes than necessary.SOLUTION: A printed wiring board includes a base insulating layer, a conductor layer formed on the base insulating layer, a solder resist layer formed on the conductor layer and having openings exposing parts of the conductor layer as pads, and solder bumps formed on the pads in the openings via flux, where a first roughness of the surface of the solder resist layer in a first region where the solder bumps are present is smaller than a second roughness of the surface of the solder resist layer in a second region where no solder bumps are present. In a preferred example, the first region where the solder bumps are present is the central region of the base insulating layer, and the second region where no solder bumps are present is the peripheral region of the base insulating layer other than the central region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a printed wiring board capable of controlling the spread of flux used in forming solder bumps, and a method for manufacturing the same. [Background technology]

[0002] In a printed wiring board, solder bumps may be formed for connection to electronic components. The solder bumps are formed by forming solder balls via flux on pads exposed in openings in a solder resist layer and reflowing the solder balls (see, for example, Patent Document 1). When forming solder bumps on pads, the technology described in Patent Document 2 performs plasma treatment as a pretreatment of the solder resist layer including the openings and the pads. This plasma treatment removes organic residues on the pads and the oxide film layer on the solder resist layer, and also forms a roughened layer on the surface of the solder resist layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2022-65440 [Patent Document 2] JP 2000-22317 A Summary of the Invention [Problem to be solved by the invention]

[0004] In the technology disclosed in Patent Document 2, the surface of the solder resist layer and the pads are uniformly irradiated with plasma, so the size of the irregularities in the roughened layer on the surface of the solder resist layer is uniform. Therefore, the flux applied to the roughened layer on the surface of the solder resist layer before the formation of the solder bumps is also uniform, and the flux is applied even to the roughened layer on the surface of the solder resist where no solder bumps are to be formed, even though it is not necessary to apply flux. As a result, more flux than necessary is used and more flux removal steps are required. [Means for solving the problem]

[0005] The printed wiring board of the present invention is a printed wiring board including a base insulating layer, a conductor layer formed on the base insulating layer, a solder resist layer formed on the conductor layer and having an opening that exposes a portion of the conductor layer as a pad, and a solder bump formed on the pad in the opening via flux, and is characterized in that a first roughness of the surface of the solder resist layer in a first region where the solder bump is present is smaller than a second roughness of the surface of the solder resist layer in a second region where no other solder bump is present.

[0006] Furthermore, a method for manufacturing a printed wiring board according to the present invention includes forming a conductor layer on a base insulating layer, forming a solder resist layer on the conductor layer having openings that expose parts of the conductor layer as pads, applying flux to a surface and opening faces of the solder resist layer and to surfaces of the pads, and forming solder bumps on the pads in the openings via the flux, and is characterized in that after forming the solder resist layer, a second mask is placed in a second region of the solder resist layer where the solder bumps are not present, a plasma treatment is performed on the solder resist layer, and unevenness having a first roughness is formed in a first region of the solder resist layer where the solder bumps are present, a first mask is placed in the first region of the solder resist layer where the solder bumps are present, a plasma treatment is performed on the solder resist layer, and unevenness having a second roughness larger than the first roughness is formed in the second region of the solder resist layer where the solder bumps are not present, and then applying flux to the surface and opening faces of the solder resist layer and to surfaces of the pads. [Brief description of the drawings]

[0007] [Figure 1] 1 is a diagram for explaining an embodiment of a printed wiring board according to the present invention; [Figure 2A] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2B] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2C] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2D] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2E] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2F] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2G] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2H] 1A to 1C are diagrams for explaining an embodiment of a method for manufacturing a printed wiring board according to the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] <About the printed wiring board of the present invention> An embodiment of a printed wiring board of the present invention will be described with reference to the drawings. In the example shown in Fig. 1 and Fig. 2A to Fig. 2J, the dimensions of each member, particularly the height dimension, are shown in dimensions different from the actual dimensions in order to make the features of the present invention easier to understand.

[0009] Fig. 1 is a cross-sectional view for explaining one embodiment of a printed wiring board according to the present invention. In Fig. 1, the printed wiring board 1 includes a base insulating layer 2 which is the outermost layer of at least one resin insulating layer, a conductor layer 4 having a predetermined circuit pattern formed on the base insulating layer 2, and a solder resist layer 6 formed on the base insulating layer 2 and the conductor layer 4.

[0010] The base insulating layer 2 can be made of a resin composition containing an inorganic filler such as silica or alumina and an epoxy resin. The conductor layer 4 is made of a conductive metal, for example a metal mainly composed of copper. The solder resist layer 6 has openings 6a that expose the pads 4a for mounting components. An underlayer (not shown) may be formed on the pads 4a.

[0011] The printed wiring board 1 further includes a solder bump 8 formed on the pad 4a. The solder bump 8 is formed on the pad 4a in the opening 6a via flux (not shown). The solder bump 8 can be used for connection to a power supply or ground line, or for connection to a signal line.

[0012] The printed wiring board 1 according to the present invention shown in Fig. 1 is characterized in that the first roughness R1 of the surface of the solder resist layer 6 in the first region A1 where the solder bumps 8 are present is smaller than the second roughness R2 of the surface of the solder resist layer 6 in the second region A2 where no solder bumps 8 are present. Also, in the printed wiring board 1, the solder bumps 8 are usually formed in the central region, and the solder bumps 8 are often not formed in the other peripheral regions. Therefore, it is preferable that the first region A1 where the solder bumps 8 are present is the central region of the base insulating layer 2, and the second region A2 where no solder bumps 8 are present is the peripheral region of the base insulating layer 2 other than the central region.

[0013] In the printed wiring board 1 according to the present invention described above, the first roughness R1 of the surface of the solder resist layer 6 in the first region A1 where the solder bumps 8 are present is smaller than the second roughness R2 of the surface of the solder resist layer 6 in the second region A2 where no solder bumps 8 are present. Therefore, when flux is applied to the surface of the solder resist layer 6, the flux spreads in the first region A1 and does not flow out into the second region A2.

[0014] <About the method for producing a printed wiring board of the present invention> 2A to 2H are diagrams for explaining one embodiment of a method for manufacturing a printed wiring board according to the present invention. Hereinafter, the method for manufacturing a printed wiring board according to the present invention will be described with reference to FIGS. 2A to 2H.

[0015] First, as shown in Fig. 2A, a conductor layer 4 including pads 4a for mounting components having a predetermined circuit pattern is formed on a base insulating layer 2 by a known method. A build-up insulating resin film including an inorganic filler such as silica or alumina and an epoxy resin can be used for the base insulating layer 2. The conductor layer 4 is formed of a conductive metal, for example, a metal mainly composed of copper.

[0016] Next, as shown in Fig. 2B, a solder resist layer 6 is formed on the base insulating layer 2 and the conductor layer 4, and then openings 6a that expose pads 4a for mounting components are formed in the solder resist layer 6. The openings 6a can be formed using, for example, a carbon dioxide laser or a UV-YAG laser. In the present invention, as shown in Fig. 2B, the region where the solder bumps will be formed in the future is designated as a first region A1, and the other region where the solder bumps will not be formed in the future is designated as a second region A2.

[0017] 2C, a second mask 12 is placed in a second region A2 of the solder resist layer 6 where solder bumps will not be formed in the future, and a first plasma treatment P1 is performed on the solder resist layer 6 to form projections and recesses with a first roughness R1 in the first region A1 of the solder resist layer 6 where solder bumps will be formed. Any conventionally known treatment method can be used for the plasma treatment.

[0018] Next, as shown in FIG. 2D, a first mask 11 is placed in a first region A1 of the solder resist layer 6 where a solder bump will be formed in the future, and a second plasma treatment P2 is performed on the solder resist layer 6 to form projections and recesses with a second roughness R2 in a second region A2 of the solder resist layer where a solder bump will not be formed.

[0019] Usually, in the printed wiring board 1, the solder bumps 8 are formed in the central region, and the solder bumps 8 are not formed in the other peripheral regions. Therefore, it is preferable that the first region A1 where the solder bumps 8 are formed is the central region of the base insulating layer 2, and the second region A2 where the solder bumps 8 are not formed is the peripheral region of the base insulating layer 2 other than the central region.

[0020] In this embodiment, the processing conditions of the first plasma processing P1 and the second plasma processing P2 are changed, so that the first roughness R1>the second roughness R2, as shown in FIG. 2E. Specifically, the plasma emission amount of the first plasma processing P1 can be made smaller than the plasma emission amount of the second plasma processing P2, and the plasma processing can be performed for the same time. In addition, the plasma emission amounts of the first plasma processing P1 and the second plasma processing P2 can be made the same, and the processing time of the first plasma processing P1 can be made shorter than the processing time of the second plasma processing P2.

[0021] Next, as shown in FIG. 2F, flux 22 is applied to the surface of the solder resist layer 6, inside the openings 6a, and on the component mounting pads 4a. As the flux 22, a commercially available flux, for example, a flux containing rosin, a thixotropic agent, an amine, a halogen, an organic acid, or a solvent, can be used. In this embodiment, the relationship between the first roughness R1 of the first region A1 and the second roughness R2 of the second region A2 is set to first roughness R1>second roughness R2, so that the flux 22 is present only on the surface of the solder resist layer 6 in the first region A1, inside the openings 6a, and on the component mounting pads 4a.

[0022] Next, as shown in Fig. 2G, solder balls 24 are placed on the component mounting pads 4a in the openings 6a to which the flux 22 has been applied. Then, as shown in Fig. 2H, the solder balls 24 are reflowed (heated and melted) to form solder bumps 8 on the component mounting pads 4a in the openings 6a. By reflowing the solder balls 24, the printed wiring board 1 according to the present invention can be formed. Note that the flux 22 does not remain on the surface of the solder resist layer 6, in the openings 6a, or on the component mounting pads 4a in the first region A1.

[0023] According to the above-described method for producing a printed wiring board of the present invention, the printed wiring board 1 shown in FIG. 1 can be suitably produced. [Explanation of symbols]

[0024] 1 Printed wiring board 2 Base insulation layer 4 Conductor Layer 4a Pad for component mounting 6 Solder resist layer 6a aperture 8 Solder Bumps 11 The First Mask 12 The Second Mask 22 Flux 24 Solder balls A1 First Area A2 Second Area R1 First roughness R2 Secondary roughness

Claims

1. A printed wiring board including: a base insulating layer; a conductor layer formed on the base insulating layer; a solder resist layer formed on the conductor layer and having openings that expose parts of the conductor layer as pads; and solder bumps formed on the pads in the openings via flux, A printed wiring board, characterized in that a first roughness of a solder resist layer surface in a first region where the solder bumps are present is smaller than a second roughness of a solder resist layer surface in a second region other than the first region where no solder bumps are present.

2. 2. The printed wiring board according to claim 1, characterized in that a first region in which the solder bumps are present is a central region of the base insulating layer, and a second region in which the solder bumps are not present is an outer peripheral region of the base insulating layer other than the central region.

3. 1. A method for manufacturing a printed wiring board, comprising the steps of: forming a conductor layer on a base insulating layer; forming a solder resist layer on the conductor layer, the solder resist layer having openings that expose portions of the conductor layer as pads; applying flux to a surface of the solder resist layer, a surface of the openings, and a surface of the pads; and forming solder bumps on the pads in the openings via the flux, the method comprising the steps of: After forming the solder resist layer, a second mask is placed in a second region of the solder resist layer where the solder bumps are not present, and a plasma treatment is performed on the solder resist layer to form projections and recesses having a first roughness in a first region of the solder resist layer where the solder bumps are present; a first mask is placed in a first region of the solder resist layer where the solder bumps are present, and a plasma treatment is performed on the solder resist layer to form projections and recesses having a second roughness greater than the first roughness in a second region of the solder resist layer where the solder bumps are not present; A method for manufacturing a printed wiring board, comprising the steps of: applying flux to the surface and openings of the solder resist layer and to the surfaces of the pads.

4. 4. A method for manufacturing a printed wiring board according to claim 3, characterized in that a first region in which the solder bumps are present is a central region of the base insulating layer, and a second region in which the solder bumps are not present is a peripheral region of the base insulating layer other than the central region.

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