Wired circuit board and method for manufacturing the same

Abstract

To provide a wired circuit board and a method for manufacturing the same, which can improve the dimensional accuracy of the thickness of a terminal.SOLUTION: A wired circuit board 1 includes a first insulating layer 12, a conductive pattern 13 located on the first insulating layer 12 and having a terminal 131C, and a dummy conductive pattern 14A located on the first insulating layer 12 away from the conductive pattern 13. The dummy conductive pattern 14A is located within a circular region R3 having a diameter of 3.5 mm and having the terminal 131A at its center in a planar direction in which the surface of the first insulating layer 12 extends. The conductive pattern 13 is formed together with the dummy conductive pattern 14A.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a wiring circuit board and a method for manufacturing a wiring circuit board.

Background Art

[0002] Conventionally, as a wiring circuit board, a wiring circuit board including an insulating layer and a conductor pattern formed on the insulating layer is known.

[0003] Further, as a method for manufacturing such a wiring circuit board, in a step of forming a conductor pattern by electrolytic plating, a manufacturing method is known in which the thickness of the conductor pattern is made uniform by forming the conductor pattern together with a dummy conductor pattern formed outside the wiring circuit board (see, for example, Patent Document 1 below).

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0005] In the wiring circuit board as described in Patent Document 1, there is a desire to further improve the dimensional accuracy of the thickness of the terminals connected to electronic elements.

[0006] The present invention provides a wiring circuit board capable of improving the dimensional accuracy of the thickness of terminals and a method for manufacturing a wiring circuit board.

Means for Solving the Problems

[0007] The present invention [1] includes an insulating layer, a conductor pattern located on the insulating layer and having terminals, and a dummy conductor pattern located on the insulating layer and separated from the conductor pattern. The dummy conductor pattern is located within a circular region with a diameter of 3.5 mm, where the terminals are centered, in the plane direction, which is the direction in which the surface of the insulating layer extends, of the wiring circuit board.

[0008] According to such a configuration, the wiring circuit board includes a dummy conductor pattern.

[0009] Therefore, compared with a configuration in which a dummy conductor pattern is formed outside the wiring circuit board (for example, the frame of the wiring circuit board assembly sheet), the dummy conductor pattern is located closer to the conductor pattern.

[0010] Furthermore, the dummy conductor pattern is located within a circular region with a diameter of 3.5 mm, where the terminals are centered.

[0011] Therefore, it is possible to improve the dimensional accuracy of the thickness of the terminals.

[0012] The present invention [2] includes the wiring circuit board according to [1] above, where the sum of the area of the dummy conductor pattern within the circular region and the area of the terminals is 5% or more of the area of the circular region.

[0013] According to such a configuration, the dummy conductor pattern is provided such that the terminals and the dummy conductor pattern occupy an area of 5% or more of the circular region.

[0014] Thereby, it is possible to suppress the deviation of the thickness of the terminals from the design value.

[0015] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminals.

[0016] The present invention [3] includes the wiring circuit board of [1] above, wherein the terminal has a first conductor layer having a first thickness and a second conductor layer located on the first conductor layer and having a second thickness different from the first thickness, the dummy conductor pattern has the first thickness, and the sum of the area of the dummy conductor pattern within the circular region and the area of the first conductor layer is 5% or more of the area of the circular region.

[0017] According to such a configuration, the dummy conductor pattern is provided such that the first conductor layer of the terminal and the dummy conductor pattern occupy an area of 5% or more of the circular region.

[0018] Thereby, it is possible to suppress the thickness of the first conductor layer of the terminal from deviating from the design value.

[0019] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0020] The present invention [4] includes the wiring circuit board of [1] above, wherein the terminal has a first conductor layer having a first thickness and a second conductor layer located on the first conductor layer and having a second thickness different from the first thickness, the dummy conductor pattern has the second thickness, and the sum of the area of the dummy conductor pattern within the circular region and the area of the second conductor layer is 5% or more of the area of the circular region.

[0021] According to such a configuration, the dummy conductor pattern is provided such that the second conductor layer of the terminal and the dummy conductor pattern occupy an area of 5% or more of the circular region.

[0022] Thereby, it is possible to suppress the thickness of the second conductor layer of the terminal from deviating from the design value.

[0023] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0024] The present invention [5] has the terminal including a first conductor layer having a first thickness and a second conductor layer located on the first conductor layer and having a second thickness different from the first thickness, and the dummy conductor pattern includes a dummy first conductor layer having the first thickness and a dummy second conductor layer located on the dummy first conductor layer and having the second thickness, and the sum of the area of the dummy first conductor layer and the area of the first conductor layer within the circular region is 5% or more of the area of the circular region, and the sum of the area of the dummy second conductor layer and the area of the second conductor layer within the circular region is 5% or more of the area of the circular region, and includes the wiring circuit board of the above [1].

[0025] According to such a configuration, the dummy first conductor layer is provided so that the area of the first conductor layer of the terminal and the dummy first conductor layer occupy 5% or more of the area of the circular region.

[0026] Thereby, it is possible to suppress the thickness of the first conductor layer of the terminal from deviating from the design value.

[0027] Furthermore, the dummy second conductor layer is provided so that the area of the second conductor layer of the terminal and the dummy second conductor layer occupy 5% or more of the area of the circular region.

[0028] Thereby, it is also possible to suppress the thickness of the second conductor layer of the terminal from deviating from the design value.

[0029] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0030] The present invention [6] is a method for manufacturing the wiring circuit board of the above [1] or [2], and includes an insulating layer forming step of forming the insulating layer and a pattern forming step of forming the conductor pattern together with the dummy conductor pattern on the insulating layer.

[0031] According to such a method, in the pattern forming step, it is possible to suppress the thickness of the terminal from deviating from the design value.

[0032] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0033] The present invention [7] is a method for manufacturing the wiring circuit board according to [3] above, including an insulating layer forming step of forming the insulating layer, a first pattern forming step of forming the first conductor layer together with the dummy conductor pattern on the insulating layer, and a second pattern forming step of forming the second conductor layer on the first conductor layer, and includes a method for manufacturing a wiring circuit board.

[0034] According to such a method, in the first pattern forming step, it is possible to suppress the thickness of the first conductor layer from deviating from the design value.

[0035] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0036] The present invention [8] is a method for manufacturing the wiring circuit board according to [4] above, including an insulating layer forming step of forming the insulating layer, a first pattern forming step of forming the first conductor layer on the insulating layer, and a second pattern forming step of forming the second conductor layer together with the dummy conductor pattern on the first conductor layer, and includes a method for manufacturing a wiring circuit board.

[0037] According to such a method, in the second pattern forming step, it is possible to suppress the thickness of the second conductor layer from deviating from the design value.

[0038] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

[0039] The present invention [9] is a method for manufacturing the wiring circuit board according to [5] above, including an insulating layer forming step of forming the insulating layer, a first pattern forming step of forming the first conductor layer together with the dummy first conductor layer on the insulating layer, and a second pattern forming step of forming the second conductor layer together with the dummy second conductor layer on the first conductor layer, and includes a method for manufacturing a wiring circuit board.

[0040] According to such a method, in the first pattern formation step, it is possible to suppress the thickness of the first conductor layer from deviating from the design value.

[0041] Furthermore, in the second pattern formation step, it is also possible to suppress the thickness of the second conductor layer from deviating from the design value.

[0042] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal.

Effect of the Invention

[0043] According to the wiring circuit board and the method for manufacturing the wiring circuit board of the present invention, it is possible to improve the dimensional accuracy of the thickness of the terminal.

Brief Description of the Drawings

[0044]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Embodiments for Carrying Out the Invention

[0045] 1. Wiring Circuit Board As shown in FIG. 1, the wiring circuit board 1 extends in the first direction and the second direction. In the present embodiment, the wiring circuit board 1 has a substantially rectangular shape. Note that the shape of the wiring circuit board 1 is not limited. The wiring circuit board 1 can connect the first electronic component and the second electronic component.

[0046] As shown in FIG. 2, in the present embodiment, the wiring circuit board 1 includes a metal support layer 11, a first insulating layer 12 as an example of an insulating layer, a conductor pattern 13, a plurality of dummy conductor patterns 14A and 14B, and a second insulating layer 15.

[0047] (1) Support layer The support layer 11 supports the first insulating layer 12, the conductor pattern 13, and the second insulating layer 15. Examples of the material of the support layer 11 include stainless steel and copper alloy.

[0048] (2) First insulating layer The first insulating layer 12 is located on the support layer 11 in the thickness direction of the wiring circuit board 1. The thickness direction is perpendicular to the first direction and the second direction. The first insulating layer extends in the first direction and the second direction. That is, the first direction and the second direction are the directions in which the surface of the first insulating layer 12 extends, and are an example of the plane direction. The first insulating layer 12 is located between the support layer 11 and the conductor pattern 13 in the thickness direction. The first insulating layer 12 insulates the support layer 11 and the conductor pattern 13. The first insulating layer 12 is made of resin. Examples of the resin include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester.

[0049] (3) Conductor pattern As shown in FIG. 2, the conductor pattern 13 is located on the first insulating layer 12 in the thickness direction. The conductor pattern 13 is located on the opposite side of the support layer 11 with respect to the first insulating layer 12 in the thickness direction. The conductor pattern 13 is made of metal. Examples of the metal include copper, silver, gold, iron, aluminum, chromium, and alloys thereof. Preferably, the metal is copper.

[0050] As shown in FIG. 1, the conductor pattern 13 has a plurality of terminals 131A, 131B, 131C, 131D, 131E, a plurality of terminals 132A, 132B, 132C, 132D, 132E, and a plurality of wirings 133A, 133B, 133C, 133D, 133E.

[0051] (3-1) Terminals 131A, 131B, 131C, 131D, 131E The terminals 131A, 131B, 131C, 131D, 131E are connected to the first electronic component. The terminals 131A, 131B, 131C, 131D, 131E are located at one end of the wiring circuit board 1 in the second direction. The terminals 131A, 131B, 131C, 131D, 131E are arranged in the first direction. The terminals 131A, 131B, 131C, 131D, 131E are arranged in the order of terminal 131A, terminal 131B, terminal 131C, terminal 131D, terminal 131E from one end to the other end of the wiring circuit board 1 in the first direction. Each of the terminals 131A, 131B, 131C, 131D, 131E has a square land shape.

[0052] Each of the terminals 131A, 131B, 131C, 131D, 131E is spaced apart from each other in the first direction. The distance between terminal 131B and terminal 131C, and the distance between terminal 131C and terminal 131D are longer than the distance between terminal 131A and terminal 131B, and the distance between terminal 131D and terminal 131E.

[0053] Terminal 131A is located at the center of region R1. Region R1 is a circle with a diameter of 3.5 mm. The center of region R1 coincides with the center C1 of terminal 131A. The center C1 is located at the center of terminal 131A in the first direction and at the center of terminal 131A in the second direction. Terminal 131B is located within region R1. Terminals 131C, 131D, 131E are located outside region R1.

[0054] Terminal 131B is located at the center of region R2. Region R2 is a circle with a diameter of 3.5 mm. The center of region R2 coincides with the center C2 of terminal 131B. Center C2 is located at the center of terminal 131B in the first direction and at the center of terminal 131B in the second direction. Terminal 131A is located within region R2. Terminals 131C, 131D, and 131E are located outside region R2.

[0055] Terminal 131C is located at the center of region R3. Region R3 is a circle with a diameter of 3.5 mm. The center of region R3 coincides with the center C3 of terminal 131C. Center C3 is located at the center of terminal 131C in the first direction and at the center of terminal 131C in the second direction. Terminals 131A, 131B, 131D, and 131E are located outside region R3.

[0056] Terminal 131D is located at the center of region R4. Region R4 is a circle with a diameter of 3.5 mm. The center of region R4 coincides with the center C4 of terminal 131D. Center C4 is located at the center of terminal 131D in the first direction and at the center of terminal 131D in the second direction. Terminal 131E is located within region R4. Terminals 131A, 131B, and 131C are located outside region R4.

[0057] Terminal 131E is located at the center of region R5. Region R5 is a circle with a diameter of 3.5 mm. The center of region R5 coincides with the center C5 of terminal 131E. Center C5 is located at the center of terminal 131E in the first direction and at the center of terminal 131E in the second direction. Terminal 131D is located within region R5. Terminals 131A, 131B, and 131C are located outside region R5.

[0058] As shown in FIG. 2, each of terminals 131A, 131B, 131C, 131D, and 131E has a first conductor layer 1311 and a second conductor layer 1312. In this embodiment, each of terminals 131A, 131B, 131C, 131D, and 131E is composed of the first conductor layer 1311 and the second conductor layer 1312.

[0059] The first conductor layer 1311 is located on the first insulating layer 12 in the thickness direction. The first conductor layer 1311 has a first thickness.

[0060] The second conductor layer 1312 is located on the first conductor layer 1311 in the thickness direction. The second conductor layer 1312 has a second thickness. The second thickness is different from the first thickness. In the present embodiment, the second thickness is thicker than the first thickness.

[0061] The difference between the measured value and the designed value of the thickness of each of the terminals 131A, 131B, 131C, 131D, and 131E is, for example, 10% or less, preferably 5% or less with respect to the designed value. The lower limit of the difference between the measured value and the designed value of the thickness of each of the terminals 131A, 131B, 131C, 131D, and 131E is not limited. The difference between the measured value and the designed value of the thickness of each of the terminals 131A, 131B, 131C, 131D, and 131E may be 0%.

[0062] (3-2) Terminals 132A, 132B, 132C, 132D, 132E As shown in FIG. 1, the terminals 132A, 132B, 132C, 132D, and 132E are located at the other end of the wiring circuit board 1 in the second direction. The terminals 132A, 132B, 132C, 132D, and 132E are connected to the second electronic component. In the present embodiment, the terminals 132A, 132B, 132C, 132D, and 132E are arranged in the first direction. Note that the terminals 132A, 132B, 132C, 132D, and 132E may be arranged in a direction different from the direction in which the terminals 131A, 131B, 131C, 131D, and 131E are arranged. Each of the terminals 132A, 132B, 132C, 132D, and 132E has a corner land shape. Each of the terminals 132A, 132B, 132C, 132D, and 132E is spaced apart from each other in the first direction.

[0063] (3-3) Wires 133A, 133B, 133C, 133D, 133E The wiring 133A electrically connects the terminal 131A and the terminal 132A. One end of the wiring 133A is connected to the terminal 131A. The other end of the wiring 133A is connected to the terminal 132A. A part of the wiring 133A is located within the regions R1 and R2.

[0064] The wiring 133B electrically connects the terminal 131B and the terminal 132B. One end of the wiring 133B is connected to the terminal 131B. The other end of the wiring 133B is connected to the terminal 132B. A part of the wiring 133B is located within the regions R1 and R2.

[0065] The wiring 133C electrically connects the terminal 131C and the terminal 132C. One end of the wiring 133C is connected to the terminal 131C. The other end of the wiring 133C is connected to the terminal 132C. A part of the wiring 133C is located within the region R3.

[0066] The wiring 133D electrically connects the terminal 131D and the terminal 132D. One end of the wiring 133D is connected to the terminal 131D. The other end of the wiring 133D is connected to the terminal 132D. A part of the wiring 133D is located within the regions R4 and R5.

[0067] The wiring 133E electrically connects the terminal 131E and the terminal 132E. One end of the wiring 133E is connected to the terminal 131E. The other end of the wiring 133E is connected to the terminal 132E. A part of the wiring 133E is located within the regions R4 and R5.

[0068] (4)Dummy conductor pattern Dummy conductor pattern 14A is located near terminal 131C. Dummy conductor pattern 14A is located within region R3. A part of dummy conductor pattern 14A may be located outside region R3. Dummy conductor pattern 14A is located away from conductor pattern 13. Dummy conductor pattern 14A is not used for connection to electronic components. In other words, dummy conductor pattern 14A is not connected to either the first electronic component or the second electronic component. Dummy conductor pattern 14A has no wiring. In the present embodiment, dummy conductor pattern 14A extends in the second direction. The shape of dummy conductor pattern 14A is not limited.

[0069] As shown in FIG. 2, dummy conductor pattern 14A is located on first insulating layer 12. Dummy conductor pattern 14A has a dummy first conductor layer 141 and a dummy second conductor layer 142.

[0070] Dummy first conductor layer 141 is located on first insulating layer 12 in the thickness direction. Dummy first conductor layer 141 has a first thickness.

[0071] Dummy second conductor layer 142 is located on dummy first conductor layer 141 in the thickness direction. Dummy second conductor layer 142 has a second thickness.

[0072] As shown in FIG. 1, "the sum of the area A1 of the dummy first conductor layer 141 within region R3 and the area A2 of the first conductor layer 1311 of terminal 131C" is, for example, 5% or more, preferably 10% or more, more preferably 25% or more of the area A0 of region R3.

[0073] "The sum of the area A1 of the dummy first conductor layer 141 within region R3 and the area A2 of the first conductor layer 1311 of terminal 131C" is, for example, less than 100%, preferably 95% or less, more preferably 70% or less, more preferably 50% or less of the area A0 of region R3.

[0074] Also, "the sum of the area A1 of the dummy first conductor layer 141 in region R3, the area A2 of the first conductor layer 1311 of the terminal 131C, and the area A3 of the wiring 133A in region R3" is, for example, 5% or more, preferably 10% or more, more preferably 25% or more of the area A0 of region R3.

[0075] Also, "the sum of the area A1 of the dummy first conductor layer 141 in region R3, the area A2 of the first conductor layer 1311 of the terminal 131C, and the area A3 of the wiring 133A in region R3" is, for example, less than 100%, preferably 95% or less, more preferably 70% or less, more preferably 50% or less of the area A0 of region R3.

[0076] "The sum of the area A11 of the dummy second conductor layer 142 in region R3 and the area A12 of the second conductor layer 1312 of the terminal 131C" is, for example, 5% or more, preferably 10% or more, more preferably 25% or more of the area of region R3.

[0077] "The sum of the area A11 of the dummy second conductor layer 142 in region R3 and the area A12 of the second conductor layer 1312 of the terminal 131C" is, for example, less than 100%, preferably 95% or less, more preferably 70% or less, more preferably 50% or less of the area of region R3.

[0078] In addition, "the sum of the area of the first conductor layer 1311 of the terminal 131A and the area of the first conductor layer 1311 of the terminal 131B" is, for example, 5% or more, preferably 10% or more, more preferably 25% or more of the area of region R1.

[0079] Also, "the sum of the area of the first conductor layer 1311 of the terminal 131A and the area of the first conductor layer 1311 of the terminal 131B" is, for example, less than 100%, preferably 95% or less, more preferably 70% or less, more preferably 50% or less of the area of region R1.

[0080] The percentage of the "sum of the area A11 of the dummy second conductor layer 142 in region R3 and the area A12 of the second conductor layer 1312 of terminal 131C" with respect to the area of region R3, and the percentage of the "sum of the area of the first conductor layer 1311 of terminal 131A and the area of the first conductor layer 1311 of terminal 131B" with respect to the area of region R1, the difference between them is, for example, 50% or less, preferably 30% or less.

[0081] The lower limit of the difference between the percentage of the "sum of the area A11 of the dummy second conductor layer 142 in region R3 and the area A12 of the second conductor layer 1312 of terminal 131C" with respect to the area of region R3, and the percentage of the "sum of the area of the first conductor layer 1311 of terminal 131A and the area of the first conductor layer 1311 of terminal 131B within region R3" with respect to the area of region R1 is not limited. The difference between the percentage of the "sum of the area A11 of the dummy second conductor layer 142 in region R3 and the area A12 of the second conductor layer 1312 of terminal 131C" with respect to the area of region R3, and the percentage of the "sum of the area of the first conductor layer 1311 of terminal 131A and the area of the first conductor layer 1311 of terminal 131B within region R3" with respect to the area of region R1 may be 0.

[0082] The dummy conductor pattern 14B is located near the terminal 132C. The description of the dummy conductor pattern 14B is the same as that of the dummy conductor pattern 14A. Therefore, the description of the dummy conductor pattern 14B is omitted.

[0083] (5) Second insulating layer As shown in FIG. 1, the second insulating layer 15 covers the wirings 133A, 133B, 133C, 133D, 133E. The second insulating layer 15 is located above the first insulating layer 12 in the thickness direction. Note that the second insulating layer 15 does not cover the terminals 131A, 131B, 131C, 131D, 131E, and the terminals 132A, 132B, 132C, 132D, 132E. The second insulating layer 15 is made of resin. Examples of the resin include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester.

[0084] 2. Manufacturing method of the wiring circuit board Next, a method for manufacturing the wiring circuit board 1 will be described.

[0085] The method for manufacturing the wiring circuit board 1 includes a first insulating layer forming step (see FIG. 3A), a pattern forming step (see FIGS. 3B and 3C), a second insulating layer forming step, and an etching step (see FIG. 3D).

[0086] (1) First insulating layer forming step As shown in FIG. 3A, in the first insulating layer forming step, a first insulating layer 12 is formed on the base material S. The base material S is the material of the support layer 11 (see FIG. 2) of the wiring circuit board 1. The base material S is a metal foil made of the metal forming the support layer 11.

[0087] In the first insulating layer forming step, the first insulating layer 12 is formed on the product region P of the base material S. The product region P is the region that will become the wiring circuit board 1.

[0088] In the first insulating layer forming step, first, a solution (varnish) of a photosensitive resin is applied onto the base material S and dried to form a coating film of the photosensitive resin. Next, the coating film of the photosensitive resin is exposed and developed. Thereby, the first insulating layer 12 is formed on the base material S.

[0089] (2) Pattern forming step Next, as shown in FIGS. 3B and 3C, in the pattern forming step, a conductor pattern 13 is formed on the first insulating layer 12 together with dummy conductor patterns 14A and 14B. In the present embodiment, the pattern forming step includes a first pattern forming step (see FIG. 3B) and a second pattern forming step (see FIG. 3C). That is, the method for manufacturing the wiring circuit board 1 includes the first pattern forming step and the second pattern forming step.

[0090] As shown in FIG. 3B, in the first pattern forming step, a first conductor layer 1311 is formed on the first insulating layer 12 together with a dummy first conductor layer 141.

[0091] Specifically, in the first pattern formation step, first, a seed layer is formed on the surfaces of the first insulating layer 12 and the substrate S. The seed layer is formed, for example, by sputtering. Examples of the material of the seed layer include chromium, copper, nickel, titanium, and alloys thereof.

[0092] Next, a plating resist is bonded onto the first insulating layer 12 and the substrate S on which the seed layer is formed. Next, the plating resist is exposed in a state where the portions where the first conductor layer 1311 and the dummy first conductor layer 141 are to be formed are shielded from light. Next, the exposed plating resist is developed.

[0093] As a result, the plating resist in the shielded portion, that is, the portion where the first conductor layer 1311 and the dummy first conductor layer 141 are to be formed, is removed, and the seed layer is exposed. On the other hand, the plating resist in the exposed portion, that is, the portion where the first conductor layer 1311 and the dummy first conductor layer 141 are not to be formed, remains.

[0094] Next, the first conductor layer 1311 and the dummy first conductor layer 141 are formed on the exposed seed layer by electrolytic plating.

[0095] At this time, the first conductor layer 1311 is formed together with the dummy first conductor layer 141. Therefore, in the plating solution, it is possible to suppress an excessive increase in the metal ion concentration around the first conductor layer 1311. As a result, it is possible to suppress the thickness of the first conductor layer 1311 from becoming thicker than the designed value.

[0096] After the electrolytic plating is completed, the plating resist is peeled off.

[0097] Next, as shown in FIG. 3C, in the second pattern formation step, the second conductor layer 1312 is formed on the first conductor layer 1311 together with the dummy second conductor layer 142.

[0098] Specifically, a plating resist is bonded onto the first insulating layer 12, the first conductor layer 1311, the dummy first conductor layer 141, and the base material S. Next, the plating resist is exposed in a state where the portions where the second conductor layer 1312 and the dummy second conductor layer 142 are to be formed are shielded from light. Next, the exposed plating resist is developed.

[0099] As a result, the plating resist in the shielded portion, that is, the portion where the second conductor layer 1312 and the dummy second conductor layer 142 are to be formed, is removed, and the first conductor layer 1311 and the dummy first conductor layer 141 are exposed. On the other hand, the plating resist in the exposed portion, that is, the portion where the second conductor layer 1312 and the dummy second conductor layer 142 are not to be formed, remains.

[0100] Next, the second conductor layer 1312 is formed on the exposed first conductor layer 1311, and the dummy second conductor layer 142 is formed on the exposed dummy first conductor layer 141 by electrolytic plating.

[0101] At this time, the second conductor layer 1312 is formed together with the dummy second conductor layer 142. Therefore, it is possible to suppress the metal ion concentration around the second conductor layer 1312 from becoming excessively high in the plating solution. As a result, it is possible to suppress the thickness of the second conductor layer 1312 from becoming thicker than the designed value.

[0102] After the electrolytic plating is completed, the plating resist is peeled off, and the exposed seed layer is removed by etching.

[0103] (4) Second Insulating Layer Formation Step Next, in the second insulating layer formation step, as shown in FIG. 1, the second insulating layer 15 is formed on the first insulating layer 12 and the conductor pattern 13.

[0104] In the second insulating layer formation step, first, a solution (varnish) of a photosensitive resin is applied onto the first insulating layer 12 and the conductor pattern 13 and dried to form a coating film of the photosensitive resin. Next, the coating film of the photosensitive resin is exposed and developed. Thereby, the second insulating layer 15 is formed.

[0105] (5) Etching process Next, as shown in Fig. 3D, in the etching process, the base material S around the product area P is removed by etching. Thereby, the wiring circuit board 1 is obtained.

[0106] 3. Function and effect (1) As shown in Fig. 1, the wiring circuit board 1 includes a dummy conductor pattern 14A.

[0107] Therefore, compared with the configuration in which the dummy conductor pattern 14A is formed outside the wiring circuit board 1, the dummy conductor pattern 14A is located closer to the conductor pattern 13.

[0108] Furthermore, the dummy conductor pattern 14A is located within a circular region R3 with a diameter of 3.5 mm centered on the terminal 131C.

[0109] Therefore, it is possible to improve the dimensional accuracy of the thickness of the terminal 131C.

[0110] (2) According to the wiring circuit board 1, as shown in Fig. 1, the dummy first conductor layer 141 is provided such that the area of the region R3 occupied by the first conductor layer 1311 of the terminal 131C and the dummy first conductor layer 141 is 5% or more.

[0111] Thereby, it is possible to suppress the deviation of the thickness of the first conductor layer 1311 of the terminal 131C from the designed value.

[0112] Furthermore, the dummy second conductor layer 142 is provided such that the area of the region R3 occupied by the second conductor layer 1312 of the terminal 131C and the dummy second conductor layer 142 is 5% or more.

[0113] Thereby, it is also possible to suppress the deviation of the thickness of the second conductor layer 1312 of the terminal 131C from the designed value.

[0114] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal 131C.

[0115] 4. Modification example Hereinafter, with reference to FIGS. 4 to 7, a modified example of the wiring circuit board will be described. In the following modified examples, the same members as those in the above-described embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0116] (1) As shown in FIG. 4, the terminals 131A, 131B, 131C, 131D, and 131E may be formed from a single conductor layer. In this case, the dummy conductor pattern 14A is also formed from a single conductor layer.

[0117] In this case, if the sum of the area of the dummy conductor pattern 14A in the region R3 and the area of the terminal 131C is 5% or more of the area of the region R3, it is possible to suppress the thickness of the terminal 131C from deviating from the designed value.

[0118] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal 131C. (2) As shown in FIG. 5, the dummy conductor pattern 14A may be formed only from the dummy first conductor layer 141 without having the dummy second conductor layer 142.

[0119] In this case, in the first pattern forming step, the first conductor layer 1311 is formed together with the dummy conductor pattern 14A.

[0120] The dummy conductor pattern 14A has the same first thickness as the first conductor layer 1311.

[0121] Also, the sum of the area of the dummy conductor pattern 14A in the region R3 and the area of the first conductor layer 1311 is 5% or more of the area of the region R3.

[0122] Therefore, in the first pattern forming step, it is possible to suppress the thickness of the first conductor layer 1311 from deviating from the designed value.

[0123] Then, in the second pattern forming step, the second conductor layer 1312 is formed on the first conductor layer 1311.

[0124] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal 131C.

[0125] (3) As shown in FIG. 6, the dummy conductor pattern 14A may be formed only from the dummy second conductor layer 142 without having the dummy first conductor layer 141.

[0126] In this case, in the second pattern formation step, the second conductor layer 1312 is formed together with the dummy conductor pattern 14A.

[0127] The dummy conductor pattern 14A has the second thickness, similar to the second conductor layer 1312.

[0128] Also, the sum of the area of the dummy conductor pattern 14A and the area of the second conductor layer 1312 in the region R3 is 5% or more of the area of the region R3.

[0129] Therefore, in the second pattern formation step, it is possible to suppress the thickness of the second conductor layer 1312 from deviating from the design value.

[0130] As a result, it is possible to improve the dimensional accuracy of the thickness of the terminal 131C.

[0131] (4) As shown in FIG. 7, the dummy conductor pattern 14A may be formed across a plurality of terminals 131C, 131D. In this case, the dummy conductor pattern 14A extends in the direction in which the plurality of terminals 131C, 131D are arranged (in this modification, the first direction). Also, a part of the dummy conductor pattern 14A may be located within the region R3. In this modification, one end portion of the dummy conductor pattern 14A is located within the region R3, and the other end portion of the dummy conductor pattern 14A is located within the region R4.

[0132] Also in this modification, the same operational effects as those of the above-described embodiment can be obtained.

[0133] As shown in FIG. 8, the wiring circuit board 1 may have a metal ground layer 100 between the support layer 11 and the first insulating layer 12. In this case, the conductor pattern 13 further has a ground wiring (not shown) connected to the ground layer 100 through a via hole in the first insulating layer 12.

Example

[0134] Next, the present invention will be described based on examples and comparative examples. The present invention is not limited by the following examples. Also, the specific numerical values of physical property values, parameters, etc. used in the following description can be replaced with the upper limit values (numerical values defined as "hereinafter", "less than") or lower limit values (numerical values defined as "above", "greater than") of the corresponding physical property values, parameters, etc. described in the above "Mode for Carrying Out the Invention".

[0135] 1. Manufacture of Wiring Circuit Board The wiring circuit boards of each example and each comparative example were manufactured.

[0136] (1) Each Example First, a solution (varnish) of a photosensitive resin was applied onto a metal foil as a base material and dried to form a coating film of the photosensitive resin.

[0137] Next, the coating film of the photosensitive resin was exposed and developed to form a first insulating layer on the base material (first insulating layer forming step, see FIG. 3A).

[0138] Next, a seed layer was formed on the surfaces of the first insulating layer and the base material by sputtering.

[0139] Next, a plating resist was bonded onto the first insulating layer and the metal foil on which the seed layer was formed.

[0140] Next, with the percentage (area ratio) of "the sum of the area of the dummy conductor pattern and the area of the terminal within the circular region" with respect to the area of the circular region with a diameter of 3.5 mm where the terminal is located at the center being the value shown in Table 1 below, the plating resist was exposed in a state where the portions where the conductor pattern (design value of the terminal thickness: 10 μm) and the dummy conductor pattern are formed were shielded from light.

[0141] Next, the exposed plating resist was developed to remove the plating resist in the portions where the conductor pattern and the dummy conductor pattern are formed.

[0142] Next, by electrolytic plating, a conductor pattern and a dummy conductor pattern were formed on the seed layer exposed from the plating resist (pattern formation step, see Figure 4). After the electrolytic plating was completed, the plating resist was peeled off, and the exposed seed layer was removed by etching.

[0143] Next, a solution (varnish) of a photosensitive resin was applied onto the first insulating layer and the conductor pattern and dried to form a coating film of the photosensitive resin. Next, the coating film of the photosensitive resin was exposed and developed to form the second insulating layer.

[0144] Thereafter, the base material was etched along the outer shape of the wiring circuit board (etching step) to obtain the wiring circuit board.

[0145] (2) Comparative Example A wiring circuit board was obtained in the same manner as in each of the examples, except that a dummy conductor pattern was not formed. Note that when a dummy conductor pattern was not formed, the area ratio was the percentage of the area of the terminal with respect to the area of the circular region with a diameter of 3.5 mm where the terminal is located at the center, and it was 3%.

[0146] 2. Evaluation The thickness of the terminals of the wiring circuit boards of each of the examples and the comparative example was measured. The difference between the measured thickness and the design value (10 μm) is shown in Table 1. Note that a positive numerical value indicates that the terminal was formed thicker than the design value, and a negative numerical value indicates that the terminal was formed thinner than the design value.

[0147]

Table 1

Explanation of Symbols

[0148] 1 Wiring Circuit Board 12 First Insulating Layer 13 Conductor Pattern 131C Terminal 1311 First Conductor Layer 1312 Second Conductor Layer 14A Dummy Conductor Pattern 141 Dummy First Conductor Layer 142 Dummy Second Conductor Layer R3 Circular Region

Claims

1. An insulating layer, A conductor pattern located on the insulating layer and having terminals, And a dummy conductor pattern located on the insulating layer and separated from the conductor pattern, The dummy conductor pattern is located within a circular region with a diameter of 3.5 mm where the terminals are centered, in the plane direction which is the direction in which the surface of the insulating layer extends, a wiring circuit board.

2. The sum of the area of the dummy conductor pattern within the circular region and the area of the terminals is 5% or more of the area of the circular region, the wiring circuit board according to claim 1.

3. The terminals are, A first conductor layer having a first thickness, A second conductor layer located on the first conductor layer and having a second thickness different from the first thickness And having, The dummy conductor pattern has the first thickness, The sum of the area of the dummy conductor pattern within the circular region and the area of the first conductor layer is 5% or more of the area of the circular region, the wiring circuit board according to claim 1.

4. The terminals are, A first conductor layer having a first thickness, A second conductor layer located on the first conductor layer and having a second thickness different from the first thickness And having, The dummy conductor pattern has the second thickness, The sum of the area of the dummy conductor pattern within the circular region and the area of the second conductor layer is 5% or more of the area of the circular region, the wiring circuit board according to claim 1.

5. The terminals are, A first conductor layer having a first thickness, A second conductor layer located on the first conductor layer and having a second thickness different from the first thickness And having, The dummy conductor pattern is, A dummy first conductor layer having the first thickness, A dummy second conductor layer located on the dummy first conductor layer and having the second thickness And having, The sum of the area of the dummy first conductor layer within the circular region and the area of the first conductor layer is 5% or more of the area of the circular region, The sum of the area of the dummy second conductor layer within the circular region and the area of the second conductor layer is 5% or more of the area of the circular region, the wiring circuit board according to claim 1.

6. A method for manufacturing the wiring circuit board according to claim 1 or 2, An insulating layer forming step of forming the insulating layer, A pattern forming step of forming the conductor pattern together with the dummy conductor pattern on the insulating layer And including, a method for manufacturing a wiring circuit board.

7. A method for manufacturing the wiring circuit board according to claim 3, An insulating layer forming step of forming the insulating layer; A first pattern forming step of forming the first conductor layer together with the dummy conductor pattern on the insulating layer; A second pattern forming step of forming the second conductor layer on the first conductor layer A manufacturing method of a wiring circuit board including the above steps.

8. A manufacturing method of a wiring circuit board according to claim 4, An insulating layer forming step of forming the insulating layer; A first pattern forming step of forming the first conductor layer on the insulating layer; A second pattern forming step of forming the second conductor layer together with the dummy conductor pattern on the first conductor layer A manufacturing method of a wiring circuit board including the above steps.

9. A manufacturing method of a wiring circuit board according to claim 5, An insulating layer forming step of forming the insulating layer; A first pattern forming step of forming the first conductor layer together with the dummy first conductor layer on the insulating layer; A second pattern forming step of forming the second conductor layer together with the dummy second conductor layer on the first conductor layer A manufacturing method of a wiring circuit board including the above steps.

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