Transimpedance amplifier, photodetection device, and electronic device

Abstract

To provide a transimpedance amplifier that alleviates disturbance of frequency characteristics.SOLUTION: According to an embodiment, there is provided a transimpedance amplifier including: an input terminal; a first transistor having a source or an emitter connected to the input terminal; a first current-voltage conversion circuit connected to a drain or a collector of the first transistor; a first voltage-current conversion circuit and a second voltage-current conversion circuit that convert an input voltage corresponding to an output voltage of the first current-voltage conversion circuit into a current; an inverting amplifier circuit having an input node connected to the source or the emitter of the first transistor and an output node connected to a gate or a base of the first transistor; a second current-voltage conversion circuit that converts an output current of the second voltage-current conversion circuit into a voltage; and an output terminal that outputs the voltage converted by the second current-voltage conversion circuit.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] Embodiments of the present invention relate to a transimpedance amplifier, a photodetection device, and an electronic device.

Background Art

[0002] In order to detect optical signals such as laser reflected light in LiDAR (Light Detection And Ranging) and optical communication, a photodiode (hereinafter, PD) that converts an optical signal into an electric current signal, a transimpedance amplifier (hereinafter, TIA) that converts an electric current signal into a voltage signal, and a photodetection device using these are known.

[0003] In order to transmit a signal over a wide band, for example, a method of terminating a transmission line at 50 Ω has been proposed. However, if the input resistance value of the TIA is large, the variation range of the input resistance value of the TIA due to manufacturing variations becomes large, so it is not terminated correctly and the frequency characteristics fluctuate.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Non-Patent Documents

[0005]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] The problem to be solved by the present invention is to provide a transimpedance amplifier, a photodetection device, and an electronic device that mitigate disturbances in frequency characteristics.

Means for Solving the Problem

[0007] According to an embodiment, a transimpedance amplifier is provided.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 3A

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Figure 11

Figure 12

Figure 13A

Figure 13B

Figure 14

Embodiment for Carrying Out the Invention

[0009] Hereinafter, embodiments will be described with reference to the drawings. In the following description, components that exhibit the same or similar functions are given the same reference numerals throughout all the drawings, and redundant descriptions are omitted. Also, each drawing is a schematic diagram for facilitating the description of the embodiments and understanding thereof, and there are differences in its shape, dimensions, ratio, etc. from the actual device, but these can be appropriately designed and changed in consideration of the following description and known techniques.

[0010] (First Embodiment) According to the first embodiment, a transimpedance amplifier is provided. FIG. 1 is a circuit diagram of TIA1 according to the first embodiment. TIA1 in FIG. 1 includes an input terminal IN, an output terminal OUT, a first current-voltage conversion circuit 2a, a second current-voltage conversion circuit 2b, a first voltage-current conversion circuit 3a, a second voltage-current conversion circuit 3b, a current source I1, a transistor M1, and an inverting amplifier circuit 4. In FIG. 1, the high potential side is indicated as V hi , and the low potential side is indicated as V low , but the high potential side may be connected to, for example, a power supply, and the low potential side may be grounded, for example. The same applies to the figures that will appear hereinafter.

[0011] The source of transistor M1 is connected to the input terminal IN, and is also connected to the input node of the inverting amplifier circuit 4, the output node of the first voltage-current conversion circuit 3a, and the current source I1. The drain of transistor M1 is connected to the input nodes of the first voltage-current conversion circuit 3a and the second voltage-current conversion circuit 3b, and is also connected to the first current-voltage conversion circuit 2a.

[0012] Transistor M1 may be, for example, a bipolar transistor or a field effect transistor. Here, it will be described on the assumption that the transistor is a field effect transistor. Transistor M1 is, for example, an NMOS transistor, but the conductivity type is not limited. The same applies to other transistors that will appear hereinafter.

[0013] The first current-voltage conversion circuit 2a is connected to the input nodes of the first voltage-current conversion circuit 3a and the second voltage-current conversion circuit 3b, and V hi (e.g., a power supply). The current source I1 and the second current-voltage conversion circuit 2b are connected to V low (e.g., ground).

[0014] The output node of the first voltage-current conversion circuit 3a is connected to the input terminal IN, the source of the transistor M1, and the input node of the inverting amplifier circuit 4. The output node of the second voltage-current conversion circuit 3b is connected to the second current-voltage conversion circuit 2b and is also connected to the output terminal OUT. The first voltage-current conversion circuit 3a and the second voltage-current conversion circuit 3b can be replaced by, for example, a transistor having an input node as a gate and an output node as a drain. The first current-voltage conversion circuit 2a and the second current-voltage conversion circuit 2b can also be replaced by a current source or a resistor.

[0015] The gain of the inverting amplifier circuit 4 is expressed as -A times using the amplification factor A. The output node of the inverting amplifier circuit 4 is connected to the gate of the transistor M1. The inverting amplifier circuit 4 can be replaced by a transistor and a current source.

[0016] The operation of TIA1 shown in FIG. 1 will be described. For example, when an input current is applied in a direction to draw current from the input terminal IN, a part of the applied current is converted into a voltage by the first current-voltage conversion circuit 2a via the transistor M1, and the converted voltage is converted into a current by the first voltage-current conversion circuit 3a and fed back to the input terminal IN, acting to suppress fluctuations in the input terminal voltage. Further, the inverting amplifier circuit 4 inputs the input terminal voltage and is fed back to the gate of the transistor M1, and this feedback loop also acts to suppress fluctuations in the source voltage of the transistor M1, that is, fluctuations in the input terminal voltage. In this way, by adopting a configuration of a double feedback loop having a feedback loop composed of the input terminal IN, the transistor M1, the first current-voltage conversion circuit 2a, and the first voltage-current conversion circuit 3a, and a feedback loop composed of the inverting amplifier circuit 4 and the transistor M1, it is possible to more effectively suppress fluctuations in the input terminal voltage when an input current is applied.

[0017] Most of the input current flows through the first voltage-current conversion circuit 3a. Let the input current be I in and the conversion coefficient of the first voltage-current conversion circuit 3a be g m1 and the conversion coefficient of the second voltage-current conversion circuit 3b be g m5 . Then, the output current of the second voltage-current conversion circuit 3b is g m5 I in / g m1 , which is converted into a voltage by the second current-voltage conversion circuit 2b (for example, a resistor R1 with a resistance value of R1), and a voltage signal of g m5 R1I in / g m1 is output from the output terminal OUT.

[0018] Let the conversion coefficient of the first voltage-current conversion circuit 3a be g m1 , the transconductance of the transistor M1 be g m2 , the output conductance of the transistor M1 be g o2 , and the conversion coefficient of the first current-voltage conversion circuit 2a be the reciprocal of the conductance, 1 / g o4 . Therefore, using these coefficients and the amplification factor A of the inverting amplifier circuit 4, the input resistance of TIA1 is (g o2 +g o4) / (Ag m1 g m2 ) is approximately obtained. Here, for example, if g m1 ≒ 1 mS, g m2 / (g o2 + g o4 ) ≒ 20, and A = 20, then the input resistance of TIA1 is 2.5 Ω. By connecting a 47.5 Ω resistor in series to the input node of TIA1, the termination resistance can be set to 50 Ω. By reducing the input resistance, even if the input resistance value of TIA1 varies due to manufacturing variations, temperature changes, power supply voltage fluctuations, etc., the variation range as the termination resistance value can be made small, and the disturbance of the frequency characteristics can be mitigated.

[0019] TIA1 in FIG. 2 is a specific implementation of the configuration of each part within TIA1 in FIG. 1. In TIA1 of FIG. 2, the first voltage-current conversion circuit 3a and the second voltage-current conversion circuit 3b are respectively composed of transistor M2 and transistor M3, and the first current-voltage conversion circuit 2a and the second current-voltage conversion circuit 2b are respectively composed of current source I2 and resistor R1.

[0020] The sources of transistors M2 and M3 are connected to, for example, a power supply, and the gates of transistors M2 and M3 are connected to current source I2 and the drain of transistor M1. The drain of transistor M2 is connected to the input terminal IN and the input node of the inverting amplifier circuit 4, and the drain of transistor M3 is connected to the output terminal OUT. Resistor R1 is grounded, for example. Transistors M2 and M3 are, for example, PMOS transistors.

[0021] The current conversion coefficients of the first voltage-current conversion circuit 3a and the second voltage-current conversion circuit 3b respectively correspond to the transconductances of transistor M2 and transistor M3. Also, the conductance, which is the reciprocal of the conversion coefficient of the first current-voltage conversion circuit 2a, corresponds to the output conductance of current source I2. Similar to the circuit diagram of FIG. 1, the disturbance of the frequency characteristics can be mitigated by reducing the input resistance.

[0022] TIA1 in Fig. 3 embodies the configuration of the inverting amplifier circuit 4 in Figs. 1 and 2, and replaces the inverting amplifier circuit 4 with a source-grounded amplifier circuit using transistor M4 and current source I3.

[0023] The gate of transistor M4 is connected to the input terminal IN and the source of transistor M1, and the drain of transistor M4 is connected to the current source I3 and the gate of transistor M1. The source of transistor M4 is grounded, for example. Transistor M4 is an NMOS transistor, for example. The current source I3 is connected to the power supply and the gate of transistor M1.

[0024] The gain of the inverting amplifier circuit is set such that the transconductance of transistor M4 is g m3 , the output transconductance of transistor M4 is g o3 , and the output conductance of current source I3 is g o6 . Then, the gain is expressed as -g m3 / (g o3 + g o6 ). Therefore, the input resistance of the TIA is approximately obtained as (g o2 + g o4 )(g o3 + g o6 ) / (g m1 g m2 g m3 ). Here, for example, if g m1 ≈ 1 mS, g m2 / (g o2 + g o4 ) ≈ 20, and g m3 / (g o3 + g o6 ) ≈ 20, the input resistance of the TIA is 2.5 Ω. From this, by reducing the input resistance, the disturbance of the frequency characteristics can be mitigated.

[0025] Note that, as shown in FIG. 3A, transistors M2 and M3 may be composed of pnp bipolar transistors T2 and T3, and transistors M1 and M4 may be composed of npn bipolar transistors T1 and T4. The gates, drains, and sources of transistors M1 to M4 respectively correspond to the bases, collectors, and emitters of bipolar transistors T1 to T4. Although not shown, for example, only transistors M1 and M4 may be composed of npn bipolar transistors T1 and T4.

[0026] TIA1 in FIG. 4 is a specific example when transistor M1 is of the same PMOS type as transistors M2 and M3. The voltage converted by a current-voltage conversion circuit (for example, current source I4) is applied to the gates of transistors M2 and M3 via a level shift circuit 5 composed of transistor M5 and current source I5. The gate of transistor M5 is connected to the drain of transistor M1, and the source of transistor M5 is connected to the gates of transistors M2 and M3 and current source I5. The drain of transistor M5 is grounded. Transistor M5 is, for example, a PMOS transistor.

[0027] Since the signal gain of level shift circuit 5 is approximately 1, the input resistance is the same as that of the circuit shown in FIG. 2, and is approximately obtained as (g o2 +g o4 ) / (Ag m1 g m2 ). By performing the same calculation of the input resistance as that of the circuit diagram in FIG. 2, the disturbance of the frequency characteristics can be mitigated by reducing the input resistance.

[0028] Similar to FIG. 3, TIA1 in FIG. 5 is a specific example in which the inverting amplifier circuit 4 in FIG. 4 is replaced with a source-grounded amplifier circuit using transistor M6 and current source I6. The gate of transistor M6 is connected to the input terminal IN and the drain of transistor M2, and the source of transistor M6 is connected to the power supply. The drain of transistor M6 is connected to the gate of transistor M1 and current source I6. Transistor M6 is, for example, a PMOS transistor.

[0029] The gain of the inverting amplifier circuit 4 is the transconductance of the transistor M6 being g m3 , the output transconductance of the transistor M6 being g o3 , and the output conductance of the current source I6 being g o6 . Then, the gain is -g m3 / (g o3 +g o6 ). Therefore, the input resistance of the TIA is approximately obtained as (g o2 +g o4 )(g o3 +g o6 ) / (g m1 g m2 g m3 ). By performing the calculation of the input resistance similar to the circuit diagram in Fig. 3, the disturbance of the frequency characteristics can be mitigated by reducing the input resistance.

[0030] Fig. 6 shows an example in which a gate-grounded amplifier circuit using transistors M6 and M7 is introduced. The transistors M6 and M7 are, for example, PMOS transistors. The drain of the transistor M6 is connected to the source of the transistor M1, the input node of the inverting amplifier circuit 4, and the input terminal IN. The source of the transistor M6 is connected to the drain of the transistor M2. The drain of the transistor M7 is connected to the output terminal OUT. The source of the transistor M7 is connected to the drain of the transistor M3. The gates of the transistors M6 and M7 are connected to V bias .

[0031] By applying the bias voltage from V bias to the gates of the transistors M6 and M7 and connecting the sources of the transistors M6 and M7 to the drains of the transistors M2 and M3, respectively, the drain voltages of the transistors M2 and M3 can be made equal. Thereby, the error generated in the output current can be reduced.

[0032] Since the TIA according to the first embodiment reduces the input resistance of the TIA, even if the input resistance value of the TIA varies due to manufacturing variations, temperature changes, power supply voltage fluctuations, etc., the variation range as the termination resistance value can be made small, and the disturbance of the frequency characteristics can be mitigated.

[0033] (Second Embodiment) According to the second embodiment, an optical detection device is provided. The optical detection device according to the second embodiment includes the TIA according to the first embodiment.

[0034] The optical detection device 6 may include a passive element. Examples of the passive element include a resistor and a capacitor. The passive element can be used alone or a plurality of passive elements can be provided. The connection method of the passive element in the photoelectric conversion circuit 7 is not limited.

[0035] FIG. 7 is a circuit diagram showing the optical detection device according to the second embodiment. The optical detection device 6 in FIG. 7 includes a photoelectric conversion circuit 7, any one of the TIAs 1 shown in FIGS. 1 to 6, a resistor Rm1 having one end connected in series to the input node of the TIA1, and a substrate wiring 8 connecting the output node of the photoelectric conversion circuit 7 and the other end of the resistor Rm1.

[0036] The photoelectric conversion circuit 7 in FIG. 7 includes, for example, a photodiode 9 that inputs an optical signal, an active quench circuit 14a that controls the voltage applied to the photodiode 9 and outputs a voltage signal corresponding to the optical signal input to the photodiode 9, a transistor M8 to which the voltage signal output from the active quench circuit 14a is applied to the gate, a resistor Rm2 connected between the drain of the transistor M8 and the power supply, and a capacitor Cm21 that passes only the signal component without passing the DC component. In this configuration, the transistor M8 corresponds to the output node of the photoelectric conversion circuit 7. As the photodiode 9, for example, an avalanche photodiode, a PN-type photodiode, a PIN-type photodiode, etc. can be used.

[0037] The substrate wiring 8 may include cables and connectors. Parasitic inductance components that are connected in series and parasitic capacitance components that are connected to the ground are attached to the substrate wiring 8. For this reason, the frequency characteristics in the high-frequency band are disturbed. The resistor Rm2 terminates the output node side of the photoelectric conversion circuit 7, and the resistor Rm1 serves as the input resistance of the TIA1 and terminates the input node side of the TIA1. For example, by manufacturing the substrate wiring 8 to have a characteristic impedance of 50 Ω and making the resistance ≒ (the resistance Rm2 + the input resistance of the TIA1) ≒ 50 Ω, it is possible to mitigate the disturbance in the high-frequency band.

[0038] As shown in FIGS. 1 to 6, for the TIA1, since the input resistance of the TIA is sufficiently smaller than the resistor Rm1, the variation in the input resistance value of the TIA1 due to manufacturing variations, temperature fluctuations, and power supply voltage fluctuations can be suppressed to a small value. Therefore, since the variation in the termination resistance value (the resistance Rm1 + the input resistance of the TIA) on the TIA side due to manufacturing variations, temperature fluctuations, and power supply voltage fluctuations can be almost ignored, it is possible to mitigate the disturbance in the frequency characteristics due to manufacturing variations, temperature fluctuations, and power supply voltage fluctuations.

[0039] As shown in FIGS. 8(a) and 8(b), when integrating the resistor Rm1 connected to the input node of the TIA together with the TIA, in order to correct the manufacturing variations of the resistor, it may be configured with a plurality of switches and a plurality of resistors, and the resistance value may be corrected by selecting the switches. FIG. 8(a) is an example configured with a plurality of resistors Ra0 to Ran connected in series to Rm1 and selection switches Sa1 to San, and selection switches Sa1 to San for selecting the connection between one end of Ra0 and each one end of Ra1 to Ran are provided. The resistance value can be adjusted by selecting the opening and closing of these switches Sa1 to San. Also, FIG. 8(b) is a configuration in which resistors Rb1 to Rbn and switches Sb1 to Sbn connected in series are connected in parallel between both ends of Rb0. The resistance value can be adjusted by selecting the opening and closing of these switches Sb1 to Sbn. Either the configuration of FIGS. 8(a) and 8(b) or a combined configuration may be used.

[0040] As shown in FIG. 9, except for the resistor Rm2 and the capacitor Cm21 on the output node side of the photoelectric conversion circuit 7 in FIG. 7, the output node of the photoelectric conversion circuit 7 and the input node of the TIA1 may be directly coupled, and it may be terminated only on the TIA1 side. In FIG. 7, for example, if the resistor Rm2 = (resistor Rm1 + input resistance of the TIA) = 50 Ω, half of the signal current output from the drain of the transistor M8 flows through Rm2, and the signal current flowing into the TIA1 side is halved. However, in FIG. 9, all the signal current output from the drain of the transistor M8 flows into the TIA1, so the signal amplitude increases and the resistance to noise is improved.

[0041] Also, as shown in FIG. 10, the resistor Rm2 on the output node side of the photoelectric conversion circuit 7 in FIG. 7 may be composed of a resistor Rm21 and a resistor Rm22. The resistor Rm21 is connected to the power supply, the drain of the transistor M8, the resistor Rm22, and the substrate wiring 8, and the resistor Rm22 is connected to the drain of the transistor M8, the substrate wiring 8, and the capacitor Cm22. The capacitor Cm22 is grounded.

[0042] In the case of such a configuration, select Rm21 and Rm22 such that Rm21Rm22 / (Rm21 + Rm22) = Rm2, and select the capacitor Cm22 such that 1 / (2πfCm22) << 1 at the frequency f of the signal band.

[0043] FIG. 11 shows an example in which a resistor Rm2 and a capacitor Cm22 are connected as passive elements between the transistor M8 and the substrate wiring 8. The resistor Rm2 is connected to the drain of the transistor M8, the substrate wiring 8, and the capacitor Cm22. The capacitor Cm22 is grounded. By selecting the capacitor Cm22 such that 1 / (2πfCm22) << 1 at the frequency f of the signal band, the output node side of the photoelectric conversion circuit 7 may be configured to be terminated with the resistor Rm2 in the signal band. With this configuration, the mixing of noise derived from the power supply can be avoided.

[0044] FIG. 12 is an example in which, in addition to the configuration of FIG. 7, a resistor Rm3 and a capacitor Cm3 are further added as passive elements. The resistor Rm2 is connected to the substrate wiring 8, the resistor Rm1, and the capacitor Cm3. The capacitor Cm3 is grounded. By selecting the capacitor Cm3 such that 1 / (2πfCm3) << 1 at the frequency f of the signal band, the input node side of the TIA1 may be configured to be terminated by the resistor Rm3 in the high frequency range. With this configuration, the termination characteristics on the TIA1 side in the high frequency range can be improved.

[0045] The optical detection device according to the second embodiment includes the transimpedance amplifier of the first embodiment. Thereby, the disturbance of the frequency characteristics can be mitigated.

[0046] (Third Embodiment) According to the third embodiment, an electronic device is provided. The electronic device according to the third embodiment includes the optical detection device according to the second embodiment.

[0047] The electronic device according to the third embodiment may be, for example, a device that performs distance measurement using the ToF (Time of Flight) method. FIG. 13A is a block diagram showing a schematic configuration of an electronic device 21 including a light receiving unit 24 incorporating the optical detection device 6 according to the embodiment. Specifically, the optical detection device 6 according to the embodiment is used for the photodetector 51 and the light receiving sensor 54 of the light receiving unit 24. The electronic device 21 in FIG. 13A includes a light projecting unit 22, a light control unit 23, a light receiving unit 24, a signal processing unit 25, and an image processing unit 26. Among these, the light projecting unit 22, the light control unit 23, the light receiving unit 24, and the signal processing unit 25 constitute a distance measurement device 27. At least a part of the electronic device 21 in FIG. 13A can be configured by one or more semiconductor ICs (Integrated Circuits). For example, the signal processing unit 25 and the image processing unit 26 may be integrated inside one semiconductor chip, or the light receiving unit 24 may be included in this semiconductor chip for integration. Further, the light projecting unit 22 may be included in this semiconductor chip for integration.

[0048] The light projecting unit 22 projects the first light. The first light is, for example, laser light in a predetermined frequency band. Laser light is coherent light with aligned phase and frequency. The light projecting unit 22 intermittently projects the pulsed first light at a predetermined period. The period at which the light projecting unit 22 projects the first light is a time interval longer than the time required for the distance measuring device 27 to measure the distance based on one pulse of the first light.

[0049] The light projecting unit 22 includes an oscillator 31, a light projection control unit 32, a light source 33, a first drive unit 34, and a second drive unit 35. The oscillator 31 generates an oscillation signal corresponding to the period of projecting the first light in response to an instruction from the light projection control unit 32. The first drive unit 34 intermittently supplies power to the light source 33 in synchronization with the oscillation signal. The light source 33 intermittently emits the first light based on the power from the first drive unit 34. The light source 33 may be a laser element that emits a single laser light, or a laser unit that emits a plurality of laser lights simultaneously. The light projection control unit 32 controls the oscillator 31 and controls the second drive unit 35 in synchronization with the oscillation signal. The second drive unit 35 supplies a drive signal synchronized with the oscillation signal to the light control unit 23 in response to an instruction from the light projection control unit 32.

[0050] The light control unit 23 controls the traveling direction of the first light emitted from the light source 33. Also, the light control unit 23 controls the traveling direction of the received second light.

[0051] The light control unit 23 includes a first lens 41, a beam splitter 42, a second lens 43, a half mirror 44, and a scanning mirror 45.

[0052] The first lens 41 condenses the first light emitted from the light projecting unit 22 and guides it to the beam splitter 42. The beam splitter 42 branches the first light from the first lens 41 in two directions and guides it to the second lens 43 and the half mirror 44. The second lens 43 guides the branched light from the beam splitter 42 to the light receiving unit 24. The reason for guiding the first light to the light receiving unit 24 is to detect the light projection timing at the light receiving unit 24.

[0053] The half mirror 44 allows the branched light from the beam splitter 42 to pass through and guides it to the scanning mirror 45. Further, the half mirror 44 reflects the second light including the reflected light incident on the electronic device 21 in the direction of the light receiving unit 24.

[0054] The scanning mirror 45 rotationally drives the mirror surface in synchronization with the drive signal from the second drive unit 35 in the light projecting unit 22. Thereby, the reflection direction of the branched light (first light) that passes through the half mirror 44 and is incident on the mirror surface of the scanning mirror 45 is controlled. By rotationally driving the mirror surface of the half mirror 44 at a constant period, the first light emitted from the light control unit 23 can be scanned in at least a one-dimensional direction. By providing the axis for rotationally driving the mirror surface in two directions, it is also possible to scan the first light emitted from the light control unit 23 in a two-dimensional direction. FIG. 13A shows an example in which the first light projected from the electronic device 21 is scanned in the X direction and the Y direction by the scanning mirror 45.

[0055] When an object 10 such as a human or an object exists within the scanning range of the first light projected from the electronic device 21, the first light is reflected by the object 10. Among the reflected light reflected by the object 10, at least a part travels in the reverse direction along substantially the same path as the first light and is incident on the scanning mirror 45 in the light control unit 23. Although the mirror surface of the scanning mirror 45 is rotationally driven at a predetermined period, since the laser light propagates at the speed of light, the reflected light from the object 10 is incident on the mirror surface while the angle of the mirror surface of the scanning mirror 45 hardly changes. The reflected light from the object 10 incident on the mirror surface is reflected by the half mirror 44 and received by the light receiving unit 24.

[0056] The light receiving unit 24 includes a photodetector 51, an amplifier 52, a third lens 53, a light receiving sensor 54, and an A / D converter 55. The photodetector 51 receives the light branched by the beam splitter 42 and converts it into an electrical signal. The light projecting timing of the first light can be detected by the photodetector 51. The amplifier 52 amplifies the electrical signal output from the photodetector 51.

[0057] The third lens 53 forms an image of the second light reflected by the half mirror 44 on the light receiving sensor 54. The light receiving sensor 54 receives the second light and converts it into an electrical signal. The light receiving sensor 54 has a SiPM13 (Silicon Photomultiplier) including an avalanche photodiode (APD) not shown in the figure.

[0058] The A / D converter 55 samples and A / D converts the electrical signal output from the light receiving sensor 54 at a predetermined sampling rate to generate a digital signal.

[0059] The signal processing unit 25 measures the distance to the object 10 that reflected the first light and stores the digital signal corresponding to the second light in the storage unit 61. The signal processing unit 25 includes a storage unit 61, a distance measurement unit 62, and a storage control unit 63. The storage control unit 63 controls the storage of the digital signal A / D converted by the A / D converter 55 in the storage unit 61.

[0060] The distance measurement unit 62 measures the distance to the object 10 based on the first light and the reflected light. More specifically, the distance measurement unit 62 measures the distance to the object based on the time difference between the light projection timing of the first light and the light reception timing of the reflected light included in the second light received by the light receiving sensor 54. That is, the distance measurement unit 62 measures the distance based on the following formula (1).

[0061] Distance = speed of light × (light reception timing of reflected light - light projection timing of first light) / 2 …(1) The "light reception timing of the reflected light" in formula (1) is more precisely the light reception timing at the peak position of the reflected light. The distance measurement unit 62 detects the peak position of the reflected light included in the second light based on the digital signal generated by the A / D converter 55.

[0062] In the electronic device 21 of FIG. 13A, an example was shown in which the reflected light from the object 10 is reflected by the scanning mirror 45 and the half mirror 44 and then guided to the light receiving unit 24. However, when using the light receiving sensor 54 in which a plurality of SiPMs 13 are arranged in two-dimensional directions, it can be applied to the electronic device 21 as shown in FIG. 13B. In the electronic device 21 of FIG. 13B, instead of guiding the reflected light from the object 10 to the light receiving unit 24 after reflecting it with the scanning mirror 45 and the half mirror 44, the reflected light from the object 10 is directly guided to the light receiving sensor 54 through the third lens 53.

[0063] At least a part of the electronic device 21 in FIG. 13A or FIG. 13B can be configured by one or a plurality of semiconductor ICs. FIG. 14 is a schematic perspective view showing an example in which the light receiving unit 24 and the signal processing unit 25 in the electronic device 21 in FIG. 13A or FIG. 13B are arranged on one semiconductor substrate 71. On the semiconductor substrate 71 in FIG. 14, a first die 72 and a second die 73 are provided. On the first die 72, the light receiving sensor 54 in the light receiving unit 24 in FIG. 13A or FIG. 13B is arranged. The light receiving sensor 54 includes a plurality of SiPMs 13 arranged in the X direction and the Y direction and a plurality of active quenching circuit groups 14. On the second die 73, an A / D converter (ADC) 55 and the signal processing unit 25 in the light receiving unit 24 in FIG. 13A or FIG. 13B are arranged. The pad 74 on the first die 72 and the pad 75 on the second die 73 are connected by a bonding wire 76.

[0064] The light projecting unit 22 and the light control unit 23 may be mounted on the semiconductor substrate 71 in FIG. 14. Alternatively, the light projecting unit 22 and the light control unit 23 may be mounted on a substrate different from the semiconductor substrate 71 in FIG. 14.

[0065] According to one or more of the above-described embodiments and examples, a transimpedance amplifier is provided. The transimpedance amplifier according to the embodiment can mitigate the disturbance of the frequency characteristics.

[0066] Although some embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.

[0067] Hereinafter, the invention of the embodiment will be appended.

[0068] <1> An input terminal, A first transistor having a source or emitter connected to the input terminal, A first current-voltage conversion circuit connected to the drain or collector of the first transistor, A first voltage-current conversion circuit and a second voltage-current conversion circuit that convert a voltage corresponding to the output voltage of the first current-voltage conversion circuit into a current, An inverting amplifier circuit having an input node connected to the source or emitter of the first transistor and an output node connected to the gate or base of the first transistor, A second current-voltage conversion circuit that converts the output current of the second voltage-current conversion circuit into a voltage, An output terminal that outputs the voltage converted by the second current-voltage conversion circuit, Comprising A transimpedance amplifier in which the output current of the first voltage-current conversion circuit is fed back to the source or emitter of the first transistor.

[0069] <2> The transimpedance amplifier according to <1>, wherein the first current-voltage conversion circuit and the second current-voltage conversion circuit each have at least one of a resistor or a current source.

[0070] <3> The first voltage-current conversion circuit has a second transistor, and the second voltage-current conversion circuit has a third transistor, respectively, A voltage corresponding to the voltage converted by the first current-voltage conversion circuit is applied to the gates or bases of the second transistor and the third transistor, The current converted by the first voltage-current conversion circuit and the second voltage-current conversion circuit is output from the drains or collectors of the second transistor and the third transistor. The transimpedance amplifier according to <1> or <2>.

[0071] <4> The inverting amplifier circuit, A fourth transistor whose input node of the inverting amplifier circuit is connected to the gate or base, A third current-voltage conversion circuit connected to the drain or collector of the fourth transistor, And having, The output node of the inverting amplifier circuit is the drain or collector of the fourth transistor. The transimpedance amplifier according to any one of <1> to <3>.

[0072] <5> Further comprising a level shift circuit that inputs the voltage converted by the first current-voltage conversion circuit and outputs the voltage after shifting, The output voltage of the level shift circuit is applied to the first voltage-current conversion circuit and the second voltage-current conversion circuit. The transimpedance amplifier according to any one of <1> to <4>.

[0073] <6> The level shift circuit, A fifth transistor, A current source connected to the source or emitter of the fifth transistor, And having, The input node of the level shift circuit is connected to the gate or base of the fifth transistor, and the output node of the level shift circuit is connected to the source or emitter of the fifth transistor. The transimpedance amplifier according to any one of <1> to <5>.

[0074] <7> The output currents of the first voltage-current conversion circuit and the second voltage-current conversion circuit are supplied via a gate-grounded or base-grounded amplifier circuit. The transimpedance amplifier according to any one of <1> to <6>.

[0075] <8> A photoelectric conversion circuit that converts an optical signal into an electrical signal, The transimpedance amplifier according to any one of <1> to <7>, A first resistor having one end connected to the input node of the transimpedance amplifier, A substrate wiring connecting the output node of the photoelectric conversion circuit and the other end of the first resistor, A photodetector comprising:

[0076] <9> The output node of the photoelectric conversion circuit is provided with a passive element, The passive element includes a second resistor and / or a first capacitor. The photodetector according to <8>. <8>

[0077] <10> The photodetector includes the passive element, The passive element is connected between the other end of the first resistor and a first power supply. The photodetector according to <8> or <9>.

[0078] <11> Having the photodetector according to any one of <8> to <10>, a light receiving unit that receives second light including reflected light obtained by reflecting first light from an object, A distance measurement unit that measures the distance to the object based on the light projection timing of the first light and the light reception timing of the reflected light at the light receiving unit, An electronic device comprising:

[0079] <12> Further comprising a light projection unit that projects the first light, The distance measurement unit acquires the light projection timing of the first light, the electronic device according to <11>.

Explanation of symbols

[0080] 1 Transimpedance amplifier 2a First current-voltage conversion circuit 2b Second current-voltage conversion circuit 3a First voltage-current conversion circuit 3b Second voltage-current conversion circuit 4 Inverting amplifier circuit 5 Level shift circuit 6 Photodetection device 7 Photoelectric conversion circuit 8 Substrate wiring 9 Photodiode 10 Object 13 SiPM 14 Multiple active quenching circuit groups 14a Active quenching circuit 21 Electronic device 22 Light projection unit 23 Light control unit 24 Light receiving unit 25 Signal processing unit 26 Image processing unit 27 Distance measurement device 31 Oscillator 32 Light projection control unit 33 Light source 34 First drive unit 35 Second drive unit 41 First lens 42 Beam splitter 43 Second lens 44 Half mirror 45 Scanning mirror 51 Photodetector 52 Amplifier 53 Third lens 54 Light receiving sensor 55 A / D converter 61 Memory unit 62 Distance measurement unit 63 Memory control unit 71 Semiconductor substrate 72 and 73 dies 74 and 75 pads 76 bonding wires Cm capacitance I1 to I6 current sources M1 to M8 transistors T1 to T4 bipolar transistors

Claims

1. An input terminal, A first transistor having a source or an emitter connected to the input terminal, A first current-voltage conversion circuit connected to a drain or a collector of the first transistor, A first voltage-current conversion circuit and a second voltage-current conversion circuit that convert a voltage corresponding to an output voltage of the first current-voltage conversion circuit into a current, An inverting amplifier circuit having an input node connected to the source or emitter of the first transistor and an output node connected to the gate or base of the first transistor, A second current-voltage conversion circuit that converts an output current of the second voltage-current conversion circuit into a voltage, An output terminal that outputs a voltage converted by the second current-voltage conversion circuit, comprising A transimpedance amplifier in which an output current of the first voltage-current conversion circuit is fed back to the source or emitter of the first transistor.

2. The transimpedance amplifier according to claim 1, wherein the first current-voltage conversion circuit and the second current-voltage conversion circuit each have at least one of a resistor or a current source.

3. The first voltage-current conversion circuit has a second transistor, and the second voltage-current conversion circuit has a third transistor, A voltage corresponding to a voltage converted by the first current-voltage conversion circuit is applied to a gate or base of the second transistor and the third transistor, The transimpedance amplifier according to claim 1, wherein currents converted by the first voltage-current conversion circuit and the second voltage-current conversion circuit are output from drains or collectors of the second transistor and the third transistor.

4. The inverting amplifier circuit A fourth transistor having an input node of the inverting amplifier circuit connected to a gate or base, A third current-voltage conversion circuit connected to the drain or collector of the fourth transistor; and having The transimpedance amplifier according to claim 1, wherein an output node of the inverting amplifier circuit is the drain or collector of the fourth transistor. **Claim 5** Further comprising a level shift circuit that inputs the voltage converted by the first current-voltage conversion circuit and outputs the voltage after shifting. The transimpedance amplifier according to claim 1, wherein the output voltage of the level shift circuit is applied to the first voltage-current conversion circuit and the second voltage-current conversion circuit. **Claim 6** The level shift circuit has a fifth transistor; a current source connected to the source or emitter of the fifth transistor; and having The transimpedance amplifier according to claim 5, wherein an input node of the level shift circuit is connected to the gate or base of the fifth transistor, and an output node of the level shift circuit is connected to the source or emitter of the fifth transistor. **Claim 7** The output currents of the first voltage-current conversion circuit and the second voltage-current conversion circuit are supplied via a gate-grounded or base-grounded amplifier circuit. The transimpedance amplifier according to claim 1. **Claim 8** A photoelectric conversion circuit that converts an optical signal into an electrical signal; the transimpedance amplifier according to claim 1; a first resistor having one end connected to the input node of the transimpedance amplifier; a substrate wiring connecting the output node of the photoelectric conversion circuit and the other end of the first resistor; and a photodetection device comprising the same. **Claim 9** The output node of the photoelectric conversion circuit is provided with a passive element. The passive element includes a second resistor and / or a first capacitor. The photodetection device according to claim 8.

10. The photodetection device includes the passive element. The photodetection device according to claim 8, wherein the passive element is connected between the other end of the first resistor and the first power supply.

11. An electronic device, comprising: a light receiving unit that has the photodetection device according to claim 8 and receives second light including reflected light obtained by reflecting first light from an object; a distance measurement unit that measures the distance to the object based on the light projection timing of the first light and the light reception timing of the reflected light at the light receiving unit.

12. The electronic device according to claim 11, further comprising a light projection unit that projects the first light. The distance measurement unit acquires the light projection timing of the first light.

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