Optical waveguide device, and manufacturing method of the same, as well as optical waveguide mounted substrate

Abstract

To provide an optical waveguide device that is high in position accuracy of a silicon waveguide of a silicon photonics chip, and an optical waveguide core layer.SOLUTION: An optical waveguide device according to the present invention has: a first silicon photonics chip in which a first silicon waveguide and an electrode are provided on a main plane side; a second silicon photonics chip in which a second silicon waveguide and an electrode are provided on a main plane side; an optical waveguide that includes a core layer, first and second clad layers; and encapsulation resin. In the core layer, one end part is arranged in the first silicon photonics chip main plane and optically coupled to the first silicon waveguide, and the other end part is arranged in the second silicon photonics chip main plane and optically coupled to the second silicon waveguide. The first clad layer coats main planes of first and second silicon photonics chip lateral planes, and a core layer top plane between the one end part and the other end part, and a second clad layer is laminated on a core layer side of the first clad layer, and coats the main planes of the first and second silicon photonics chips, a core layer lower plane, and a lateral plane. The encapsulation resin is laminated on an opposite side with respect to the first and second clad layers and coats the first and second silicon photonics chips.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to an optical waveguide device, a method for manufacturing the same, and a substrate on which an optical waveguide is mounted.

Background Art

[0002] In a data center or the like where various computers and devices for data communication are installed, optical signals are transmitted and received using an optical waveguide device having a silicon photonic chip and an optical waveguide. In such an optical waveguide device, the silicon waveguide of the silicon photonic chip and the core layer of the optical waveguide are optically coupled. For example, a silicon photonic chip having a silicon waveguide and an optical waveguide having a core layer are separately manufactured, and the two are joined to optically couple the silicon waveguide of the silicon photonic chip and the core layer of the optical waveguide.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] An object of the present invention is to provide an optical waveguide device having high positional accuracy between a silicon waveguide of a silicon photonic chip and a core layer of an optical waveguide.

Means for Solving the Problems

[0005] This optical waveguide device includes a first silicon photonic chip provided with a first silicon waveguide and a first electrode on the main surface side, a second silicon photonic chip provided with a second silicon waveguide and a second electrode on the main surface side, an optical waveguide including a core layer, a first cladding layer, and a second cladding layer, and a sealing resin. One end of the core layer is disposed on the main surface of the first silicon photonic chip and is optically coupled to the first silicon waveguide, and the other end is disposed on the main surface of the second silicon photonic chip and is optically coupled to the second silicon waveguide. The first cladding layer covers the main surface side of the side surfaces of the first silicon photonic chip and the second silicon photonic chip, and the upper surface of the core layer located between the one end and the other end of the core layer. The second cladding layer is laminated on the first cladding layer and covers the main surface side of the first silicon photonic chip, the main surface side of the second silicon photonic chip, and the lower surface and side surfaces of the core layer. The sealing resin is laminated on the side opposite to the second cladding layer of the first cladding layer and covers the first silicon photonic chip and the second silicon photonic chip.

Advantages of the Invention

[0006] According to the disclosed technology, it is possible to provide an optical waveguide device with high positional accuracy between the silicon waveguide of the silicon photonic chip and the core layer of the optical waveguide.

Brief Description of the Drawings

[0007]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0008] Hereinafter, embodiments for carrying out the invention will be described with reference to the drawings. In each drawing, the same reference numerals are assigned to the same components, and redundant descriptions may be omitted.

[0009] 〈First Embodiment〉 [Optical Waveguide Device] FIG. 1 is a cross-sectional view illustrating an optical waveguide device according to the first embodiment. Referring to FIG. 1, the optical waveguide device 1 includes a silicon photonics chip 10, a silicon photonics chip 20, an optical waveguide 30, and a sealing resin 40.

[0010] The silicon photonics chip 10 includes a silicon substrate 11, an insulating layer 12, a silicon waveguide 13, and an electrode 14. One surface of the silicon substrate 11 is covered with the insulating layer 12. The silicon waveguide 13 and the electrode 14 are provided on the side of the main surface 10m of the silicon photonics chip 10.

[0011] The silicon photonics chip 20 includes a silicon substrate 21, an insulating layer 22, a silicon waveguide 23, and an electrode 24. One surface of the silicon substrate 21 is covered with the insulating layer 22. The silicon waveguide 23 and the electrode 24 are provided on the side of the main surface 20m of the silicon photonics chip 20.

[0012] The thickness of the silicon substrate 11 is, for example, about 100 μm to 800 μm. The silicon waveguide 13 is a fine optical waveguide and is provided on the insulating layer 12 in the example of FIG. 1. The insulating layer 12 can be formed of, for example, SiO2, SiO X etc. The thickness of the insulating layer 12 can be, for example, about 2 μm to 6 μm.

[0013] Note that the present invention is not limited to the example of FIG. 1, and the silicon waveguide 13 may be embedded in the silicon substrate 11. In that case, the surface on the core layer 31 side of the silicon waveguide 13 may or may not be exposed from the silicon substrate 11.

[0014] The electrode 14 is electrically connected to an integrated circuit provided in the silicon photonic chip 10. The electrode 14 can be formed of a metal such as copper or aluminum, for example. In the example of FIG. 1, the electrode 14 is provided on the insulating layer 12, but may be embedded in the silicon substrate 11. In that case, a part of the electrode 14 is exposed from the silicon substrate 11.

[0015] The silicon photonic chip 10 and the silicon photonic chip 20 are arranged separately so that the silicon waveguide 13 and the silicon waveguide 23 face each other. The silicon photonic chip 10 and the silicon photonic chip 20 can have the same structure. The structure, material, and thickness of each component of the silicon photonic chip 20 can be the same as those of each component of the silicon photonic chip 10.

[0016] The optical waveguide 30 is arranged on the main surface 10m side of the silicon photonic chip 10 and the main surface 20m side of the silicon photonic chip 20. The optical waveguide 30 includes a core layer 31, a first cladding layer 32, and a second cladding layer 33.

[0017] A part of the core layer 31 is in contact with the main surface 10m of the silicon photonic chip 10 and the main surface 20m of the silicon photonic chip 20. One end portion 31e of the core layer 31 is disposed on the main surface 10m of the silicon photonic chip 10 and is optically coupled to the silicon waveguide 13, and the other end portion 31f is disposed on the main surface 20m of the silicon photonic chip 20 and is optically coupled to the silicon waveguide 23. Thus, the silicon photonic chip 10 and the silicon photonic chip 20 can transmit and receive optical signals via the core layer 31. The form of the optical coupling between the core layer 31 and the silicon waveguides 13 and 23 is not limited. For example, the core layer 31 may be adiabatically coupled or directly coupled to the silicon waveguides 13 and 23.

[0018] The width of the core layer 31 can be, for example, about 6 μm to 10 μm. The thickness of the core layer 31 can be, for example, about 6 μm to 10 μm. The refractive index of the core layer 31 is higher than the refractive indices of the first cladding layer 32 and the second cladding layer 33, and can be, for example, about 1.6. The core layer 31 can be formed of, for example, a photosensitive resin such as polyimide resin, acrylic resin, epoxy resin, polyolefin resin, or polynorbornene resin. Note that a plurality of core layers 31 may be juxtaposed.

[0019] The first cladding layer 32 covers the main surface 10m side of the side surface of the silicon photonic chip 10, the main surface 20m side of the side surface of the silicon photonic chip 20, and the upper surface of the core layer 31 located between one end portion 31e and the other end portion 31f of the core layer 31. The lower surface of the first cladding layer 32 can be flush with, for example, the main surface 10m of the silicon photonic chip 10 and the main surface 20m of the silicon photonic chip 20. The thickness of the first cladding layer 32 can be, for example, about 10 μm to 30 μm. The refractive index of the first cladding layer 32 can be, for example, about 1.5. The first cladding layer 32 can be formed of a material appropriately selected from those exemplified as the material of the core layer 31.

[0020] The second cladding layer 33 is laminated on the core layer 31 side of the first cladding layer 32, covering the main surface 10m side of the silicon photonic chip 10, the main surface 20m side of the silicon photonic chip 20, and the lower surface and side surface of the core layer 31. The thickness of the second cladding layer 33 can be, for example, about 10 μm to 30 μm. The refractive index of the second cladding layer 33 can be, for example, about 1.5. The second cladding layer 33 can be formed of a material appropriately selected from those exemplified as the material of the core layer 31. The material of the second cladding layer 33 may be the same as the material of the first cladding layer 32, for example.

[0021] In the example of FIG. 1, a through-wiring 51 is provided that penetrates the second cladding layer 33 and has one end surface connected to the electrode 14 and the other end surface exposed from the second cladding layer 33. The through-wiring 51 is disposed in a via hole 33x that penetrates the second cladding layer 33 and exposes the lower surface of the electrode 14, and is directly joined to the electrode 14. Also, a through-wiring 52 is provided that penetrates the second cladding layer 33 and has one end surface connected to the electrode 24 and the other end surface exposed from the second cladding layer 33. The through-wiring 52 is disposed in a via hole 33y that penetrates the second cladding layer 33 and exposes the lower surface of the electrode 24, and is directly joined to the electrode 24. The through-wirings 51 and 52 can be, for example, frustum-shaped with a smaller diameter on the side of the electrodes 14 and 24. The lower surfaces of the through-wirings 51 and 52 are exposed from the lower surface of the second cladding layer 33. The lower surfaces of the through-wirings 51 and 52 can be flush with the lower surface of the second cladding layer 33, for example. The through-wirings 51 and 52 can be formed of copper, for example.

[0022] Note that, in the thickness direction of the silicon substrates 11 and 21, other electrodes may be provided on the side opposite to the electrodes 14 and 24, and through-wirings connecting to the other electrodes may be provided. This through-wiring penetrates the encapsulating resin 40 and is exposed from the upper surface of the encapsulating resin 40, enabling external connection.

[0023] The encapsulation resin 40 is laminated on the side of the first cladding layer 32 opposite to the second cladding layer 33, and covers the silicon photonics chip 10 and the silicon photonics chip 20. The encapsulation resin 40 can cover, for example, all of the side surfaces of the silicon photonics chips 10 and 20 not covered by the first cladding layer 32 and all of the upper surfaces of the silicon photonics chips 10 and 20.

[0024] As the encapsulation resin 40, for example, a so-called mold resin in which a filler is contained in an epoxy resin can be used. The encapsulation resin 40 has higher rigidity than each resin constituting the optical waveguide 30. For example, the Young's modulus of the optical waveguide 30 is 1 GPa to 10 GPa, and the Young's modulus of the encapsulation resin 40 is 1 GPa to 30 GPa.

[0025] [Manufacturing Method of Optical Waveguide Device] FIGS. 2 to 5 are diagrams illustrating the manufacturing process of the optical waveguide device according to the first embodiment. First, in the process shown in FIG. 2(a), a support 310 is prepared, and an adhesive layer 320 is formed on one surface of the support 310. Alternatively, the support 310 having the adhesive layer 320 formed on one surface in advance may be prepared by purchase or the like. Then, on the support 310, the silicon photonics chips 10 and 20 are arranged with their main surfaces 10m and 20m facing the support 310 side via the adhesive layer 320. The silicon photonics chip 10 and the silicon photonics chip 20 are arranged separately so that the silicon optical waveguide 13 and the silicon optical waveguide 23 face each other. The support 310 is preferably made of a material having high flatness and transmitting ultraviolet light. As the support 310, for example, a glass plate, an acrylic resin plate, or the like can be used. The adhesive layer 320 can be made of a material that peels off when irradiated with ultraviolet light through the support 310.

[0026] Next, in the process shown in FIG. 2(b), a first cladding layer 32 is formed on the support 310 to cover the main surface 10m side of the side surface of the silicon photonic chip 10 and the main surface 20m side of the side surface of the silicon photonic chip 20. The first cladding layer 32 can be formed, for example, by applying a liquid or paste-like photosensitive resin on the adhesive layer 320 and then curing it by ultraviolet irradiation, heating, or the like. The material and the like of the first cladding layer 32 are as described above.

[0027] Next, in the process shown in FIG. 2(c), a sealing resin 40 is formed on the silicon photonic chip 10, the silicon photonic chip 20, and the first cladding layer 32. As the sealing resin 40, for example, a so-called mold resin in which a filler is contained in an epoxy resin can be used. The sealing resin 40 can be formed, for example, by a transfer molding method, a compression molding method, or the like. The sealing resin 40 can be formed so as to cover, for example, the side surfaces and the upper surfaces of the silicon photonic chip 10 and the silicon photonic chip 20 exposed from the first cladding layer 32 and the upper surface of the first cladding layer 32.

[0028] Next, in the processes shown in FIGS. 3(a) and 3(b), the support 310 and the adhesive layer 320 are removed from the structure shown in FIG. 2(c). In the subsequent processes, the sealing resin 40 functions as a support. The support 310 and the adhesive layer 320 can be removed, for example, by irradiating ultraviolet rays through the support 310 to the adhesive layer 320 to weaken the adhesive force of the adhesive layer 320. FIG. 3(b) is a view of the structure of FIG. 3(a) viewed from the main surface 10m side of the silicon photonic chip 10 and the main surface 20m side of the silicon photonic chip 20. As shown in FIG. 3(b), alignment marks 75 are provided on the main surface 10m of the silicon photonic chip 10 and the main surface 20m of the silicon photonic chip 20.

[0029] The alignment mark 75 can be formed of the same material as the silicon waveguides 13 and 23 in the same layer as the silicon waveguides 13 and 23. Since the alignment mark 75 can be formed in the same process as the silicon waveguides 13 and 23 by a semiconductor process, the positional accuracy of the silicon waveguides 13 and 23 with respect to the alignment mark 75 is extremely good. Note that the shape, number, and formation position of the alignment mark 75 are not limited to the example of FIG. 3(b).

[0030] Next, in the processes shown in FIGS. 4(a) and 4(b), the core layer 31 is directly formed on the main surface 10m of the silicon photonics chip 10, on the main surface 20m of the silicon photonics chip 20, and on the first cladding layer 32 by photolithography. Specifically, for example, a film-shaped photosensitive resin for obtaining the core layer 31 is laminated on the entire surface of the main surface 10m of the silicon photonics chip 10, on the main surface 20m of the silicon photonics chip 20, and on the first cladding layer 32. Then, after the photosensitive resin is exposed and developed through a photomask, the photosensitive resin is cured to form the core layer 31. The core layer 31 may be formed using a liquid or paste-like photosensitive resin. The material of the core layer 31 and the like are as described above.

[0031] One end portion 31e of the core layer 31 is disposed on the main surface 10m of the silicon photonics chip 10 and is optically coupled to the silicon waveguide 13, and the other end portion 31f is disposed on the main surface 20m of the silicon photonics chip 20 and is optically coupled to the silicon waveguide 23. In this process, by using the alignment mark 75, the silicon waveguides 13 and 23 and the core layer 31 can be aligned with high precision. For example, the core layer 31 can be aligned with an accuracy of ±1 μm or less with respect to the silicon waveguides 13 and 23. Note that the alignment mark 75 can be recognized through the photosensitive resin that becomes the core layer 31.

[0032] Fig. 4(b) is a view of the structure of Fig. 4(a) as seen from the main surface 10m side of the silicon photonic chip 10 and the main surface 20m side of the silicon photonic chip 20. As shown in Fig. 4(b), in this embodiment, four core layers 31 are juxtaposed. The number of core layers is not limited to the example of Fig. 4(b). Also, the core layer 31 may be formed in a shape other than linear.

[0033] Next, in the process shown in Fig. 5(a), a second cladding layer 33 that covers the core layer 31 is formed on the main surface 10m of the silicon photonic chip 10, on the main surface 20m of the silicon photonic chip 20, and on the first cladding layer 32. The second cladding layer 33 can be formed, for example, using a film-like photosensitive resin or a liquid or paste-like photosensitive resin in the same manner as the core layer 31. The material, etc. of the second cladding layer 33 is as described above. The second cladding layer 33 is laminated on the first cladding layer 32 and covers the main surface 10m side of the silicon photonic chip 10, the main surface 20m side of the silicon photonic chip 20, and the upper surface and side surfaces of the core layer 31.

[0034] Next, in the processes shown in Fig. 5(b) and Fig. 5(c), a through-wiring 51 is formed that penetrates the second cladding layer 33 and has one end surface connected to the electrode 14 and the other end surface exposed from the second cladding layer 33. Also, a through-wiring 52 is formed that penetrates the second cladding layer 33 and has one end surface connected to the electrode 24 and the other end surface exposed from the second cladding layer 33.

[0035] Specifically, first, as shown in Fig. 5(b), a via hole 33x that penetrates the second cladding layer 33 and exposes the upper surface of the electrode 14, and a via hole 33y that penetrates the second cladding layer 33 and exposes the upper surface of the electrode 24 are formed. The via holes 33x and 33y can be formed, for example, by irradiating laser light from the upper surface side of the second cladding layer 33. For the irradiation of the laser light, for example, a CO2 laser can be used. Note that when forming the via holes 33x and 33y, the alignment marks 75 can also be used to accurately form the via holes 33x and 33y at desired positions.

[0036] Next, as shown in FIG. 5(c), a through-wiring 51 that fills the via hole 33x and a through-wiring 52 that fills the via hole 33y are formed. For forming the through-wirings 51 and 52, for example, a semi-additive method can be used. If necessary, after forming the through-wirings 51 and 52, the upper surface side of the second cladding layer 33 may be polished and flattened. The upper surfaces of the through-wirings 51 and 52 can be flush with the upper surface of the second cladding layer 33, for example. With the above steps, the optical waveguide device 1 is completed. Note that the structure shown in FIG. 5(a) may be the completed product of the optical waveguide device 1. In this case, a person who obtains the structure shown in FIG. 5(a) by purchase or the like can execute the steps shown in FIGS. 5(b) and 5(c) at the necessary timing.

[0037] Thus, in the optical waveguide device 1, instead of separately fabricating and bonding the silicon photonic chips 10 and 20 having the silicon waveguides 13 and 23 and the optical waveguide 30 having the core layer 31, the core layer 31 is directly formed on the silicon waveguides 13 and 23 with the encapsulation resin 40 as a support. Therefore, an optical waveguide device 1 with high positional accuracy among the silicon waveguide 13 of the silicon photonic chip 10, the silicon waveguide 23 of the silicon photonic chip 20, and the core layer 31 of the optical waveguide 30 can be realized.

[0038] When using alignment marks 75 formed of the same material as the silicon waveguides 13 and 23 in the same layer as the silicon waveguides 13 and 23, an optical waveguide device 1 with particularly high positional accuracy among the silicon waveguides 13 and 23 and the core layer 31 can be realized.

[0039] Also, when the optical waveguide device 1 has through-wirings 51 and 52 exposed from the second cladding layer 33, it can be handled in the same way as when mounting a normal semiconductor chip on a wiring board. Therefore, the optical waveguide device 1 can be easily mounted on a wiring board or the like and electrically connected to the electrodes of the wiring board.

[0040] <Modification Example of the First Embodiment> In a modification of the first embodiment, an example of an optical waveguide device in which the shape of the through wiring is different from that of the first embodiment is shown. In the modification of the first embodiment, the description of the same components as those in the embodiments already described may be omitted.

[0041] FIG. 6 is a cross-sectional view illustrating an optical waveguide device according to a modification of the first embodiment. Referring to FIG. 6, the optical waveguide device 1A is different from the optical waveguide device 1 in that the through wirings 51 and 52 are replaced with through wirings 61 and 62.

[0042] In the example of FIG. 6, a through wiring 61 is provided that penetrates the second cladding layer 33, has one end surface connected to the electrode 14, and the other end surface exposed from the second cladding layer 33. The through wiring 61 is joined to the electrode 14 via a conductive joining member 70. Also, a through wiring 62 is provided that penetrates the second cladding layer 33, has one end surface connected to the electrode 24, and the other end surface exposed from the second cladding layer 33. The through wiring 62 is joined to the electrode 24 via the conductive joining member 70. The joining member 70 is, for example, solder.

[0043] The through wirings 61 and 62 can be, for example, columnar (such as cylindrical, elliptical cylindrical, square columnar, etc.). As the through wirings 61 and 62, for example, copper posts can be used. The lower surfaces of the through wirings 61 and 62 are exposed from the lower surface of the second cladding layer 33. The lower surfaces of the through wirings 61 and 62 can be, for example, flush with the lower surface of the second cladding layer 33.

[0044] FIG. 7 is a diagram illustrating the manufacturing process of the optical waveguide device according to the modification of the first embodiment. First, the steps of FIGS. 2(a) to 3(a) and 3(b) of the first embodiment are performed. Thereafter, in the step shown in FIG. 7(a), a copper post or the like that will become the through wiring 61 is disposed on the electrode 14 via the conductive joining member 70. Also, a copper post or the like that will become the through wiring 62 is disposed on the electrode 24 via the conductive joining member 70. Then, the joining member 70 is heated and melted, and then solidified to fix the copper post or the like on the electrode 14 and on the electrode 24.

[0045] Next, in the process shown in FIG. 7(b), the core layer 31 is formed in the same manner as in the processes of FIGS. 4(a) and 4(b). In the process shown in FIG. 7(c), the second cladding layer 33 is formed in the same manner as in the process of FIG. 5(a). The second cladding layer 33 is formed so as to cover the side surfaces of the through-wiring 61 and 62 and the upper surface thereof is exposed from the upper surface of the second cladding layer 33. If necessary, the upper surface side of the second cladding layer 33 may be polished and flattened. The upper surfaces of the through-wiring 61 and 62 can be flush with the upper surface of the second cladding layer 33, for example. Through the above processes, the optical waveguide device 1A is completed.

[0046] Since the optical waveguide device 1A does not have a process of forming via holes one by one with a laser in the manufacturing process, it can be manufactured with a simpler manufacturing process.

[0047] <Second Embodiment> In the second embodiment, an example of an optical waveguide device including a semiconductor laser element is shown. In the second embodiment, the description of the same components as those in the already described embodiments may be omitted.

[0048] FIG. 8 is a cross-sectional view illustrating an optical waveguide device according to the second embodiment. Referring to FIG. 8, the optical waveguide device 2 includes a silicon photonics chip 10A, a semiconductor laser element 80, an optical waveguide 30A, a sealing resin 40, and an optical fiber 90.

[0049] The silicon photonics chip 10A includes a silicon substrate 11, an insulating layer 12, silicon waveguides 13 and 15, and an electrode 14. One surface of the silicon substrate 11 is covered with the insulating layer 12. The silicon waveguides 13 and 15 and the electrode 14 are provided on the side of the main surface 10m of the silicon photonics chip 10A. The silicon waveguide 15 can be arranged on the side opposite to the silicon waveguide 13 with the electrode 14 interposed therebetween, for example. The material and thickness of the silicon waveguide 15 can be the same as those of the silicon waveguide 13, for example.

[0050] The semiconductor laser element 80 has a silicon substrate 81, an insulating layer 82, a silicon waveguide 83, and an electrode 84. One surface of the silicon substrate 81 is covered with the insulating layer 82. The silicon waveguide 83 and the electrode 84 are provided on the side of the main surface 80m of the semiconductor laser element 80. The silicon photonic chip 10A and the semiconductor laser element 80 are arranged separately such that the silicon waveguide 13 and the silicon waveguide 83 face each other.

[0051] The materials and thicknesses of the silicon substrate 81, the insulating layer 82, the silicon waveguide 83, and the electrode 84 can be the same as those of the silicon substrate 11, the insulating layer 12, the silicon waveguide 13, and the electrode 14, for example. The silicon substrate 81 may have a thickness different from that of the silicon substrate 11.

[0052] The optical waveguide 30A is laminated on the main surface 10m of the silicon photonic chip 10A and the main surface 80m of the semiconductor laser element 80. The optical waveguide 30A includes a first core layer 31A, a second core layer 31B, a first cladding layer 32, and a second cladding layer 33.

[0053] A part of the first core layer 31A is in contact with the main surface 10m of the silicon photonic chip 10A and the main surface 80m of the semiconductor laser element 80. One end portion 31e of the first core layer 31A is disposed on the main surface 10m of the silicon photonic chip 10A and is optically coupled to the silicon waveguide 13, and the other end portion 31f is disposed on the main surface 80m of the semiconductor laser element 80 and is optically coupled to the silicon waveguide 83. One end portion 31g of the second core layer 31B is disposed on the main surface 10m of the silicon photonic chip 10A and is optically coupled to the silicon waveguide 15. Thereby, the silicon photonic chip 10A can receive an optical signal from the semiconductor laser element 80 via the first core layer 31A. Also, the silicon photonic chip 10A can transmit an optical signal via the second core layer 31B.

[0054] The form of the optical coupling between the first core layer 31A and the silicon waveguides 13 and 83, and the optical coupling between the second core layer 31B and the silicon waveguide 15 is not limited. For example, the first core layer 31A and the silicon waveguides 13 and 83, and the second core layer 31B and the silicon waveguide 15 may be adiabatically coupled or directly coupled.

[0055] The first cladding layer 32 covers the main surface 10m side of the side surface of the silicon photonic chip 10A and the main surface 80m side of the side surface of the semiconductor laser element 80. Further, the first cladding layer 32 covers the upper surface of the first core layer 31A located between one end portion 31e and the other end portion 31f of the first core layer 31A, and the upper surface of the second core layer 31B excluding one end portion 31g of the second core layer 31B.

[0056] The second cladding layer 33 is laminated on the first cladding layer 32 and covers the main surface 10m side of the silicon photonic chip 10A, the main surface 80m side of the semiconductor laser element 80, the lower surface and the side surface of the first core layer 31A, and the lower surface and one side surface of the second core layer 31B. The other side surface of the second core layer 31B is exposed from the first cladding layer 32 and the second cladding layer 33 and is optically coupled to an optical fiber 90 disposed adjacent to the optical waveguides 30A and the encapsulating resin 40. The optical fiber 90 is, for example, a fiber array, and the number of optical fibers is provided to be equal to or more than the number of the second core layers 31B. Each optical fiber is optically coupled to each second core layer 31B in a one-to-one manner. For the joining of the other side surface of the second core layer 31B and the optical fiber 90, for example, butt coupling can be used. For example, the optical fiber 90 and the second core layer 31B can be aligned and joined to each other with an optical adhesive.

[0057] The encapsulating resin 40 is laminated on the side opposite to the second cladding layer 33 of the first cladding layer 32 and covers the silicon photonic chip 10A and the semiconductor laser element 80. The encapsulating resin 40 can cover, for example, all of the side surfaces of the silicon photonic chip 10A and the semiconductor laser element 80 not covered by the first cladding layer 32 and all of the upper surfaces of the silicon photonic chip 10A and the semiconductor laser element 80.

[0058] The optical waveguide device 2 can be manufactured by the following steps, almost the same as the optical waveguide device 1. First, on a support, a silicon photonic chip 10A provided with a silicon waveguide 13, a silicon waveguide 15, and an electrode 14 on the side of the main surface 10m, and a semiconductor laser element 80 provided with a silicon waveguide 83 and an electrode 84 on the side of the main surface 80m are arranged with their respective main surfaces facing the support side.

[0059] Next, a first cladding layer 32 that covers the main surface 10m side of the side surface of the silicon photonic chip 10A and the main surface 80m side of the side surface of the semiconductor laser element 80 is formed on the support. Next, a sealing resin 40 is formed on the silicon photonic chip 10A, the semiconductor laser element 80, and the first cladding layer 32. Then, the support is removed.

[0060] Next, a first core layer 31A is directly formed on the main surface 10m of the silicon photonic chip 10A, the main surface 80m of the semiconductor laser element 80, and the first cladding layer 32, and a second core layer 31B is directly formed. One end portion 31e of the first core layer 31A is arranged on the main surface 10m of the silicon photonic chip 10A and is optically coupled to the silicon waveguide 13, and the other end portion 31f is arranged on the main surface 80m of the semiconductor laser element 80 and is optically coupled to the silicon waveguide 83. The second core layer 31B is formed such that one end portion 31g is arranged on the main surface 10m of the silicon photonic chip 10A and is optically coupled to the silicon waveguide 15.

[0061] Next, a second cladding layer 33 that covers the first core layer 31A and the second core layer 31B is formed on the main surface 10m of the silicon photonic chip 10A, the main surface 80m of the semiconductor laser element 80, and the first cladding layer 32. Then, an optical fiber 90 is optically coupled to the other end portion of the second core layer 31B.

[0062] Thus, in the optical waveguide device 2, in the same manner as in the optical waveguide device 1, the first core layer 31A is directly formed on the silicon waveguides 13 and 83 with the encapsulating resin 40 as a support, and the second core layer 31B is directly formed on the silicon waveguide 15. Therefore, an optical waveguide device 2 with high positional accuracy between the silicon waveguide 13, the silicon waveguide 83, and the first core layer 31A, and high positional accuracy between the silicon waveguide 15 and the second core layer 31B can be realized. The optical waveguide device 2 can be used, for example, as an optical transceiver that converts an electrical signal into an optical signal and transmits it.

[0063] <Third Embodiment> In the third embodiment, an example of an optical waveguide mounting substrate on which the optical waveguide device according to the second embodiment is mounted is shown. In the third embodiment, the description of the same components as those in the already described embodiments may be omitted.

[0064] FIG. 9 is a cross-sectional view illustrating an optical waveguide mounting substrate according to the third embodiment. Referring to FIG. 9, the optical waveguide mounting substrate 3 has the optical waveguide device 2 and a wiring substrate 100 provided with connection terminals 102 on one side.

[0065] The wiring substrate 100 has an insulating layer 101, and the connection terminals 102 are disposed on the insulating layer 101. The wiring substrate 100 may be a rigid substrate with high rigidity or a flexible substrate with low rigidity. The wiring substrate 100 is, for example, a build-up substrate. The wiring substrate 100 may be a silicon substrate or a ceramic substrate.

[0066] The optical waveguide device 2 is mounted on one side of the wiring substrate 100 with the second cladding layer 33 of the optical waveguide 30A facing the side of the connection terminal 102. The end faces of the optical waveguide device 2 on the side opposite to the electrodes 14 and 84 of the through wirings 51 and 52 are joined to the connection terminals 102 of the wiring substrate 100 via a conductive joining member 120. The joining member 120 is, for example, solder.

[0067] Note that an underfill resin covering the joining member 120 may be disposed between the opposing surfaces of the wiring board 100 and the optical waveguide 30A.

[0068] In the optical waveguide device 2, since the lower surfaces of the through wirings 51 and 52 are exposed from the lower surface of the second cladding layer 33, the optical waveguide mounting substrate 3 can be easily realized by connecting to the connection terminal 102 of the wiring board 100 via the joining member 120. Note that instead of the optical waveguide device 2, the optical waveguide device 1 or 1A may be mounted on the wiring board 100.

[0069] Although the preferred embodiments have been described in detail above, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope described in the claims.

Description of Reference Numerals

[0070] 1, 1A, 2 Optical waveguide device 3 Optical waveguide mounting substrate 10, 10A, 20 Silicon photonics chip 10m, 20m, 80m Main surface 11, 21, 81 Silicon substrate 12, 22, 82 Insulating layer 13, 23, 83 Silicon optical waveguide 14, 24, 84 Electrode 30, 30A Optical waveguide 31 Core layer 31A First core layer 31B Second core layer 31e, 31g One end portion 31f The other end portion 32 First cladding layer 33 Second cladding layer 33x, 33y Via hole 40 Encapsulation resin 51, 52, 61, 62 Through wiring 70 Joining member 75 Alignment mark 80 Semiconductor laser element 90 Optical fiber 100 Wiring board 101 Insulating layer 102 Connection terminal 120 Bonding member 310 Support 320 Adhesive layer

Claims

1. A first silicon photonic chip provided with a first silicon waveguide and a first electrode on a main surface side; A second silicon photonic chip provided with a second silicon waveguide and a second electrode on a main surface side; An optical waveguide including a core layer, a first cladding layer, and a second cladding layer; A sealing resin, and having, One end of the core layer is disposed on the main surface of the first silicon photonic chip and is optically coupled to the first silicon waveguide, and the other end is disposed on the main surface of the second silicon photonic chip and is optically coupled to the second silicon waveguide; The first cladding layer covers the main surface side of the side surfaces of the first silicon photonic chip and the second silicon photonic chip, and the upper surface of the core layer located between the one end and the other end of the core layer; The second cladding layer is laminated on the first cladding layer and covers the main surface side of the first silicon photonic chip, the main surface side of the second silicon photonic chip, and the lower surface and side surfaces of the core layer; The sealing resin is laminated on the side opposite to the second cladding layer of the first cladding layer and covers the first silicon photonic chip and the second silicon photonic chip, an optical waveguide device.

2. A first silicon photonic chip provided with a first silicon waveguide, a third silicon waveguide, and a first electrode on a main surface side; A semiconductor laser element provided with a second silicon waveguide and a second electrode on a main surface side; An optical waveguide including a first core layer, a second core layer, a first cladding layer, and a second cladding layer; A sealing resin, and An optical fiber disposed adjacent to the optical waveguide and the sealing resin, and having, One end of the first core layer is disposed on the main surface of the first silicon photonic chip and is optically coupled to the first silicon waveguide, and the other end is disposed on the main surface of the semiconductor laser element and is optically coupled to the second silicon waveguide; One end of the second core layer is disposed on the main surface of the first silicon photonic chip and is optically coupled to the third silicon waveguide; The first cladding layer covers the main surface side of the side surfaces of the first silicon photonic chip and the semiconductor laser element, the upper surface of the first core layer located between the one end and the other end of the first core layer, and the upper surface of the second core layer excluding the one end of the second core layer; The second cladding layer is laminated on the first cladding layer, covering the main surface side of the first silicon photonic chip, the main surface side of the semiconductor laser element, the lower surface and the side surface of the first core layer, and the lower surface and one side surface of the second core layer. The other side surface of the second core layer is exposed from the first cladding layer and the second cladding layer and is optically coupled to the optical fiber. The encapsulating resin is laminated on the side opposite to the second cladding layer of the first cladding layer, covering the first silicon photonic chip and the semiconductor laser element, an optical waveguide device.

3. A first through-wiring penetrating the second cladding layer with one end surface connected to the first electrode and the other end surface exposed from the second cladding layer; A second through-wiring penetrating the second cladding layer with one end surface connected to the second electrode and the other end surface exposed from the second cladding layer, the optical waveguide device according to claim 1 or 2.

4. The first through-wiring and the second through-wiring are in a frustum of a cone shape with a smaller diameter on the side of the first electrode and the second electrode, and are directly joined to the first electrode and the second electrode, the optical waveguide device according to claim 3.

5. The first through-wiring and the second through-wiring are columnar, and are joined to the first electrode and the second electrode via a conductive joining member, the optical waveguide device according to claim 3.

6. An alignment mark is provided on the main surface of the first silicon photonic chip, the optical waveguide device according to claim 1 or 2.

7. The alignment mark is formed of the same material as the first silicon waveguide in the same layer as the first silicon waveguide, the optical waveguide device according to claim 6.

8. The optical waveguide device according to claim 3; A wiring board provided with connection terminals on one side, having, The optical waveguide device is mounted on one side of the wiring board with the second cladding layer facing the side of the connection terminal. The other end surfaces of the first through-wiring and the second through-wiring are joined to the connection terminals via a conductive joining member, an optical waveguide mounting substrate.

9. A step of arranging a first silicon photonic chip provided with a first silicon waveguide and a first electrode on the main surface side and a second silicon photonic chip provided with a second silicon waveguide and a second electrode on the main surface side on a support body with their respective main surfaces facing the support body side. A step of forming a first cladding layer that covers the main surface side of the side surface of the first silicon photonic chip and the main surface side of the side surface of the second silicon photonic chip on the support; A step of forming a sealing resin on the first silicon photonic chip, the second silicon photonic chip, and the first cladding layer; A step of removing the support; On the main surface of the first silicon photonic chip, the main surface of the second silicon photonic chip, and the first cladding layer, one end is disposed on the main surface of the first silicon photonic chip and optically coupled to the first silicon waveguide, and the other end is disposed on the main surface of the second silicon photonic chip and optically coupled to the second silicon waveguide. A step of directly forming a core layer so as to be optically coupled; A step of forming a second cladding layer that covers the core layer on the main surface of the first silicon photonic chip, the main surface of the second silicon photonic chip, and the first cladding layer, a method for manufacturing an optical waveguide device.

10. A step of disposing a first silicon photonic chip provided with a first silicon waveguide, a third silicon waveguide, and a first electrode on the side of the main surface and a semiconductor laser element provided with a second silicon waveguide and a second electrode on the side of the main surface on the support, with each of the main surfaces facing the support side; A step of forming a first cladding layer that covers the main surface side of the side surface of the first silicon photonic chip and the main surface side of the side surface of the semiconductor laser element on the support; A step of forming a sealing resin on the first silicon photonic chip, the semiconductor laser element, and the first cladding layer; A step of removing the support; On the main surface of the first silicon photonic chip, the main surface of the semiconductor laser element, and the first cladding layer, one end is disposed on the main surface of the first silicon photonic chip and optically coupled to the first silicon waveguide, and the other end is disposed on the main surface of the semiconductor laser element and optically coupled to the second silicon waveguide. A step of directly forming a first core layer so as to be optically coupled, and directly forming a second core layer so that one end is disposed on the main surface of the first silicon photonic chip and optically coupled to the third silicon waveguide; A step of forming a second cladding layer that covers the first core layer and the second core layer on a main surface of the first silicon photonics chip, on a main surface of the semiconductor laser element, and on the first cladding layer; A method of manufacturing an optical waveguide device, comprising a step of optically coupling an optical fiber to the other end of the second core layer.

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