Display device

The semiconductor device with a dual-gate transistor configuration and optimized oxide semiconductor films addresses parasitic capacitance issues in inverted stagger type transistors, ensuring high image quality and reliability in large, high-definition displays.

JP2025102911AActive Publication Date: 2025-07-08SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025061012
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2015-04-30
Filing Date
2025-04-02
Publication Date
2025-07-08
Estimated Expiration
2036-04-28

AI Technical Summary

Technical Problem

Inverted stagger type transistors used in display devices experience parasitic capacitance between the gate electrode and the source/drain electrodes, leading to signal delay and increased occupied area, which becomes exacerbated with larger screens and higher definition displays, deteriorating image quality.

Method used

A semiconductor device with a first and second transistor configuration, utilizing a first gate electrode, oxide semiconductor films, and insulating films to minimize parasitic capacitance, including a multilayer structure with specific atomic ratios and crystal orientations, and incorporating excess oxygen to enhance reliability.

Benefits of technology

The solution reduces signal delay and transistor area, maintaining high image quality and reliability in larger, high-definition displays by minimizing parasitic capacitance and optimizing transistor structure.

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Abstract

To provide a novel semiconductor device including an oxide semiconductor film.SOLUTION: A semiconductor device includes a first transistor 100, a first gate electrode 104, first insulating films 106 and 107 on the first gate electrode, a first oxide semiconductor film 108 on the first insulating film, a source electrode 112a and a drain electrode 112b electrically connected to the first oxide semiconductor film, second insulating films 114 and 116 on the first oxide semiconductor film, a second oxide semiconductor film 120a functioning as a second gate electrode on the second insulating film, and a third insulating film 118 on the second oxide semiconductor film. A second transistor 150 includes a third oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the second insulating films, a fourth insulating film 152 on the channel region, a third gate electrode 154 on the fourth insulating film, and a third insulating film on the source region and the drain region.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device including an oxide semiconductor film. Another embodiment of the present invention relates to a display device including the semiconductor device. The present invention relates to a method for manufacturing a semiconductor device having a conductor film.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one aspect of the present invention relates to a product, a method, or a manufacturing method. process, machine, manufacture, or composition of matter In particular, one embodiment of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, The present invention relates to a device, a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Refers to devices in general. Semiconductor elements such as transistors, semiconductor circuits, computing devices, memory The device is one aspect of a semiconductor device. Optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices The device may include a semiconductor device. [Background technology]

[0004] A transistor (field-effect transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology that makes up the field-effect transistor (FET) or thin-film transistor (TFT) is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in electronic devices. Silicon is a semiconductor thin film that can be used in transistors. Semiconductor materials represented by [material name] are widely known, but oxide semiconductors are attracting attention as other materials.

[0005] For example, as an oxide semiconductor, a technique for manufacturing a transistor having a self-aligned top gate structure has been disclosed (see Patent Document 1).

Prior Art Documents

Patent Documents

[0006]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0007] As a transistor having an oxide semiconductor film, for example, an inverted stagger type (also referred to as a bottom gate structure) or a stagger type (also referred to as a top gate structure) can be mentioned. When applying a transistor having an oxide semiconductor film to a display device, the inverted stagger type transistor is more likely to be used because the manufacturing process is relatively simple and the manufacturing cost can be suppressed compared to the stagger type transistor. However, when the screen of the display device is enlarged or the image quality of the display device is increased in high definition (for example, high-definition display devices represented by 4k×2k (number of horizontal pixels = 3840 pixels, number of vertical pixels = 2160 pixels) or 8k×4k (number of horizontal pixels = 7680 pixels, number of vertical pixels = 4320 pixels)), in the inverted stagger type transistor, there is a parasitic capacitance between the gate electrode and the source electrode and the drain electrode, and due to this parasitic capacitance, signal delay and the like are large.

[0008] However, as the screen of the display device becomes larger or the image quality of the display device becomes higher in definition (for example, a high-definition display device typified by 4k×2k (horizontal pixel count = 3840 pixels, vertical pixel count = 2160 pixels) or 8k×4k (horizontal pixel count = 7680 pixels, vertical pixel count = 4320 pixels)) progresses, in the case of an inverted stagger type transistor, due to the parasitic capacitance between the gate electrode and the source electrode and the drain electrode, signal delay and the like become large. 4k×2k (horizontal pixel count = 3840 pixels, vertical pixel count = 2160 pixels) or 8 k×4k (horizontal pixel count = 7680 pixels, vertical pixel count = 4320 pixels) typified by In the case of an inverted stagger type transistor, due to the parasitic capacitance between the gate electrode and the source electrode and the drain electrode, signal delay and the like become large. ​​​​​​There was a problem that the image quality of the display device deteriorated. Also, in the case of an inverted staggered transistor, there is a case where the occupied area of the transistor becomes larger than that of a staggered transistor. In the case of an inverted staggered transistor, there is a case where the occupied area of the transistor becomes larger than that of a staggered transistor. In the case of an inverted staggered transistor, there is a case where the occupied area of the transistor becomes larger than that of a staggered transistor.

[0009] In view of the above problems, in one aspect of the present invention, one of the problems is to provide a novel semiconductor device having an oxide semiconductor film. Or, in one aspect of the present invention, one of the problems is to provide a method for manufacturing a novel semiconductor device. Or, in one aspect of the present invention, one of the problems is to provide a novel display device. In view of the above problems, in one aspect of the present invention, one of the problems is to provide a novel semiconductor device having an oxide semiconductor film. Or, in one aspect of the present invention, one of the problems is to provide a method for manufacturing a novel semiconductor device. Or, in one aspect of the present invention, one of the problems is to provide a novel display device. In view of the above problems, in one aspect of the present invention, one of the problems is to provide a novel semiconductor device having an oxide semiconductor film. Or, in one aspect of the present invention, one of the problems is to provide a method for manufacturing a novel semiconductor device. Or, in one aspect of the present invention, one of the problems is to provide a novel display device. In view of the above problems, in one aspect of the present invention, one of the problems is to provide a novel semiconductor device having an oxide semiconductor film. Or, in one aspect of the present invention, one of the problems is to provide a method for manufacturing a novel semiconductor device. Or, in one aspect of the present invention, one of the problems is to provide a novel display device.

[0010] Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be apparent from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like. Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be apparent from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like. Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be apparent from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like. Note that the description of the above problems does not prevent the existence of other problems. Note that one aspect of the present invention does not necessarily need to solve all of these problems. Other problems will be apparent from the description in the specification and the like, and it is possible to extract other problems from the description in the specification and the like.

Means for Solving the Problems

[0011] One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. One aspect of the present invention is a semiconductor device having a first transistor and a second transistor, wherein the first transistor includes a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor includes a channel region, a source region, and a drain region on the second insulating film. A third oxide semiconductor film including, a fourth insulating film on the channel region, and a third gate electrode on the fourth insulating film, a third insulating film on the source region and the drain region, and a semiconductor device having the same.

[0012] Another aspect of the present invention is a display device having a drive circuit unit and a pixel unit, wherein the drive circuit unit has a first transistor, the pixel unit has a second transistor, and the first transistor has a first gate electrode, a first insulating film on the first gate electrode, a first oxide semiconductor film on the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film on the first oxide semiconductor film, and a second oxide semiconductor film functioning as a second gate electrode on the second insulating film, and a third insulating film on the second oxide semiconductor film, and the second transistor has a third oxide semiconductor film including a channel region, a source region and a drain region on the second insulating film, a fourth insulating film on the channel region, a third gate electrode on the fourth insulating film, and a third insulating film on the source region and the drain region.

[0013] In the above aspect, the first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film preferably contain In, M (M is Al, Ga, Y, or Sn), and Zn, respectively. In the above aspect, at least one of the first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film preferably has a multilayer structure. In the above aspect, the first oxide semiconductor film, the second oxide semiconductor film, and at least one of the third oxide semiconductor films preferably has a multilayer structure. In the above aspect, the first oxide semiconductor film, the second oxide semiconductor film, and at least one of the third oxide semiconductor films preferably has a multilayer structure. In the above aspect, the first oxide semiconductor film, the second oxide semiconductor film, and At least one of the first oxide semiconductor film and the third oxide semiconductor film has a crystal portion, and it is preferable that the crystal portion has a c-axis orientation. Preferably, it has a c-axis orientation.

[0014] Further, in the above aspect, it is preferable that the first gate electrode and the second gate electrode are electrically connected. Preferably, they are electrically connected.

[0015] Further, in the above aspect, it is preferable that the second transistor further has a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region. Preferably, it further has a source electrode electrically connected to the source region and a drain electrode electrically connected to the drain region. Preferably.

[0016] Further, in the above aspect, it is preferable that the third insulating film contains either one or both of hydrogen and nitrogen. Preferably, it contains either one or both of hydrogen and nitrogen.

[0017] Another aspect of the present invention is a display module having the above display device and a touch sensor. Another aspect of the present invention is an electronic device having the semiconductor device, the display device, or the display module according to any one of the above aspects, and an operation key or a battery. Preferably, it has an operation key or a battery. Preferably.

Advantages of the Invention

[0018] According to one aspect of the present invention, a novel semiconductor device having an oxide semiconductor film can be provided. Or, according to one aspect of the present invention, a method for manufacturing a novel semiconductor device can be provided. Or, according to one aspect of the present invention, a novel display device can be provided. Or, according to one aspect of the present invention, a method for manufacturing a novel semiconductor device can be provided. Or, according to one aspect of the present invention, a novel display device can be provided. Preferably, a novel display device can be provided.

[0019] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have all of these effects. Note that there are other effects Note that one aspect of the present invention does not necessarily have all of these effects. Note that there are other effects It will become obvious on its own from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other effects from the descriptions in the specification, drawings, claims, etc. It will become obvious on its own from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other effects from the descriptions in the specification, drawings, claims, etc.

Brief Description of the Drawings

[0020]

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Embodiments for Carrying Out the Invention

[0021] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and its form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. description, and its form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below. description, and its form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below.

[0022] In addition, with regard to the position, size, range, etc. of each component shown in the drawings and the like, for the sake of simplicity of understanding, they may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like.

[0023] Also, in this specification and the like, ordinal numbers such as first, second, etc. are used for convenience and do not indicate the process order or the stacking order. Therefore, for example, "the first" can be appropriately replaced with "the second" or "the third" and so on for explanation. Also, there may be cases where the ordinal numbers described in this specification and the like do not match the ordinal numbers used to specify an aspect of the present invention.

[0024] Also, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components varies appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0025] Also, in this specification and the like, when explaining the configuration of the invention using the drawings, the same reference numerals are commonly used among different drawings.

[0026] Also, in this specification and the like, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. Semiconductor devices include semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices, which are an aspect of semiconductor devices. Imaging devices, display devices, liquid crystal display devices, light-emitting devices, electro-optical devices, power generation devices (including thin-film solar cells, organic thin-film solar cells, etc.), and electronic devices are ​ There may be a semiconductor device.

[0027] Also, in this specification and the like, even when referred to as "semiconductor", for example, when the conductivity is sufficiently low, it may have the characteristics of an "insulator". Also, the boundary between "semiconductor" and " insulator" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification and the like may be convertible to "insulator". Similarly, the "insulator" described in this specification and the like may be convertible to "semiconductor". Also the "insulator" described in this specification and the like may be convertible to "semi-insulator" .

[0028] Also, in this specification and the like, even when referred to as "semiconductor", for example, when the conductivity is sufficiently high, it may have the characteristics of a "conductor". Also, the boundary between "semiconductor" and " conductor" is ambiguous and may not be strictly distinguishable. Therefore, the "semiconductor" described in this specification and the like may be convertible to "conductor". Similarly, the "conductor" described in this specification and the like may be convertible to "semiconductor".

[0029] Also, in this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source . And there is a channel region between the drain (drain terminal, drain region or drain electrode) and the source (source terminal, source region or source electrode), and current can flow through the drain, the channel region, and the source . Note that in this specification and the like, the channel region refers to the region where current mainly flows. flows.

[0030] Also, the functions of the source and drain may be interchanged when transistors with different polarities are employed, or when the direction of the current changes during circuit operation. Therefore, in this specification and the like, the terms "source" and "drain" are considered interchangeable.

[0031] Note that the channel length, for example, in the top view of a transistor, is the distance between the source (source region or source electrode) and the drain (drain region or drain electrode) in the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or in the region where the channel is formed. Note that in one transistor, the channel length does not necessarily have the same value in all regions. That is, the channel length of one transistor may not be determined by a single value. Therefore, in this specification and the like, the channel length is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

[0032] The channel width, for example, is the length of the portion where the source and the drain face each other in the region where the semiconductor (or the part where current flows in the semiconductor when the transistor is in the on state) and the gate electrode overlap each other, or in the region where the channel is formed. Note that in one transistor, the channel width does not necessarily have the same value in all regions. That is, the channel width of one transistor may not be determined by a single value. Therefore, in this specification and the like, the channel width is taken as any one value, the maximum value, the minimum value, or the average value in the region where the channel is formed.

[0033] In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions. In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions. In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions. In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions. In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions. In addition, in this specification and the like, "electrically connected" includes cases where it is connected through "something having some electrical action". Here, "something having some electrical action" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. For example, "something having some electrical action" includes electrodes, wiring, switching elements such as transistors, resistance elements, inductors, capacitors, and other elements having various functions.

[0034] In addition, voltage often refers to the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential. In addition, voltage often refers to the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential. In addition, voltage often refers to the potential difference between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). Therefore, it is possible to replace voltage with potential.

[0035] In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%. In this specification and the like, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, preferably containing oxygen in the range of 55 atomic% or more and 65 atomic% or less, nitrogen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the range of 0.1 atomic% or more and 10 atomic%. The silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition, preferably containing nitrogen in the range of 55 atomic% or more and 65 atomic% or less, oxygen in the range of 1 atomic% or more and 20 atomic% or less, silicon in the range of 25 atomic% or more and 35 atomic% or less, and hydrogen in the concentration range of 0.1 atomic% or more and 10 atomic%.

[0036] In this specification and the like, the term "film" and the term "layer" can be used interchangeably. For example, the term "conductive layer" can be changed to the term "conductive film". In this specification and the like, the term "film" and the term "layer" can be used interchangeably. For example, the term "conductive layer" can be changed to the term "conductive film". It may be possible to change it. Or, for example, it may be possible to change the term "insulating film" to the term "insulating layer" It may be possible to change it.

[0037] In addition, in this specification, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less Therefore, the case of -5° or more and 5° or less is also included. Also "substantially parallel" means a state in which two straight lines are arranged at an angle of -30° or more and 30° or less "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less Therefore, the case of 85° or more and 95° or less is also included. Also, "substantially perpendicular" means a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0038] (Embodiment 1) In this embodiment, a semiconductor device and a method of manufacturing the semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 1 to 22.

[0039] <1-1. Configuration example 1 of semiconductor device> FIG. 1(A) is a top view of transistors 100 and 150 which are semiconductor devices according to one aspect of the present invention FIG. 1(B) corresponds to a cross-sectional view of a cut surface between the dashed-dotted line X1-X2 shown in FIG. 1(A). Also, FIG. 2(A) corresponds to a cross-sectional view of a cut surface between the dashed-dotted line Y1-Y2 shown in FIG. 1(A), and FIG. 2(B) corresponds to a cross-sectional view of a cut surface between the dashed-dotted line Y3-Y4 shown in FIG. 1(A). In addition, in FIG. 1(A), in order to avoid complication, some of the components of transistors 100 and 150 (such as the insulating film functioning as a gate insulating film) are omitted from the illustration. section cross-sectional view, and FIG. 2(B) corresponds to a cross-sectional view of a cut section between the dashed-dotted line Y3-Y4 shown in FIG. 1(A). It corresponds to the cross-sectional view of the cut section.

[0040] In FIG. 1(A), in order to avoid complication, some of the components of transistors 100 and 15 0 (such as the insulating film functioning as a gate insulating film) are omitted from the illustration. In the top view of the transistor, as in FIG. 1(A) in the following drawings, some of the components may be omitted and illustrated. Also, the direction of the dashed line X1-X2 may be referred to as the channel length direction, and the directions of the dashed lines Y1-Y2 and Y3-Y4 may be referred to as the channel width direction. As shown in FIGS. 1(A) and 1(B), a semiconductor device according to one aspect of the present invention has a transistor 100 and a transistor 150 on the same substrate. Note that the transistor 100 is a bottom gate type (also referred to as an inverse staggered type), and the transistor 150 is a top gate type (also referred to as a staggered type). Details of the structures of the transistor 100 and the transistor 150 will be described below. In the transistor 100, the insulating films 106 and 107 are

[0041] As shown in FIGS. 1(A) and 1(B), a semiconductor device according to one aspect of the present invention has a transistor 100 and a transistor 150 on the same substrate. Note that the transistor 100 is a bottom gate type (also referred to as an inverse staggered type), and the transistor 150 is a top gate type (also referred to as a staggered type). Details of the structures of the transistor 100 and the transistor 150 will be described below.

[0042] [Configuration Example of First Transistor] The transistor 100 includes a conductive film 104 on a substrate 102, an insulating film 106 on the substrate 102 and the conductive film 104, an insulating film 107 on the insulating film 106, an oxide semiconductor film 108 on the insulating film 107, a conductive film 112a electrically connected to the oxide semiconductor film 108, a conductive film 112b electrically connected to the oxide semiconductor film 108, insulating films 114 and 116 on the oxide semiconductor film 108, the conductive films 112a, and 112b, an oxide semiconductor film 120a on the insulating film 116, and an insulating film 118 on the insulating film 116 and the oxide semiconductor film 120a.

[0043] Also, as shown in FIG. 1(B), the transistor 100 may be configured to have an insulating film 156 on the insulating film 118.

[0044] Note that in the transistor 100, the insulating films 106 and 107 are ​​​​​​​​​The insulating films 114 and 116 function as a first gate insulating film. The insulating film 118 serves as a second gate insulating film for protecting the transistor 100. In this specification and the like, the insulating films 106 and 107 are the insulating film 114 and 116 as a second insulating film, the insulating film 118 as a third insulating film, In the transistor 100, the conductive film 104 may be referred to as a first The oxide semiconductor film 120a functions as a first gate electrode, and the oxide semiconductor film 120b functions as a second gate electrode. The conductive film 112a functions as a source electrode, and the conductive film 112b functions as a , which functions as a drain electrode.

[0045] The oxide semiconductor film 108 includes an oxide semiconductor film 108a and an oxide semiconductor film 108b. The oxide semiconductor film 108a and the oxide semiconductor film 108b are The conductive film 108b is made of In, M (M is Al, Ga, Y, or Sn), Zn, and , has.

[0046] For example, in the oxide semiconductor film 108a, a region in which the atomic ratio of In is larger than the atomic ratio of M is The oxide semiconductor film 108b preferably has a region It is preferable to have a region in which the atomic ratio of In is smaller than that of a.

[0047] The oxide semiconductor film 108a has a region in which the atomic ratio of In is higher than the atomic ratio of M. The field effect mobility (sometimes simply referred to as mobility, or μFE) of the transistor 100 is Specifically, the field effect mobility of the transistor 100 can be increased by 10c m 2Exceeding / Vs, more preferably, the field-effect mobility of the transistor 100 is 30 cm 2 / Vs or more can be achieved.

[0048] For example, by using the above transistor with high field-effect mobility in the drive circuit part of a display device, particularly in a gate driver that generates a gate signal or a source driver that supplies a data signal (especially a demultiplexer connected to the output terminal of the shift register included in the source driver), it is possible to provide a semiconductor device or a display device with a narrow bezel width (also referred to as a narrow-bezel). This can be achieved.

[0049] On the other hand, when the oxide semiconductor film 108a has a region where the atomic ratio of In is larger than the atomic ratio of M, the electrical characteristics of the transistor 100 are likely to fluctuate during light irradiation. However, in the semiconductor device according to one aspect of the present invention, an oxide semiconductor film 108b is formed on the oxide semiconductor film 108a. Further, since the oxide semiconductor film 108b has a region where the atomic ratio of In is smaller than that of the oxide semiconductor film 108a, the Eg becomes larger than that of the oxide semiconductor film 108a. Therefore, the oxide semiconductor film 108 having a stacked structure of the oxide semiconductor film 108a and the oxide semiconductor film 108b can enhance the resistance to a photo negative bias stress test. This becomes possible.

[0050] In addition, impurities such as hydrogen or moisture mixed into the channel region of the oxide semiconductor film 108, particularly the oxide semiconductor film 108a, are a problem because they affect the transistor characteristics. Therefore, in the channel region of the oxide semiconductor film 108a, it is more preferable that there are fewer impurities such as hydrogen or moisture. Also, formed in the channel region of the oxide semiconductor film 108a ​​The resulting oxygen deficiency becomes a problem because it affects transistor characteristics. For example, when an oxygen deficiency is formed in the channel region of the oxide semiconductor film 108a, hydrogen binds to the oxygen deficiency and becomes a carrier supply source. When a carrier supply source is generated in the channel region of the oxide semiconductor film 108a, the electrical characteristics of the transistor 100 having the oxide semiconductor film 108a fluctuate, typically resulting in a shift in the threshold voltage. Therefore, in the channel region of the oxide semiconductor film 108a, it is preferable that the oxygen deficiency is less. When an oxygen deficiency is formed in the channel region of the oxide semiconductor film 108a, hydrogen binds to the oxygen deficiency and becomes a carrier supply source. When a carrier supply source is generated in the channel region of the oxide semiconductor film 108a, the electrical characteristics of the transistor 100 having the oxide semiconductor film 108a fluctuate, typically resulting in a shift in the threshold voltage. Therefore, in the channel region of the oxide semiconductor film 108a, it is preferable that the oxygen deficiency is less. In the transistor 100 of the present invention, oxygen or excess oxygen is added to the insulating films 107, 114, and 116, and the oxygen or excess oxygen fills the oxygen deficiency in the oxide semiconductor film 108a, thereby realizing a highly reliable semiconductor device. In the transistor 100 of the present invention, oxygen or excess oxygen is added to the insulating films 107, 114, and 116, and the oxygen or excess oxygen fills the oxygen deficiency in the oxide semiconductor film 108a, thereby realizing a highly reliable semiconductor device.

[0051] In the transistor 100 of the present invention, oxygen or excess oxygen is added to the insulating films 107, 114, and 116, and the oxygen or excess oxygen fills the oxygen deficiency in the oxide semiconductor film 108a, thereby realizing a highly reliable semiconductor device. In the transistor 100 of the present invention, oxygen or excess oxygen is added to the insulating films 107, 114, and 116, and the oxygen or excess oxygen fills the oxygen deficiency in the oxide semiconductor film 108a, thereby realizing a highly reliable semiconductor device. In the transistor 100 of the present invention, oxygen or excess oxygen is added to the insulating films 107, 114, and 116, and the oxygen or excess oxygen fills the oxygen deficiency in the oxide semiconductor film 108a, thereby realizing a highly reliable semiconductor device.

[0052] [Configuration Example of Second Transistor] The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b. The transistor 150 includes an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. An insulating film 156 is provided on the insulating film 118. Openings 171a reaching the source region 120b_s and 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b.

[0053] Note that in the transistor 150, the insulating film 152 functions as a gate insulating film. This is the case. Also, in the transistor 150, the conductive film 154 functions as a gate electrode. Note that the insulating film 152 may be referred to as the fourth insulating film.

[0054] As described above, the semiconductor device according to one aspect of the present invention has transistors of at least two structures. One of the transistors is a dual-gate transistor provided with a back gate electrode, such as the transistor 100, and the other is a top-gate transistor, such as the transistor 150.

[0055] Note that the oxide semiconductor film 120a included in the transistor 100 and the oxide semiconductor film 120b included in the transistor 150 are formed by processing the same oxide semiconductor film. That is, in the transistor 100, the oxide semiconductor film 120a functions as a back gate electrode, and in the transistor 150, the oxide semiconductor film 120b functions as an active layer. Therefore, by sharing some manufacturing steps between the transistor 100 and the transistor 150, transistors having different structures can be provided on the same substrate.

[0056] Note that by providing transistors having different structures on the same substrate, the integration degree of the semiconductor device can be increased. Or, by providing transistors having different structures on the same substrate, different functions can be given to each transistor. For example, when a semiconductor device having transistors of different structures is used in a display device, one transistor (e.g., the transistor 100) is used for a driving circuit portion, and the other transistor (e.g., the transistor 150) ) can be used for the transistors in the pixel section.

[0057] In FIG. 1, the channel length direction of transistor 100 and that of transistor 150 are the same, but it is not limited thereto. The channel length direction of transistor 100 and the channel length direction of transistor 150 may be different from each other. For example, the channel length direction of transistor 100 and the channel length direction of transistor 150 may be configured to be orthogonal to each other.

[0058] Also, in transistor 100, the insulating films in contact with the oxide semiconductor film 108, specifically the insulating film 107 formed below the oxide semiconductor film 108 and the insulating film 114 formed above the oxide semiconductor film 10 8 are configured to contain excess oxygen. By moving oxygen or excess oxygen from the insulating film 107 and the insulating film 114 to the oxide semiconductor film 108, it becomes possible to reduce oxygen deficiency in the oxide semiconductor film 108. Therefore, it is possible to suppress the electrical characteristics of transistor 1 00, particularly the variation of transistor 100 under light irradiation. become possible.

[0059] Also, in transistor 150, the insulating films in contact with the oxide semiconductor film 120b, specifically the insulating film 116 formed below the oxide semiconductor film 120b and the insulating film 152 formed above the oxide semiconductor film 120b are configured to contain excess oxygen. By moving oxygen or excess oxygen from the insulating film 11 6 and the insulating film 152 to the channel region 120b_i, it becomes possible to reduce oxygen deficiency in the channel region 120b_i. Therefore, it is possible to suppress the electrical characteristics of transistor 150, particularly the variation of transistor 150 under light irradiation. ​​ can be achieved.

[0060] Further, in the transistor 100, the oxide semiconductor film 120a is in contact with the insulating film 118. In the transistor 150, the source region 120b_s and the drain region 120b_d are in contact with the insulating film 118. By configuring the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to be in contact with the insulating film 118, hydrogen contained in the insulating film 118 diffuses into the oxide semiconductor film, and the carrier density of the oxide semiconductor film can be increased. That is, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as an oxide conductor (also referred to as OC: Oxide Conductor). s, and the drain region 120b_d s and the drain region 120b_d are in contact with the insulating film 118, hydrogen contained in the insulating film 118 diffuses into the oxide semiconductor film, and the carrier density of the oxide semiconductor film can be increased. That is, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as an oxide conductor (also referred to as OC: Oxide Conductor). The hydrogen contained in the insulating film 118 diffuses into the oxide semiconductor film, and the carrier density of the oxide semiconductor film can be increased. That is, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as an oxide conductor (also referred to as OC: Oxide Conductor). Here, the oxide conductor will be described. The oxide semiconductor films 120a and 120b have a function as a semiconductor before the step of forming the insulating film 118, and after the step of forming the insulating film 118, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as a conductor. r) r) also have a function.

[0061] Here, the oxide conductor will be described. The oxide semiconductor films 120a and 120b have a function as a semiconductor before the step of forming the insulating film 118, and after the step of forming the insulating film 118, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as a conductor. Before the step of forming the insulating film 118, they have a function as a semiconductor, and after the step of forming the insulating film 118, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d have a function as a conductor. To cause the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to function as a conductor, oxygen vacancies are formed in the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d, and hydrogen is added from the insulating film 118 to the oxygen vacancies. As a result, donor levels are formed near the conduction band. As a result, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d become highly conductive and conductive.

[0062] To cause the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to function as a conductor, oxygen vacancies are formed in the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d, and hydrogen is added from the insulating film 118 to the oxygen vacancies. As a result, donor levels are formed near the conduction band. To cause the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to function as a conductor, oxygen vacancies are formed in the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d, and hydrogen is added from the insulating film 118 to the oxygen vacancies. As a result, donor levels are formed near the conduction band. To cause the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to function as a conductor, oxygen vacancies are formed in the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d, and hydrogen is added from the insulating film 118 to the oxygen vacancies. As a result, donor levels are formed near the conduction band. As a result, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d become highly conductive and conductive. a, the source region 120b_s, and the drain region 120b_d become highly conductive and conductive. Integrate. The oxidized semiconductor film 120a that has been made conductive, the source region 120b_s, and the dra in region 120b_d can each be referred to as an oxide conductor.

[0063] In this embodiment, a configuration in which hydrogen is added from the insulating film 118 to the oxidized semiconductor film 120a, the source region 120b_s, and the drain region 120b_d has been exemplified, but it is not limited to this. For example, other impurities may be added to the oxidized semiconductor film 120a, the source region 120b_s, and the drain region 120b_d to make an oxide conductor. As said impurities, for example, boron, carbon, nitrogen, fluorine, phosphorus, chlorine, helium, neon , argon, krypton, and xenon etc. may be mentioned. As these impurities , for example, they can be added by an ion doping method, a plasma treatment method, or the like. .

[0064] Generally, since an oxide semiconductor has a large energy gap, it has translucency with respect to visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level near the conduction band. Therefore, the influence of absorption by the donor level on the oxide conductor is small, and it has translucency comparable to that of the oxide semiconductor with respect to visible light. .

[0065] Also, since the channel region 120b_i is covered with the insulating film 152, it does not contact the insulating film 118. Thus, the channel region 120b_i has the function as a semiconductor.

[0066] In this way, the oxidized semiconductor film 1 20a that functions as the second gate electrode of the transistor 100, the channel region 120b_i of the transistor 150, the source region 120b_s, and the drain region 120b_d can be fabricated by processing the same oxide semiconductor film and changing the structure of the insulating film in contact with the oxide semiconductor film. This makes it possible to fabricate them.

[0067] Also, in one aspect of the present invention, a manufacturing method is used that does not increase the manufacturing steps or increases the manufacturing steps only minimally in order to incorporate excess oxygen into the insulating films 107, 114, and 116. Therefore, it is possible to improve the productivity of the transistors 100 and 150. Specifically, in the step of forming the oxide semiconductor film 108a, the sputtering method is used and the oxide semiconductor film 108a is formed in an atmosphere containing oxygen gas, thereby adding oxygen or excess oxygen to the insulating film 107, which is the surface to be formed of the oxide semiconductor film 108a. Also, in the step of forming the oxide semiconductor films 120a and 120b, the sputtering method is used and the oxide semiconductor films 120a and 120b are formed in an atmosphere containing oxygen gas, thereby adding oxygen or excess oxygen to the insulating film 116, which is the surface to be formed of the oxide semiconductor films 120a and 120b. Note that when adding oxygen or excess oxygen to the insulating film 116, oxygen or excess oxygen may also be added to the insulating film 114 located below the insulating film 116 and the oxide semiconductor film 108. As described above, a semiconductor device according to one aspect of the present invention has two types of transistors with different structures on the same substrate. An oxide semiconductor film that functions as a back gate electrode of one transistor and an oxide semiconductor film that functions as an active layer of the other transistor are formed from the same oxide semiconductor film.

[0068] Specifically, in the step of forming the oxide semiconductor film 108a, the sputtering method is used, and by forming the oxide semiconductor film 108a in an atmosphere containing oxygen gas, oxygen or excess oxygen is added to the insulating film 107, which is the surface to be formed of the oxide semiconductor film 108a. Also, in the step of forming the oxide semiconductor films 120a and 120b, the sputtering method is used, and by forming the oxide semiconductor films 120a and 120b in an atmosphere containing oxygen gas, oxygen or excess oxygen is added to the insulating film 116, which is the surface to be formed of the oxide semiconductor films 120a and 120b. When adding oxygen or excess oxygen to the insulating film 116, oxygen or excess oxygen may also be added to the insulating film 114 located below the insulating film 116 and the oxide semiconductor film 108.

[0069] As described above, a semiconductor device according to one aspect of the present invention has two types of transistors with different structures on the same substrate. An oxide semiconductor film that functions as a back gate electrode of one transistor and an oxide semiconductor film that functions as an active layer of the other transistor are formed from the same oxide semiconductor film. Specifically, in the step of forming the oxide semiconductor film 108a, the sputtering method is used, and by forming the oxide semiconductor film 108a in an atmosphere containing oxygen gas, oxygen or excess oxygen is added to the insulating film 107, which is the surface to be formed of the oxide semiconductor film 108a. Also, in the step of forming the oxide semiconductor films 120a and 120b, the sputtering method is used, and by forming the oxide semiconductor films 120a and 120b in an atmosphere containing oxygen gas, oxygen or excess oxygen is added to the insulating film 116, which is the surface to be formed of the oxide semiconductor films 120a and 120b. When adding oxygen or excess oxygen to the insulating film 116, oxygen or excess oxygen may also be added to the insulating film 114 located below the insulating film 116 and the oxide semiconductor film 108. As described above, a semiconductor device according to one aspect of the present invention has two types of transistors with different structures on the same substrate.

[0070] An oxide semiconductor film that functions as a back gate electrode of one transistor and an oxide semiconductor film that functions as an active layer of the other transistor are formed from the same oxide semiconductor film. An oxide semiconductor film that functions as a back gate electrode of one transistor and an oxide semiconductor film that functions as an active layer of the other transistor are formed from the same oxide semiconductor film. An oxide semiconductor film that functions as a back gate electrode of one transistor and an oxide semiconductor film that functions as an active layer of the other transistor are formed from the same oxide semiconductor film. By processing, it becomes possible to suppress an increase in the manufacturing process.

[0071] <1-2. Components of the semiconductor device> Hereinafter, the components included in the semiconductor device of the present embodiment will be described in detail.

[0072] [Substrate] There are no major restrictions on the material of the substrate 102, etc., but it is necessary to have at least heat resistance to withstand subsequent heat treatment. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, etc. may be used as the substrate 102. Also, a single-crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc. can also be applied, and a semiconductor element provided on these substrates can be used as the substrate 102. When using a glass substrate as the substrate 102, a large-sized display device can be manufactured by using a large-area substrate such as the 6th generation (1500 mm × 1850 mm), the 7th generation (1870 mm × 2200 mm), the 8th generation (2200 mm × 2400 mm), the 9th generation (2400 mm × 2800 mm), the 10th generation (2950 mm × 3400 mm), etc.

[0073] Also, a flexible substrate may be used as the substrate 102, and the transistor 100 may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 102 and the transistor 100. The release layer can be used to separate from the substrate 102 after partially or completely completing the semiconductor device thereon and transfer it to another substrate. At that time, the transistor 100 can also be transferred to a substrate with poor heat resistance or a flexible substrate.

[0074] [Conductive films functioning as gate electrodes, source electrodes, and drain electrodes] The conductive film 104 functioning as a gate electrode, the conductive film 112a functioning as a source electrode, the conductive film 112b functioning as a drain electrode, the conductive film 158a functioning as a source electrode , and the conductive film 158b functioning as a drain electrode may be made of chromium (Cr), copper (Cu ), aluminum (Al), gold (Au), silver (Ag), zinc (Zn), molybdenum (Mo ), tantalum (Ta), titanium (Ti), tungsten (W), manganese (Mn), nickel (Ni), iron (Fe), cobalt (Co), a metal element selected therefrom, or an alloy containing the above-mentioned metal element as a component, or an alloy combining the above-mentioned metal elements, etc., and can be formed respectively.

[0075] Also, the conductive films 104, 112a, 112b, 158a, 158b may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which an aluminum film is laminated on a titanium film, a two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a titanium film, a three-layer structure of a titanium film, an aluminum film on the titanium film, and a titanium film on the aluminum film, a three-layer structure of a titanium film, a copper film on the titanium film, and a titanium film on the copper film, etc. can be mentioned. Also, an alloy film or a nitride film combining one or more selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium can be used for the above-mentioned aluminum.

[0076] Also, indium tin oxide may be included in the conductive films 104, 112a, 112b, 158a, 158b. Oxides, indium oxides containing tungsten oxide, indium suboxides containing tungsten oxide Lead oxides, indium oxides containing titanium oxide, indium tin oxides containing titanium oxide, Indium zinc oxides, indium tin oxides added with silicon oxide, and other light-transmitting conductive materials can also be applied.

[0077] In addition, for the conductive films 104, 112a, 112b, 158a, and 158b, a Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) may be applied. By using the Cu-X alloy film, it can be processed in a wet etching process, so it is possible to suppress the manufacturing cost.

[0078] [First gate insulating film] As the insulating films 106 and 107 that function as the gate insulating film of the transistor 100, by plasma enhanced chemical vapor deposition (PECVD), sputtering, etc., a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, a yttrium oxide film, a zirconium oxide film, a gallium oxide film, a tantalum oxide film, a magnesium oxide film, a lanthanum oxide film, a cerium oxide film, and a neodymium oxide film and an insulating layer containing one or more of them can be used respectively. Note that instead of the laminated structure of the insulating films 106 and 107, a single-layer insulating film selected from the above materials, or an insulating film of three or more layers can also be used.

[0079] In addition, the insulating film 106 has a function as a blocking film that suppresses oxygen permeation. ​​​​​For example, when an excessive amount of oxygen is supplied into the insulating films 107, 114, 116 and / or the oxide semiconductor film 108, the insulating film 106 can suppress the permeation of oxygen. The insulating film 106 can suppress oxygen permeation when an excessive amount of oxygen is supplied into the insulating films 107, 114, 116 and / or the oxide semiconductor film 108.

[0080] Note that the insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation. The insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation. The insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation. The insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation. The insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation. The insulating film 107 in contact with the oxide semiconductor film 108 that functions as the channel region of the transistor 100 is preferably an oxide insulating film, and more preferably has a region containing oxygen in excess of the stoichiometric composition (oxygen-excess region). In other words, the insulating film 107 is an insulating film capable of releasing oxygen. To provide an oxygen-excess region in the insulating film 107, for example, the insulating film 107 may be formed in an oxygen atmosphere. Alternatively, oxygen may be added to the insulating film 107 after film formation.

[0081] When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto. When hafnium oxide is used as the insulating film 107, the following effects are achieved. Hafnium oxide has a higher relative dielectric constant than silicon oxide or silicon oxynitride. Therefore, compared with the case where silicon oxide is used, the film thickness of the insulating film 107 can be increased, so that the leakage current due to tunneling current can be reduced. That is, a transistor with a small off-current can be realized. Furthermore, hafnium oxide having a crystal structure has a higher relative dielectric constant than hafnium oxide having an amorphous structure. Therefore, in order to obtain a transistor with a small off-current, it is preferable to use hafnium oxide having a crystal structure. Examples of the crystal structure include monoclinic and cubic systems. However, one aspect of the present invention is not limited thereto.

[0082] Note that in this embodiment, a silicon nitride film is formed as the insulating film 106, and the insulating film 107 A silicon oxide film is formed as such. The silicon nitride film has a higher relative dielectric constant than the silicon oxide film, and since the film thickness required to obtain the same capacitance as the silicon oxide film is large, including the silicon nitride film as the gate insulating film of the transistor 150 can physically thicken the insulating film. Therefore, a decrease in the breakdown voltage of the transistor 100 can be suppressed, and further, the breakdown voltage can be improved to suppress electrostatic breakdown of the transistor 100. The silicon nitride film has a higher relative dielectric constant than the silicon oxide film, and since the film thickness required to obtain the same capacitance as the silicon oxide film is large, including the silicon nitride film as the gate insulating film of the transistor 150 can physically thicken the insulating film. Therefore, a decrease in the breakdown voltage of the transistor 100 can be suppressed, and further, the breakdown voltage can be improved to suppress electrostatic breakdown of the transistor 100. Therefore, a decrease in the breakdown voltage of the transistor 100 can be suppressed, and further, the breakdown voltage can be improved to suppress electrostatic breakdown of the transistor 100. Therefore, a decrease in the breakdown voltage of the transistor 100 can be suppressed, and further, the breakdown voltage can be improved to suppress electrostatic breakdown of the transistor 100.

[0083] [First Oxide Semiconductor Film] As the oxide semiconductor film 108, the materials shown above can be used.

[0084] When the oxide semiconductor film 108a is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In>M. When the oxide semiconductor film 108a is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In>M. When the oxide semiconductor film 108a is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In>M. Examples of such atomic ratios of the metal elements of the sputtering target include In:M:Zn = 2:1:3, In:M:Zn = 3:1:2, In:M:Zn = 4:2:4. .1 and the like.

[0085] Also, when the oxide semiconductor film 108b is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≤M. Also, when the oxide semiconductor film 108b is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≤M. Also, when the oxide semiconductor film 108b is In-M-Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≤M. Examples of such atomic ratios of the metal elements of the sputtering target include In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In:M:Zn = 1:3:2, In:M:Zn = 1:3:4, In:M:Zn = 1:3:6, and the like. are mentioned.

[0086] Also, when the oxide semiconductor film 108a and the oxide semiconductor film 108b are In-M-Zn oxide In this case, it is preferable to use a target containing polycrystalline In-M-Zn oxide as the sputtering target. By using a target containing polycrystalline In-M-Zn oxide, it becomes easier to form the crystalline oxide semiconductor film 108a and the oxide semiconductor film 108b. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. In this case, it is preferable to use a target containing polycrystalline In-M-Zn oxide as the sputtering target. By using a target containing polycrystalline In-M-Zn oxide, it becomes easier to form the crystalline oxide semiconductor film 108a and the oxide semiconductor film 108b. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3. Note that the atomic ratio of the oxide semiconductor film 108a and the oxide semiconductor film 108b to be formed may vary by about ±40% of the atomic ratio of the metal elements contained in the above sputtering target. For example, when using a sputtering target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the oxide semiconductor film 108a, the atomic ratio of the formed oxide semiconductor film 108a may be in the vicinity of In:Ga:Zn = 4:2:3.

[0087] In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In particular, for the oxide semiconductor film 108a, it is preferable to use an oxide semiconductor film with an energy gap of 2 eV or more, preferably 2 eV or more and 3.0 eV or less, and for the oxide semiconductor film 108b, it is preferable to use an oxide semiconductor film with an energy gap of 2.5 eV or more and 3.5 eV or less. Also, it is preferable that the energy gap of the oxide semiconductor film 108b is larger than that of the oxide semiconductor film 108a. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced. In addition, the oxide semiconductor film 108a has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more. By using such an oxide semiconductor film 108a with a wide energy gap, the off-current of the transistor 100 can be reduced.

[0088] In addition, the thickness of the oxide semiconductor film 108a and the oxide semiconductor film 108b is each 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. In addition, the thickness of the oxide semiconductor film 108a and the oxide semiconductor film 108b is each 3 nm or more and 200 nm or less, preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. It shall be 50 nm or less.

[0089] In addition, as the oxide semiconductor film 108a, an oxide semiconductor film with a low carrier density is used. . For example, the carrier density of the oxide semiconductor film 108a is 1×10 17 per cm 3 or less, preferably preferably 1×10 15 per cm 3 or less, more preferably 1×10 13 per cm 3 or less, more preferably 1×10 11 per cm 3 or less.

[0090] Note that it is not limited to these, and those with an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. Also, in order to obtain the required semiconductor characteristics of the transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic distance, density, etc. of the oxide semiconductor film 108a and the oxide semiconductor film 108b appropriate. distance, density, etc. of the oxide semiconductor film 108a and the oxide semiconductor film 108b appropriate. distance, density, etc. of the oxide semiconductor film 108a and the oxide semiconductor film 108b appropriate. distance, density, etc. of the oxide semiconductor film 108a and the oxide semiconductor film 108b appropriate.

[0091] Note that as the oxide semiconductor film 108a and the oxide semiconductor film 108b, oxide semiconductor films with low impurity concentration and low defect level density are respectively used, so that transistors with more excellent electrical characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold characteristics can be preferably fabricated. Here, a low impurity concentration and a low defect level density (less oxygen deficiency) are called high-purity intrinsic or substantially high-purity intrinsic. Alternatively, it is called intrinsic or substantially intrinsic. An oxide semiconductor film that is high-purity intrinsic or substantially high-purity intrinsic has few carrier generation sources, so the carrier density can be lowered. Therefore, a transistor in which a channel region is formed in the oxide semiconductor film has a threshold It is less likely to have electrical characteristics in which the threshold voltage becomes negative (also referred to as normally-on). In addition, an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has a low density of defect levels and thus may also have a low trap level density. Further, an oxide semiconductor film that is highly pure intrinsic or substantially highly pure intrinsic has an extremely small off-current, and even in an element with a channel width of 1 × 10 6 μm and a channel length L of 10 μm, when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1 V to 10 V, the off-current can be below the measurement limit of a semiconductor parameter analyzer i.e., 1 × 10 -13 A or less.

[0092] Therefore, a transistor in which a channel region is formed in the above-described highly pure intrinsic or substantially highly pure intrinsic oxide semiconductor film can be a transistor with small fluctuations in electrical characteristics and high reliability. Note that the charge trapped in the trap levels of the oxide semiconductor film may take a long time to disappear and may behave like a fixed charge. Therefore, a transistor in which a channel region is formed in an oxide semiconductor film with a high trap level density may have unstable electrical characteristics. Examples of impurities include hydrogen, nitrogen, alkali metals, or alkaline earth metals. The hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water, and at the same time forms oxygen vacancies in the lattice from which oxygen has desorbed (or the portion from which oxygen has desorbed). When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with the oxygen bonded to the metal atoms to generate electrons, which are carriers. Therefore, impurities include hydrogen, nitrogen, alkali metals, or alkaline earth metals.

[0093] The hydrogen contained in the oxide semiconductor film reacts with the oxygen bonded to the metal atoms to form water, and at the same time forms oxygen vacancies in the lattice from which oxygen has desorbed (or the portion from which oxygen has desorbed). When hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with the oxygen bonded to the metal atoms to generate electrons, which are carriers. Therefore, when hydrogen enters these oxygen vacancies, electrons, which are carriers, may be generated. Also, a part of the hydrogen may bond with the oxygen bonded to the metal atoms to generate electrons, which are carriers. Therefore, 、A transistor using an oxide semiconductor film containing hydrogen tends to have normally-on characteristics. Therefore, it is preferable that the hydrogen in the oxide semiconductor film 108 be reduced as much as possible. Specifically, in the oxide semiconductor film 108, the hydrogen concentration obtained by SIMS analysis is 2 × 10 20 atoms / cm 3 or less, preferably 5 × 10 19 atoms / cm 3 or less, more preferably 1 × 10 19 atoms / cm 3 or less, 5 × 10 18 atoms / cm 3 or less, preferably 1 × 10 18 atoms / cm 3 or less, more preferably 5 × 1 0 17 atoms / cm 3 or less, even more preferably 1 × 10 16 atoms / cm 3 or less. It is set as such.

[0094] Also, it is preferable that the oxide semiconductor film 108a has a region with a lower hydrogen concentration than the oxide semiconductor film 108b. Since the oxide semiconductor film 108a has a region with a lower hydrogen concentration than the oxide semiconductor film 108b, a highly reliable semiconductor device can be obtained.

[0095] In addition, when silicon or carbon, which is one of the Group 14 elements, is contained in the oxide semiconductor film 108a, oxygen deficiency increases in the oxide semiconductor film 108a and it becomes n-type. Therefore, the concentration of silicon or carbon in the oxide semiconductor film 108a and the concentration of silicon or carbon near the interface with the oxide semiconductor film 10 8b (concentration obtained by SIMS analysis) are 2 × 10 18 ​​​​atoms / cm 3 Hereinafter, preferably 2 × 10 17 atoms / cm 3 or less. Do.

[0096] Further, in the oxide semiconductor film 108a, the concentration of an alkali metal or an alkaline earth metal obtained by SIMS analysis is 1 × 10 or less, preferably 2 × 18 atoms / cm 3 or less. Alkali metals and alkaline earth metals may generate carriers when combined with an oxide semiconductor, and the off-current of the transistor may increase and 16 result in an increase in the off-current of the transistor. For this reason, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor film 108a. 3 Hereinafter, preferably 2 × 10 atoms / cm or less.

[0097] Further, when nitrogen is contained in the oxide semiconductor film 108a, electrons as carriers are generated, the carrier density increases, and it is likely to become n-type. As a result, a transistor using an oxide semiconductor film containing nitrogen is likely to have normally-on characteristics. Therefore, in the oxide semiconductor film, it is preferable that nitrogen is reduced as much as possible. For example, the nitrogen concentration obtained by SIMS analysis is preferably 5 × 10 18 atoms / cm 3 or less.

[0098] Further, the oxide semiconductor film 108a and the oxide semiconductor film 108b may each have a non-single crystal structure. The non-single crystal structure is, for example, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) described later, polycrystalline structure. gned Crystalline Oxide Semiconductor), polycrystalline It includes a crystal structure, a microcrystalline structure, or an amorphous structure. In the non-single crystal structure, the amorphous structure has the highest defect level density, and CAAC-OS has the lowest defect level density.

[0099] [Second gate insulating film] Insulating films 114 and 116 function as the second gate insulating film of transistor 100. In addition, insulating films 114 and 116 function as the underlying insulating film of transistor 150. Also, insulating films 114 and 116 have a function of supplying oxygen to oxide semiconductor films 108 and 120b. That is, insulating films 114 and 116 contain oxygen. Further, insulating film 114 is an insulating film that can transmit oxygen. Note that insulating film 114 also functions as a damage relaxation film for oxide semiconductor film 108 when forming insulating film 116 to be formed later.

[0100] As insulating film 114, silicon oxide, silicon oxynitride, etc. with a thickness of 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less can be used.

[0101] Also, insulating film 114 preferably has a small amount of defects. Typically, by ESR measurement, the spin density of the signal appearing at g = 2.001 derived from silicon dangling bonds is preferably 3×10 17 spins / cm 3

[0102] Note that in insulating film 114, all the oxygen that enters insulating film 114 from the outside does not move to the outside of insulating film 114 and remains in insulating film 114. Also, there is oxygen in insulating film 114. Also, oxygen is in insulating film 114. At the same time, oxygen contained in the insulating film 114 moves to the outside of the insulating film 114, so oxygen migration may occur in the insulating film 114. When an oxide insulating film that can transmit oxygen is formed as the insulating film 114, oxygen desorbed from the insulating film 116 provided on the insulating film 114 can be moved to the oxide semiconductor film 108 through the insulating film 114. .

[0103] In addition, the insulating film 114 can be formed using an oxide insulating film with a low level density caused by nitrogen oxides. The level density caused by the nitrogen oxides may be formed between the energy (Ev_os) at the upper end of the valence band of the oxide semiconductor film and the energy (Ec_os) at the lower end of the conduction band of the oxide semiconductor film. As the oxide insulating film, a silicon oxynitride film with a small amount of nitrogen oxide emission or an aluminum oxynitride film with a small amount of nitrogen oxide emission can be used.

[0104] Note that a silicon oxynitride film with a small amount of nitrogen oxide emission is a film in which the ammonia emission amount is larger than the nitrogen oxide emission amount in the temperature-programmed desorption gas analysis method. Typically, the ammonia emission amount is 1×10 or more and 5×10 or less per cm 18 . The ammonia emission amount is the emission amount by heat treatment at a film surface temperature of 50°C or higher and 650°C or lower, preferably 50°C or higher and 55 3 19 3 0°C or lower.

[0105] Nitrogen oxides (NO x , where x is 1 or 2), typically NO2 or NO, form levels in the insulating film 11 4 or the like. The levels are within the energy gap of the oxide semiconductor film 108. ​​​​​​​​​​​is located. Therefore, when nitrogen oxides diffuse to the interface between the insulating film 114 and the oxide semiconductor film 108, the level may trap electrons on the insulating film 114 side. As a result, since the trapped electrons remain near the interface between the insulating film 114 and the oxide semiconductor film 108, the threshold voltage of the transistor is shifted in the positive direction. In addition, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment, so the nitrogen oxides contained in the insulating film 114 are reduced. Therefore, electrons are less likely to be trapped at the interface between the insulating film 114 and the oxide semiconductor film 108. By using the oxide insulating film as the insulating film 114, it is possible to reduce the shift of the threshold voltage of the transistor and reduce the variation in the electrical characteristics of the transistor. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2.

[0106] Also, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment, so the nitrogen oxides contained in the insulating film 114 are reduced. Therefore, electrons are less likely to be trapped at the interface between the insulating film 114 and the oxide semiconductor film 108. In addition, nitrogen oxides react with ammonia and oxygen during heat treatment. The nitrogen oxides contained in the insulating film 114 react with the ammonia contained in the insulating film 116 during heat treatment, so the nitrogen oxides contained in the insulating film 114 are reduced. Therefore, electrons are less likely to be trapped at the interface between the insulating film 114 and the oxide semiconductor film 108. By using the oxide insulating film as the insulating film 114, it is possible to reduce the shift of the threshold voltage of the transistor and reduce the variation in the electrical characteristics of the transistor. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2.

[0107] By using the oxide insulating film as the insulating film 114, it is possible to reduce the shift of the threshold voltage of the transistor and reduce the variation in the electrical characteristics of the transistor. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2.

[0108] Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. Note that, by heat treatment in the manufacturing process of the transistor, typically heat treatment at 300 °C or higher and lower than 350 °C, the insulating film 114 has a first signal with a g value of 2.037 or more and 2.039 or less, a second signal with a g value of 2.001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less in the spectrum obtained by measurement with an ESR of 100 K or less. The split widths of the first signal and the second signal, and the split widths of the second signal and the third signal are about 5 mT in the X-band ESR measurement. Also, the first signal with a g value of 2.037 or more and 2.039 or less, the g value of 2. A second signal of 001 or more and 2.003 or less, and a third signal with a g value of 1.964 or more and 1.966 or less The total spin density of the third signal is 1×10 18 spins / cm 3 Less than, and instead Typically 1×10 17 spins / cm 3 Or more and 1×10 18 spins / cm 3 Less than It is.

[0109] The first signal, the second signal, and the third signal described above correspond to signals caused by nitrogen oxides. That is, the smaller the total spin density that gives the first signal, the second signal, and the third signal, the lower the content of nitrogen oxides contained in the oxide insulating film. It can be said.

[0110] In addition, the oxide insulating film has a nitrogen concentration of 6×10 measured by SIMS 20 atoms / cm 3 Or less.

[0111] The substrate temperature is 220°C or more and 350°C or less, and by using the PECVD method using silane and dinitrogen monoxide to form the oxide insulating film, a dense and hard film can be formed.

[0112] The insulating film 116 is formed using an oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition. The oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition releases a part of oxygen by heating. The oxide insulating film containing more oxygen than oxygen that satisfies the stoichiometric composition has an oxygen release amount in terms of oxygen atoms of 1.0×10 in TDS analysis at 100°C or more and 700°C or less, or 100°C or more and 500°C or less. TDS analysis at 100°C or more and 700°C or less, or 100°C or more and 500°C or less, the oxygen release amount in terms of oxygen atoms is 1.0×1019 atoms / c m 3 or more, or 3.0×10 20 atoms / cm 3 or more. 。

[0113] As the insulating film 116, silicon oxide, silicon oxynitride, etc. with a thickness of 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less can be used.

[0114] Also, the insulating film 116 preferably has a small amount of defects. Typically, by ESR measurement the spin density of the signal appearing at g = 2.001 derived from the dangling bonds of silicon is 1.5×10 18 spins / cm 3 less than, and more preferably 1×10 18 spins / cm 3 or less. Note that since the insulating film 116 is separated from the oxide semiconductor film 108, it may have a higher defect density than the insulating film 114.

[0115] Also, since the insulating films 114 and 116 can be made of the same type of insulating material, the interface between the insulating film 114 and the insulating film 116 may not be clearly distinguishable. Therefore, in this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a broken line. Note that in this embodiment, a two-layer structure of the insulating film 114 and the insulating film 116 has been described, but it is not limited thereto, and for example, a single-layer structure of the insulating film 114 may be used.

[0116] [Second Oxide Semiconductor Film and Third Oxide Semiconductor Film] As the oxide semiconductor films 120a and 120b, the oxide semiconductors described above It can be formed using the same material and the same manufacturing method as the conductor film 108.

[0117] That is, the oxide semiconductor film 120a and the oxide semiconductor film 120b have the metal elements contained in the oxide semiconductor film 108. For example, by configuring the oxide semiconductor film 108, the oxide semiconductor film 120a, and the oxide semiconductor film 120b to have the same metal element, it becomes possible to suppress the manufacturing cost.

[0118] For example, as the oxide semiconductor film 120a and the oxide semiconductor film 120b, in the case of In-M- Zn oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide preferably satisfies In≧M. Examples of the atomic ratio of the metal elements of such a sputtering target include In:M:Zn = 2:1:3, In:M: Zn = 3:1:2, In:M:Zn = 4:2:4.1, etc. Zn = 3:1:2, In:M:Zn = 4:2:4.1, etc.

[0119] Also, the structure of the oxide semiconductor film 120a and the oxide semiconductor film 120b can be a single-layer structure or a laminated structure of two or more layers. When the oxide semiconductor films 120a and 12 0b have a laminated structure, they are not limited to the composition of the above sputtering target. When the oxide semiconductor films 120a and 120b have a laminated structure, they may have the same structure as the oxide semiconductor film 108 described above (for example, a laminated structure of the oxide semiconductor film 108a and the oxide semiconductor film 108b on the oxide semiconductor film 108a). Or, when the oxide semiconductor films 120a and 120b have a laminated structure, they may have a laminated structure of the oxide semiconductor film 108b and the oxide semiconductor film 108a on the oxide semiconductor film 108b. 108a on the oxide semiconductor film 108b. It may also be a laminated structure of the oxide semiconductor film 108b and the oxide semiconductor film 108a on the oxide semiconductor film 108b.

[0120] [Insulating film that functions as a protective insulating film for a transistor] The insulating film 118 functions as a protective insulating film for the transistor 100. Also, the insulating film 11 8 is in contact with the source region 120b_s and the drain region 120b_d of the transistor 150 and has a function of supplying impurities to the source region 120b_s and the drain region 120b_d.

[0121] For example, the insulating film 118 contains either one or both of hydrogen and nitrogen. Or, the insulating film 118 contains nitrogen and silicon. Also, the insulating film 118 has a function of blocking oxygen, hydrogen, water, alkali metals, alkaline earth metals, etc. By providing the insulating film 118, the diffusion of oxygen from the oxide semiconductor film 108 to the outside, the diffusion of oxygen contained in the insulating films 114 and 11 6 to the outside, and the entry of hydrogen, water, etc. from the outside into the oxide semiconductor film 108 can be prevented.

[0122] Also, the insulating film 118 has a function of supplying either one or both of hydrogen and nitrogen to the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d. In particular, it is preferable that the insulating film 118 contains hydrogen and has a function of supplying the hydrogen to the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d. When hydrogen is supplied from the insulating film 118 to the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d, the oxide semiconductor film 120a, the source region 120b_s, and the drain region 120b_d function as conductors.

[0123] ​​​​​​​​​​​As the insulating film 118, for example, a nitride insulating film can be used. The nitride insulating film includes silicon nitride, silicon oxynitride, aluminum nitride, aluminum oxynitride and the like.

[0124] Note that various films such as the conductive film, insulating film, and oxide semiconductor film described above can be formed by sputtering method or PECVD method, but can also be formed by other methods, for example, thermal CVD (Ch emical Vapor Deposition) method. As an example of the thermal CVD method, MOCVD (Metal Organic Chemical Vapor Deposition) method or ALD (Atomic Layer Depositio n) method can also be used.

[0125] Since the thermal CVD method is a film formation method that does not use plasma, it has the advantage that defects are not caused by plasma damage .

[0126] In the thermal CVD method, the source gas and the oxidant are simultaneously fed into the chamber, and the chamber is at atmospheric pressure or under reduced pressure, and the reaction is carried out near or on the substrate to deposit on the substrate to form a film .

[0127] Also, in the ALD method, the chamber is at atmospheric pressure or under reduced pressure, and the source gas for the reaction is introduced into the chamber for reaction, and this is repeated to form a film. An inert gas (such as argon or nitrogen) may be introduced as a carrier gas together with the source gas. For example, two or more types of source gases may be supplied to the chamber in sequence. At that time, after the reaction of the first source gas, an inert gas is introduced so that a plurality of types of source gases are not mixed, and the second source gas is introduced . ​Alternatively, instead of introducing an inert gas, the first source gas may be exhausted by vacuum pumping. After that, the second source gas may be introduced. The first source gas adsorbs and reacts on the surface of the substrate to form the first layer, and the subsequently introduced second source gas adsorbs and reacts to form the second layer laminated on the first layer to form a thin film. By repeating this gas introduction sequence multiple times until the desired thickness is achieved, a thin film with excellent step coverage can be formed. Since the thickness of the thin film can be adjusted by the number of times of repeating the gas introduction, precise film thickness adjustment is possible, which is suitable for fabricating fine FETs.

[0128] Thermal CVD methods such as MOCVD can form various films such as the conductive film, insulating film, oxide semiconductor film, and metal oxide film in the above embodiments. For example, when forming an In-Ga-Zn-O film, trimethylindium (In(CH3)3), trimethylgallium (Ga(CH3)3), and dimethylzinc (Zn(CH3)2) can be used. Note that it is not limited to these combinations, and triethylgallium (Ga(C2H5)3) can be used instead of trimethylgallium, and diethylzinc (Zn(C2H5)2) can be used instead of dimethylzinc.

[0129] For example, when forming a hafnium oxide film using a film forming apparatus that utilizes ALD, two types of gases, a source gas obtained by vaporizing a liquid containing a solvent and a hafnium precursor (hafnium alkoxide, tetrakis(dimethylamide)hafnium (TDMAH, Hf[N(CH3)2]4), hafnium amide such as tetrakis(ethylmethylamide)hafnium), and ozone (O3) as an oxidizing agent, are used.

[0130] For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate). For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate). For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate). For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate). For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate). For example, when forming an aluminum oxide film using a film forming apparatus that utilizes ALD, a liquid containing a solvent and an aluminum precursor (such as trimethylaluminum (TMA, Al(CH3)3), etc.) is vaporized to obtain a source gas, and two types of gases, H2O as an oxidizing agent, are used. Other materials include tris(dimethylamide)aluminum, triisobutylaluminum, and aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate).

[0131] For example, when forming a silicon oxide film using a film forming apparatus that utilizes ALD, hexachlorodisilane is adsorbed onto the film forming surface, chlorine contained in the adsorbed substance is removed, and radicals of an oxidizing gas (O2, dinitrogen monoxide) are supplied to react with the adsorbed substance. For example, when forming a silicon oxide film using a film forming apparatus that utilizes ALD, hexachlorodisilane is adsorbed onto the film forming surface, chlorine contained in the adsorbed substance is removed, and radicals of an oxidizing gas (O2, dinitrogen monoxide) are supplied to react with the adsorbed substance. For example, when forming a silicon oxide film using a film forming apparatus that utilizes ALD, hexachlorodisilane is adsorbed onto the film forming surface, chlorine contained in the adsorbed substance is removed, and radicals of an oxidizing gas (O2, dinitrogen monoxide) are supplied to react with the adsorbed substance.

[0132] For example, when forming a tungsten film using a film forming apparatus that utilizes ALD, WF6 gas and B2H6 gas are sequentially introduced to form an initial tungsten film, and then a tungsten film is formed using WF6 gas and H2 gas. Note that SiH4 gas may be used instead of B2H6 gas. For example, when forming a tungsten film using a film forming apparatus that utilizes ALD, WF6 gas and B2H6 gas are sequentially introduced to form an initial tungsten film, and then a tungsten film is formed using WF6 gas and H2 gas. Note that SiH4 gas may be used instead of B2H6 gas. For example, when forming a tungsten film using a film forming apparatus that utilizes ALD, WF6 gas and B2H6 gas are sequentially introduced to form an initial tungsten film, and then a tungsten film is formed using WF6 gas and H2 gas. Note that SiH4 gas may be used instead of B2H6 gas. For example, when forming a tungsten film using a film forming apparatus that utilizes ALD, WF6 gas and B2H6 gas are sequentially introduced to form an initial tungsten film, and then a tungsten film is formed using WF6 gas and H2 gas. Note that SiH4 gas may be used instead of B2H6 gas.

[0133] For example, when forming an oxide semiconductor film, such as an In-Ga-Zn-O film, using a film forming apparatus that utilizes ALD, an In-O layer is formed using In(CH3)3 gas and O3 gas, then a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a ZnO layer is formed using Zn(CH3)2 gas and O3 gas. Note that the order of these layers is not limited to this example. Also, an In-Ga-O layer or an In-Zn-O layer can be formed using these gases. For example, when forming an oxide semiconductor film, such as an In-Ga-Zn-O film, using a film forming apparatus that utilizes ALD, an In-O layer is formed using In(CH3)3 gas and O3 gas, then a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a ZnO layer is formed using Zn(CH3)2 gas and O3 gas. Note that the order of these layers is not limited to this example. Also, an In-Ga-O layer or an In-Zn-O layer can be formed using these gases. For example, when forming an oxide semiconductor film, such as an In-Ga-Zn-O film, using a film forming apparatus that utilizes ALD, an In-O layer is formed using In(CH3)3 gas and O3 gas, then a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a ZnO layer is formed using Zn(CH3)2 gas and O3 gas. Note that the order of these layers is not limited to this example. Also, an In-Ga-O layer or an In-Zn-O layer can be formed using these gases. For example, when forming an oxide semiconductor film, such as an In-Ga-Zn-O film, using a film forming apparatus that utilizes ALD, an In-O layer is formed using In(CH3)3 gas and O3 gas, then a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a ZnO layer is formed using Zn(CH3)2 gas and O3 gas. Note that the order of these layers is not limited to this example. Also, an In-Ga-O layer or an In-Zn-O layer can be formed using these gases. For example, when forming an oxide semiconductor film, such as an In-Ga-Zn-O film, using a film forming apparatus that utilizes ALD, an In-O layer is formed using In(CH3)3 gas and O3 gas, then a GaO layer is formed using Ga(CH3)3 gas and O3 gas, and then a ZnO layer is formed using Zn(CH3)2 gas and O3 gas. Note that the order of these layers is not limited to this example. Also, an In-Ga-O layer or an In-Zn-O layer can be formed using these gases. , a mixed compound layer such as a Ga-Zn-O layer may be formed. Note that, instead of O3 gas, H2O gas obtained by bubbling with an inert gas such as Ar may be used, but it is preferable to use O 3 gas that does not contain H.

[0134] <1-3. Configuration Example 2 of Semiconductor Device> Next, regarding configurations different from those shown in FIGS. 1(A)(B) and FIGS. 2(A)(B), FIGS. 3 to 10 will be used for explanation.

[0135] FIG. 3(A) is a top view of transistors 100A and 150, which are semiconductor devices according to one aspect of the present invention, and FIG. 3(B) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1-X2 shown in FIG. 3(A). Further, FIG. 4 corresponds to a cross-sectional view of the cut surface between the dashed-dotted line Y1-Y 2 shown in FIG. 3(A). Also, FIG. 5(A) is a top view of transistors 100B and 150, which are semiconductor devices according to one aspect of the present invention, and FIG. 5(B ) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1-X2 shown in FIG. 5(A). Also , FIG. 6 corresponds to a cross-sectional view of the cut surface between the dashed-dotted line Y1-Y2 shown in FIG. 5(A).

[0136] Also, FIG. 9(A) is a top view of transistors 100C and 150, which are semiconductor devices according to one aspect of the present invention, and FIG. 9(B) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line X1- X2 shown in FIG. 9(A). Further, FIG. 10(A) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line Y1-Y2 shown in FIG. 9(A), and FIG. 10(B) corresponds to a cross-sectional view of the cut surface between the dashed-dotted line Y3-Y4 shown in FIG. 9(A).

[0137]

[0137] The semiconductor devices shown in FIGS. 3(A)(B) and 4 have a configuration in which a transistor 100A is used instead of the transistor 100 included in the semiconductor devices shown in FIGS. 1(A)(B) and 2(A)(B). Also, the semiconductor devices shown in FIGS. 5(A)(B) and 6 have a configuration in which a transistor 100B is used instead of the transistor 100 included in the semiconductor devices shown in FIGS. 1(A)(B) and 2(A)(B). Further, the semiconductor devices shown in FIGS. 9(A)(B) and 10(A)(B) have a configuration in which a transistor 100C is used instead of the transistor 100 included in the semiconductor devices shown in FIGS. 1(A)(B) and 2(A)(B). Accordingly, the description of the transistor 150 described above is omitted, and the details of the transistors 100A, 100B, and 100C will be described below. [Configuration Example of First Transistor (Modification 1)] The transistor 100A is different in that an opening 132 is provided in the transistor 100 shown above. Other configurations are the same as those of the transistor 100 and exhibit the same effects. Hereinafter, the configurations different from those of the transistor 100 will be described. As shown in FIGS. 3(A) and 4, an oxide semiconductor film 120a that functions as a second gate electrode is connected to a conductive film 104 that functions as a first gate electrode at an opening 132 provided in the insulating films 106, 107, 114, and 116. Accordingly, the same potential is applied to the conductive film 104 and the oxide semiconductor film 120a.

[0138]

[0139]

[0140]

[0141] ​​​​​​​​​​​​​In addition, in this embodiment, an opening 132 is provided, and a configuration in which the conductive film 104 and the oxide semiconductor film 120a are connected is exemplified, but it is not limited thereto. For example, a configuration in which a plurality of openings 1 32 are formed and the conductive film 104 and the oxide semiconductor film 120a are connected may also be used. In the case of a configuration in which the conductive film 104 and the oxide semiconductor film 120a are not connected, as in the transistor 100 shown in FIGS. 1(A)(B) and FIGS. 2(A)(B), different potentials can be applied to the conductive film 104 and the oxide semiconductor film 120a, respectively.

[0142] Further, as shown in FIG. 3(B), the oxide semiconductor film 108 is positioned so as to face the conductive film 104 functioning as the first gate electrode and the oxide semiconductor film 120a functioning as the second gate electrode, respectively, and is sandwiched between the films functioning as the two gate electrodes. The length in the channel length direction and the length in the channel width direction of the oxide semiconductor film 120a functioning as the second gate electrode are each longer than the length in the channel length direction and the length in the channel width direction of the oxide semiconductor film 108. The upper surface and side surfaces of the oxide semiconductor film 108 are covered with the oxide semiconductor film 120a via the insulating films 114 and 11 6. Further, since the oxide semiconductor film 120a and the conductive film 104 are connected at the opening 132 provided in the insulating films 106, 107, 114, 116, the side surface extending in the channel width direction of the oxide semiconductor film 108 faces the oxide semiconductor film 120a.

[0143] In other words, the conductive film 104 and the oxide semiconductor film 120a are connected at the opening 132 provided in the insulating films 106, 107, 114, 116, and at the same time, the insulating films 106, 10 It is configured to surround the oxide semiconductor film 108 via 7, 114, and 116.

[0144] By having such a configuration, the oxide semiconductor film 10 8 included in the transistor 100A can be electrically surrounded by the electric field of the conductive film 104 functioning as the first gate electrode and the oxide semiconductor film 120a functioning as the second gate electrode. For a transistor 10 0A, a device structure of a transistor that electrically surrounds an oxide semiconductor film in which a channel region is formed by the electric fields of the first gate electrode and the second gate electrode can be called a Surrou nded channel (S-channel) structure. Since the transistor 100A has an S-channel structure, an electric field for inducing a channel can be effectively applied to the oxide semiconductor film 108 by the conductive film 104 functioning as the first gate electrode. Therefore, the current driving ability of the transistor 100A is improved , and high on-current characteristics can be obtained. Also, since it is possible to increase the on-current, the transistor 100A can be miniaturized. Further, since the transistor 1

[0145] 00A has a structure surrounded by the conductive film 104 functioning as the first gate electrode and the oxide semiconductor film 120a functioning as the second gate electrode, the mechanical strength of the transistor 100 A can be increased.

[0146]

[0146] [Configuration Example of First Transistor (Modification 2)] The configuration of the oxide semiconductor film 108 of the transistor 100B is different from that of the transistor 100 shown above. For other configurations, they are the same as those of the transistor 100, and the same effects are obtained. is played. Below, a configuration different from the transistor 100 will be described.

[0147] The transistor 100B has a three-layer stacked structure for the oxide semiconductor film 108 that the transistor 100 has. More specifically, the oxide semiconductor film 1 08 of the transistor 100B includes an oxide semiconductor film 108c on the insulating film 107, an oxide semiconductor film 108a on the oxide semiconductor film 108c, and an oxide semiconductor film 108b on the oxide semiconductor film 108a. has.

[0148] Here, regarding the band structure of the insulating films in contact with the oxide semiconductor films 108a, 108b, 108c, and the band structure of the insulating films in contact with the oxide semiconductor films 108a, 108b, FIG. 7 will be used for the description.

[0149] FIG. 7(A) is an example of the band structure in the film thickness direction of a stacked structure having the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114. Further, FIG. 7(B) is an example of the band structure in the film thickness direction of a stacked structure having the insulating film 107, the oxide semiconductor films 108a, 108b, and the insulating film 114. Note that the band structure shows the energy level (Ec) at the lower end of the conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114 for easy understanding. an example of the band structure in the film thickness direction of a stacked structure having the insulating film 107, the oxide semiconductor films 108a, 108b, and the insulating film 114. Note that the band structure shows the energy level (Ec) at the lower end of the conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114 for easy understanding. For easy understanding, the band structure shows the energy level (Ec) at the lower end of the conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114. For easy understanding, the band structure shows the energy level (Ec) at the lower end of the conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114. For easy understanding, the band structure shows the energy level (Ec) at the lower end of the conduction band of the insulating film 107, the oxide semiconductor films 108a, 108b, 108c, and the insulating film 114.

[0150] Also, in FIG. 7(A), a silicon oxide film is used as the insulating films 107 and 114, and an oxide semiconductor film formed using a metal oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.2 for the metal elements is used as the oxide semiconductor film 108c. As the oxide semiconductor film 108a, a metal oxide target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the metal elements is used. formed using a metal oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.2 for the metal elements is used as the oxide semiconductor film 108c. As the oxide semiconductor film 108a, a metal oxide target with an atomic ratio of In:Ga:Zn = 4:2:4.1 for the metal elements is used. Using the oxide semiconductor film formed thereby, the atomic ratio of metal elements in the oxide semiconductor film 108b is a band diagram of a configuration using an oxide semiconductor film formed using a metal oxide target of In:Ga:Zn = 1:1:1.2.

[0151] Further, FIG. 7(B) shows a band diagram of a configuration in which silicon oxide films are used as the insulating films 107 and 114, and an oxide semiconductor film formed using a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 4:2:4.1 is used as the oxide semiconductor film 108a, and an oxide semiconductor film formed using a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1.2 is used as the oxide semiconductor film 108b. oxide is a band diagram of a configuration using an oxide semiconductor film formed using a metal oxide target with an atomic ratio of metal elements of In:Ga:Zn = 1:1:1.2.

[0152] As shown in FIG. 7(A), in the oxide semiconductor films 108a, 108b, and 108c, the energy levels at the lower ends of the conduction bands change smoothly. Further, as shown in FIG. 7(B), in the oxide semiconductor films 108a and 108b, the energy levels at the lower ends of the conduction bands change smoothly. That is to say, it can also be said that they change continuously or are continuously joined. In order to have such a band structure, it is assumed that there are no impurities that form defect levels such as trap centers or recombination centers at the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b, or at the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a. In order to form a continuous junction in the oxide semiconductor films 108a, 108b, and 108c, it is necessary to continuously stack each film without exposing it to the atmosphere using a multi-chamber type film forming apparatus (sputtering apparatus) equipped with a load lock chamber.

[0153] ​​​​​​​​​​

[0154] By adopting the structure shown in FIGS. 7(A) and 7(B), the oxide semiconductor film 108a becomes a well, and it can be seen that in the transistor using the above-described stacked structure, the channel region is formed in the oxide semiconductor film 10 8a.

[0155] Note that trap levels that can be formed in the vicinity of the interface between the oxide semiconductor film 108a and the insulating film (insulating film 107 or insulating film 114) are moved farther from the oxide semiconductor film 108a by providing the oxide semiconductor films 108b and 108c.

[0156] In addition, trap levels may be farther from the vacuum level than the energy level (Ec) at the lower end of the conduction band of the oxide semiconductor film 108a that functions as a channel region, and electrons are likely to accumulate in the trap levels. When electrons accumulate in the trap levels, they become negative fixed charges, and the threshold voltage of the transistor shifts in the positive direction. Therefore, it is preferable to adopt a configuration such that the trap levels are closer to the vacuum level than the energy level (Ec) at the lower end of the conduction band of the oxide semiconductor film 108a. By doing so, it becomes difficult for electrons to accumulate in the trap levels, and it is possible to increase the on-current of the transistor and increase the field-effect mobility.

[0157] In addition, the oxide semiconductor films 108b and 108c have energy levels at the lower ends of their conduction bands closer to the vacuum level than that of the oxide semiconductor film 108a. Typically, the difference between the energy level at the lower end of the conduction band of the oxide semiconductor film 108a and the energy levels at the lower ends of the conduction bands of the oxide semiconductor films 108b and 108c is 0.15 eV or more, or 0.5 eV or more, and 2 eV or less, or 1 eV The following is the case. That is, the difference between the electron affinities of the oxide semiconductor films 108b and 108c and the electron affinity of the oxide semiconductor film 108a is 0.15 eV or more, or 0.5 eV or more, and 2 eV or less, or 1 eV or less. By having such a configuration, the oxide semiconductor film 108a becomes the main current path. That is, the oxide semiconductor film 108a has a function as a channel region, and the oxide semiconductor films 108b and 108c have a function as an oxide insulating film. Further, since the oxide semiconductor films 108b and 108c are oxide semiconductor films composed of one or more of the metal elements constituting the oxide semiconductor film 108a in which the channel region is formed, the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a, or the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b

[0158] interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. That is, the oxide semiconductor film 108a has a function as a channel region, and the oxide semiconductor films 108b and 108c have a function as an oxide insulating film. Further, since the oxide semiconductor films 108b and 108c are oxide semiconductor films composed of one or more of the metal elements constituting the oxide semiconductor film 108a in which the channel region is formed, the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a, or the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. is an oxide semiconductor film composed of one or more of the metal elements constituting the oxide semiconductor film 108a in which the channel region is formed. Therefore, at the interface between the oxide semiconductor film 108c and the oxide semiconductor film 108a, or at the interface between the oxide semiconductor film 108a and the oxide semiconductor film 108b interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased.

[0159] Further, in order to prevent the oxide semiconductor films 108b and 108c from functioning as part of the channel region, a material having a sufficiently low conductivity is used. Therefore, the oxide semiconductor films 108b and 108c are also referred to as oxide insulating films, respectively, from their physical properties and / or functions. Alternatively, for the oxide semiconductor films 108b and 108c, the electron affinity (the difference between the vacuum level and the energy level at the lower end of the conduction band) is smaller than that of the oxide semiconductor film 108a, and the energy level at the lower end of the conduction band has a difference (band offset) from the energy level at the lower end of the conduction band of the oxide semiconductor film 108a. A material having the above is used. Also, depending on the magnitude of the drain voltage interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. interface scattering hardly occurs. Therefore, carrier movement is not inhibited at the interface, so that the field-effect mobility of the transistor is increased. In order to suppress the occurrence of a difference in threshold voltage, it is preferable to use a material in which the energy level at the lower end of the conduction band of the oxide semiconductor films 108b and 108c is closer to the vacuum level than the energy level at the lower end of the conduction band of the oxide semiconductor film 108a. For example, it is preferable that the difference between the energy level at the lower end of the conduction band of the oxide semiconductor film 108b and the energy levels at the lower ends of the conduction bands of the oxide semiconductor films 108a and 108c is 0.2 eV or more, preferably 0.5 eV or more. Also, it is preferable that the oxide semiconductor films 108b and 108c do not contain a spinel-type crystal structure in the film. When the oxide semiconductor films 108b and 108c contain a spinel-type crystal structure in the film, the constituent elements of the conductive films 112a and 112b may diffuse into the oxide semiconductor film 108a at the interface between the spinel-type crystal structure and other regions. When the oxide semiconductor films 108b and 108c are CAAC-OS, the blocking property of the constituent elements of the conductive films 112a and 112b, for example, copper element, becomes high, which is preferable.

[0160]

[0161] The film thicknesses of the oxide semiconductor films 108b and 108c are equal to or greater than a film thickness capable of suppressing the diffusion of the constituent elements of the conductive films 112a and 112b into the oxide semiconductor film 108a, and less than a film thickness capable of suppressing the supply of oxygen from the insulating film 114 to the oxide semiconductor film 108a. For example, when the film thicknesses of the oxide semiconductor films 108b and 108c are 10 nm or more, the diffusion of the constituent elements of the conductive films 112a and 112b into the oxide semiconductor film 108a can be suppressed. Also, when the film thicknesses of the oxide semiconductor films 108b and 108c are 100 nm or less, oxygen can be effectively supplied from the insulating film 114 to the oxide semiconductor film 108a.

[0162] ​​​​​​​​​​​​​​​ Also, in the present embodiment, as the oxide semiconductor films 108b and 108c, a metal element oxide semiconductor film formed using a metal oxide target with an atomic ratio of In:Ga:Zn = 1:1:1.2 is exemplified, but it is not limited thereto. For example, as the oxide semiconductor films 108b and 108c, an oxide semiconductor film formed using a metal oxide target with In:Ga:Zn = 1:1:1 [atomic ratio], In:Ga:Zn = 1:3:2 [atomic ratio], In:Ga:Zn = 1:3:4 [atomic ratio , or In:Ga:Zn = 1:3:6 [atomic ratio] may be used. or an oxide semiconductor film formed using a metal oxide target with In:Ga:Zn = 1:3:6 [atomic ratio] may be used.

[0163] Note that when using a metal oxide target with In:Ga:Zn = 1:1:1 [atomic ratio] as the oxide semiconductor films 108b and 108c, the oxide semiconductor films 108b and 108c may be In:Ga:Zn = 1:β1(0 < β1 ≤ 2):β2(0 < β2 ≤ 2). Also, when using a metal oxide target with In:Ga:Zn = 1:3:4 [atomic ratio] as the oxide semiconductor films 108b and 108c, the oxide semiconductor films 108b and 108c may be In:Ga:Zn = 1:β3(1 ≤ β3 ≤ 5):β4(2 ≤ β4 ≤ 6). Also, when using a metal oxide target with In:Ga:Zn = 1:3:6 [atomic ratio] as the oxide semiconductor films 108b and 108c, the oxide semiconductor films 108b and 108c may be In:Ga:Zn = 1:β5(1 ≤ β5 ≤ 5):β6(4 ≤ β6 ≤ 8). Note that when using a metal oxide target with In:Ga:Zn = 1:3:6 [atomic ratio] as the oxide semiconductor films 108b and 108c, the oxide semiconductor films 108b and 108c may be In:Ga:Zn = 1:β5(1 ≤ β5 ≤ 5):β6(4 ≤ β6 ≤ 8).

[0164] Also, the oxide semiconductor film 108b of the transistor 100 and the oxide semiconductor film 108b of the transistor 100B are exposed from the conductive films 112a and 112b in the drawing.​​​​​ The oxide semiconductor film in the exposed area becomes thin. In other words, a part of the oxide semiconductor film has a concave portion and is illustrated. However, one aspect of the present invention is not limited to this, and the oxide semiconductor film in the area exposed from the conductive films 112a and 112b may not have a concave portion. An example of this case is shown in FIGS. 8(A) and 8(B). FIGS. 8(A) and 8(B) are cross-sectional views showing an example of a semiconductor device. Note that FIG. 8(A) shows a structure in which the oxide semiconductor film 108b of the transistor 100 shown above does not have a concave portion, and FIG. 8(B) shows a structure in which the oxide semiconductor film 108b of the transistor 100B shown above does not have a concave portion.

[0165] [Configuration Example of First Transistor (Modification 3)] The transistor 100C is different from the transistor 100 shown above in the positions where the insulating films 114 and 116 are provided and the point where the insulating film 162 is provided. For other configurations, it is the same as the transistor 100 and exhibits the same effects.

[0166] The transistor 100C includes a conductive film 104, insulating films 106 and 107 on the conductive film 104 and an oxide semiconductor film 108 on the insulating film 107, insulating films 114 and 116 on the oxide semiconductor film 108, conductive films 112a and 112b on the insulating film 116, the insulating film 116, and the conductive film 1 112a, insulating film 162 on 112b, an oxide semiconductor film 120a on the insulating film 162, and an insulating film 118 on the insulating film 162 and the oxide semiconductor film 120a.

[0167] Note that the conductive film 112a is electrically connected to the oxide semiconductor film 108 through the opening 173a provided in the insulating films 114 and 116. Also, the conductive film 112b is connected to the insulating film 1 ... 14. Electrically connected to the oxide semiconductor film 108 through the opening 173b provided in 116 is continued.

[0168] As the insulating film 162, it can be formed by the same materials and methods as the insulating films 114 and 116. can be.

[0169] The transistors 100 shown in FIGS. 1(A)(B) and FIGS. 2(A)(B) were so-called channel etch type transistors, while the transistors 100C shown in FIGS. 9(A)(B) and FIGS. 10(A)(B) are so-called channel protection type transistors. Thus, as the first transistor, it can be applied to both channel etch type and channel protection type transistors. Next, a configuration different from the configuration shown in FIGS. 1(A)(B) and FIGS. 2(A)(B) will be described with reference to FIGS. 11 to 13. <1-4. Configuration Example 3 of Semiconductor Device> can be. <1-4. Configuration Example 3 of Semiconductor Device> Next, regarding a configuration different from the configuration shown in FIGS. 1(A)(B) and FIGS. 2(A)(B), it will be described using FIGS. 11 to 13.

[0170] FIG. 11(A) is a top view of the transistors 100 and the transistor 150A, which are semiconductor devices according to an aspect of the present invention, and FIG. 11(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line X1 - X2 shown in FIG. 11(A). Further, FIG. 13(A) corresponds to a cross-sectional view of a cut surface between the dash-dotted line Y3 - Y4 shown in FIG. 11(A). Also, FIG. 12(A) is a top view of the transistors 100 and the transistor 150B, which are semiconductor devices according to an aspect of the present invention, and FIG. 12(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line X1 - X2 shown in FIG. 12(A). Further, FIG. 13(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line Y3 - Y 4 shown in FIG. 12(A). corresponds to a cross-sectional view of a cut surface between the dash-dotted line Y3 - Y4 shown in FIG. 12(A). Also, FIG. 12(A) is a top view of the transistors 100 and the transistor 150B, which are semiconductor devices according to an aspect of the present invention, and FIG. 12(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line X1 - X2 shown in FIG. 12(A). Further, FIG. 13(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line Y3 - Y 4 shown in FIG. 12(A). section of the cut surface between the dash-dotted line X1 - X2 shown in FIG. 12(A). Further, FIG. 13(B) corresponds to a cross-sectional view of a cut surface between the dash-dotted line Y3 - Y 4 shown in FIG. 12(A).

[0171] The semiconductor devices shown in FIGS. 11(A)(B) and 13(A) have a configuration in which a transistor 150A is provided instead of the transistor 150 included in the semiconductor devices shown in FIGS. 1(A)(B) and 2(A)(B). Also, the semiconductor devices shown in FIGS. 12(A)(B) and 13(B) have a configuration in which a transistor 150B is provided instead of the transistor 150 included in the semiconductor devices shown in FIGS. 1(A)(B) and 2(A)(B). Therefore, the description of the transistor 100 described above is omitted, and the details of the transistor 150A and the transistor 150B will be described below.

[0172] Thus, the description of the transistor 100 described above is omitted, and hereinafter, the details of the transistor 150A and the transistor 150B will be described.

[0173] [Configuration Example of Second Transistor (Modification 1)] The transistor 150A shown in FIGS. 11(A)(B) and 13(A) includes a conductive film 104a on a substrate 102, insulating films 106 and 107 on the substrate 102 and the conductive film 104a, insulating films 114 and 116 on the insulating films 106 and 107, and an oxide semiconductor film 1 20b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 that functions as a gate electrode on the insulating film 152, an insulating film 118 on the source region 120b_s and the drain region 120b_ d, and an insulating film 156 is provided on the insulating film 118. Also, openings 171a that reach the source region 120b_s and openings 171b that reach the drain region 120b_d are provided in the insulating films 118 and 156. Further, conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171 a and 171b. d, and an insulating film 118 is provided on the source region 120b_s and the drain region 120b_d. Also, an insulating film 156 is provided on the insulating film 118. Further, openings 171a that reach the source region 120b_s and openings 171b that reach the drain region 120b_d are provided in the insulating films 118 and 156. Further, conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171 a and 171b. a and 171b are provided. Also, conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171 a and 171b.

[0174] The conductive film 104a functions as a back gate electrode of the transistor 150A. Further, openings may be provided in the insulating films 106, 107, 114, 116, and 152, and the conductive film 104a and the conductive film 154 may be electrically connected through the openings.

[0175] In this way, the transistor 150A has a configuration in which the conductive film 104a that functions as a back gate electrode is provided in the transistor 150 shown above. The conductive film 104a is formed by processing the same conductive film as the conductive film 104. Therefore, it is possible to form the conductive film 104a without increasing the manufacturing process.

[0176] [Configuration example of the second transistor (Modification 2)] The transistor 150B shown in FIGS. 12(A)(B) and 13(B) includes insulating films 106 and 107 on the substrate 102, a conductive film 112c on the insulating film 107, insulating films 114 and 116 on the insulating film 107 and the conductive film 112c, an oxide semiconductor film 120b including a channel region 120b_i, a source region 120b_s, and a drain region 120b_d on the insulating film 116, an insulating film 152 on the channel region 120b_i, a conductive film 154 that functions as a gate electrode on the insulating film 152, and insulating films 118 on the source region 120b_s and the drain region 120b_d. Further, an insulating film 156 is provided on the insulating film 118. Further, openings 171a reaching the source region 120b_s and openings 171b reaching the drain region 120b_d are provided in the insulating films 118 and 156. Further, conductive films 158a and 158b are provided on the insulating film 156 so as to cover the openings 171a and 171b.

[0177] ​​​​​​​​​​​​​The conductive film 112c functions as a back gate electrode of the transistor 150B. Also, openings may be provided in the insulating films 114, 116, and 152, and the conductive film 112 c and the conductive film 154 may be electrically connected through the openings.

[0178] Thus, the transistor 150B has a configuration in which a conductive film 112c that functions as a back gate electrode is provided in the transistor 150 shown above. The conductive film 112c is formed by processing the same conductive film as the conductive films 112a and 112b. Therefore, it becomes possible to form the conductive film 112c without increasing the manufacturing process. Note that the transistors according to this embodiment can be freely combined with each of the above structures. <1-5. Method for manufacturing a semiconductor device> Next, a method for manufacturing the transistors 100 and 150, which are semiconductor devices according to an aspect of the present invention, will be described with reference to FIGS. 14 to 22. FIGS. 14 to 22 are cross-sectional views in the channel length direction showing a method for manufacturing a semiconductor device.

[0179] First, a conductive film is formed on the substrate 102, and the conductive film is processed by a lithography process and an etching process to form a conductive film 104 that functions as a first gate electrode. Next, insulating films 106 and 107 that function as a first gate insulating film are formed on the conductive film 104 (see FIG. 14(A)). In this embodiment, a glass substrate is used as the substrate 102, and a tungsten film with a thickness of 100 nm is formed by sputtering as the conductive film 104 that functions as the first gate electrode.

[0180] <1-5. Method for manufacturing a semiconductor device> Next, a method for manufacturing the transistors 100 and 150, which are semiconductor devices according to an aspect of the present invention, will be described with reference to FIGS. 14 to 22. FIGS. 14 to 22 are cross-sectional views in the channel length direction showing a method for manufacturing a semiconductor device. First, a conductive film is formed on the substrate 102, and the conductive film is processed by a lithography process and an etching process to form a conductive film 104 that functions as a first gate electrode. Next, insulating films 106 and 107 that function as a first gate insulating film are formed on the conductive film 104 (see FIG. 14(A)). In this embodiment, a glass substrate is used as the substrate 102, and a tungsten film with a thickness of 100 nm is formed by sputtering as the conductive film 104 that functions as the first gate electrode.

[0181] First, a conductive film is formed on the substrate 102, and the conductive film is processed by a lithography process and an etching process to form a conductive film 104 that functions as a first gate electrode. Next, insulating films 106 and 107 that function as a first gate insulating film are formed on the conductive film 104 (see FIG. 14(A)). In this embodiment, a glass substrate is used as the substrate 102, and a tungsten film with a thickness of 100 nm is formed by sputtering as the conductive film 104 that functions as the first gate electrode. Next, insulating films 106 and 107 that function as a first gate insulating film are formed on the conductive film 104 (see FIG. 14(A)). (See FIG. 14(A).)

[0182] In this embodiment, a glass substrate is used as the substrate 102, and a tungsten film with a thickness of 100 nm is formed by sputtering as the conductive film 104 that functions as the first gate electrode. Next, insulating films 106 and 107 that function as a first gate insulating film are formed on the conductive film 104 (see FIG. 14(A)). It is formed. Also, a silicon nitride film with a thickness of 400 nm is formed as the insulating film 106 by the PECVD method. And a silicon oxynitride film with a thickness of 50 nm is formed as the insulating film 107 by the PECVD method. Form.

[0183] Note that the insulating film 106 can have a laminated structure of silicon nitride films. Specifically, the insulating film 106 can have a three-layer laminated structure of a first silicon nitride film, a second silicon nitride film, and a third silicon nitride film. As an example of the three-layer laminated structure, it can be formed as follows. It can be formed as follows.

[0184] As the first silicon nitride film, for example, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia gas with a flow rate of 100 sccm are used as raw material gases and supplied to the reaction chamber of a PE-CVD device. The pressure in the reaction chamber is controlled to 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply to form a film with a thickness of 50 nm. That's fine.

[0185] As the second silicon nitride film, silane with a flow rate of 200 sccm, nitrogen with a flow rate of 2000 sccm, and ammonia gas with a flow rate of 2000 sccm are used as raw material gases and supplied to the reaction chamber of a PECVD device. The pressure in the reaction chamber is controlled to 100 Pa, and 2000 W of power is supplied using a 27.12 MHz high-frequency power supply to form a film with a thickness of 300 nm. That's fine.

[0186] As the third silicon nitride film, silane with a flow rate of 200 sccm and nitrogen with a flow rate of 5000 sc cm are used as raw material gases and supplied to the reaction chamber of a PECVD device. The pressure in the reaction chamber is 100 Control it to Pa, supply power of 2000 W using a high-frequency power supply of 27.12 MHz, and form it to have a thickness of 50 nm.

[0187] Note that the above first silicon nitride film, second silicon nitride film, and third silicon nitride film The substrate temperature during formation can be 350 °C or lower.

[0188] By forming the insulating film 106 into a three-layer stacked structure of silicon nitride films, for example, when using a conductive film containing copper (Cu) for the conductive film 10 4, the following effects can be achieved.

[0189] The first silicon nitride film can suppress the diffusion of copper (Cu) elements from the conductive film 104. The second silicon nitride film has a function of releasing hydrogen and can improve the breakdown voltage of the insulating film that functions as a gate insulating film. The third silicon nitride film has less hydrogen release from the third silicon nitride film and can suppress the diffusion of hydrogen released from the second silicon nitride film.

[0190] As the insulating film 107, in order to improve the interface characteristics with the oxide semiconductor film 108 (more specifically, the oxide semiconductor film 108b) formed later, it is preferably formed of an insulating film containing oxygen.

[0191] Next, an oxide semiconductor film 108a_0 and an oxide semiconductor film 108b_0 are formed on the insulating film 107 (see FIGS. 14(B) and 15(A)).

[0192] Note that FIG. 14(B) is a cross-sectional schematic view inside the film-forming apparatus when forming the oxide semiconductor film 108a_0 on the insulating film 107. In FIG. 14(B), a sputtering apparatus is used as the film-forming apparatus. Using the device, the target 191 installed inside the sputtering device and the plasma 192 formed below the target 1 91 are schematically shown.

[0193] First, when forming the oxide semiconductor film 108a_0, plasma is discharged in an atmosphere containing the first oxygen gas. At that time, oxygen is added to the insulating film 107 which is the surface to be formed with the oxide semiconductor film 108a_0. Also, when forming the oxide semiconductor film 108a_0, in addition to the first oxygen gas, an inert gas (for example, helium gas, argon gas, xenon gas etc.) may be mixed. As the first oxygen gas, it is sufficient if it is contained at least when forming the oxide semiconductor film 108a_0. The ratio of the first

[0194] oxygen gas in the entire film-forming gas when forming the oxide semiconductor film 108a_0 is more than 0% and 100% or less, preferably 10% or more and 100% or less, more preferably 30% or more and 100% or less. In FIG. 14(B), the oxygen or excess oxygen added to the insulating film 107 is schematically represented by a dashed arrow.

[0195] Note that the substrate temperatures when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 may be the same or different. However, making the substrate temperatures of the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 the same is preferable because it can reduce the manufacturing cost.

[0196] For example, when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0

[0197] For example, when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 ​​The substrate temperature is not less than room temperature and less than 340°C, preferably not less than room temperature and not more than 300°C, more preferably not less than 100°C and not more than 250°C, still more preferably not less than 100°C and not more than 200°C. By heating and forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0, the crystallinity of the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 can be enhanced. On the other hand, when using a large glass substrate (for example, the 6th generation to the 10th generation) as the substrate 102, if the substrate temperature when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 is not less than 150°C and less than 340°C, the substrate 102 may be deformed (distorted or warped). Therefore, when using a large glass substrate, by setting the substrate temperature when forming the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b_0 to be not less than 100°C and less than 150°C, deformation of the glass substrate can be suppressed.

[0198] Also, it is necessary to increase the purity of the sputtering gas. For example, the oxygen gas or argon gas used as the sputtering gas should have a dew point of -40°C or lower, preferably -80°C or lower, more preferably -100°C or lower, still more preferably -120°C or lower. By using a gas with such high purity, it is possible to prevent moisture and the like from being incorporated into the oxide semiconductor film as much as possible. .

[0199] When forming an oxide semiconductor film by sputtering, the chamber in the sputtering apparatus should use an adsorption type vacuum exhaust pump such as a cryopump to remove water and the like that would become impurities to the oxide semiconductor film as much as possible to achieve a high vacuum (5×10 Pa to 1× -7 Pa). 10 -4 ​​It is preferable to evacuate to a Pa level. Or, it is preferable to combine a turbo molecular pump and a cold trap to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the chamber from the exhaust system.

[0200] After the oxide semiconductor film 108a_0 is formed, subsequently, the oxide semiconductor film 108b _0 is formed on the oxide semiconductor film 108a_0. When forming the oxide semiconductor film 108b_ 0, plasma may be discharged in an atmosphere containing a second oxygen gas.

[0201] Note that the ratio of the first oxygen gas when forming the oxide semiconductor film 108a_0 and the ratio of the second oxygen gas when forming the oxide semiconductor film 108b_0 may be the same or different. For example, as the ratio of the second oxygen gas in the entire film-forming gas when forming the oxide semiconductor film 108b_0, it is more than 0% and 100% or less, preferably 10% or more and 100% or less and more preferably 30% or more and 100% or less.

[0202] When forming the oxide semiconductor film 108b_0, when using the second oxygen gas and argon gas it is preferable to make the flow rate of argon gas higher than the flow rate of the second oxygen gas. By increasing the flow rate of argon gas, the oxide semiconductor film 108b_0 can be made into a dense film. Also, to make the oxide semiconductor film 108b_0 into a dense film, the substrate temperature during formation may be increased. As the substrate temperature when forming the oxide semiconductor film 108b_0 it is typically 250°C or lower, preferably 150°C or higher and 190°C or lower. When the oxide semiconductor film 108b_0 is made into a dense film, the gold contained in the conductive films 112a and 112b ​​​​​It is possible to suppress the penetration of the group element into the oxide semiconductor film 108a_0 side.

[0203] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn = 4: 2:4.1 [atomic ratio]) is used, and an oxide semiconductor film 108a_ 0 is formed by sputtering, and then, in a vacuum continuously, an In-Ga-Zn metal oxide target (In: Ga:Zn = 1:1:1.2 [atomic ratio]) is used, and an oxide semiconductor film 108b_ 0 is formed by sputtering. Also, the substrate temperature during the formation of the oxide semiconductor film 108a_0 is set to 170 °C, and the substrate temperature during the formation of the oxide semiconductor film 108b_0 is set to 170 °C. Also, as the film-forming gas during the formation of the oxide semiconductor film 108a_0, oxygen gas with a flow rate of 60 sccm and argon gas with a flow rate of 140 sccm are used. Also, as the film-forming gas during the formation of the oxide semiconductor film 108 b_0, oxygen gas with a flow rate of 100 sccm and argon gas with a flow rate of 100 sc cm are used.

[0204] Next, by processing the oxide semiconductor film 108a_0 and the oxide semiconductor film 108b into a desired shape, island-shaped oxide semiconductor film 108a and island-shaped oxide semiconductor film 108b are formed (see Fig. 15(B)). (See Fig. 15(B).)

[0205] Next, a conductive film is formed on the insulating film 107 and the oxide semiconductor film 108, and by processing the conductive film into a desired shape, conductive films 112a and 112b are formed (see Fig. 16(A)).

[0206] In this embodiment, as the conductive films 112a and 112b, a laminated film in which a tungsten film with a thickness of 50 nm and an aluminum film with a thickness of 400 nm are laminated in order is formed by sputtering. It is formed. In this embodiment, as the conductive films 112a and 112b, a two-layer laminated structure is used, but it is not limited to this. For example, as the conductive films 112a and 112b, a three-layer laminated structure in which a tungsten film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm are laminated in order may be used. The surface (back channel side) of the oxide semiconductor film 108 (more specifically, the oxide semiconductor film 108b) may be cleaned after the formation of the conductive films 112a and 112b. Examples of the cleaning method

[0207] include cleaning using an etchant such as an aqueous phosphoric acid solution. Thereby, impurities (for example, elements contained in the conductive films 112a and 112b) attached to the surface of the oxide semiconductor film 108b can be removed. Note that it is not always necessary to perform such cleaning, and in some cases, cleaning may not be performed. In addition, in either one or both of the step of forming the conductive films 112a and 112b and the above cleaning step, the region of the oxide semiconductor film 108 exposed from the conductive films 112a and 112b may become thinner. Next, an insulating film 114 and an insulating film 116 are formed on the insulating film 107, the oxide semiconductor film 108, and the conductive films 112a and 112b (see FIG. 16(B)). After forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously.

[0208] It is preferable to continuously form the insulating film 116 without exposing it to the atmosphere after forming the insulating film 114. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously. It is preferable to continuously form the insulating film 116 without exposing it to the atmosphere after forming the insulating film 114. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously. It is preferable to continuously form the insulating film 116 without exposing it to the atmosphere after forming the insulating film 114. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously.

[0209] Next, an insulating film 114 and an insulating film 116 are formed on the insulating film 107, the oxide semiconductor film 108, and the conductive films 112a and 112b (see FIG. 16(B)). After forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously.

[0210] After forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously. After forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously. After forming the insulating film 114, it is preferable to continuously form the insulating film 116 without exposing it to the atmosphere. After forming the insulating film 114, without opening to the atmosphere, by adjusting one or more of the flow rate, pressure, high-frequency power, and substrate temperature of the source gas and continuously forming the insulating film 116, the insulating film 116 can be formed continuously. It is possible to reduce the impurity concentration derived from atmospheric components at the interface between the edge film 114 and the insulating film 116, and at the same time, it becomes possible to move the oxygen contained in the insulating films 114 and 116 to the oxide semiconductor film 108, and it becomes possible to reduce the amount of oxygen deficiency in the oxide semiconductor film 108. .

[0211] For example, as the insulating film 114, a silicon oxynitride film can be formed using the PECVD method. In this case, as the source gas, it is preferable to use a depositable gas containing silicon and an oxidizing gas. Typical examples of the depositable gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include nitrous oxide, nitrogen dioxide, etc. Also, the flow rate of the oxidizing gas is made greater than 20 times and less than 100 times, preferably 40 times or more and 80 times or less, the flow rate of the above depositable gas, and the pressure in the processing chamber is made less than 100 Pa, preferably 50 Pa or less. By using the PECVD method, the insulating film 114 becomes an insulating film containing nitrogen and having a small amount of defects. In the present embodiment, as the insulating film 114, the temperature for holding the substrate 102 is set to 220 °C,

[0212] and silane with a flow rate of 50 sccm and nitrous oxide with a flow rate of 2000 sccm are used as the source gases, the pressure in the processing chamber is set to 20 Pa, and the high-frequency power supplied to the parallel plate electrodes is 13.56 M Hz, 100 W (the power density is 1.6×10 W / cm -2 ) 2 . The PECVD method is used to form a silicon oxynitride film. As the insulating film 116, the substrate placed in the evacuated processing chamber of the PECVD apparatus

[0213] is Maintain at a temperature above 180°C and below 350°C, introduce the source gas into the processing chamber, and set the pressure in the processing chamber to be 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less , and supply high-frequency power of 0.17 W / cm 2 or more and 0.5 W / cm 2 or less, more preferably 0.25 W / cm 2 or more and 0.35 W / cm 2 or less to the electrode provided in the processing chamber, under the conditions where a silicon oxide film or a silicon oxynitride film is formed.

[0214] As the film formation conditions for the insulating film 116, by supplying the high-frequency power of the above power density in the reaction chamber of the above pressure, the decomposition efficiency of the source gas in the plasma increases, and the oxygen radicals increase , and the oxidation of the source gas proceeds, so the oxygen content in the insulating film 116 becomes more than the stoichiometric composition. On the other hand, for the film formed at the above temperature, the bonding force between silicon and oxygen is weak, so a part of the oxygen in the film desorbs due to the heat treatment in the subsequent process. As a result, an oxide insulating film containing more oxygen than the oxygen satisfying the stoichiometric composition and having a part of the oxygen desorbed by heating can be formed.

[0215] In addition, in the film formation process of the insulating film 116, the insulating film 114 serves as a protective film for the oxide semiconductor film 108. Therefore, the insulating film 116 can be formed using high-frequency power with a high power density while reducing the damage to the oxide semiconductor film 108.

[0216] In addition, in the film formation conditions of the insulating film 116, by increasing the flow rate of the depositable gas containing silicon with respect to the oxidizing gas, it is possible to reduce the defect amount of the insulating film 116. Representative ESR measurement reveals that the spin density of the signal appearing at g = 2.001, which is derived from the dangling bonds of silicon, is less than 6×10 spins / cm 17 spins / cm 3 and preferably less than 3×10 17 spins / cm 3 and more preferably less than 1.5×10 17 spins / cm 3 . Thus, an oxide insulating film with a small amount of defects can be formed. As a result, the reliability of the transistor 100 can be improved.

[0217]

[0218]

[0219] Preferably, the temperature of the first heat treatment is less than 400°C, more preferably less than 375°C, and even more preferably between 150°C and 350°C. The first heat treatment can be carried out in an atmosphere of nitrogen, oxygen, ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, and more preferably 10 ppb or less), or a noble gas (such as argon or helium). It is preferable that the above nitrogen, oxygen, ultra-dry air, or noble gas does not contain hydrogen, water, etc. For this heat treatment, an electric furnace, RTA (Rapid Thermal Anneal), etc. can be used.​​​​​​​​​​​​​Next, an oxide semiconductor film 120 is formed on the insulating film 116 (see FIGS. 17(A) and 17(B)). .

[0220] Note that FIG. 17(A) is a schematic cross-sectional view inside the film forming apparatus when forming the oxide semiconductor film 120 on the insulating film 116. In FIG. 17(A), a sputtering apparatus is used as the film forming apparatus, and a target 193 installed inside the sputtering apparatus and a plasma 194 formed below the target 193 are schematically shown.

[0221] First, when forming the oxide semiconductor film 120, plasma is discharged in an atmosphere containing a third oxygen gas. At this time, oxygen is added to the insulating film 116 that becomes the surface to be formed of the oxide semiconductor film 120. Further, when forming the oxide semiconductor film 120, in addition to the third oxygen gas, an inert gas (for example, helium gas, argon gas, xenon gas, etc.) may be mixed. For example, argon gas and the third oxygen gas are used, and it is preferable to make the flow rate of the third oxygen gas larger than the flow rate of the argon gas. By increasing the flow rate of the third oxygen gas, oxygen can be suitably added to the insulating film 116. As an example, as the formation conditions of the oxide semiconductor film 120, the ratio of the third oxygen gas in the entire film forming gas may be 50% or more and 100% or less, preferably 80% or more and 100% or less.

[0222] Note that in FIG. 17(A), the oxygen or excess oxygen added to the insulating film 116 is schematically represented by a dashed arrow.

[0223] Further, the substrate temperature when forming the oxide semiconductor film 120 is room temperature or higher and lower than 340°C. ​​​​​​​​​​​​, preferably at room temperature or higher and 300 °C or lower, more preferably 100 °C or higher and 250 °C or lower, and still more preferably 100 °C or higher and 200 °C or lower. By heating and forming the oxide semiconductor film 120, the crystallinity of the oxide semiconductor film 120 can be enhanced. On the other hand, when using a large glass substrate (for example, the 6th generation to the 10th generation) as the substrate 102, if the substrate temperature during the formation of the oxide semiconductor film 120 is 150 °C or higher and less than 340 °C, the substrate 102 may be deformed (warped or bent). Therefore, when using a large glass substrate, the substrate temperature during the formation of the oxide semiconductor film 120 is set to 100 °C or higher and less than 150 °C, so that the deformation of the glass substrate can be suppressed.

[0224] In this embodiment, an In-Ga-Zn metal oxide target (In:Ga:Zn = 4: 2:4.1 [atomic ratio]) is used to form the oxide semiconductor film 120 by sputtering. Also, the substrate temperature during the formation of the oxide semiconductor film 120 is 170 °C. Further, as the film-forming gas during the formation of the oxide semiconductor film 120, oxygen gas with a flow rate of 100 sccm is used.

[0225] As the oxide semiconductor film 120, for example, the oxide semiconductor films described above (for example, In: Ga:Zn = 1:1:1 [atomic ratio], In:Ga:Zn = 1:3:2 [atomic ratio], I n:Ga:Zn = 1:3:4 [atomic ratio], In:Ga:Zn = 1:3:6 [atomic ratio] , In:Ga:Zn = 3:1:2 [atomic ratio], In:Ga:Zn = 4:2:3 [atomic ratio] etc.) may be used.

[0226] Next, by processing the oxide semiconductor film 120 into a desired shape, an island-shaped oxide semiconductor film 1 Form 20a and the island-shaped oxide semiconductor film 120b (see Fig. 18(A)).

[0227] Next, form the insulating film 152_0 and the conductive film 154_0 on the insulating film 116 and the oxide semiconductor films 120a and 120b (see Fig. 18(B)).

[0228] As the insulating film 152_0, an insulating film similar to the insulating films 106, 107 or the insulating films 114, 11 6 shown above may be formed. In this embodiment, as the insulating film 152_0 , a silicon oxynitride film with a thickness of 100 nm is formed using a PECVD apparatus.

[0229] Also, as the conductive film 154_0, a conductive film similar to the conductive film 104 or the conductive films 112a, 1 12b shown above may be formed. In this embodiment, as the conductive film 154_0 , a tantalum nitride film with a thickness of 30 nm and a tungsten film with a thickness of 150 n m are formed using a sputtering apparatus.

[0230] Next, form a mask 195 in a desired region on the conductive film 154_0 (see Fig. 19(A) ).

[0231] As the mask 195, an organic resin film such as a resist may be formed using a spin coater device or the like .

[0232] Next, use the mask 195 to process the conductive film 154_0 and the insulating film 152_0 so that the insulating film 152 that overlaps the oxide semiconductor film 120b and the conductive film 1 54 on the insulating film 152 are formed (see Fig. 19(B)).

[0233] Note that the processing method of the conductive film 154_0 and the insulating film 152_0 is not particularly limited For this purpose, a wet etching method or a dry etching method may be used.

[0234] Next, the insulating film 116, the oxide semiconductor film 120a, the oxide semiconductor film 120b, and the conductive film An insulating film 118 is formed on the insulating film 154. Note that, by forming the insulating film 118, The carrier density of the oxide semiconductor film 120a in contact with the semiconductor substrate 8 becomes high, and the transistor 100 is formed. In addition, by forming the insulating film 118, the oxide semiconductor film 120b and the insulating film 11 8 constitute a source region 120b_s and a drain region 120b_d. As a result, the transistor 150 is formed (see FIG. 20A).

[0235] The insulating film 118 contains either hydrogen or nitrogen, or both. For example, a silicon nitride film is preferably used as the insulating film 118. For example, it can be formed by using a sputtering method or a PECVD method. When the insulating film 118 is formed by the PECVD method, the substrate temperature is set to less than 400° C., preferably less than 375° C. The temperature is preferably less than 180° C. and more preferably 350° C. or higher. In this case, it is preferable to set the substrate temperature in the above-mentioned range since a dense film can be formed. By setting the substrate temperature in the above range when forming the insulating film 118, the insulating films 114 and 1 Therefore, oxygen or excess oxygen in the oxide semiconductor film 106 can be moved to the oxide semiconductor film 108.

[0236] In this embodiment, the insulating film 118 is a silicon oxynitride film having a thickness of 100 nm. is formed using a PECVD apparatus.

[0237] When forming the silicon nitride film as the insulating film 118 by the PECVD method, it is preferable to use a deposition gas containing silicon, nitrogen, and ammonia as the source gases. By using a small amount of ammonia compared to nitrogen, ammonia dissociates in the plasma and active species are generated. These active species break the bonds between silicon and hydrogen contained in the deposition gas containing silicon, and the triple bond of nitrogen. As a result, the bond between silicon and nitrogen is promoted, the bond between silicon and hydrogen is reduced, and a dense silicon nitride film with few defects can be formed. On the other hand, when the amount of ammonia relative to nitrogen is large, the decomposition of the deposition gas containing silicon and nitrogen does not proceed, the silicon and hydrogen bonds remain, and the defects increase, resulting in the formation of a rough silicon nitride film. Therefore, in the source gases, it is preferable that the flow rate ratio of nitrogen to ammonia is 5 times or more and 50 times or less, preferably 10 times or more and 50 times or less. After forming the insulating film 118, a heat treatment equivalent to the first heat treatment described above (hereinafter referred to as the second heat treatment) may be performed. Thus, when forming the oxide semiconductor film 120, after adding oxygen to the insulating film 116, a heat treatment is performed at a temperature of less than 400°C, preferably less than 375°C, more preferably 180°C or more and 350°C or less, so that oxygen or excess oxygen in the insulating film 116 can be moved into the oxide semiconductor film 108 (particularly the oxide semiconductor film 108b)

[0238] to fill the oxygen vacancies in the oxide semiconductor film 108. Next, an insulating film 156 is formed on the insulating film 118 (see Fig. 20(B)). As the insulating film 156, the materials that can be used for the insulating films 114 and 116 described above can be used.

[0239]

[0240]

[0240] can be used. It may be used. In this embodiment, as the insulating film 156, a PECVD apparatus is used, to form a silicon oxynitride film with a thickness of 400 nm.

[0241] Next, openings 171a that reach the source region 120b_s of the oxide semiconductor film 120b and openings 171b that reach the drain region 120b_d of the oxide semiconductor film 120b are formed (see Fig. 21(A)). (See Fig. 21(A).)

[0242] The method for forming the openings 171a and 171b is not particularly limited, and a wet etching method, a dry etching method, or the like may be used.

[0243] Next, a conductive film 158_0 is formed on the insulating film 156 so as to cover the openings 171a and 171b (see Fig. 21(B)). (See Fig. 21(B).)

[0244] As the conductive film 158_0, materials that can be used for the conductive films 104 and 112a, 112b may be used. In this embodiment, as the conductive film 158_0, using a sputtering apparatus, a titanium film with a thickness of 50 nm, an aluminum film with a thickness of 400 nm, and a titanium film with a thickness of 100 nm are formed.

[0245] Next, by processing the conductive film 158_0 into a desired shape, conductive films 158a and 158b are formed (see Fig. 22). (See Fig. 22.)

[0246] In the above steps, the transistor 100 and the transistor 150 shown in Figs. 1(A) and (B) can be formed on the same substrate.

[0247] Note that in the manufacturing process of the transistor 100 and the transistor 150, the substrate temperature ​Less than 400°C, preferably less than 375°C, more preferably 180°C or more and 350°C or less By doing so, even when using a large-area substrate, deformation (distortion or warping) of the substrate can be made extremely small which is preferable.

[0248] <1-6. Configuration example 4 of semiconductor device> Next, regarding the semiconductor device according to one aspect of the present invention, a configuration different from the previously shown configuration will be described hereinafter. Here, the transistor 100 and the transistor 150, and a capacitor element that can be fabricated in the same manufacturing process will be described with reference to FIGS. 23 and 24. Note that FIGS. 23(A )(B)(C) are cross-sectional views for explaining the semiconductor device, and FIGS. 24(A)(B)(C) are cross-sectional views for explaining the semiconductor device. Also, the semiconductor devices shown in FIGS. 23 and 24 are a so-called stacked capacitor element in which a dielectric film is sandwiched between a pair of electrodes.

[0249] The capacitor element shown in FIG. 23(A) includes a conductive film 104b on the substrate 102, and insulating films 106 and 107 on the substrate 102 and the conductive film 104b, a conductive film 112d on the insulating film 107, and insulating films 114, 116, and 118 on the insulating film 107 and the conductive film 112d. The conductive film 1 04b is formed by processing the same conductive film as the conductive film 104. Also, the conductive film 112 d is formed by processing the same conductive film as the conductive films 112a and 112b. The capacitor element shown in FIG. 23(A ) has one of the pair of electrodes as the conductive film 104b and the other as the conductive film 112d . Also, the insulating films 106 and 107 function as the dielectric film of the capacitor element.

[0250] The capacitor element shown in FIG. 23(B) includes a conductive film 104b on the substrate 102, and the substrate 102 and the conductive The insulating films 106, 107, 114, 116 on the electroconductive film 104b, and the oxide semiconductor film 120c on the insulating film 116, and the insulating film 118 on the insulating film 116 and the oxide semiconductor film 120c. It has. The oxide semiconductor film 120c is formed by processing the same oxide semiconductor film as the oxide semiconductor films 120a and 120b. The capacitor element shown in FIG. 23(B) has one of a pair of electrodes as the electroconductive film 104b and the other as the oxide semiconductor film 120c. Also, the insulating films 106, 107, 114, 116 function as the dielectric films of the capacitor element.

[0251] The capacitor element shown in FIG. 23(C) has the insulating films 106, 107 on the substrate 102, the electroconductive film 112e on the insulating film 107, the insulating films 107, 114, 116 on the electroconductive film 112e, the oxide semiconductor film 120c on the insulating film 116, and the insulating film 118 on the insulating film 116 and the oxide semiconductor film 120c. The electroconductive film 112e is formed by processing the same electroconductive film as the electroconductive films 112a and 112b. The capacitor element shown in FIG. 23(C) has one of a pair of electrodes as the electroconductive film 112e and the other as the oxide semiconductor film 120c. Also, the insulating films 114, 116 function as the dielectric films of the capacitor element.

[0252] The capacitor element shown in FIG. 24(A) has the electroconductive film 104b on the substrate 102, the insulating films 106, 107, 114, 116, 118, 156 on the substrate 102 and the electroconductive film 104b, and the electroconductive film 158c on the insulating film 156. The electroconductive film 158c is formed by processing the same electroconductive film as the electroconductive films 158a and 158b. The capacitor element shown in FIG. 24(A) has one of a pair of electrodes as the electroconductive film 104b and the other as the electroconductive film 158c. Also, the insulating films 106, 107, 7, 114, 116, 118, and 156 function as the dielectric film of the capacitor element.

[0253] The capacitor element shown in FIG. 24(B) includes the insulating films 106 and 107 on the substrate 102, the conductive film 112e on the insulating film 10 7, the insulating films 114, 116, 118, 156 on the insulating film 107 and the conductive film 112e, and the conductive film 158c on the insulating film 156. The capacitor element shown in FIG. 24(B) has one of a pair of electrodes as the conductive film 112e and the other as the conductive film 158c. Also, the insulating films 114, 116, 118, 156 function as the dielectric film of the capacitor element.

[0254] The capacitor element shown in FIG. 24(C) includes the insulating films 106, 107, 114, 11 6 on the substrate 102, the oxide semiconductor film 120c on the insulating film 116, and the insulating films 118, 156 on the insulating film 116 and the oxide semiconductor film 1 20c, and the conductive film 158c on the insulating film 156. The capacitor element shown in FIG. 24(C) has one of a pair of electrodes as the oxide semiconductor film 120c and the other as the conductive film 158c. Also, the insulating films 118, 156 function as the dielectric film of the capacitor element to function.

[0255] Note that, as the capacitor element shown in FIGS. 23 and 24, for example, by laminating with a transistor, the occupied area of the capacitor element can be reduced. An example of the case of laminating the capacitor element and the transistor is shown in FIG. 25. Note that FIG. 25 is a diagram for explaining the cross section of the semiconductor device.

[0256] The semiconductor device shown in FIG. 25 has a configuration in which the capacitor element shown in FIG. 23(A) and the transistor 1 50 shown above are laminated. Thus, the transistor according to one aspect of the present invention may be laminated and used with various elements such as a capacitor element. Also, in the capacitor element shown in FIGS. 23 and 24 ​ In the case of the pair of electrodes, the lower electrode is smaller than the upper electrode of the pair of electrodes. However, the lower electrode of the pair of electrodes may be larger than the upper electrode of the pair of electrodes. This may also be configured.

[0257] Note that one embodiment of the present invention has been described in this embodiment. In the following, one embodiment of the present invention will be described. However, the embodiment of the present invention is not limited to these. That is, various inventive aspects are described in this and other embodiments. Therefore, one embodiment of the present invention is not limited to a specific embodiment. For example, one embodiment of the present invention As a result, a channel formation region, a source / drain region, and the like of a transistor are formed using an oxide semiconductor. However, one embodiment of the present invention is not limited to this. Alternatively, various transistors and transistor chips according to one embodiment of the present invention may be used depending on the situation. The channel forming region, or the source / drain region of a transistor, is made of various semiconductors. In some cases, or depending on the situation, various aspects of the present invention may be A transistor, a channel forming region of a transistor, or a source / drain region of a transistor The in-region may be, for example, silicon, germanium, silicon germanium, silicon carbide, etc. gallium arsenide, aluminum gallium arsenide, indium phosphide, gallium nitride, or , organic semiconductor, etc. Alternatively, depending on the situation, various transistors and transistors according to one embodiment of the present invention may be used. A channel formation region, a source / drain region, or the like of a transistor is formed using an oxide semiconductor. It is not necessary to have it.

[0258] Note that the configuration shown in this embodiment can be used in appropriate combination with other embodiments. It can be used.

[0259] (Embodiment 2) In this embodiment, the structure of the oxide semiconductor and the like will be described with reference to FIGS. 26 to 30. It will be described.

[0260] <2-1. Structure of Oxide Semiconductor> Oxide semiconductors can be divided into single-crystalline oxide semiconductors and other non-single-crystalline oxide semiconductors. Examples of non-single-crystalline oxide semiconductors include CAAC-OS (c-axis-aligned d crystalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS (nanocrystalline oxide semicon ductor), pseudo-amorphous oxide semiconductor (a-like OS: amorphous- like oxide semiconductor), and amorphous oxide semiconductor. There are.

[0261] From another perspective, oxide semiconductors can be divided into amorphous oxide semiconductors and other crystalline oxide semiconductors. Examples of crystalline oxide semiconductors include single-crystalline oxide semiconductors, CAAC -OS, polycrystalline oxide semiconductors, and nc-OS.

[0262] An amorphous structure is generally isotropic, has no inhomogeneous structure, has a metastable state where the atomic arrangement is not fixed, has a flexible bond angle, has short-range order but no long-range order, etc. It is said. It is said not to have.

[0263] On the contrary, a stable oxide semiconductor is completely amorphous (completely am It cannot be called an amorphous oxide semiconductor. Also, an anisotropic (for example, having a periodic structure in a minute region) oxide semiconductor cannot be called a complete amorphous oxide semiconductor. On the other hand, although a-like OS is anisotropic, it has a structure with voids (also referred to as voids) that is unstable. In terms of being unstable, a-like OS is physically close to an amorphous oxide semiconductor.

[0264] <2-2.CAAC-OS> First, CAAC-OS will be described.

[0265] CAAC-OS is a type of oxide semiconductor having a plurality of c-axis oriented crystal parts (also referred to as pellets).

[0266] When CAAC-OS is analyzed by X-ray diffraction (XRD), it will be described. For example, for CAAC-OS having a crystal of InGaZnO4 classified into the space group R-3m, when performing a structure analysis by the out-of-plane method, as shown in Fig. 26(A), a peak appears at around a diffraction angle (2θ) of 31°. Since this peak is attributed to the (009) plane of the crystal of InGaZnO4, it can be confirmed that in CAAC-OS, the crystal has c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the plane (also referred to as the formed surface) forming the CAAC-OS film or the upper surface. In addition to the peak around 2θ of 31°, a peak may also appear around 2θ of 36°. The peak around 2θ of 36° is caused by a crystal structure classified into the space group Fd-3m. Therefore, it is preferable that CAAC-OS does not show this peak.

[0267] ​​​​​​​​​​​​On the other hand, when performing structural analysis by the in-plane method in which X-rays are incident on the CAAC-OS from a direction parallel to the surface to be formed a peak appears at around 2θ = 56°. This peak is attributed to the (110) plane of the InGaZnO4 crystal. Then, with 2θ fixed in the vicinity of 56° and while rotating the sample around the normal vector of the sample surface as the axis (φ axis) for analysis (φ scan) as shown in Fig. 26(B), no distinct peak appears. On the other hand, for single-crystal InGa ZnO4, when performing a φ scan with 2θ fixed in the vicinity of 56°, as shown in Fig. 26(C), six peaks attributed to crystal planes equivalent to the (110) plane are observed. Therefore, from the structural analysis using XRD, it can be confirmed that the CAAC-OS has irregular orientations of the a-axis and b-axis.

[0268] Next, the CAAC-OS analyzed by electron diffraction will be described. For example, for the CAAC-OS having a crystal of InGa ZnO4, when an electron beam with a probe diameter of 300 nm is incident parallel to the surface to be formed of the CAAC-OS, a diffraction pattern ( also referred to as a limited-field electron diffraction pattern.) as shown in Fig. 26(D) may appear. This diffraction pattern contains spots due to the (009) plane of the InGaZnO4 crystal. Therefore, also by electron diffraction, it can be seen that the pellets contained in the CAAC-OS have c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface. On the other hand, for the same sample, the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicular to the sample surface is shown in Fig. 26(E ). From Fig. 26(E), a ring-shaped diffraction pattern is confirmed. Therefore, also by electron diffraction using an electron beam with a probe diameter of 300 nm, the pellets contained in the CAAC-OS It can be seen that the a-axis and b-axis of the let have no orientation. In Fig. 26(E), The first ring is considered to be due to the (010) plane and (100) plane of the InGaZnO4 crystal, etc. Also, the second ring in Fig. 26(E) is considered to be due to the (110) plane, etc. It is considered that.

[0269] Also, by a transmission electron microscope (TEM: Transmission Electron M icroscope), when observing a composite image of a bright-field image and a diffraction pattern of CAAC-OS (also referred to as a high-resolution TEM image), a plurality of pellets can be confirmed. On the other hand, even in a high-resolution TEM image, there may be cases where the boundaries between pellets, that is, grain boundaries (also referred to as grain boundaries), cannot be clearly confirmed. Therefore, it can be said that in CAAC C-OS, a decrease in electron mobility due to grain boundaries is unlikely to occur.

[0270] Fig. 27(A) shows a high-resolution TEM image of a cross-section of CAAC-OS observed from a direction substantially parallel to the sample surface. For the observation of the high-resolution TEM image, a spherical aberration correction (Spherical A berration Corrector) function was used. A high-resolution TEM image using the spherical aberration correction function is particularly called a Cs-corrected high-resolution TEM image. The Cs-corrected high-resolution TEM image

[0271] can be observed, for example, by a JEOL JEM-ARM200F atomic-resolution analytical electron microscope manufactured by JEOL Ltd.

[0271] From Fig. 27(A), it is possible to confirm pellets, which are regions where metal atoms are arranged in layers. The size of one pellet is 1 nm or more, or 3 nm or more. Understood. Therefore, the pellets can also be called nanocrystals (nc). Also, CAAC-OS can also be called an oxide semiconductor having CANC (C-Axis Aligned na nocrystals). The pellets reflect the unevenness of the formed surface or the upper surface of CAA C-OS, and are parallel to the formed surface or the upper surface of CAAC-OS.

[0272] Also, FIGS. 27(B) and 27(C) show Cs-corrected high-resolution TEM images of the plane of CAA C-OS observed from a direction substantially perpendicular to the sample surface. FIGS. 27(D) and 27(E) are images obtained by image processing of FIGS. 27(B) and 27(C), respectively. Hereinafter, the method of image processing will be described. First, an FFT image is obtained by performing fast Fourier transform (FFT) processing on FIG. 27(B). Next, a mask process is performed to leave the range between 2.8 nm and 5.0 nm -1 from the origin in the obtained FFT image -1 . Next, an image obtained by performing inverse fast Fourier transform (IFFT) :Inverse Fast Fourier Transform) processing on the masked FFT image is obtained. The image thus obtained is called an FFT filtered image. The FFT filtered image is an image obtained by extracting the periodic components from the Cs-corrected high-resolution TEM image, and shows a lattice array.

[0273] In FIG. 27(D), the disordered portions of the lattice array are indicated by broken lines. The region surrounded by the broken lines is one pellet. And the portions indicated by the broken lines are the connecting parts between the pellets ​​​Yes. Since the dashed line is hexagonal, it can be seen that the pellets are hexagonal. Note that the shape of the pellets is not always regular hexagonal and is often non-regular hexagonal.

[0274] In Fig. 27(E), the area between the region with aligned lattice arrays and the region with another aligned lattice array is indicated by a dotted line, and the direction of the lattice array is indicated by a dashed line. Even in the vicinity of the dotted line, no distinct grain boundaries can be confirmed. When connecting the surrounding lattice points centered on the lattice points near the dotted line, a distorted hexagon can be formed. That is, it can be seen that the formation of grain boundaries is suppressed by distorting the lattice array. This is because CAAC-OS has a non-dense atomic arrangement in the a-b plane direction and the interatomic bond distance changes due to the substitution of metal elements, etc., so that it can tolerate strain.

[0275] As shown above, CAAC-OS has a c-axis orientation and a crystal structure in which a plurality of pellets (nanocrystals) are connected in the a-b plane direction and have strain. Therefore, CAAC-OS can also be referred to as an oxide semiconductor having CAA crystal (c-axis-aligned a-b-plane-anchored crystal).

[0276] CAAC-OS is a highly crystalline oxide semiconductor. The crystallinity of the oxide semiconductor may decrease due to the incorporation of impurities or the generation of defects. Therefore, conversely, CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen deficiencies).

[0277] Note that impurities are elements other than the main components of the oxide semiconductor, such as hydrogen, carbon, silicon, transition metals ​​​​​​​​​​For example, metal elements such as silicon have a higher acidity than metal elements that constitute oxide semiconductors. Elements with strong bonds to oxygen remove oxygen from the oxide semiconductor, which changes the atomic arrangement of the oxide semiconductor. In addition, heavy metals such as iron and nickel, argon, Carbon dioxide and other molecules have a large atomic radius (or molecular radius), so the atomic arrangement of oxide semiconductors This disrupts the structure and reduces the crystallinity.

[0278] When an oxide semiconductor has impurities or defects, its characteristics may change due to light, heat, etc. For example, impurities contained in oxide semiconductors can act as carrier traps or For example, oxygen vacancies in oxide semiconductors can act as carrier traps. In some cases, the ZnO traps hydrogen and becomes a carrier generation source.

[0279] CAAC-OS, which has few impurities and oxygen vacancies, is an oxide semiconductor with low carrier density. There is. Specifically, 8×10 11 pieces / cm 3 Less than 1 x 10 11 / cm 3 less than , and more preferably 1×10 10 pieces / cm 3 Less than 1 x 10 -9 pieces / cm 3 The above Such an oxide semiconductor can be obtained by using a high-purity pure oxide semiconductor. CAAC-OS is a highly pure or substantially intrinsic oxide semiconductor with low impurity concentration. In other words, it can be said that the oxide semiconductor has stable characteristics.

[0280] <2-3.nc-OS> Next, we will explain nc-OS.

[0281] The case of analyzing nc-OS by XRD will be described. For example, when performing structural analysis by the out-of-plane method on nc-OS, no peak indicating orientation appears. That is, the crystal of nc-OS has no

[0282] orientation. Also, for example, when a thin slice of nc-OS having a crystal of InGaZnO4 is made, and an electron beam with a probe diameter of 50 nm is incident parallel to the surface to be formed on a region with a thickness of 34 nm, a ring-shaped diffraction pattern (nanobeam electron diffraction pattern) as shown in Fig. 28(A) is observed. Also, the diffraction pattern (nanobeam electron diffraction pattern) when an electron beam with a probe diameter of 1 nm is incident on the same sample is shown in Fig. 28(B). From Fig. 28(B), a plurality of spots are observed within the ring-

[0283] shaped region. Therefore, the order of nc-OS cannot be confirmed by incident an electron beam with a probe diameter of 50 nm, but the order can be confirmed by incident an electron beam with a probe diameter of 1 nm. Also, when an electron beam with a probe diameter of 1 nm is incident on a region with a thickness of less than 10 nm, as shown in Fig.

[0284] 28(C), an electron diffraction pattern in which spots are arranged in a substantially regular hexagonal shape may be observed. Therefore, it can An area where the crystal part can be confirmed and an area where a distinct crystal part cannot be confirmed are provided. The crystal part included in nc-OS has a size of 1 nm or more and 10 nm or less and particularly often has a size of 1 nm or more and 3 nm or less. Note that an oxide semiconductor having a crystal part size greater than 10 nm and 100 nm or less is called a microcrystalline oxide semiconductor (micr o crystalline oxide semiconductor). In nc-OS, for example, there are cases where grain boundaries cannot be clearly confirmed in a high-resolution TEM image . Note that the nano-crystals may have the same origin as the pellets in CAAC-OS. Therefore, hereinafter, the crystal part of nc-OS may sometimes be referred to as a pellet .

[0285] As described above, nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less). Also, nc-OS does not show regularity in the crystal orientation among different pellets. Therefore, orientation is not seen in the entire film . Therefore, depending on the analysis method, nc-OS may not be distinguishable from a-like OS or an amorphous oxide semiconductor .

[0286] Note that since there is no regularity in the crystal orientation among the pellets (nano-crystals), nc-OS can also be called an oxide semiconductor having RANC (Random Aligned nanocrystals) or an oxide semiconductor having NANC (Non-Aligned nanocrystals) .

[0287] nc-OS is an oxide semiconductor having higher regularity than an amorphous oxide semiconductor. Therefore ​​, nc-OS has a lower density of defect levels than a-like OS and amorphous oxide semiconductors. However, nc-OS does not show regularity in crystal orientation between different pellets. Therefore, nc-OS has a higher density of defect levels than CAAC-OS.

[0288] <2-4.a-like OS> a-like OS is an oxide semiconductor having a structure between nc-OS and amorphous oxide semiconductors.

[0289] Fig. 29 shows a high-resolution cross-sectional TEM image of a-like OS. Here, Fig. 29(A) is the high-resolution cross-sectional TEM image of a-like OS at the start of electron irradiation. Fig. 29( B) is the high-resolution cross-sectional TEM image of a-like OS after irradiation with 4.3×10 8 e - / nm 2 electrons (e - ). From Fig. 29(A) and Fig. 29(B), it can be seen that in a-like OS, stripe-like bright regions extending in the longitudinal direction are observed from the start of electron irradiation. Also, it can be seen that the shape of the bright regions changes after electron irradiation. Note that the bright regions are presumed to be loose or low density regions. Since it has looseness, a-like OS has an unstable structure. Below, to show that a-like OS has an unstable structure compared to CAAC-OS and nc-OS, the change in structure due to electron irradiation is shown.

[0290] As samples, a-like OS, nc-OS, and CAAC-OS are prepared. Any of the samples is In-Ga-Zn oxide.

[0291]

[0292] ​​​​​First, high-resolution cross-sectional TEM images of each sample are obtained. From the high-resolution cross-sectional TEM images, each sample has a crystalline part. All samples have a crystalline part.

[0293] The unit cell of the InGaZnO4 crystal is known to have a structure in which three In-O layers and six Ga-Zn-O layers, a total of nine layers, are stacked in the c-axis direction. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. It is known that the unit cell of the InGaZnO4 crystal has a structure in which three In-O layers and six Ga-Zn-O layers, a total of nine layers, are stacked in the c-axis direction. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. The distance between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also referred to as the d value). From crystal structure analysis, the value is determined to be 0.29 nm. Therefore, hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. Hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. Hereinafter, a portion where the lattice fringe spacing is 0.28 nm or more and 0.30 nm or less is regarded as the crystalline part of InGaZnO4. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal. The lattice fringes correspond to the a-b plane of the InGaZnO4 crystal.

[0294] Fig. 30 is an example of investigating the average size of the crystalline parts (22 to 30 locations) of each sample. Note that the length of the above-described lattice fringes is regarded as the size of the crystalline part. From Fig. 30, it can be seen that the crystalline part of a-like OS increases with the cumulative irradiation dose of electrons related to the acquisition of the TEM image and the like. From Fig. 30, it can be seen that the crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 Fig. 30 is an example of investigating the average size of the crystalline parts (22 to 30 locations) of each sample. Note that the length of the above-described lattice fringes is regarded as the size of the crystalline part. From Fig. 30, it can be seen that the crystalline part of a-like OS increases with the cumulative irradiation dose of electrons related to the acquisition of the TEM image and the like. From Fig. 30, it can be seen that the crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 It can be seen that the crystalline part of a-like OS increases with the cumulative irradiation dose of electrons related to the acquisition of the TEM image and the like. From Fig. 30, it can be seen that the crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 It can be seen that the crystalline part of a-like OS increases with the cumulative irradiation dose of electrons related to the acquisition of the TEM image and the like. From Fig. 30, it can be seen that the crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 The crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 - The crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 8 e - / nm 2 It can be seen that the crystalline part (also referred to as the initial nucleus) having a size of about 1.2 nm at the initial stage of observation by TEM grows to a size of about 1.9 nm when the cumulative irradiation dose of electrons (e) is 4.2×10 e / nm. On the other hand, it can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 It can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 8 e - / nm 2 It can be seen that no change in the size of the crystalline part is observed in the range up to the cumulative irradiation dose of electrons of 4.2×10 e / nm from the start of electron irradiation for nc-OS and CAAC-OS. Fig. 30 Therefore, regardless of the cumulative electron irradiation dose, the sizes of the crystalline parts of nc-OS and CAAC-OS are found to be about 1.3 nm and about 1.8 nm, respectively. Note that the electron beam irradiation and TEM observations were performed using a Hitachi transmission electron microscope H-9000NAR. The electron beam irradiation conditions were an acceleration voltage of 300 kV, a current density of 6.7×10 5 e - / (nm 2 ·s), and the diameter of the irradiation area was 230 nm.

[0295] Thus, in the case of a-like OS, crystal growth in the crystalline part can be observed by electron irradiation. On the other hand, for nc-OS and CAAC-OS, almost no crystal growth due to electron irradiation is observed. That is, it can be seen that a-like OS has a less stable structure compared to nc-OS and CAAC-OS.

[0296] Also, because it has looseness, a-like OS has a lower density structure compared to nc-OS and CAAC-OS. Specifically, the density of a-like OS is 78.6% or more and less than 92.3% of the density of a single crystal with the same composition. Also, the density of nc-OS and the density of CAA C-OS are 92.3% or more and less than 100% of the density of a single crystal with the same composition. An oxide semiconductor with a density of less than 78% of the density of a single crystal is difficult to form a film itself. For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a single crystal InGaZnO4 having a rhombohedral crystal structure is 6.357 g / cm

[0297] 3 Thus, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a-like OS is 5.0 g / cm​​3 Less than 5.9 g / cm 3 Furthermore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] the density of nc-OS and the density of CAAC-OS are less than 6.3 g / cm but not less than 5.9 g / cm 3 Furthermore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio] 3 but not less than 5.9 g / cm

[0298] In addition, when there is no single crystal with the same composition, the density corresponding to the single crystal with the desired composition can be estimated by combining single crystals with different compositions at an arbitrary ratio. The density corresponding to the single crystal with the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible. As described above, the oxide semiconductor has various structures, each having various characteristics. In addition, the oxide semiconductor may be a laminated film having two or more of, for example, an amorphous oxide semiconductor, a-like OS, nc-OS, and CAAC-OS.

[0299]

[0300]

[0301] Note that the configuration shown in this embodiment can be used in appropriate combination with the configuration shown in other embodiments or other examples.

[0302] (Embodiment 3) In this embodiment, a display device having a semiconductor device according to one aspect of the present invention will be described with reference to FIGS. 31 to 35. In this embodiment, a configuration having a liquid crystal element (liquid crystal display device) as a display element of the display device will be specifically described.

[0302] <3-1. Liquid Crystal Display Device> ​The liquid crystal display device 880 shown in Fig. 31(A) includes a pixel portion 871, a gate driver 874, a source driver 876, m scanning lines 877 that are each arranged in parallel or substantially parallel and whose potential is controlled by the gate driver 8 74, and n signal lines 879 that are each arranged in parallel or substantially parallel and whose potential is controlled by the source driver 876. Furthermore, the pixel portion 871 has a plurality of pixels 870 arranged in a matrix. Also, along the signal lines 879, there are common lines 875 that are each arranged in parallel or substantially parallel. There is also a case where the gate driver 874 and the source driver 876 are collectively referred to as a driving circuit portion. Each scanning line 877 is electrically connected to n pixels 870 arranged in any one row among the pixels 870 arranged in m rows and n columns in the pixel portion 871. Also, each signal line 879 is electrically connected to m pixels 870 arranged in any one column among the pixels 870 arranged in m rows and n columns. m and n are both integers of 1 or more. Also, each common

[0303] line 875 is electrically connected to m pixels 870 arranged in any one row among the pixels 870 arranged in m rows and n columns.

[0304]

[0304] Fig. 31(B) shows an example of a circuit configuration that can be used for the pixel 870 of the liquid crystal display device 880 shown in Fig. 31(A).

[0305]

[0306] The pixel 870 shown in Fig. 31(B) has a liquid crystal element 851, a transistor 852, and a capacitor element 855.

[0306] The transistor 852 is the transistor 100 described in the previous Embodiment 1, or the transistor The transistor 150 can be applied. In particular, for the pixel 870, when using the transistor 150 there is no overlap between the gate electrode and the source electrode or the drain electrode, so it is suitable because the parasitic capacitance can be reduced.

[0307] One of the pair of electrodes of the liquid crystal element 851 is connected to the transistor 852, and the potential is appropriately set according to the specifications of the pixel 870. The other of the pair of electrodes of the liquid crystal element 851 is connected to the common line 875, and a common potential (common potential) is applied. The liquid crystal held by the liquid crystal element 851 has its alignment state controlled by the data written into the transistor 852.

[0308] Note that the liquid crystal element 851 is an element that controls the transmission or non - transmission of light by the optical modulation action of the liquid crystal. The optical modulation action of the liquid crystal is controlled by an electric field applied to the liquid crystal (including a horizontal electric field, a vertical electric field, or an oblique electric field). As the liquid crystal used in the liquid crystal element 851, thermotropic liquid crystal, low - molecular liquid crystal, high - molecular liquid crystal, polymer - dispersed liquid crystal , ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit phases such as cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. depending on the conditions.

[0309] Also, when adopting the horizontal electric field method, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the cholesteric liquid crystal is heated, it is the phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition mixed with more than several weight % of a chiral agent is used to improve the temperature range. The formed product is used for the liquid crystal layer. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic. Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent does not require alignment treatment and has little viewing angle dependence. Further, since an alignment film does not need to be provided, rubbing treatment is also unnecessary, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced. As a driving method of the liquid crystal display device 880 having the liquid crystal element 851, TN (Twisted Nematic) mode, IPS (In-Plane-Switching) mode , FFS (Fringe Field Switching) mode, ASM (Axially Symmetric aligned Micro-cell) mode, OCB (Optical Compensated Birefringence) mode, FLCD (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, etc. can be used.

[0310] Also, the liquid crystal display device 880 may be a normally black type liquid crystal display device, for example, a transmissive liquid crystal display device adopting a vertical alignment ( VA) mode. As the vertical alignment mode, MVA (Multi-Domain Vertical Alignment) mode, , PVA (Patterned Vertical Alignment) mode, ASV mode, etc. can be used. (Optical Compensated Birefringence) mode, FLCD (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, etc. can be used. (AntiFerroelectric Liquid Crystal) mode, etc. can be used. It can be used.

[0311] Also, the liquid crystal display device 880 may be a normally black type liquid crystal display device, for example, a transmissive liquid crystal display device adopting a vertical alignment ( VA) mode. As the vertical alignment mode, MVA (Multi-Domain Vertical Alignment) mode, , PVA (Patterned Vertical Alignment) mode, ASV mode, etc. can be used. It can be used.

[0312] <3-2. Transverse Electric Field Mode Liquid Crystal Display Device> First, a liquid crystal display device in a horizontal electric field mode, typically a liquid crystal display device in the FFS mode and the IPS mode, will be described. will be described.

[0313] In the configuration of the pixel 870 shown in FIG. 31(B), one of the source electrode and the drain electrode of the transistor 852 is electrically connected to the signal line 879, and the other is electrically connected to one of the pair of electrodes of the liquid crystal element 851. Further, the gate electrode of the transistor 852 is electrically connected to the scanning line 877. The transistor 852 has a function of controlling the writing of data of the data signal. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851.

[0314] In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851. In the configuration of the pixel 870 shown in FIG. 31(B), one of the pair of electrodes of the capacitor element 855 is connected to the other of the source electrode and the drain electrode of the transistor 852. The other of the pair of electrodes of the capacitor element 855 is electrically connected to the common line 875. The value of the potential of the common line 875 is appropriately set according to the specifications of the pixel 870. The capacitor element 855 has a function as a holding capacitor for holding the written data. In the liquid crystal display device 880 driven by the FFS mode, one of the pair of electrodes of the capacitor element 855 is part or all of one of the pair of electrodes of the liquid crystal element 851, and the other of the pair of electrodes of the capacitor element 855 is part or all of the other of the pair of electrodes of the liquid crystal element 851.

[0315] <3-3. Configuration Example 1 of Element Substrate in Horizontal Electric Field Mode> Next, the specific configuration of the element substrate included in the liquid crystal display device 880 will be described. First, a top view of a plurality of pixels 870a, 870b, 870c included in the liquid crystal display device 880 driven by the FFS mode is shown in FIG. 32(A). Next, the specific configuration of the element substrate included in the liquid crystal display device 880 will be described. First, a top view of a plurality of pixels 870a, 870b, 870c included in the liquid crystal display device 880 driven by the FFS mode is shown in FIG. 32(A). Next, the specific configuration of the element substrate included in the liquid crystal display device 880 will be described. First, a top view of a plurality of pixels 870a, 870b, 870c included in the liquid crystal display device 880 driven by the FFS mode is shown in FIG. 32(A).

[0316] In FIG. 32(A), the conductive film 843 that functions as a scanning line extends in a direction substantially orthogonal to the signal lines (the left - right direction in the figure). The conductive film 848a that functions as a signal line extends in a direction substantially orthogonal to the scanning line (the up - down direction in the figure). Note that the conductive film 843 that functions as a scanning line is electrically connected to the gate driver 874, and the conductive film 848a that functions as a signal line is electrically connected to the source driver 876 (see FIG. 31(A)). The transistor 852 is provided near the intersection of the scanning line and the signal line. The transistor 852 is composed of a conductive film 843 that functions as a gate electrode, a gate insulating film (not shown in FIG. 32(A)), an oxide semiconductor film 820 on which a channel region is formed, and conductive films 848a and 848b that function as source and drain electrodes. Note that the conductive film 843 also functions as a scanning line, and the region overlapping with the oxide semiconductor film 820 functions as the gate electrode of the transistor 852. The conductive film 848a also functions as a signal line, and the region overlapping with the oxide semiconductor film 820 functions as the source electrode or the drain electrode of the transistor 852.

[0317] The conductive film 829 is electrically connected to the oxide semiconductor film 819a that has the function of a pixel electrode. On the oxide semiconductor film 819a, a conductive film 829 is provided via an insulating film (not shown in FIG. 32(A)). Note that the conductive film 829 has the function of a common electrode. The conductive film 829 has a striped region extending in a direction intersecting the signal lines.

[0318]

[0319] ​​​​​​​​​​​​ The region is connected to a region extending in a direction parallel or substantially parallel to the signal line. Therefore, in the plurality of pixels included in the liquid crystal display device 880, the conductive film 829 having a striped region has the same potential in each region. In the plurality of pixels included in the liquid crystal display device 880, the conductive film 829 having a striped region has the same potential in each region. In the plurality of pixels included in the liquid crystal display device 880, the conductive film 829 having a striped region has the same potential in each region.

[0320] The capacitor element 855 is formed in a region where the oxide semiconductor film 819a and the conductive film 829 overlap. The oxide semiconductor film 819a and the conductive film 829 have translucency. That is, the capacitor element 855 has translucency. The capacitor element 855 is formed in a region where the oxide semiconductor film 819a and the conductive film 829 overlap. The oxide semiconductor film 819a and the conductive film 829 have translucency. That is, the capacitor element 855 has translucency. The capacitor element 855 is formed in a region where the oxide semiconductor film 819a and the conductive film 829 overlap. The oxide semiconductor film 819a and the conductive film 829 have translucency. That is, the capacitor element 855 has translucency.

[0321] In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more. In addition, since the capacitor element 855 has translucency, the capacitor element 855 can be formed large (with a large area) in the pixel 870. Therefore, it is possible to increase the aperture ratio, typically to 50% or more, preferably 60% or more, and to obtain a display device with an increased charge amount. For example, in a display device with high resolution, such as a liquid crystal display device, the area of the pixel becomes small and the area of the capacitor element also becomes small. Therefore, in a display device with high resolution, the charge amount accumulated in the capacitor element becomes small. However, since the capacitor element 855 shown in this embodiment has translucency, by providing the capacitor element in the pixel, it is possible to increase the aperture ratio while obtaining a sufficient charge amount in each pixel. Typically, it can be suitably used for a high-resolution display device with a pixel density of 200 ppi or more, further 300 ppi or more, and still further 500 ppi or more.

[0322] In addition, in a liquid crystal display device, the larger the capacitance value of the capacitor element, the longer the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant when an electric field is applied. When displaying a still image, since this period can be lengthened, the number of times of rewriting the image data can be reduced. In addition, in a liquid crystal display device, the larger the capacitance value of the capacitor element, the longer the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant when an electric field is applied. When displaying a still image, since this period can be lengthened, the number of times of rewriting the image data can be reduced. In addition, in a liquid crystal display device, the larger the capacitance value of the capacitor element, the longer the period during which the alignment of the liquid crystal molecules in the liquid crystal element can be kept constant when an electric field is applied. When displaying a still image, since this period can be lengthened, the number of times of rewriting the image data can be reduced. It is possible to reduce the number and reduce the power consumption. Also, in this embodiment due to the structure shown, even in a high-resolution display device, the aperture ratio can be increased, so the light of a light source such as a backlight can be efficiently utilized, and the power consumption of the display device can be reduced can be reduced.

[0323] Next, a cross-sectional view of the dashed-dotted line Q1-R1 in FIG. 32(A) is shown in FIG. 32(B). FIG. The transistor 852 shown in FIG. 32(B) is a top-gate type transistor. Note that the dashed-dotted line Q1-R1 is a cross-sectional view in the channel length direction of the transistor 852.

[0324] The transistor 852 shown in FIGS. 32(A) and (B) is formed on the insulating films 8 06, 807, 814, 816 formed on the substrate 802. Also, the transistor 852 is an oxide semi conductor film 820, an insulating film 832 provided on the oxide semiconductor film 820, and on the insulating film 832 a conductive film 843, and an insulating film 834 on the insulating film 816, the oxide semiconductor film 820, and the conductive film 843. Note that the oxide semiconductor film 820 has a source region 820s, a channel region 820i, and a drain region 820d. Also, an insulating film 83 6 is provided on the insulating film 834, and conductive films 848a, 848b are provided on the insulating film 836. Note that the conductive film 848a is electrically connected to the source region 820s through the openings provided in the insulating films 836, 834. Also, the conductive film 848b is provided in the insulating films 836, 834 and is electrically connected to the drain region 820d through the provided openings.

[0325] Also, the insulating film 832 has a function as a gate insulating film of the transistor 852. Also The conductive film 843 functions as the gate electrode of the transistor 852, and the conductive film 84 8a functions as the source electrode, and the conductive film 848b functions as the drain electrode. It has.

[0326] Note that the substrate 802, the insulating films 806, 807, 814, 816, 832, 834, 836 , the oxide semiconductor film 820, and the conductive films 848a, 848b can be formed by the same materials and methods as the substrate 10 2, the insulating films 106, 107, 114, 116, 152, 118, 156, the oxide semiconductor film 120a, and the conductive films 112a, 112b respectively. It can be.

[0327] Also, an insulating film 838 is provided on the insulating film 836 and the conductive films 848a, 848b. . Also, an oxide semiconductor film 819a is provided on the insulating film 838, and the oxide semiconductor film 81 9a is electrically connected to the conductive film 848b through the opening provided in the insulating film 838. Also, an insulating film 840 is provided on the insulating film 836 and the oxide semiconductor film 819a, and a conductive film 829 is provided on the insulating film 840.

[0328] The insulating film 838 can be formed by the same materials and methods as the insulating film 836. Also, the oxide semiconductor film 819a can be formed by the same materials and methods as the oxide semiconductor film 820. Also, the insulating film 840 can be formed by the same materials and methods as the insulating film 834. As the conductive film 829, it can be formed by the same materials and methods as the oxide semiconductor film 820. It can be.

[0329] The oxide semiconductor film 819a functions as the pixel electrode of the display device, and the conductive film 829 It functions as a common electrode of the display device. Also, a capacitor element 855 is formed by an oxide semiconductor film 819a, an insulating film 840, and a conductive film 829.

[0330] In this embodiment, in the top view, the oxide semiconductor film 819a has a rectangular shape However, it is not limited to this. For example, the oxide semiconductor film 819a may have a comb shape or a shape with a slit.

[0331] <3-4. Liquid Crystal Display Device with Vertical Alignment Mode> Next, the configuration of a pixel having a liquid crystal element operating in the vertical alignment (VA: Vertical Alignment) mode will be described with reference to FIGS. 33 to 35. FIG. 33 is a top view of a pixel included in the liquid crystal display device, and FIG. 34 corresponds to a cross-sectional view of a cut surface taken along the one-dot chain line Z1-Z2 shown in FIG. 33. FIG. 35 is an equivalent circuit diagram of a pixel included in the liquid crystal display device. The VA type is a kind of method for controlling the alignment of liquid crystal molecules in a liquid crystal display panel. In a liquid crystal display device of the VA type, the liquid crystal molecules are oriented in the vertical direction with respect to the panel surface when no voltage is applied. This is a method. diagram.

[0332] The VA type is a kind of method for controlling the alignment of liquid crystal molecules in a liquid crystal display panel. In the VA type liquid crystal display device, the liquid crystal molecules are oriented in the vertical direction with respect to the panel surface when no voltage is applied. This is the orientation method.

[0333] Hereinafter, in particular, a pixel (pixel) is divided into several regions (sub-pixels), and the molecules are respectively designed to be tilted in different directions. This is called multi-domain or multi-domain design. In the following description, a liquid crystal display device considering multi-domain design will be described. This is the description.

[0334] The liquid crystal display device shown in FIGS. 33 and 34 includes a transistor 852a on a substrate 802 and a transistor The insulating film 838 on the transistor 852a, and the conductive film 824 provided on the insulating film 838 and electrically connected to the transistor 852a, and the capacitive element 855a. Note that the conductive film 824 has a function as a pixel electrode. Further, a slit 8 46 is provided in the conductive film 824. The slit 846 has a function of controlling the alignment of liquid crystal.

[0335] Also, a substrate 803 is provided at a position overlapping with the substrate 802, and a liquid crystal layer 881 is provided between the substrate 802 and the substrate 803 . Further, a colored film 866, a conductive film 868, and a structure 869 are provided on the substrate 803. Note that the conductive film 868 has a function as a common electrode . Further, a slit 872 is provided in the conductive film 868. Note that the slit 872 and the structure 869 have a function of controlling the alignment of liquid crystal. Also, alignment films 848 and 878 are provided on the surface in contact with the liquid crystal layer 88 1.

[0336] Note that in the top view shown in FIG. 33, the conductive film 824 functioning as a pixel electrode and the conductive film 868 functioning as a common electrode are represented by solid lines, and the transistor 852a etc. are represented by broken lines .

[0337] Also, a transistor 852b is provided adjacent to the transistor 852a. The transistor 852a and the transistor 852b are both connected to the conductive film 848a. Note that the conductive film 848a has a function as a source electrode in the transistors 852a and 852b, and has a function as a signal line in the liquid crystal display device.

[0338] Note that the transistors 852a and 852b are the transistors described in the previous Embodiment 1 ​​100 or the transistor 150 can be applied. In particular, when using the transistor 150 there is no overlap between the gate electrode and the source electrode or the drain electrode, so it is suitable because parasitic capacitance can be reduced.

[0339] When a voltage is applied to the conductive film 824 having the slit 846, an electric field distortion (oblique electric field) occurs in the vicinity of the slit 846. By alternately or oppositely arranging the slit 846, the structure 869 on the substrate 803 side, and the slit 872, an oblique electric field can be effectively generated to control the liquid crystal alignment. Also, it is preferable that the direction in which the liquid crystal aligns is different between the pixel in which the transistor 8 52a is formed and the pixel in which the transistor 852b is formed. That is, by multi-domain formation, the viewing angle of the liquid crystal display device can be widened.

[0340] Note that either one or both of the structure 869 on the substrate 803 side or the slit 872 on the substrate 803 side may not be formed.

[0341] The transistor 852a is provided on the insulating films 806, 807, 814, 816 formed on the substrate 802. Also, the transistor 852a includes an oxide semiconductor film 820, an insulating film 832 on the oxide semiconductor film 820, a conductive film 843b on the insulating film 832, a conductive film 848a electrically connected to the source region 820s of the oxide semiconductor film 820, and a conductive film 848b electrically connected to the drain region 820d of the oxide semiconductor film 820. Note that the insulating film 832 has a function as a gate insulating film, and the conductive film 843b is a gate electrode. It has a function as [function name]. Also, the conductive film 848a has a function as a source electrode, and the conductive film 848b has a function as a drain electrode. Further, a channel region 820i is formed in the oxide semiconductor film 820 in contact with the insulating film 832.

[0342] Also, insulating films 834 and 836 are provided on the source region 820s, the drain region 820d, and the conductive film 843b, and the conductive films 848a and 848b are electrically connected to the oxide semiconductor film 820 through openings provided in the insulating films 834 and 836.

[0343] The capacitor element 855a includes a conductive film 843a, insulating films 834, 836, and 838 on the conductive film 843a, and a conductive film 824 on the insulating film 838. The conductive film 843a is formed through a process of processing the same conductive film as the conductive film 843b included in the transistor 852a.

[0344] Here, an example of an equivalent circuit of the liquid crystal display device shown in FIGS. 33 and 34 is shown in FIG. 35.

[0345] As shown in FIG. 35, the transistor 852a and the transistor 852b are both electrically connected to a conductive film 843b that functions as a gate wiring and a conductive film 848a that functions as a source wiring. In this case, by making the potentials of the conductive film 843a and the conductive film 843c different, the liquid crystal elements 851a and 851b can be made to operate differently. That is, by controlling the potentials of the conductive film 843a and the conductive film 843c respectively, the viewing angle can be widened. Note that the conductive film 843a and the conductive film 843b have a function as common wiring.

[0346] ​​​​​​​​​​Note that the present embodiment can be appropriately combined with other embodiments described in this specification. It can be.

[0347] (Embodiment 4) In the present embodiment, a semiconductor device according to an aspect of the present invention and a display device having the semiconductor device will be described with reference to FIGS. 36 to 39. In the present embodiment, as a display element of the display device, a configuration having a light-emitting element (particularly an electroluminescence (EL) element) will be specifically described. Referring to FIGS. 36(A), a display device includes a region having pixels of a display element (hereinafter referred to as a pixel portion 502), a circuit portion disposed outside the pixel portion 502 and having a circuit for driving the pixels (hereinafter referred to as a driving circuit portion 504), a circuit portion for correcting the temperature of a transistor or a light-emitting element (hereinafter referred to as a sensor circuit portion 508), a circuit having an element protection function (hereinafter referred to as a protection circuit portion 506), and a terminal portion 507. Note that the sensor circuit portion 508 and the protection circuit portion 506 may not be provided. A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). In FIG. 36(A), the gate driver 504a and the source driver 504b

[0348] <4-1. Description of the display device> The display device shown in FIG. 36(A) includes a region having pixels of a display element (hereinafter referred to as a pixel portion 502), a circuit portion disposed outside the pixel portion 502 and having a circuit for driving the pixels (hereinafter referred to as a driving circuit portion 504), a circuit portion for correcting the temperature of a transistor or a light-emitting element (hereinafter referred to as a sensor circuit portion 508), a circuit having an element protection function (hereinafter referred to as a protection circuit portion 506), and a terminal portion 507. Note that the sensor circuit portion 508 and the protection circuit portion 506 may not be provided. A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding).

[0349] A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). A part or all of the driving circuit portion 504 is preferably formed on the same substrate as the pixel portion 502. This can reduce the number of components and terminals. When a part or all of the driving circuit portion 504 is not formed on the same substrate as the pixel portion 502, a part or all of the driving circuit portion 504 can be mounted by COG or TAB (Tape Automated Bonding). onding) can be mounted.

[0350] In FIG. 36(A), the gate driver 504a and the source driver 504b Although an example of forming the drive circuit section 504 is shown, the configuration is not limited to this example. For example, only the gate driver 504a may be formed, and a separately prepared source driver circuit may be mounted on a substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film). For example, only the gate driver 504a may be formed, and a separately prepared source driver circuit may be mounted on a substrate (for example, a drive circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film). This is also a good configuration.

[0351] The pixel section 502 has a circuit (hereinafter referred to as the pixel circuit 501) for driving a plurality of display elements arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The drive circuit section 504 has drive circuits such as a circuit (hereinafter referred to as the gate driver 504a) that outputs a signal (scanning signal) for selecting a pixel and a circuit (hereinafter referred to as the source driver 504b) that supplies a signal (data signal) for driving the display element of the pixel. The pixel section 502 has a circuit (hereinafter referred to as the pixel circuit 501) for driving a plurality of display elements arranged in X rows (X is a natural number of 2 or more) and Y columns (Y is a natural number of 2 or more). The drive circuit section 504 has drive circuits such as a circuit (hereinafter referred to as the gate driver 504a) that outputs a signal (scanning signal) for selecting a pixel and a circuit (hereinafter referred to as the source driver 504b) that supplies a signal (data signal) for driving the display element of the pixel. The gate driver 504a has a shift register and the like. The gate driver 504a receives a signal for driving the shift register via the terminal section 507 and outputs a signal. For example, the gate driver 504a receives a start pulse signal, a clock signal, etc., and outputs a pulse signal. The gate driver 504a has a function of controlling the potential of wiring (hereinafter referred to as scanning lines GL_1 to GL_X) to which a scanning signal is applied. Note that a plurality of gate drivers 504a may be provided, and the scanning lines GL_1 to GL_X may be divided and controlled by the plurality of gate drivers 504a. Alternatively, the gate driver 504a has a function of being able to supply an initialization signal. However, the present invention is not limited to this, and the gate driver 504a can also supply another signal. For example, as shown in FIG. 36(A), the gate The gate driver 504a has a shift register and ...

Claims

1. having a pixel portion having a plurality of pixels, at least one of the pixels having at least a first transistor and a second transistor, the first transistor having a first gate electrode and a second gate electrode, a display device, a first conductive layer having a function as the first gate electrode of the first transistor, a first oxide semiconductor layer located above the first conductive layer and having a channel formation region of the first transistor, a second oxide semiconductor layer having a channel formation region of the second transistor, a second conductive layer having a region in contact with the upper surface of the first oxide semiconductor layer and having a function as one of a source electrode and a drain electrode of the first transistor, a third conductive layer having a region in contact with the upper surface of the first oxide semiconductor layer and having a function as the other of the source electrode and the drain electrode of the first transistor, a fourth conductive layer having a region in contact with the first conductive layer and having a function as one of a source electrode and a drain electrode of the second transistor, a fifth conductive layer having a function as a gate electrode of the second transistor and having a region extending in a first direction in plan view, a first insulating layer having regions in contact with the upper surface of the second conductive layer, the upper surface of the third conductive layer, and the upper surface of the fourth conductive layer, a sixth conductive layer having a region located above the first insulating layer and in contact with the second conductive layer and having a function as a first pixel electrode, a seventh conductive layer having a function as a second pixel electrode disposed adjacent to the first pixel electrode in a direction intersecting the first direction in plan view, the sixth conductive layer having a region overlapping with the first oxide semiconductor layer, the seventh conductive layer having a region overlapping with the second oxide semiconductor layer, a display device.

2. having a pixel portion having a plurality of pixels, at least one of the pixels having at least a first transistor and a second transistor, the first transistor having a first gate electrode and a second gate electrode, a display device, a first conductive layer having a function as the first gate electrode of the first transistor, A first oxide semiconductor layer having a region located above the first conductive layer and having a channel formation region of the first transistor; A second oxide semiconductor layer having a channel formation region of the second transistor; A second conductive layer having a region in contact with the upper surface of the first oxide semiconductor layer and functioning as one of the source electrode and the drain electrode of the first transistor; A third conductive layer having a region in contact with the upper surface of the first oxide semiconductor layer and functioning as the other of the source electrode and the drain electrode of the first transistor; A fourth conductive layer having a region in contact with the first conductive layer and functioning as one of the source electrode and the drain electrode of the second transistor; A fifth conductive layer functioning as a gate electrode of the second transistor and having a region extending in a first direction in a plan view; A first insulating layer having a region in contact with the upper surface of the second conductive layer, a region in contact with the upper surface of the third conductive layer, and a region in contact with the upper surface of the fourth conductive layer; A sixth conductive layer having a region located above the first insulating layer and a region in contact with the second conductive layer and functioning as a first pixel electrode; A seventh conductive layer functioning as a second pixel electrode disposed adjacent to the first pixel electrode in a direction intersecting the first direction in a plan view; The sixth conductive layer has a region overlapping with the first oxide semiconductor layer; The seventh conductive layer has a region overlapping with the second oxide semiconductor layer; In a plan view, one of the channel length direction ends of the first oxide semiconductor layer has an overlap with the second conductive layer and an overlap with the first conductive layer; In a plan view, the other of the channel length direction ends of the first oxide semiconductor layer has an overlap with the third conductive layer and no overlap with the first conductive layer, a display device.

3. In claim 1 or 2, The second transistor is a single gate transistor, a display device.

Citation Information

Patent Citations

  • Organic light-emitting diode display and method for manufacturing the same

    JP2011258912A

  • Method for manufacturing thin film transistor display plate

    JP2012033877A

  • Display device

    JP2015015459A

  • Transistor, semiconductor element including the same, and method of manufacturing them

    JP2009278115A