Output control circuit and switching regulator

Abstract

To provide a switching regulator capable of suppressing overcurrent even in a case where a switching regulator of a synchronous rectification type, which operates in a PWM fixing mode, is short-circuited.SOLUTION: An output control circuit 140 comprises: a backflow detection circuit 125 including an input terminal connected to a connection point P1 and an output terminal which detects a backflow current toward the connection point P1 in an inductor 129 of which one end is connected to the connection point P1, and outputs a backflow detection signal; and a control circuit 128 which controls ON or OFF of a high-side transistor 126 and a low-side transistor 127 in a case where a signal level of a received signal is a signal level indicating that an error voltage obtained by amplifying a difference between a first reference voltage and a feedback voltage proportional to an output voltage is below a second reference voltage and that the backflow current is detected.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an output control circuit and a switching regulator. [Background technology]

[0002] Generally, a switching regulator receives a power supply voltage and generates a constant output voltage. It is also desirable for an appropriate protection function to operate even when an abnormal state occurs due to a ground fault in which the output terminal is shorted to the ground terminal. A switching regulator equipped with a conventional output control circuit has an overcurrent protection function for a ground fault at the output terminal (see Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2022-146584 Summary of the Invention [Problem to be solved by the invention]

[0004] However, the overcurrent protection function provided in switching regulators with conventional output control circuits has room for improvement in that it cannot suppress overcurrent when the output terminal of a synchronous rectification switching regulator operating in PWM fixed mode is short-circuited to a node with a voltage (e.g., power supply voltage) higher than the desired voltage (hereinafter referred to as "short to power").

[0005] In consideration of the above-mentioned circumstances, an object of the present invention is to provide an output control circuit and a switching regulator that can suppress overcurrent even when the output terminal of a synchronous rectification type switching regulator that operates in a PWM fixed mode, unlike conventional switching regulators, is shorted to power. [Means for solving the problem]

[0006] An output control circuit according to the present invention comprises a backflow detection circuit having an input terminal connected to a connection point between a high-side transistor and a low-side transistor connected in series, and an output terminal that detects a backflow current flowing through an inductor, one end of which is connected to the connection point, in a direction from the other end to one end of the inductor, and outputs a backflow detection signal having a signal level corresponding to the detection result of the backflow current; and a control circuit that controls the on / off of the high-side transistor and the low-side transistor in accordance with the signal level of a received signal, wherein the control circuit controls the high-side transistor and the low-side transistor to be turned off when the signal level of the received signal is at a signal level that indicates that an error voltage obtained by amplifying the difference between a first reference voltage and a feedback voltage proportional to the output voltage is lower than a second reference voltage and that the backflow current has been detected based on the backflow detection signal.

[0007] a control circuit that controls the high-side transistor and the low-side transistor to be turned off when the signal level of a received signal is a signal level indicating that the error voltage is lower than the second reference voltage and that the backflow current has been detected based on the backflow detection signal; a comparator that compares the error voltage with a second reference voltage and outputs a detection signal having a signal level corresponding to the comparison result; a high-side transistor and a low-side transistor connected in series; an inductor having one end connected to a junction point between the high-side transistor and the low-side transistor and the other end connected to an output terminal; an input end connected to the junction point; and an output end that detects a backflow current flowing from the other end of the inductor to the one end and outputs a backflow detection signal having a signal level corresponding to the detection result of the backflow current; and [Effects of the Invention]

[0008] According to the present invention, unlike the prior art, it is possible to suppress an overcurrent even when the output terminal of a synchronous rectification switching regulator operating in a PWM fixed mode is shorted to the power supply. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a circuit diagram illustrating a configuration example of a switching regulator according to an embodiment of the present invention. [Figure 2] 3A and 3B are schematic diagrams illustrating signal waveforms at each node of the switching regulator according to the present embodiment. [Figure 3] FIG. 4 is a partial circuit diagram showing another example of the configuration of the switching regulator according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] An output control circuit and a switching regulator according to an embodiment of the present invention will be described below with reference to the drawings.

[0011] FIG. 1 is a circuit diagram of a switching regulator 100, which is an example of a switching regulator according to an embodiment of the present invention.

[0012] The switching regulator 100 includes a power supply terminal 101, a ground terminal 102, a first reference voltage source 120, a second reference voltage source 133, an error amplifier circuit 121, a comparator 122, a current sense circuit 123, a PWM comparator 124, a backflow detection circuit 125, a control circuit 128, a high-side transistor 126, a low-side transistor 127, an inductor 129, a capacitor 130, resistors 131 and 132, and an output terminal 110. The backflow detection circuit 125 and the control circuit 128 included in the switching regulator 100 configure an output control circuit 140, which is an example of an output control circuit according to an embodiment of the present invention.

[0013] The error amplifier circuit 121 has a non-inverting input terminal (+) connected to one end of the reference voltage source 120, an inverting input terminal (-) connected to the other end of the resistor 131 and one end of the resistor 132, and an output terminal connected to the non-inverting input terminal (+) of the PWM comparator 124 and the inverting input terminal (-) of the comparator 122. The comparator 122 has a non-inverting input terminal (+) connected to one end of the second reference voltage source 133, and an output terminal connected to a first input terminal of the backflow detection circuit 125.

[0014] The PWM comparator 124 has an inverting input terminal (-) connected to the output terminal of the current sense circuit 123, and an output terminal connected to a first input terminal of the control circuit 128. The control circuit 128 has a second input terminal connected to the output terminal of the reverse current detection circuit 125, a first output terminal connected to the gate of the high-side transistor 126, and a second output terminal connected to the gate of the low-side transistor 127. The high-side transistor 126 has a drain connected to the power supply terminal 101, and a source connected to the drain of the low-side transistor 127, the second input terminal of the reverse current detection circuit 125, and one end of the inductor 129. The other end of the inductor 129 is connected to one end of the capacitor 130, the output terminal 110, and one end of the resistor 131.

[0015] The ground terminal 102 is connected to the other end of the first reference voltage source 120 , the other end of the second reference voltage source 133 , the source of the low-side transistor 127 , the other end of the capacitor 130 , and the other end of the resistor 132 .

[0016] Next, the basic operations of the output control circuit 140 and the switching regulator 100 will be described. A predetermined power supply voltage is supplied to the power supply terminal 101. The ground terminal 102 supplies a power supply voltage different from that of the power supply terminal 101, and supplies a power supply voltage of 0V (zero volts) (hereinafter referred to as "ground voltage") as an example of a power supply voltage that serves as a reference for circuit operation.

[0017] The inductor 129 and the capacitor 130 form a smoothing circuit. The smoothing circuit smoothes the pulse voltage generated from the voltage VSW at the connection point P1 between the high-side transistor 126 and the low-side transistor 127 connected in series, and outputs the voltage VOUT from the output terminal 110. The resistors 131 and 132 divide the voltage VOUT at the output terminal 110 to generate a feedback voltage VFB. The error amplifier circuit 121 amplifies the difference between the feedback voltage VFB and the first reference voltage VREF1 output from the first reference voltage source 120, and outputs the error voltage VERR. The current sense circuit 123 converts the drain current of the high-side transistor 126 into a voltage VCS and outputs it. The PWM comparator 124 compares the voltage VCS with the error voltage VERR, and outputs the voltage VPWM.

[0018] The comparator 122 compares the error voltage VERR with the output voltage VREF2 of the second reference voltage, and outputs a voltage VDET including a signal level corresponding to the comparison result. The reverse current detection circuit 125 has an enable / disable switching function, and switches between enable (enabled) and disable (disabled) depending on the level of the voltage VDET input from the first input terminal. For example, when the voltage VDET is at a high level, the reverse current detection circuit 125 is enabled, and when it is at a low level, the reverse current detection circuit 125 is disabled. The reverse current detection circuit 125 also monitors the voltage VSW, detects a reverse current flowing from the other end to one end of the inductor 129, and outputs a voltage VZC as a reverse current detection signal from the output terminal.

[0019] The backflow detection circuit 125 detects the presence or absence of a backflow current based on whether the voltage VSW is higher or lower than a predetermined set voltage, such as 0V. The backflow detection circuit 125 determines that a backflow current is detected when the voltage VSW is higher than 0V, i.e., a positive voltage, and determines that a backflow current is not detected when the voltage VSW is lower than 0V, i.e., a negative voltage. When the backflow detection circuit 125 is not detecting a backflow current, it outputs a voltage VZC of a first level (e.g., a low level) corresponding to a detection result that there is no backflow current. On the other hand, when the backflow detection circuit 125 is detecting a backflow current, it outputs a voltage VZC of a second level (e.g., a high level) corresponding to a detection result that there is a backflow current.

[0020] Voltages VPWM and VZC are supplied as signals to control circuit 128. When supplied voltage VZC is at a low level, control circuit 128 alternately turns on and off high-side transistor 126 and low-side transistor 127 in accordance with supplied voltage VPWM. On the other hand, when a backflow current through inductor 129 is detected and voltage VZC becomes a high level, control circuit 128 turns off both high-side transistor 126 and low-side transistor 127.

[0021] Next, in order to explain the characteristic configurations of the output control circuit 140 and the switching regulator 100, the circuit operation of the switching regulator 100 will be explained, including the case where the output terminal 110 is shorted to the power supply.

[0022] Figure 2 is a timing chart showing the waveforms of the voltages VOUT, VSW, VERR, VREF2, VDET, VZC of the main nodes in the switching regulator 100, and the current IL of the inductor 129. Here, the horizontal axis is time t, and the vertical axis is the relative value of voltage or current. The voltages VOUT, VSW, VERR, VREF2, VDET, and VZC are the voltages at the output terminal 110, the connection point P1, the output terminal of the error amplification circuit 121, the non-inverting input terminal of the comparator 122, the output terminal of the comparator 122, and the output end of the reverse current detection circuit 125, respectively. The current IL as the inductor current has the direction from one end of the inductor 129 to the other end as positive with reference to 0A, and the direction from the other end of the inductor 129 to one end as negative.

[0023] During the period from time t0 to t1 (t0 ≦ t < t1), the switching regulator 100 shows the state when it is operating normally in PWM fixed mode and synchronous rectification. Specifically, a desired voltage is output from the voltage VOUT, and the voltage VSW is a pulse voltage with a constant duty ratio. The current IL increases when the voltage VSW is at a high level (the state at the "H" level in Figure 2. The same applies hereinafter), and decreases when at a low level (the state at the "L" level in Figure 2. The same applies hereinafter). This state indicates the time when the current output from the output terminal 110 is 0A (no load), and the average value of the current IL is 0A (zero ampere). The current IL generates a region where it becomes a negative current below 0A as shown in the figure, indicating that the current IL is flowing in reverse. This reverse current is a common current in the operation of a switching regulator in PWM fixed mode and synchronous rectification.

[0024] The second reference voltage VREF2 is set to a voltage value lower than the error voltage VERR when the average current of the current IL is 0 A. That is, in a normal operating state, the error voltage VERR is higher than the second reference voltage VREF2, and therefore the voltage VDET at the output terminal of the comparator 122 is at a low level. In the output control circuit 140, the reverse current detection circuit 125 is in a disabled state, and the voltage VZC is also at a low level. That is, in a normal operating state, the output control circuit 140 operates so that even if a reverse current occurs, it is not detected. When the voltage VZC is at a low level, the output control circuit 140 allows the control circuit 128 to alternately turn on and off the high-side transistor 126 and the low-side transistor 127 in accordance with the voltage VPWM input thereto (normal state), as described above.

[0025] At time t1 (t=t1), when the same node as the output terminal 110 is shorted to a voltage (e.g., the power supply voltage) higher than the desired voltage, the voltage VOUT rises. When the feedback voltage VFB becomes higher than the first reference voltage VREF1, the error voltage VERR falls. As the error voltage VERR falls, the duty ratios of the voltages VPWM and VSW decrease. The current IL becomes a larger reverse current due to the rise in the voltage VOUT at the other end of the inductor 129.

[0026] At time t2 (t=t2), when the error voltage VERR falls below the second reference voltage VREF2, the voltage VDET goes high and the reverse current detection circuit 125 is enabled. The reverse current detection circuit 125 monitors the voltage VSW and, if it detects that the voltage VSW is a positive voltage, goes high. When the voltage VZC is high, the output control circuit 140 inputs a high-level voltage VZC to the control circuit 128, transitioning the control circuit 128 from the normal state to a forced off state. The control circuit 128 that has transitioned to the forced off state ignores the voltage VPWM and forcibly turns off both the high-side transistor 126 and the low-side transistor 127. After time t2, the reverse flow of the current IL is suppressed and begins to increase.

[0027] According to the output control circuit 140 and the switching regulator 100, a drop in the error voltage VERR is detected and the reverse current detection circuit 125 is enabled. Furthermore, when a reverse current is detected in the inductor 129, both the high-side transistor 126 and the low-side transistor 127 are turned off, thereby making it possible to suppress an overcurrent even when the output terminal of the synchronous rectification switching regulator operating in the PWM fixed mode is shorted to the power supply.

[0028] It should be noted that the present invention is not limited to the above-described embodiments, and in the implementation stage, it can be implemented in various forms other than the above-described examples, and various omissions, additions, substitutions or modifications can be made within the scope that does not deviate from the gist of the invention.

[0029] FIG. 3 is a partial circuit diagram showing a switching regulator 200, which is another example of the configuration of the switching regulator according to this embodiment.

[0030] 3, the output control circuit and switching regulator according to the present embodiment may be configured to include a backflow detection circuit 225 and an AND circuit 201 that do not have the enable / disable switching function, instead of the backflow detection circuit 125 that has the enable / disable switching function. That is, an example of the output control circuit according to the present embodiment may be an output control circuit 240 that has the backflow detection circuit 225 and the AND circuit 201. Furthermore, an example of the switching regulator according to the present embodiment may be a switching regulator 200 that includes the output control circuit 240.

[0031] The AND circuit 201 includes a first input terminal connected to the output terminal of the comparator 122, a second input terminal connected to the output end of the reverse current detection circuit 225, and an output terminal that outputs the logical product of the signals input to the first input terminal and the second input terminal, respectively. For example, when the reverse current detection circuit 225 monitors the voltage VSW and detects that it is a positive voltage, it sets the voltage VZC1 to a high level. The AND circuit 201 outputs a voltage VZC, which is the logical product of the voltage VDET supplied to the first input terminal and the voltage VZC1 supplied to the second input terminal, from the output terminal. Therefore, when a high-level voltage VDET corresponding to the error voltage VERR being lower than the second reference voltage VREF2 and a high-level voltage VZC1 corresponding to the detection of a reverse current are supplied, the AND circuit 201 outputs a high-level voltage VZC from the output terminal, and outputs a low-level voltage VZC in other cases.

[0032] Note that the switching regulator according to the above-described embodiment has a feedback voltage VFB that is a voltage generated by dividing the voltage VOUT, but is not limited thereto. The voltage VOUT may be used as the feedback voltage VFB. That is, the feedback voltage VFB is a voltage proportional to the voltage VOUT that can be set to k (where 0 < k ≤ 1) times the voltage VOUT. In addition, in the above-described reverse current detection circuit 125, the case of 0V has been described as an example of a predetermined set voltage (threshold voltage) for detecting the presence or absence of a reverse current, but the predetermined set voltage is not limited to 0V. For example, it may be set to a negative voltage near 0V such as -20 mV. Furthermore, the predetermined set voltage may be set separately with a voltage difference between the reverse current detection side and the detection release side.

[0033] These embodiments and their modifications are included in the scope and gist of the invention, and are included in the invention described in the claims and its equivalent scope.

Explanation of Reference Numerals

[0034] 100, 200 Switching regulator 120 First reference voltage source 121 Error amplification circuit 133 Second Reference Voltage Source 122 Comparator 123 Current Sense Circuit 124 PWM Comparator 125 Backflow detection circuit 126 High-side transistor 127 Low-side transistor 128 Control Circuit 129 Inductor 130 capacity 131,132 Resistance 140,240 Output control circuit

Claims

1. a backflow detection circuit having an input terminal connected to a connection point of a high-side transistor and a low-side transistor connected in series, and an output terminal that detects a backflow current flowing through an inductor having one end connected to the connection point in a direction from the other end to one end of the inductor, and outputs a backflow detection signal including a signal level corresponding to the detection result of the backflow current; a control circuit that controls the on / off of the high-side transistor and the low-side transistor in accordance with a signal level of a received signal, the control circuit controls the high-side transistor and the low-side transistor to be turned off when the signal level of the received signal is a signal level indicating that an error voltage obtained by amplifying a difference between a first reference voltage and a feedback voltage proportional to the output voltage is lower than a second reference voltage and that the backflow current has been detected based on the backflow detection signal.

2. 2. The output control circuit according to claim 1, wherein the reverse current detection circuit determines that the reverse current has been detected when the voltage at the connection point is a positive voltage.

3. 3. The output control circuit according to claim 1, wherein the second reference voltage is set to a voltage value lower than an error voltage when an average value of the inductor current is 0A.

4. an error amplifier circuit that amplifies a difference between a first reference voltage and a feedback voltage proportional to the output voltage and outputs an error voltage; a comparator that compares the error voltage with a second reference voltage and outputs a detection signal having a signal level corresponding to the comparison result; a high-side transistor and a low-side transistor connected in series; an inductor having one end connected to a connection point between the high-side transistor and the low-side transistor and the other end connected to an output terminal; a reverse current detection circuit having an input terminal connected to the connection point and an output terminal that detects a reverse current flowing in a direction from the other end to the one end of the inductor and outputs a reverse current detection signal including a signal level corresponding to the detection result of the reverse current; a control circuit that controls the high-side transistor and the low-side transistor to be turned off when a signal level of the received signal is a signal level that indicates that the error voltage is lower than the second reference voltage based on the detection signal and that the backflow current is detected based on the backflow detection signal; and A switching regulator comprising:

5. 5. The switching regulator according to claim 4, wherein the reverse current detection circuit determines that the reverse current has been detected when the voltage at the connection point is a positive voltage.

6. 6. The switching regulator according to claim 4, wherein the comparator sets the second reference voltage to a voltage value lower than an error voltage when an average value of the inductor current is 0 A.

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