Method for manufacturing wiring board and wiring board

Abstract

To provide a method for manufacturing a wiring board, which allows a wiring board to be easily obtained with high dimensional accuracy, and the wiring board.SOLUTION: A manufacturing method of a wiring board 3 includes the steps of stacking a semi-cured prepreg (prepreg layer) 73 on the main surface 60a of a dummy core 60, curing the prepreg 73 to form an insulating layer 13, forming non-through holes 33 in the insulating layer 13, placing conductors 23 in the non-through holes 33 formed in the insulating layer 13, and separating the insulating layer 13 from the dummy core 60, and before the prepreg 73 is cured, the thickness of the dummy core 60 is twice or less the thickness of the prepreg 73.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a wiring board and a wiring board. [Background technology]

[0002] High-density modules are used in small devices such as smartphones to achieve high functionality and miniaturization. High-density modules require not only technology for densely mounting electronic components within an area, but also technology for achieving a thin design. To achieve a thin module, the printed wiring boards used in the modules are often made thinner. However, the thinner the wiring board, the lower its mechanical strength in the bending direction, making it difficult to transport and handle the wiring board during, for example, the manufacturing process.

[0003] Patent Documents 1 and 2 disclose a method for manufacturing a wiring board by a coreless method using a dummy core. A dummy core is a support layer that does not constitute the wiring board itself that will become the product. Supporting the wiring board with a dummy core that has a certain degree of mechanical strength makes it easier to transport and handle the wiring board during the manufacturing process. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 5029911 [Patent Document 2] Patent No. 5413693 [Patent Document 3] Patent No. 6361906 [Patent Document 4] Japanese Patent Application Laid-Open No. 2014-135344 Summary of the Invention [Problem to be solved by the invention]

[0005] In the process of manufacturing a wiring board using the coreless method described above, the prepreg and dummy core shrink when the prepreg that forms the wiring board is cured. The degree of shrinkage of the prepreg is greater than the degree of shrinkage of the dummy core, which is already cured, so internal stress is generated in the laminate of the prepreg and dummy core. If the prepreg is separated from the dummy core in this state, the internal stress is released, causing the prepreg to shrink further, which may result in dimensional variation in the final wiring board product.

[0006] Patent Documents 3 and 4 disclose methods for manufacturing wiring boards using a coreless method that does not use a dummy core. These methods can suppress the degree of shrinkage of the prepreg during separation. However, the coreless methods that do not use a dummy core described in Patent Documents 3 and 4 have problems such as the large number of manufacturing steps, which increases costs, and the need for special materials that are difficult to obtain. Therefore, there is a need for a technology that can manufacture wiring boards with high dimensional accuracy using an easier method.

[0007] SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a method for manufacturing a wiring board that can easily produce a wiring board with high dimensional accuracy, and to provide such a wiring board. [Means for solving the problem]

[0008] The method for manufacturing a wiring board of the present invention is [1] "a method for manufacturing a wiring board comprising the steps of: laminating a prepreg layer formed from semi-cured prepreg on a main surface of a support layer; curing the prepreg layer to form an insulating layer; forming blind holes in the insulating layer; arranging conductors in the blind holes formed in the insulating layer; and separating the insulating layer from the support layer, wherein, before curing the prepreg layer, the thickness of the support layer is no more than twice the thickness of the prepreg layer."

[0009] In the wiring board manufacturing method described in [1], the thickness of the support layer is less than twice the thickness of the prepreg layer before the prepreg layer is cured. This reduces the magnitude of internal stress generated in the insulating layer when the prepreg layer is cured to form the insulating layer. This reduces dimensional changes in the insulating layer when the insulating layer is separated from the support layer. The above-mentioned effect is achieved by the simple technique of using a support layer having a thickness less than twice the thickness of the prepreg layer. Therefore, this manufacturing method allows wiring boards to be easily obtained with high dimensional accuracy.

[0010] The wiring board manufacturing method of the present invention may be [2] "the wiring board manufacturing method according to [2], wherein the thickness of the support layer is equal to or less than the thickness of the prepreg layer before the prepreg layer is cured." In this case, when the prepreg layer is cured to form an insulating layer, the magnitude of internal stress generated in the insulating layer can be further reduced. Therefore, dimensional change of the insulating layer can be further suppressed, and a wiring board with higher dimensional accuracy can be manufactured.

[0011] The wiring board manufacturing method of the present invention may be [3] "the wiring board manufacturing method according to [1] or [2], wherein the thickness of the prepreg layer before curing is 20 μm or less and the thickness of the support layer is 40 μm or less." In this case, a wiring board can be easily obtained with high dimensional accuracy.

[0012] The method for manufacturing a wiring board of the present invention may be [4] "the method for manufacturing a wiring board according to any one of [1] to [3], wherein the support layer has a plate-shaped main body portion and a first metal foil laminated on the main body portion and constituting the main surface, and the step of laminating the prepreg layer includes laminating a second metal foil on the first metal foil, laminating the prepreg layer on the support layer via the second metal foil, and when the second metal foil is laminated on the first metal foil, the first metal foil and the second metal foil are in contact with each other without being bonded to each other." In this case, since the first metal foil and the second metal foil are not bonded to each other, it is not necessary to separate the first metal foil and the second metal foil using, for example, a dedicated jig or device when separating the insulating layer from the support layer. This makes it easier to manufacture a wiring board.

[0013] The method for manufacturing a wiring board of the present invention may be [5] "the method for manufacturing a wiring board according to any one of [1] to [4], wherein in the step of laminating the prepreg layer, the prepreg layer is laminated on the support layer formed of a cured material." Even when a support layer formed of a cured material is used in this way, a wiring board can be easily obtained with high dimensional accuracy.

[0014] The method for manufacturing a wiring board of the present invention is [6] "a method for manufacturing a wiring board, comprising the steps of: laminating a prepreg layer formed from semi-cured prepreg on a main surface of a support layer formed from semi-cured prepreg; curing the prepreg layer to form an insulating layer; forming blind holes in the insulating layer; arranging conductors in the blind holes formed in the insulating layer; and separating the insulating layer from the support layer."

[0015] In the wiring board manufacturing method described in [6], the support layer is formed from semi-cured prepreg. As a result, when the prepreg layer is cured to form the insulating layer, the prepreg forming the support layer also hardens and shrinks, thereby reducing the magnitude of internal stress generated in the insulating layer. This reduces dimensional changes in the insulating layer when the insulating layer is separated from the support layer. The above-mentioned effects are achieved by the simple technique of using a support layer formed from semi-cured prepreg. Therefore, this manufacturing method allows wiring boards to be easily obtained with high dimensional accuracy.

[0016] The method for manufacturing a wiring board of the present invention includes the steps of [7] "laminating a second prepreg layer formed from a semi-cured prepreg on a main surface of a first prepreg layer formed from a semi-cured prepreg via a first metal foil and a second metal foil; curing the first prepreg layer to form a first insulating layer; curing the second prepreg layer to form a second insulating layer; forming non-through holes in the first insulating layer and the second insulating layer; and forming the non-through holes in the first insulating layer and the non-through holes in the second insulating layer. and a step of separating the second insulating layer from the first insulating layer, wherein in the laminating step, the second prepreg layer is laminated on the first prepreg layer so that the first metal foil contacts the main surface of the first prepreg layer, the second metal foil contacts the main surface of the second prepreg layer, and the first metal foil and the second metal foil contact each other, and in the separating step, the second metal foil is separated from the first prepreg by separating the second metal foil from the first metal foil.

[0017] In the wiring board manufacturing method described in [7], a second prepreg layer is laminated on a first prepreg layer so that the first metal foil contacts the main surface of the first prepreg layer, the second metal foil contacts the main surface of the second prepreg layer, and the first and second metal foils contact each other. Therefore, a dummy core formed of, for example, a cured material is not disposed between the first and second prepreg layers. Therefore, when the first and second prepreg layers are cured to form an insulating layer, the shrinkage of the first and second prepreg layers is not suppressed by the dummy core. This reduces the magnitude of internal stress generated in the first and second insulating layers, thereby suppressing dimensional changes in the first and second insulating layers when they are separated from each other. The above-mentioned effects are achieved by a simple technique that does not use a dummy core. Therefore, this manufacturing method allows wiring boards to be easily obtained with high dimensional accuracy.

[0018] The wiring board of the present invention is [8] "a wiring board manufactured by the manufacturing method according to any one of [1] to [7], wherein the warpage is 1.0 mm or less." For the reasons described above, this wiring board can be easily obtained with high dimensional accuracy. Furthermore, by having a warpage of 1.0 mm or less, it is possible to suppress the occurrence of problems in the process flow, such as breakage of the wiring board or clogging of the manufacturing line (manufacturing equipment). [Effects of the Invention]

[0019] According to the present invention, it is possible to provide a method for manufacturing a wiring board that can easily produce a wiring board with high dimensional accuracy, and the wiring board. [Brief explanation of the drawings]

[0020] [Figure 1] 1 is a cross-sectional view showing an example of a multilayer wiring board having a wiring board manufactured by the manufacturing method according to the first embodiment. [Figure 2] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 3]2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 4] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 5] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 6] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 7] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 8] 2A to 2C are diagrams illustrating a method for manufacturing a wiring board and a multilayer wiring board according to the first embodiment. [Figure 9] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a second embodiment. [Figure 10] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a second embodiment. [Figure 11] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a second embodiment. [Figure 12] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a third embodiment. [Figure 13] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a third embodiment. [Figure 14] 10A to 10C are diagrams for explaining a method for manufacturing a wiring board according to a third embodiment. [Figure 15] 1 is a table for explaining the effects of the wiring board manufacturing methods according to the first to third embodiments. [Figure 16] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 1. [Figure 17] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 3. [Figure 18] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 3. [Figure 19] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 3. [Figure 20]10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 4. [Figure 21] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 4. [Figure 22] 10A and 10B are diagrams for explaining a method for manufacturing a wiring board according to Comparative Example 4. [Figure 23] 1A and 1B are diagrams for explaining internal stress generated in an insulating layer and dimensional changes in the insulating layer. [Figure 24] 1 is a table showing the relationship between the ratio of the thickness of the dummy core to the thickness of the prepreg and the dimensional change. [Figure 25] 1 is a graph showing the relationship between the ratio of the thickness of the dummy core to the thickness of the prepreg and the average value of the dimensional change. [Figure 26] 1 is a graph showing the relationship between the ratio of the thickness of a dummy core to the thickness of a prepreg and the variation in dimensional change. [Figure 27] 1A and 1B are diagrams for explaining internal stress generated in an insulating layer and dimensional changes in the insulating layer. [Figure 28] 1A and 1B are diagrams for explaining internal stress generated in an insulating layer and dimensional changes in the insulating layer. DETAILED DESCRIPTION OF THE INVENTION

[0021] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or equivalent elements are designated by the same reference numerals, and redundant description will be omitted.

[0022] [Multilayer wiring board configuration] FIG. 1 is a cross-sectional view showing an example of a multilayer wiring board 100 having a wiring board 3 manufactured by the manufacturing method according to the first embodiment. Multilayer wiring board 100 includes stacked wiring boards 1 to 5. In multilayer wiring board 100, wiring board 1, wiring board 2, wiring board 3, wiring board 4, and wiring board 5 are stacked in this order. Hereinafter, the stacking direction of wiring boards 1 to 5 will be referred to as the Z-axis direction, a direction perpendicular to the Z-axis direction will be referred to as the X-axis direction, and a direction perpendicular to the Z-axis and X-axis directions will be referred to as the Y-axis direction. In this example, multilayer wiring board 100 is a six-layer build-up wiring board.

[0023] Multilayer wiring board 100 includes insulating layers 11-15, conductors 21-25, metal foils 41-46, metal layers 51-55, and solder resists 58 and 59. Each wiring board includes an insulating layer, a conductor, a metal foil, and a metal layer disposed on the insulating layer. For example, wiring board 3 includes insulating layer 13, conductor 21, metal foils 43 and 44, and metal layer 53.

[0024] The insulating layers 11 to 15 are formed from cured prepreg. Prepreg is a sheet-like material made by impregnating fibers such as glass cloth or carbon fiber with resin (for example, thermosetting resin such as epoxy, phenol, or polyimide). Prepreg is a flexible semi-cured material that hardens when heat and pressure are applied. For example, when heat and pressure are applied to a prepreg laminated with metal foil, a substrate is formed in which the cured prepreg (insulating layer) and the metal foil are integrated.

[0025] In this example, the plurality of conductors 21 to 25 are made of copper. Each of the insulating layers 11 to 15 has a plurality of non-through holes formed therein that penetrate the corresponding insulating layer in the Z-axis direction. The non-through holes are holes that do not penetrate the entire multilayer wiring board, and are holes formed in some of the insulating layers included in the multilayer wiring board. The insulating layer 11 has a plurality of non-through holes 31 formed therein. The insulating layer 12 has a plurality of non-through holes 32 formed therein. The insulating layer 13 has a plurality of non-through holes 33 formed therein. The insulating layer 14 has a plurality of non-through holes 34 formed therein. The insulating layer 15 has a plurality of non-through holes 35 formed therein.

[0026] A plurality of conductors 21 to 25 are arranged in the corresponding non-through holes. Conductor 21 is arranged in non-through hole 31. Conductor 22 is arranged in non-through hole 32. Conductor 23 is arranged in non-through hole 33. Conductor 24 is arranged in non-through hole 34. Conductor 25 is arranged in non-through hole 35. In this example, each conductor is filled (embedded without gaps) in the corresponding non-through hole. Metal foils 41 to 46 are copper foils. Metal layers 51 to 55 are formed of copper.

[0027] The metal foil 41 and the metal layer 51 are formed on the surface (main surface) of the insulating layer 11 opposite to the insulating layer 12. A portion of the metal layer 51 is formed integrally with the conductor 21. The metal foil 41 and the metal layer 51 constitute a circuit of the first layer (L1 layer) of the multilayer wiring board 100. The metal foil 42 and the metal layer 52 are formed on the surface (main surface) of the insulating layer 12 facing the insulating layer 11. A portion of the metal layer 52 is formed integrally with the conductor 22. The metal foil 42 and the metal layer 52 constitute a circuit of the second layer (L2 layer) of the multilayer wiring board 100. The metal foil 43 and the metal layer 53 are formed on the surface (main surface) of the insulating layer 13 facing the insulating layer 12. A portion of the metal layer 53 is formed integrally with the conductor 23. The metal foil 43 and the metal layer 53 constitute a circuit of the third layer (L3 layer) of the multilayer wiring board 100.

[0028] The metal foil 44 is formed on the surface (main surface) of the insulating layer 13 facing the insulating layer 14. The metal foil 44 constitutes a circuit of the fourth layer (L4 layer) of the multilayer wiring board 100. The metal foil 45 and the metal layer 54 are formed on the surface (main surface) of the insulating layer 14 facing the insulating layer 15. A portion of the metal layer 54 is formed integrally with the conductor 24. The metal foil 45 and the metal layer 54 constitute a circuit of the fifth layer (L5 layer) of the multilayer wiring board 100. The metal foil 46 and the metal layer 55 are formed on the surface (main surface) of the insulating layer 15 opposite the insulating layer 14. A portion of the metal layer 55 is formed integrally with the conductor 25. The metal foil 46 and the metal layer 55 constitute a circuit of the sixth layer (L6 layer) of the multilayer wiring board 100.

[0029] The solder resists 58 and 59 are formed of, for example, an insulating resin material. The solder resist 58 is formed on the surface of the insulating layer 11 opposite the insulating layer 12 so as to cover the metal foil 41 and a portion of the metal layer 51. The solder resist 59 is formed on the surface of the insulating layer 15 opposite the insulating layer 14 so as to cover the metal foil 46 and a portion of the metal layer 55.

[0030] [Method of manufacturing wiring boards and multilayer wiring boards] Next, an example of a method for manufacturing wiring board 3 according to this embodiment and multilayer wiring board 100 including wiring board 3 will be described with reference to Figures 1 to 8. First, a method for manufacturing wiring board 3 using a coreless method will be described. The coreless method is a method for manufacturing a wiring board using a support layer (hereinafter also referred to as a dummy core) that does not constitute the wiring board itself that will become the product.

[0031] First, as shown in part (a) of FIG. 2, a dummy core (support layer) 60, a pair of prepregs (prepreg layers) 73, a pair of metal foils 43, and a pair of metal foils (second metal foils) 44 are prepared. The metal foils 43 are copper foils with carriers. Each of the prepregs 73 is in a semi-cured state and will be cured in a later step to form the insulating layer 13. The size of the metal foil 44 is smaller than the size of the metal foil 43 and the prepreg 73. The size of the metal foil is the area of ​​the metal foil when viewed from the thickness direction of the metal foil (in this example, the area along the X-axis and Y-axis directions). Similarly, the size of the prepreg is the area of ​​the prepreg when viewed from the thickness direction of the prepreg (in this example, the area along the X-axis and Y-axis directions).

[0032] The dummy core 60 is formed from a cured material. The hardness of the dummy core 60 formed from the cured material is higher than the hardness of the prepreg 73 in a semi-cured state. Specifically, the flexural modulus of the dummy core 60 is higher than the flexural modulus of the prepreg 73. As an example, the flexural modulus of the dummy core 60 may be 32 GPa or higher and 34 GPa. In this example, the dummy core 60 has a plate-shaped main body 61 formed from a cured resin material and a metal foil (first metal foil) 62 laminated on the main body 61. The metal foil 62 is copper foil. The surface of the metal foil 62 constitutes the main surface 60a of the dummy core 60. The thickness of the dummy core 60 before curing the prepreg 73 is no more than twice the thickness of the prepreg 73. The thickness of the dummy core 60 may be no more than the thickness of the prepreg 73 (no more than 1.0 times). The thickness of the dummy core 60 may be, for example, 40 μm or less. The thickness of the prepreg 73 may be, for example, 25 μm or less or 20 μm or less.

[0033] Next, as shown in part (b) of FIG. 2 , a dummy core 60, a pair of prepregs 73, a pair of metal foils 43, and a pair of metal foils 44 are laminated to form a laminate 65. Specifically, the metal foil 44, the prepreg 73, and the metal foil 43 are laminated in this order on the main surface 60a of the dummy core 60. That is, the prepreg 73 is laminated on the main surface 60a of the dummy core 60 with the metal foil 44 interposed therebetween. At this time, the metal foils 62 and 44 are in contact with each other without being bonded to each other. As described above, the size of the metal foil 44 is smaller than the size of the prepreg 73. Therefore, the end of the prepreg 73 in the direction perpendicular to the thickness direction is in contact with the metal foil 62 of the dummy core 60. Next, heat and pressure are applied to the laminate 65 (by lamination pressing), melting and hardening the prepreg 73, thereby obtaining the insulating layer 13 (hardened prepreg 73). At this time, the end of the insulating layer 13 is adhered to the dummy core 60. The lamination press integrates the insulating layer 13 and the dummy core 60 into a laminate 65. Hereinafter, the integrated state of the laminate 65 is also referred to as a coreless state. Next, the carrier is removed from the metal foil 43.

[0034] Next, as shown in part (a) of FIG. 3, a plurality of non-through holes 33 are formed in the insulating layer 13. The non-through holes 33 may be formed using, for example, a CO2 laser. Next, as shown in part (b) of FIG. 3, a plurality of conductors 23 are disposed in the plurality of non-through holes 33. Specifically, first, smears (residues) inside the non-through holes 33 (the inner surfaces of the non-through holes 33 and the surfaces of the metal foil 44 exposed from the non-through holes 33) are removed by a desmearing process. Next, base plating is applied to the inner surfaces of the non-through holes 33 and the surfaces of the metal foil 44 exposed from the non-through holes 33. The base plating may be electroless copper plating. Next, the non-through holes 33 are filled with the conductors 23 by a filling plating process. In this example, the conductors 23 are formed by a copper plating process. At this time, a metal layer 53 is also formed on the metal foil 43 by the copper plating process.

[0035] Next, as shown in part (a) of FIG. 4, the end of the laminate 65 is cut and removed to separate the insulating layer 13 from the dummy core 60. Specifically, the portion of the insulating layer 13 that is in contact with the dummy core 60 is removed. As described above, the metal foil 62 and the metal foil 44 are not adhered to each other, so the metal foil 62 and the metal foil 44 are naturally separated from each other (separated without the need for a dedicated jig or device). Next, as shown in part (b) of FIG. 4, a circuit is formed on the insulating layer 13 by removing parts of the metal foils 43, 44 and the metal layer 53. This completes the wiring board 3.

[0036] Next, a method for manufacturing a multilayer wiring board 100 including a wiring board 3 will be described. As shown in part (a) of FIG. 5, semi-cured prepregs 72 and 74 are laminated in the Z-axis direction on insulating layer 13. These layers are arranged so that prepreg 72, insulating layer 13, and prepreg 74 are laminated in this order in the Z-axis direction. Metal foil 42 is formed on the surface of prepreg 72 opposite insulating layer 13, and metal foil 45 is formed on the surface of prepreg 74 opposite insulating layer 13. Next, heat and pressure are applied to the laminate including prepreg 72, insulating layer 13, and prepreg 74 (by lamination pressing), thereby melting and curing prepregs 72 and 74 to obtain insulating layers 12 and 14 (cured prepregs 72 and 74).

[0037] 5(b), a plurality of non-through holes 32 are formed in the insulating layer 12, and a plurality of non-through holes 34 are formed in the insulating layer 14. The non-through holes 32, 34 may be formed using, for example, a CO laser. In this example, the plurality of non-through holes 32, 34 are formed so that the plurality of non-through holes 32, 34 overlap the plurality of non-through holes 33 when viewed from the Z direction.

[0038] Next, as shown in part (a) of FIG. 6 , a plurality of conductors 22 are disposed in the plurality of non-through holes 32, respectively. Specifically, first, smears (residues) inside the non-through holes 32 (the inner surfaces of the non-through holes 32 and the surface of the metal layer 53 exposed from the non-through holes 32) are removed by a desmearing process. Next, base plating is applied to the inner surfaces of the non-through holes 32 and the surface of the metal layer 53 exposed from the non-through holes 32. The base plating may be electroless copper plating. Next, the non-through holes 32 are filled with the conductors 22 by a filling plating process. In this example, the conductors 22 are formed by a copper plating process. At this time, the metal layer 52 is also formed on the metal foil 42 by the copper plating process.

[0039] Additionally, a plurality of conductors 24 are disposed in the plurality of non-through holes 34, respectively. Specifically, first, smears (residues) inside the non-through holes 34 (the inner surfaces of the non-through holes 34 and the surfaces of the metal foil 44 exposed from the non-through holes 34) are removed by a desmearing process. Next, base plating is applied to the inner surfaces of the non-through holes 34 and the surfaces of the metal foil 44 exposed from the non-through holes 34. The base plating may be electroless copper plating. Next, the non-through holes 34 are filled with the conductors 24 by a filling plating process. In this example, the conductors 24 are formed by a copper plating process. At this time, a metal layer 54 is also formed on the metal foil 45 by the copper plating process. Next, as shown in part (b) of FIG. 6 , a circuit is formed on the insulating layer 12 by removing portions of the metal foil 42 and the metal layer 52. Furthermore, a circuit is formed on the insulating layer 14 by removing portions of the metal foil 45 and the metal layer 54.

[0040] Next, as shown in part (a) of FIG. 7 , semi-cured prepreg 71 is laminated in the Z-axis direction on insulating layer 12, and semi-cured prepreg 75 is laminated in the Z-axis direction on insulating layer 14. These layers are arranged so that prepreg 71, insulating layer 12, insulating layer 13, insulating layer 14, and prepreg 75 are laminated in this order in the Z-axis direction. Metal foil 41 is formed on the surface of prepreg 71 opposite insulating layer 12, and metal foil 46 is formed on the surface of prepreg 75 opposite insulating layer 14. Next, heat and pressure are applied to the laminate including prepreg 71, insulating layer 12, insulating layer 13, insulating layer 14, and prepreg 75 (by lamination pressing), thereby melting and curing prepregs 71 and 75 to obtain insulating layers 11 and 15 (cured prepregs 71 and 75).

[0041] 7(b), a plurality of non-through holes 31 are formed in the insulating layer 11, and a plurality of non-through holes 35 are formed in the insulating layer 15. The non-through holes 31, 35 may be formed using, for example, a CO laser. In this example, the plurality of non-through holes 31, 35 are formed so that the plurality of non-through holes 31, 35 overlap the plurality of non-through holes 33 when viewed from the Z direction.

[0042] Next, as shown in part (a) of FIG. 8 , a plurality of conductors 21 are disposed in the plurality of non-through holes 31, respectively. Specifically, first, smears (residues) inside the non-through holes 31 (the inner surfaces of the non-through holes 31 and the surface of the metal layer 52 exposed from the non-through holes 31) are removed by a desmearing process. Next, base plating is applied to the inner surfaces of the non-through holes 31 and the surface of the metal layer 52 exposed from the non-through holes 31. The base plating may be electroless copper plating. Next, the non-through holes 31 are filled with the conductors 21 by a filling plating process. In this example, the conductors 21 are formed by a copper plating process. At this time, the metal layer 51 is also formed on the metal foil 41 by the copper plating process.

[0043] Additionally, a plurality of conductors 25 are disposed in the plurality of non-through holes 35, respectively. Specifically, first, smears (residues) inside the non-through holes 35 (the inner surfaces of the non-through holes 35 and the surface of the metal layer 54 exposed through the non-through holes 35) are removed by a desmearing process. Next, base plating is applied to the inner surfaces of the non-through holes 35 and the surface of the metal layer 54 exposed through the non-through holes 35. The base plating may be electroless copper plating. Next, the non-through holes 35 are filled with the conductors 25 through a filling plating process. In this example, the conductors 25 are formed by a copper plating process. At this time, a metal layer 55 is also formed on the metal foil 46 through the copper plating process. Next, as shown in part (b) of FIG. 8 , a circuit is formed on the insulating layer 11 by removing portions of the metal foil 41 and the metal layer 51. Furthermore, a circuit is formed on the insulating layer 15 by removing portions of the metal foil 46 and the metal layer 55. Next, solder resists 58 and 59 are formed. In this example, solder resist 58 is formed on the surface of insulating layer 11 opposite insulating layer 12 so as to cover part of metal foil 41 and metal layer 51. Solder resist 59 is formed on the surface of insulating layer 15 opposite insulating layer 14 so as to cover part of metal foil 46 and metal layer 55. In this way, multilayer wiring board 100 is obtained.

[0044] The warpage (warpage amount) of the wiring board 3 obtained by the above-described manufacturing method may be, for example, 1.0 mm or less, or 0.2 mm or less. If the warpage of the wiring board exceeds 3 mm, problems in the process flow, such as breakage of the wiring board or clogging of the manufacturing line (manufacturing equipment), may occur. Furthermore, the warpage (warpage amount) of the multilayer wiring board 100 including the wiring board 3 may be 0.2 mm or less. When the multilayer wiring board 100 has a rectangular plate shape, the warpage of the multilayer wiring board 100 may be 1% or less of the diagonal of the multilayer wiring board 100 in a planar view. For example, when the length of the multilayer wiring board 100 along the X-axis direction and the length along the Y-axis direction are each 90 mm, the diagonal length is 127.3 mm. In this case, the warpage of the multilayer wiring board 100 may be approximately 1.3 mm or less. If the warpage of the multilayer wiring board exceeds 1.3 mm, problems may occur during component mounting. The warpage of wiring board 3 and multilayer wiring board 100 is measured, for example, by the method described in JIS C5012, Section 6.3.9 (1).

[0045] In the method for manufacturing wiring board 3 according to this embodiment, the thickness of dummy core 60 is less than twice the thickness of prepreg 73 before prepreg 73 is cured. This reduces the magnitude of internal stress generated in insulating layer 13 when prepreg 73 is cured to form insulating layer 13. This reduces dimensional change in insulating layer 13 when insulating layer 13 is separated from dummy core 60. The above-described effect is achieved by the simple technique of using dummy core 60 having a thickness less than twice the thickness of prepreg 73. Therefore, according to the manufacturing method of this embodiment, wiring board 3 can be easily obtained with high dimensional accuracy.

[0046] Before prepreg 73 is cured, the thickness of dummy core 60 may be equal to or less than the thickness of prepreg 73. In this case, when prepreg 73 is cured to form insulating layer 13, the magnitude of internal stress generated in insulating layer 13 can be further reduced. Therefore, dimensional changes in insulating layer 13 can be further suppressed, and wiring board 3 with higher dimensional accuracy can be manufactured.

[0047] Before prepreg 73 is cured, the thickness of prepreg 73 may be 20 μm or less, and the thickness of dummy core 60 may be 40 μm or less. In this case, wiring board 3 can be easily obtained with high dimensional accuracy.

[0048] The dummy core 60 has a plate-shaped main body 61 and a metal foil 62 laminated on the main body 61 to form the main surface 60a of the dummy core 60. In the process of laminating the prepreg 73, the metal foil 44 is laminated on the metal foil 62, and the prepreg 73 is laminated on the dummy core 60 via the metal foil 44. When the metal foil 44 is laminated on the metal foil 62, the metal foil 62 and the metal foil 44 are in contact with each other without being bonded to each other. As a result, the metal foil 62 and the metal foil 44 are not bonded to each other, and therefore, when separating the insulating layer 13 from the dummy core 60, it is not necessary to separate the metal foil 62 and the metal foil 44 using, for example, a dedicated jig or device. This makes it easier to manufacture the wiring board 3.

[0049] In the step of laminating prepreg 73, prepreg 73 is laminated on dummy core 60 formed from a cured material. Even when dummy core 60 formed from a cured material is used, wiring board 3 can be easily obtained with high dimensional accuracy according to the manufacturing method of this embodiment.

[0050] The warpage of wiring board 3 may be 1.0 mm or less, which can prevent problems in the process flow, such as breakage of wiring board 3 or clogging of the manufacturing line (manufacturing equipment).

[0051] [Second embodiment] Next, a method for manufacturing wiring board 3 according to the second embodiment will be described. In the following description, differences from the manufacturing method according to the first embodiment will be mainly described, and a description of common points may be omitted. The manufacturing method according to the second embodiment differs from the manufacturing method according to the first embodiment in that wiring board 3 is manufactured without using dummy cores. Wiring board 3 manufactured by the manufacturing method according to the second embodiment has the same configuration as wiring board 3 manufactured by the manufacturing method according to the first embodiment.

[0052] First, as shown in part (a) of FIG. 9 , a prepreg (first prepreg layer) 173, a prepreg (second prepreg layer) 273, a pair of metal foils 43, and a pair of metal foils 44 are prepared. The metal foil 43 is a copper foil with a carrier. Each of the prepregs 173 and 273 is in a semi-cured state and is cured in a later process to form the insulating layer 13. The pair of metal foils 43 will be described separately as a metal foil 143 and a metal foil 243, and the pair of metal foils 44 will be described separately as a metal foil (first metal foil) 144 and a metal foil (second metal foil) 244. The size of the metal foils 144 and 244 is smaller than the size of the metal foils 143 and 243 and the prepregs 173 and 273.

[0053] Next, as shown in part (b) of FIG. 9 , prepregs 173 and 273, a pair of metal foils 43, and a pair of metal foils 44 are laminated together to form a laminate 165. Specifically, the prepreg 273 is laminated on the main surface 173a of the prepreg 173 with the metal foils 144 and 244 interposed therebetween. The metal foil 144 is in contact with the main surface 173a of the prepreg 173, and the metal foil 143 is in contact with the main surface 173b of the prepreg 173 opposite the main surface 173a. The metal foil 244 is in contact with the main surface 273a of the prepreg 273, and the metal foil 243 is in contact with the main surface 273b of the prepreg 273 opposite the main surface 273a. That is, the metal foil 143, prepreg 173, metal foil 144, metal foil 244, prepreg 273, and metal foil 243 are laminated in this order. The metal foils 144 and 244 are in contact with each other without being bonded to each other. As described above, the size of the metal foils 144 and 244 is smaller than the size of the prepregs 173 and 273. Therefore, the end of the prepreg 173 in the direction perpendicular to the thickness direction is in contact with the end of the prepreg 273 in the direction perpendicular to the thickness direction.

[0054] Next, heat and pressure are applied to the laminate 165 (by lamination pressing), melting and hardening the prepregs 173 and 273 to obtain a pair of insulating layers 13 (hardened prepregs 173 and 273). Of the pair of insulating layers 13, the insulating layer 13 formed from the prepreg 173 may be referred to as the insulating layer (first insulating layer) 113, and the insulating layer 13 formed from the prepreg 273 may be referred to as the insulating layer (second insulating layer) 213. The end of the insulating layer 113 is bonded to the end of the insulating layer 213. The lamination pressing integrates the laminate 165 including the insulating layer 13. The integrated state of the laminate 165 is also referred to as a coreless state. Next, the carrier is removed from the metal foil 43.

[0055] Next, as shown in part (a) of FIG. 10 , a plurality of non-through holes 33 are formed in the insulating layer 13. The non-through holes 33 may be formed using, for example, a CO laser. Next, as shown in part (b) of FIG. 10 , a plurality of conductors 23 are disposed in the plurality of non-through holes 33. Specifically, first, smears (residues) inside the non-through holes 33 (the inner surfaces of the non-through holes 33 and the surfaces of the metal foil 44 exposed from the non-through holes 33) are removed by a desmear process. Next, base plating is applied to the inner surfaces of the non-through holes 33 and the surfaces of the metal foil 44 exposed from the non-through holes 33. The base plating may be electroless copper plating. Next, the non-through holes 33 are filled with the conductors 23 by a filling plating process. In this example, the conductors 23 are formed by a copper plating process. At this time, a metal layer 53 is also formed on the metal foil 44 by the copper plating process.

[0056] Next, as shown in part (a) of FIG. 11 , the end of the laminate 165 is cut and removed to separate the insulating layer 213 from the insulating layer 113. Specifically, after removing the contact portion of the insulating layer 113 with the insulating layer 213 and the contact portion of the insulating layer 213 with the insulating layer 113, the metal foil 244 is separated from the metal foil 144, thereby separating the insulating layer 213 from the insulating layer 113. As described above, the metal foils 144 and 244 are not bonded to each other, so the metal foils 144 and 244 naturally separate from each other (separation without using a dedicated jig or device, etc.). Next, as shown in part (b) of FIG. 11 , a circuit is formed on the insulating layer 13 by removing parts of the metal foils 43, 44 and the metal layer 53. This results in a wiring board 3. A multilayer wiring board 100 can be obtained using the wiring board 3 manufactured by the manufacturing method according to the second embodiment. The method for manufacturing the multilayer wiring board 100 is the same as the manufacturing method described in the first embodiment.

[0057] In the method for manufacturing wiring board 3 according to this embodiment, prepreg 273 is laminated on prepreg 173 so that metal foil 144 contacts main surface 173a of prepreg 173, metal foil 244 contacts main surface 273a of prepreg 273, and metal foils 144 and 244 contact each other. Therefore, no dummy cores formed of, for example, a cured material are disposed between prepreg 173 and prepreg 273. Therefore, when prepreg 173 and prepreg 273 are cured to form insulating layer 13, shrinkage of prepreg 173 and prepreg 273 is not suppressed by the dummy cores. This reduces the magnitude of internal stress generated in insulating layer 113 and insulating layer 213, thereby suppressing dimensional changes in insulating layer 113 and insulating layer 213 when insulating layer 113 and insulating layer 213 are separated from each other. The above-described effects are achieved by a simple technique that does not use dummy cores. Therefore, according to the manufacturing method of this embodiment, wiring board 3 can be obtained easily with high dimensional accuracy.

[0058] [Third embodiment] Next, a method for manufacturing wiring board 3 according to the third embodiment will be described. In the following description, differences from the manufacturing method according to the first embodiment will be mainly described, and explanation of common points may be omitted. The manufacturing method according to the third embodiment differs from the manufacturing method according to the first embodiment in that semi-cured prepregs are used as dummy cores. The wiring board 3 manufactured by the manufacturing method according to the third embodiment has the same configuration as the wiring board 3 manufactured by the manufacturing method according to the first embodiment.

[0059] First, as shown in part (a) of FIG. 12 , a dummy core (support layer) 160, a pair of prepregs (prepreg layers) 73, a pair of metal foils 43, a pair of metal foils 44, and a pair of metal foils 161 are prepared. The metal foil 43 is a copper foil with a carrier. The metal foil 161 is a copper foil. The dummy core 160 is formed from a semi-cured prepreg. The prepreg forming the dummy core 160 and the prepreg 73 will be cured in a later process. The size of the metal foils 44 and 161 is smaller than the size of the metal foil 43 and the prepreg 73.

[0060] Next, as shown in part (b) of FIG. 12 , a dummy core 160, a pair of prepregs 73, a pair of metal foils 43, a pair of metal foils 44, and a pair of metal foils 161 are laminated to form a laminate 265. Specifically, the metal foil 161, the metal foil 44, the prepreg 73, and the metal foil 43 are laminated in this order on the main surface 160a of the dummy core 160. That is, the prepreg 73 is laminated on the main surface 160a of the dummy core 160 via the metal foils 44 and 161. At this time, the metal foils 161 and 44 are in contact with each other without being bonded to each other. As described above, the size of the metal foils 44 and 161 is smaller than the size of the prepreg 73. Therefore, the end of the prepreg 73 in the direction perpendicular to the thickness direction is in contact with the end of the dummy core 160 in the direction perpendicular to the thickness direction.

[0061] Next, heat and pressure are applied to the laminate 265 (by lamination pressing), whereby the prepreg 73 is melted and hardened to obtain the insulating layer 13 (hardened prepreg 73). At this time, the prepreg that forms the dummy core 160 is also hardened. The end of the insulating layer 13 is adhered to the end of the dummy core 160. By lamination pressing, the laminate 265 including the insulating layer 13 and the dummy core 160 is integrated. The state in which the laminate 265 is integrated is also referred to as a coreless state. Next, the carrier is removed from the metal foil 43.

[0062] Next, as shown in part (a) of Fig. 13, a plurality of non-through holes 33 are formed in the insulating layer 13. The method for forming the non-through holes 33 is the same as the method described in the first embodiment. Next, as shown in part (b) of Fig. 13, a plurality of conductors 23 are respectively arranged in the plurality of non-through holes 33. The method for arranging the conductors 23 is the same as the method described in the first embodiment.

[0063] Next, as shown in part (a) of FIG. 14 , the end of the laminate 265 is cut and removed to separate the insulating layer 13 from the dummy core 160. Specifically, after removing the contact portion of the insulating layer 13 with the dummy core 160, the metal foil 44 is separated from the metal foil 161, thereby separating the insulating layer 13 from the dummy core 160. As described above, the metal foil 161 and the metal foil 44 are not bonded to each other, so the metal foil 161 and the metal foil 44 naturally separate from each other (separation is performed without using a dedicated jig or device, etc.). Next, as shown in part (b) of FIG. 14 , a circuit is formed on the insulating layer 13 by removing parts of the metal foils 43 and 44 and the metal layer 53. This results in a wiring board 3. The wiring board 3 manufactured by the manufacturing method according to the third embodiment can be used to obtain a multilayer wiring board 100. The manufacturing method for the multilayer wiring board 100 is the same as the manufacturing method described in the first embodiment.

[0064] In the method for manufacturing wiring board 3 according to this embodiment, dummy core 160 is formed from semi-cured prepreg. As a result, when prepreg 73 is cured to form insulating layer 13, the prepreg forming dummy core 160 also hardens and shrinks, thereby reducing the magnitude of internal stress generated in insulating layer 13. This reduces dimensional changes in insulating layer 13 when insulating layer 13 is separated from dummy core 160. The above-described effects are achieved by the simple technique of using dummy core 160 formed from semi-cured prepreg. Therefore, this manufacturing method allows wiring board 3 to be easily obtained with high dimensional accuracy.

[0065] [Example] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to these examples.

[0066] FIG. 15 is a table for explaining the effects of the manufacturing methods for wiring boards according to the first to third embodiments. The table in FIG. 15 shows measurement results and manufacturing costs for wiring boards manufactured by the manufacturing methods according to Examples 1 to 3 and Comparative Examples 1 to 4. Wiring boards were manufactured by the manufacturing methods according to Examples 1 to 3 and Comparative Examples 1 to 4. The manufacturing method of Example 1 corresponds to the manufacturing method of the first embodiment, the manufacturing method of Example 2 corresponds to the manufacturing method of the second embodiment, and the manufacturing method of Example 3 corresponds to the manufacturing method of the third embodiment. That is, in Example 1, wiring board 3 was manufactured by the manufacturing method according to the first embodiment. In Example 2, wiring board 3 was manufactured by the manufacturing method according to the second embodiment. In Example 3, wiring board 3 was manufactured by the manufacturing method according to the third embodiment. In the manufacturing method of Example 1, the thickness of dummy core 60 was set to twice the thickness of prepreg 73 laminated on dummy core 60.

[0067] A method for manufacturing a wiring board according to Comparative Example 1 will be described. First, as shown in part (a) of FIG. 16, a copper-clad laminate 400 is prepared. The copper-clad laminate 400 has an insulating layer 413 and a pair of metal foils (copper foils) 402. Each metal foil 402 has a thickness of 12 μm. The thickness of the metal foil 402 is reduced from 12 μm to 5 μm by half-etching. Next, as shown in part (b) of FIG. 16, a CO2 laser is used to form multiple blind holes 430 in the copper-clad laminate 400.

[0068] Next, as shown in part (c) of FIG. 16, the non-through holes 430 are filled with the conductors 420, respectively. Specifically, first, smears inside the non-through holes 430 are removed by a desmearing process, and then an undercoat plating is applied. Next, the conductors 420 are formed by a filling plating process (copper plating process). At this time, a metal layer 450 is also formed on the metal foil 402 by the copper plating process. Next, as shown in part (d) of FIG. 16, portions of the metal foil 402 and the metal layer 450 are removed to form a circuit, thereby obtaining the wiring board 3A shown in FIG. 16.

[0069] The method for manufacturing the wiring board according to Comparative Example 2 is the same as the manufacturing method according to Example 1, except that the thickness of dummy core 60 is set to 10 times the thickness of prepreg 73.

[0070] A method for manufacturing a wiring board according to Comparative Example 3 will be described. First, as shown in part (a) of FIG. 17, a copper-clad laminate 500 is prepared, which has a resin layer 501 and a pair of metal foils (copper foils) 502. The resin layer 501 is a cured prepreg. The pair of metal foils (copper foils) 502 are laminated on the main surface of the resin layer 501. The metal foils 502 are copper foils with carriers. The copper-clad laminate 500 functions as a dummy core that supports the prepreg 573 in a later process.

[0071] Next, as shown in part (b) of FIG. 17, a copper-clad laminate 500, a pair of prepregs 573, and a pair of metal foils (copper foils) 543 are prepared. Each of the prepregs 573 is in a semi-cured state and will be cured in a later step to form the insulating layer 513. The metal foil 543 is a carrier foil. The size of the copper-clad laminate 500 is smaller than the sizes of the metal foil 543 and the prepreg 573. The size of the copper-clad laminate is the area of ​​the copper-clad laminate when viewed in the thickness direction of the copper-clad laminate.

[0072] Next, as shown in part (a) of FIG. 18 , a copper-clad laminate 500, a pair of prepregs 573, and a pair of metal foils 543 are laminated together to form a laminate 565. Specifically, the prepreg 573 and the metal foil 543 are laminated in this order on the metal foil 502 of the copper-clad laminate 500. As described above, the size of the copper-clad laminate 500 is smaller than the size of the prepregs 573. Therefore, an end of one prepreg 573 contacts an end of the other prepreg 573.

[0073] Next, heat and pressure are applied to the laminate 565 (by lamination pressing), whereby the prepreg 573 is melted and hardened to obtain the insulating layer 513 (hardened prepreg 573). At this time, an end of one prepreg 573 is bonded to an end of the other prepreg 573. By lamination pressing, the laminate 565 including the insulating layer 513 and the copper-clad laminate 500 is integrated. The state in which the laminate 565 is integrated is also referred to as a coreless state. Next, the carrier is removed from the metal foil 543.

[0074] 18(b), a plurality of non-through holes 533 are formed in the insulating layer 513. The method for forming the non-through holes 533 is the same as the method for forming the non-through holes 33 described in the first embodiment. Next, a plurality of conductors 523 are arranged in the plurality of non-through holes 533, respectively. The method for arranging the conductors 523 is the same as the method for arranging the conductors 23 described in the first embodiment. At this time, a metal layer 553 is also formed on the metal foil 543.

[0075] Next, as shown in part (a) of FIG. 19 , the edge of the laminate 565 is cut and removed. Specifically, the contact portion of one insulating layer 513 with the other insulating layer 513 is removed. Next, the insulating layer 513 is separated from the copper-clad laminate 500. The metal foil 502, which is a copper foil with a carrier, has a carrier layer 503, a copper foil layer 504, and a release layer located between the carrier layer and the copper foil layer. The carrier layer 503 and the copper foil layer 504 are separated at the release layer using a dedicated jig or device, thereby separating the insulating layer 513 from the copper-clad laminate 500. Next, as shown in part (b) of FIG. 19 , a circuit is formed on the insulating layer 513 by removing portions of the copper foil layer 504, the metal foil 543, and the metal layer 553. This results in a wiring board 3B.

[0076] A method for manufacturing a wiring board according to Comparative Example 4 will be described. First, as shown in part (a) of FIG. 20 , a three-layer copper foil 600, a pair of prepregs 673, and a pair of metal foils (copper foils) 643 are prepared. Each of the prepregs 673 is in a semi-cured state and will be cured in a later step to form an insulating layer 613. The metal foil 643 is a carrier foil. The size of the three-layer copper foil 600 is smaller than the metal foil 643 and the prepreg 673. The size of the three-layer copper foil is the area of ​​the three-layer copper foil when viewed in the thickness direction of the three-layer copper foil. The three-layer copper foil 600 has a copper foil 601 serving as a support material and a pair of copper foils 602 laminated on both sides of the copper foil 601. The copper foil 602 is physically separable from the copper foil 601.

[0077] Next, as shown in part (b) of FIG. 20 , the three-layer copper foil 600, a pair of prepregs 673, and a pair of metal foils 643 are laminated together to form a laminate 665. Specifically, the prepreg 673 and the metal foil 643 are laminated in this order on the copper foil 602 of the three-layer copper foil 600. As described above, the size of the three-layer copper foil 600 is smaller than the size of the prepreg 673. Therefore, an end of one prepreg 673 contacts an end of the other prepreg 673.

[0078] Next, heat and pressure are applied to the laminate 665 (by lamination pressing), whereby the prepreg 673 is melted and hardened to obtain the insulating layer 613 (hardened prepreg 673). At this time, an end of one prepreg 673 is bonded to an end of the other prepreg 673. By lamination pressing, the laminate 665 including the insulating layer 613 and the three-layer copper foil 600 is integrated. The state in which the laminate 665 is integrated is also referred to as a coreless state. Next, the carrier is removed from the metal foil 643.

[0079] Next, as shown in part (a) of FIG. 21 , a plurality of non-through holes 633 are formed in the insulating layer 613. The method for forming the non-through holes 633 is the same as the method for forming the non-through holes 33 described in the first embodiment. Next, a plurality of conductors 623 are arranged in the plurality of non-through holes 633, respectively. The method for arranging the conductors 623 is the same as the method for arranging the conductors 23 described in the first embodiment. At this time, a metal layer 653 is also formed on the metal foil 643.

[0080] Next, as shown in part (b) of FIG. 21 , an end portion of the laminate 665 is cut and removed. Specifically, the contact portion of one insulating layer 613 with the other insulating layer 613 is removed. Next, the insulating layer 613 is separated from the three-layer copper foil 600. Specifically, the copper foil 602 is separated from the copper foil 601 of the three-layer copper foil 600 using a dedicated jig or device. As a result, the insulating layer 613 is separated from the copper foil 602 of the three-layer copper foil 600 while the copper foil 602 remains adhered to the insulating layer 613. Next, as shown in FIG. 22 , a circuit is formed on the insulating layer 613 by removing portions of the copper foil 602, the metal foil 643, and the metal layer 653. In this way, a wiring board 3C is obtained.

[0081] Returning to FIG. 15 , the explanation continues. First, the “dimensional change before and after separation” graph in FIG. 15 shows the dimensional change between adjacent non-through holes during the manufacturing process of a wiring board. Specifically, the dimensions between multiple non-through holes formed in a target insulating layer were measured in a state where the target insulating layer was integrated with a dummy core or another insulating layer (hereinafter also referred to as the pre-separation state) and in a state where the target insulating layer was separated from the dummy core or another insulating layer to form a circuit (hereinafter also referred to as the post-separation state). For example, in Example 1 corresponding to the manufacturing method according to the first embodiment, the dimensions between adjacent non-through holes 33 in the state shown in FIG. 3A (where the insulating layer 13 was integrated with the dummy core 60) were measured as the dimensions in the pre-separation state, and the dimensions between adjacent non-through holes 33 in the state shown in FIG. 4B (where the insulating layer 13 was separated from the dummy core 60) were measured as the dimensions in the post-separation state. In Example 2 corresponding to the second embodiment, the dimension between adjacent non-through holes 33 in the state shown in part (a) of Fig. 10 (a state in which one insulating layer 13 is integrated with the other insulating layer 13) was measured as the dimension in the pre-separation state, and the dimension between adjacent non-through holes 33 in the state shown in part (b) of Fig. 4 (a state in which one insulating layer 13 is separated from the other insulating layer 13) was measured as the dimension in the post-separation state. The non-through holes were formed so that their shape when viewed from the insulating layer was circular.

[0082] If the dimension after separation is larger than the dimension before separation, the dimensional change value is positive. If the dimension after separation is smaller than the dimension before separation, the dimensional change value is negative. For example, if the dimensional change value is "-0.00300%, the dimension after separation is 0.00300% smaller than the dimension before separation. The table in Figure 15 shows the average value Ave of the calculated multiple dimensional changes and the dimensional change variation R (R range: difference between the maximum and minimum values).

[0083] In Comparative Example 2, the thickness of the dummy core is 10 times the thickness of the prepreg, while in Example 1, the thickness of the dummy core is twice the thickness of the prepreg. Therefore, the strength of the dummy core in Comparative Example 2 is greater than that of the dummy core in Example 1. Furthermore, in Example 2 and Comparative Example 4, no dummy core is used. Therefore, the relationship of dummy core strength is Comparative Example 2 > Example 1 > Example 2 and Comparative Example 4. Furthermore, the table in FIG. 15 shows that the average value Ave of dimensional change and the variability R of dimensional change are inversely related to the strength of the dummy core: Example 2 and Comparative Example 4 > Example 1 > Comparative Example 2. Therefore, the smaller the strength of the dummy core (the thinner the dummy core), the smaller the average value Ave of dimensional change and the variability R of dimensional change. As will be described in detail later, the dimensional change between the non-through holes is due to the shrinkage of the insulating layer in which the non-through holes are formed. Therefore, these measurement results show that the smaller the ratio of the dummy core thickness to the prepreg thickness, the less the degree of shrinkage of the insulating layer when the insulating layer is separated, and the less dimensional change in the wiring board. In Comparative Example 4, since no dummy core is used, the average value Ave of dimensional change and the dimensional change variation R are small, as in Example 2. However, the three-layer copper foil 600 used in Comparative Example 4 is a special material that is difficult to obtain, which increases the manufacturing cost of the wiring board. On the other hand, the manufacturing method of Example 2 can be realized without using such a special material. In other words, wiring boards can be easily obtained with high dimensional accuracy.

[0084] Additionally, the warpage of wiring boards manufactured by the manufacturing methods of Examples 1 to 3 and Comparative Examples 2 to 4, and the warpage of multilayer wiring boards (six-layer build-up wiring boards) manufactured using these wiring boards were measured. The multilayer wiring boards of Comparative Examples 2 to 4 were manufactured by the same method as described in the first embodiment. The warpage of the wiring boards was measured in the form of a 500 mm x 400 mm panel, and the warpage of the multilayer wiring boards was measured in the form of a 90 mm x 90 mm sheet. The table in FIG. 15 shows the average value Ave of the measured warpage and the warpage variation R (R range: difference between the maximum and minimum values). The warpage of wiring boards and multilayer wiring boards is measured, for example, by the method described in JIS C5012, Section 6.3.9(1).

[0085] As shown in FIG. 15 , the average value Ave of the warpage of the wiring board in Examples 2 and 3 is 0.1 mm, the average value Ave of the warpage of the wiring board in Example 1 is 0.2 mm, and the average value Ave of the warpage of the wiring board in Comparative Example 2 is 2.0 mm. Furthermore, the variation R of the warpage of the wiring board in Examples 1 to 3 is 0.3 mm, while the variation R of the warpage of the wiring board in Comparative Example 2 is 0.8 mm. That is, with respect to the average value Ave of the wiring board, the relationship Comparative Example 2 > Examples 2 and 3 > Example 1 holds, and with respect to the variation R of the warpage of the wiring board, the relationship Comparative Example 2 > Examples 1 to 3 holds. Therefore, as with the dimensional change, it can be seen that the thinner the dummy core, the more effectively the warpage of the wiring board and the variation in the warpage are suppressed. Furthermore, with respect to the average value Ave of the warpage and the variation R of the warpage of the multilayer wiring board, the relationship Comparative Example 2 > Examples 1 to 3 holds. Therefore, it can be seen that warpage and warpage variations in a multilayer wiring board are more effectively suppressed as the dummy cores used to form the wiring board are thinner.

[0086] The "workability" in the table of FIG. 15 will now be explained. Workability indicates an evaluation of whether a coreless laminate including an insulating layer (copper-clad laminate 400 in Comparative Example 1) flows smoothly in the process for manufacturing a wiring board. Specifically, the laminate flows through multiple processes in this order: a copper direct processing pretreatment device, a CO2 laser drilling device, a desmearing device, a base plating treatment device, a filled via copper plating device, an exposure dry film laminator, a circuit exposure device, and a development and etching device. The minimum thickness of the laminate that can be properly processed by each device is 80 μm.

[0087] In the table of FIG. 15 , the evaluation "◯" in the "Workability" column indicates that the thickness of the laminate is equal to or greater than the minimum thickness of 80 μm, and that no damage such as breakage or cracking occurs to the wiring board even when the laminate flows through the process. The evaluation "△" indicates that the thickness of the laminate is slightly below the minimum thickness of 80 μm, but no problems occur in the flow of the laminate during the process or in the quality of the wiring board. The evaluation "X" indicates that the thickness of the laminate is below the minimum thickness of 80 μm, and that damage such as breakage or cracking occurs to the wiring board during the process, making it impossible to pass through the process (manufacturing equipment) or the next process (manufacturing equipment for the next process), or that these defects make it impossible to maintain the quality of the wiring board. The table of FIG. 15 shows the evaluation when the thickness of the prepreg forming the insulating layer is 20 μm. The numerical value below the evaluation indicates the thickness of the laminate. The evaluation shown in FIG. 15 reveals that, in all of the manufacturing methods of Examples 1 to 3, no problems occur in the flow of the laminate during the process or in the quality of the wiring board.

[0088] The "Separation Efficiency" column in the table of FIG. 15 shows an evaluation of the workability of separating the insulating layer included in the coreless laminate from the dummy core or other insulating layers. In Examples 1 to 3 and Comparative Example 2, the insulating layer can be separated without using a dedicated jig or device. For example, in the manufacturing method of the first embodiment corresponding to Example 1, the insulating layer 13 is laminated on the dummy core 60 via the metal foil 44 and the metal foil 62 (see part (a) in FIG. 4). However, since the metal foil 44 and the metal foil 62 are not bonded to each other, the metal foil 44 and the metal foil 62 can be naturally separated from each other. In Comparative Example 1, the copper-clad laminate 400 does not constitute a coreless laminate, so the separation work itself is unnecessary. In contrast, in Comparative Example 3, when separating the insulating layer 513 from the copper-clad laminate 500, it is necessary to separate the carrier layer 503 and the copper foil layer 504 using a dedicated jig or device (see part (a) in FIG. 19). In addition, in Comparative Example 4, when separating the insulating layer 613 from the three-layer copper foil 600, it is necessary to separate the copper foil 602 from the copper foil 601 of the three-layer copper foil 600 using a dedicated jig or device (see part (b) of FIG. 21). Therefore, according to the manufacturing methods of Examples 1 to 3, it is possible to manufacture a wiring board more easily than in Comparative Examples 1 and 2.

[0089] The "Material Availability" column in the table of FIG. 15 indicates the degree of difficulty in obtaining materials for manufacturing wiring boards. As shown in the table, the manufacturing methods of Examples 1 to 3 allow wiring boards to be manufactured using general-purpose materials. In contrast, the manufacturing method of Comparative Example 4 requires the use of a three-layer copper foil that is difficult to obtain. Therefore, the manufacturing methods of Examples 1 to 3 allow wiring boards to be manufactured more easily than Comparative Example 4.

[0090] The "Cost" column in the table of FIG. 15 shows an evaluation of the manufacturing cost of the wiring board. Specifically, it shows the estimated cost required to produce one set of coreless laminates (i.e., two panels of wiring boards). The calculation was made taking into account the area and type of material required. An index is shown when the cost of Comparative Example 2 is set to 1.0. In addition, the columns below the "Cost" column show the materials and the number of materials required to manufacture the wiring board. In Example 3 corresponding to the third embodiment, the dummy core 160 is formed from prepreg, so in the table of FIG. 15, it is counted as prepreg rather than dummy core.

[0091] In the manufacturing method of Comparative Example 4, a special material (three-layer copper foil) is used, and therefore the cost is 1.7 times that of Comparative Example 2. In contrast, the manufacturing methods of Examples 2 and 3, while achieving the same effect as Comparative Example 4 in terms of dimensional change, enable wiring boards to be manufactured at costs 0.8 and 1.0 times that of Comparative Example 2, respectively.

[0092] Next, with reference to FIG. 23 , the internal stress generated in the insulating layer and the dimensional change of the insulating layer during the manufacturing of a wiring board will be further described. FIG. 23 is a diagram for explaining the internal stress generated in the insulating layer and the dimensional change of the insulating layer. As shown in part (a) of FIG. 23 , when prepreg 73 is laminated on both sides of dummy core 60 and heat and pressure are applied to laminate 65 to harden prepreg 73 (lamination press), prepreg 73 cures and shrinks. In part (a) of FIG. 23 , the direction of shrinkage of prepreg 73 is indicated by arrow A1. In contrast, since dummy core 60 is formed from an already cured material, curing shrinkage of dummy core 60 itself does not occur during lamination press. However, the end of prepreg 73 (insulating layer 13) is bonded to dummy core 60. Therefore, due to the influence (stress) of the cure shrinkage of prepreg 73, dummy core 60 also shrinks, although to a lesser extent than prepreg 73. In part (a) of Figure 23, the direction of shrinkage of the dummy core 60 is indicated by arrow B1. Compared to when the prepreg is not bonded to the dummy core (when the prepreg is cured by itself), when the prepreg 73 is bonded to the dummy core 60, the shrinkage of the prepreg 73 is prevented by the dummy core 60, and therefore the shrinkage of the prepreg 73 is suppressed. This generates internal stress in the laminate 65. The formation of the non-through holes 33 and the arrangement of the conductors 23 are carried out while the internal stress is maintained.

[0093] As shown in part (b) of Figure 23, when the end of the laminate 65 (the adhesive portion between the insulating layer 13 and the dummy core 60) is cut and removed, and the insulating layer 13 is separated from the dummy core 60, the internal stress is released. As a result, the insulating layer 13 contracts further, and the dummy core 60 expands. In part (b) of Figure 23, the direction of contraction of the insulating layer 13 is indicated by arrow C1, and the direction of expansion of the dummy core 60 is indicated by arrow D1.

[0094] The inventors have found that the smaller the ratio of dummy cores to prepreg (thickness of dummy cores / thickness of prepreg), the more dimensional change in the insulating layer (wiring board) is suppressed. Specifically, the smaller the ratio of dummy cores to prepreg (thinner dummy cores), the less the dummy cores suppress the cure shrinkage of the prepreg. This reduces the internal stress generated in the coreless laminate containing the prepreg during curing, and suppresses dimensional change in the insulating layer (wiring board) when the cured prepreg (insulating layer) and the dummy core are separated. Dimensional change is particularly effectively suppressed when the thickness of the dummy core is no more than twice the thickness of the prepreg.

[0095] The relationship between the thickness of the dummy core and dimensional change will be further explained with reference to FIGS. 24 to 26. FIG. 24 is a table showing the relationship between the ratio of the dummy core thickness to the prepreg thickness and the dimensional change. FIG. 25 is a graph showing the relationship between the ratio of the dummy core thickness to the prepreg thickness and the average value of the dimensional change. FIG. 26 is a graph showing the relationship between the ratio of the dummy core thickness to the prepreg thickness and the variation in the dimensional change. Multiple wiring boards were manufactured using dummy cores of different thicknesses, and the dimensional change between multiple non-through holes (between adjacent non-through holes) formed in each insulating layer was measured. The measurement was performed in the same manner as the measurement of dimensional change, the results of which are shown in the table of FIG. 15. That is, prepregs were laminated on both sides of a dummy core formed from a cured material and pressed together to form a coreless laminate, and the dimensions between the multiple non-through holes formed in the insulating layer were measured before and after separation.

[0096] The thickness of the prepreg laminated on the dummy core was uniformly 20 μm, and the thickness of the dummy core was 200 μm, 100 μm, 40 μm, 20 μm, or 0 μm. The example in which the dummy core thickness is 200 μm (an example in which the dummy core thickness is 10 times the prepreg thickness) corresponds to the manufacturing method of Comparative Example 2 described above. The example in which the dummy core thickness is 40 μm (an example in which the dummy core thickness is twice the prepreg thickness) corresponds to the manufacturing method of Example 1 described above. The example in which the dummy core thickness is 0 μm (an example in which a dummy core is not used) corresponds to the manufacturing method of Example 2 described above, in which the insulating layer is bonded to another insulating layer rather than to the dummy core (see part (b) of FIG. 9 ).

[0097] As shown in Figures 24 to 26, the smaller the ratio (the thinner the dummy core), the smaller the average value Ave of dimensional change between non-through holes and the value of the variability R of dimensional change. In particular, when the ratio is 2.00 or less (the dummy core thickness is less than twice the thickness of the prepreg layer), the average value Ave of dimensional change between non-through holes and the value of the variability R of dimensional change are significantly reduced. Specifically, when the ratio is 2.00, the average value Ave of dimensional change is reduced to -0.003%, and the variability R of dimensional change is reduced to 0.026%. The dimensional change between non-through holes is caused by the shrinkage of the insulating layer in which the non-through holes are formed. Therefore, these measurement results show that the smaller the ratio of the dummy core thickness to the prepreg thickness (especially when the dummy core thickness is less than twice the thickness of the prepreg layer), the smaller the degree of shrinkage of the insulating layer when the insulating layer is separated from the dummy core, thereby suppressing the dimensional change of the wiring board.

[0098] With reference to FIG. 27 , the internal stress generated in the insulating layer and the dimensional change of the insulating layer when manufacturing a wiring board using the manufacturing method according to the second embodiment will be further described. FIG. 27 is a diagram illustrating the internal stress generated in the insulating layer and the dimensional change of the insulating layer. As shown in part (a) of FIG. 27 , when prepreg 273 is laminated on prepreg 173 and heat and pressure are applied to laminate 65 to harden prepregs 173 and 273 (lamination press), prepregs 173 and 273 harden and shrink. In part (a) of FIG. 27 , the direction of shrinkage of prepregs 173 and 273 is indicated by arrow A2. In this example, since there are no dummy cores, the shrinkage of prepregs 173 and 273 is not suppressed by the dummy cores, and no internal stress is generated in laminate 165. 27(b), blind holes 33 are formed and conductors 23 are arranged, and the ends of the laminate 165 are cut and removed to separate one insulating layer 13 from the other insulating layer 13. As described above, since no internal stress is generated in the laminate 165, the insulating layer 13 does not shrink or expand after separation. In other words, according to the manufacturing method of the second embodiment, a wiring board can be easily obtained with high dimensional accuracy.

[0099] With reference to FIG. 28 , the internal stress generated in the insulating layer and the dimensional change of the insulating layer when manufacturing a wiring board using the manufacturing method according to the third embodiment will be further described. FIG. 28 is a diagram illustrating the internal stress generated in the insulating layer and the dimensional change of the insulating layer. As shown in part (a) of FIG. 28 , when prepregs 73 are laminated on both sides of a dummy core 160 and heat and pressure are applied to the laminate 265 to harden the prepregs 73 (lamination press), the prepregs 73 harden and shrink. In part (a) of FIG. 28 , the direction of shrinkage of the prepregs 73 is indicated by arrow A3. In the third embodiment, the dummy core 160 is formed from semi-cured prepregs, and therefore, the prepregs forming the dummy core 160, together with the prepregs 73, also harden and shrink. In part (a) of FIG. 28 , the direction of shrinkage of the prepregs forming the dummy core 160 is indicated by arrow B3. Since the prepreg forming the dummy core 160 also cures and shrinks, the shrinkage of the prepreg 73 is not suppressed by the dummy core 160, and no internal stress is generated in the laminate 265. Next, as shown in part (b) of FIG. 28 , non-through holes 33 are formed and conductors 23 are arranged, and the end of the laminate 265 is cut and removed to separate the insulating layer 13 from the dummy core 160. As described above, since no internal stress is generated in the laminate 265, no shrinkage or expansion of the insulating layer 13 occurs after separation. In other words, according to the manufacturing method of the third embodiment, a wiring board can be easily obtained with high dimensional accuracy.

[0100] The present invention is not limited to the above-described embodiment and modifications. The materials and shapes of each component are not limited to those described above, and various materials and shapes can be used. For example, the thickness of the dummy core 60 before the prepreg 73 is cured may be no more than twice the thickness of the prepreg 73, and may be, for example, 40 μm or more. The thickness of the prepreg 73 may be, for example, 25 μm or more.

[0101] In the first embodiment, the metal foil 62 and the metal foil 44 may be adhered to each other (they may not be naturally separated). In the second embodiment, the metal foil 144 and the metal foil 244 may be adhered to each other. In the third embodiment, the metal foil 161 and the metal foil 44 may be adhered to each other. [Explanation of symbols]

[0102] 1~3, 3A, 3B, 3C, 4, 5...Wiring board 11~15, 113, 213, 413, 513, 613...insulating layer 21~25, 420, 523, 623...conductors 31~35, 430, 533, 633...Non-through holes 41~46, 62, 143, 144, 161, 243, 244, 402, 502, 543, 643...Metal foil 51~55, 450, 553, 653...metal layer 58, 59...Solder resist 60, 160...Dummy core 60a, 173a, 173b, 273a, 273b...principal surface 61...Main body 65, 165, 265, 565, 665...Laminates 71~75, 173, 273, 501, 573, 673...Prepreg, 100...Multilayer wiring board 400, 500...Copper clad laminate 503: Career level 504...Copper foil layer 600...3-layer copper foil 601, 602...Copper foil.

Claims

1. laminating a prepreg layer formed from semi-cured prepreg on a main surface of a support layer; curing the prepreg layer to form an insulating layer; forming a blind hole in the insulating layer; disposing a conductor in the non-through hole formed in the insulating layer; and separating the insulating layer from the support layer. Before curing the prepreg layer, the thickness of the support layer is equal to or less than twice the thickness of the prepreg layer. A method for manufacturing a wiring board.

2. Before the prepreg layer is cured, the thickness of the support layer is equal to or less than the thickness of the prepreg layer. The method for manufacturing a wiring board according to claim 1 .

3. Before curing the prepreg layer, the thickness of the prepreg layer is 20 μm or less, and the thickness of the support layer is 40 μm or less. The method for manufacturing a wiring board according to claim 1 or 2.

4. the support layer has a main body portion formed in a plate shape and a first metal foil laminated on the main body portion and constituting the main surface, In the step of laminating the prepreg layer, a second metal foil is laminated on the first metal foil, and the prepreg layer is laminated on the support layer via the second metal foil; In a state where the second metal foil is laminated on the first metal foil, the first metal foil and the second metal foil are in contact with each other without being adhered to each other. The method for manufacturing a wiring board according to claim 1 or 2.

5. In the step of laminating the prepreg layer, the prepreg layer is laminated on the support layer formed of a cured material. The method for manufacturing a wiring board according to claim 1 or 2.

6. laminating a prepreg layer formed from a semi-cured prepreg on a main surface of a support layer formed from a semi-cured prepreg; curing the prepreg layer to form an insulating layer; forming a blind hole in the insulating layer; disposing a conductor in the non-through hole formed in the insulating layer; and separating the insulating layer from the support layer. A method for manufacturing a wiring board.

7. a step of laminating a second prepreg layer formed from a prepreg in a semi-cured state onto a main surface of a first prepreg layer formed from a prepreg in a semi-cured state, with a first metal foil and a second metal foil interposed therebetween; curing the first prepreg layer to form a first insulating layer and curing the second prepreg layer to form a second insulating layer; forming a non-through hole in each of the first insulating layer and the second insulating layer; disposing a conductor in the non-through hole formed in the first insulating layer and the non-through hole formed in the second insulating layer; isolating the first insulating layer and the second insulating layer from each other; In the laminating step, the second prepreg layer is laminated on the first prepreg layer so that the first metal foil contacts the main surface of the first prepreg layer, the second metal foil contacts the main surface of the second prepreg layer, and the first metal foil and the second metal foil contact each other; In the separating step, the second metal foil is separated from the first metal foil, thereby separating the first insulating layer and the second insulating layer from each other. A method for manufacturing a wiring board.

8. A wiring board manufactured by the manufacturing method according to any one of claims 1, 6 and 7, Warpage is 1.0 mm or less, wiring board.

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