Silicon carbide substrate, method for manufacturing silicon carbide substrate, method for manufacturing silicon carbide epitaxial substrate, silicon carbide epitaxial substrate, method for manufacturing silicon carbide semiconductor device, and silicon carbide semiconductor device

Abstract

To provide: a silicon carbide substrate capable of improving the yield of a silicon carbide semiconductor device; a method for manufacturing the silicon carbide substrate; a method for manufacturing a silicon carbide epitaxial substrate; the silicon carbide epitaxial substrate; a method for manufacturing the silicon carbide semiconductor device; and the silicon carbide semiconductor device.SOLUTION: A silicon carbide substrate having a main surface includes titanium and nitrogen. The concentration of nitrogen is 1.0×1018 cm-3 or more; the main surface is formed of an outer edge, an outer peripheral area being an area within 5 mm from the outer edge and a central area surrounded by the outer peripheral area; and when dividing the central area into a plurality of square areas having a side of 10 mm and measuring a titanium area density in each of the plurality of square areas using a total reflection fluorescent X-ray analysis, a value obtained by dividing the number of the square areas having a titanium area density of 2×1011 atoms / cm2 or more by the total of the plurality of square areas is 8% or less.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to a silicon carbide substrate, a method for manufacturing a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide epitaxial substrate, a silicon carbide semiconductor device, and a silicon carbide semiconductor device. [Background technology]

[0002] In Japanese Patent Laid-Open No. 2016-153371 (Patent Document 1), it is known that the metal impurities present on one main surface are 10 × 10 10 atoms / cm 2 A silicon carbide substrate is described below. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2016-153371 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present disclosure is to provide a silicon carbide substrate, a method for manufacturing a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide epitaxial substrate, a silicon carbide semiconductor device, and a silicon carbide semiconductor device that are capable of improving the yield of silicon carbide semiconductor devices. [Means for solving the problem]

[0005] A silicon carbide substrate according to the present disclosure has a primary surface. The silicon carbide substrate contains titanium and nitrogen. The nitrogen concentration is 1.0×10 18 cm -3The main surface is formed by an outer edge, a peripheral region, and a central region. The peripheral region is a region within 5 mm from the outer edge. The central region is surrounded by the peripheral region. When the central region is divided into multiple square regions with sides of 10 mm, and the surface density of titanium in each of the multiple square regions is measured using total reflection X-ray fluorescence analysis, the surface density of titanium is found to be 2 x 10 11 atoms / cm 2 A silicon carbide substrate in which the value obtained by dividing the number of square regions that are equal to or larger than this by the total number of the plurality of square regions is 8% or less. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a silicon carbide substrate, a method for manufacturing a silicon carbide substrate, a method for manufacturing a silicon carbide epitaxial substrate, a method for manufacturing a silicon carbide epitaxial substrate, a silicon carbide semiconductor device, and a silicon carbide semiconductor device that are capable of improving the yield of silicon carbide semiconductor devices. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view schematically showing the configuration of a silicon carbide substrate in accordance with this embodiment. [Figure 2] FIG. 2 is a schematic cross-sectional view taken along line II-II in FIG. [Figure 3] FIG. 3 is a schematic plan view showing the measurement positions of the surface density of metal impurities. [Figure 4] FIG. 4 is a flow diagram schematically showing a method for manufacturing a silicon carbide substrate. [Figure 5] FIG. 5 is a cross-sectional view showing the preparation step. [Figure 6] FIG. 6 is a schematic diagram showing the relationship between the pressure inside the crucible and time in the pre-firing step. [Figure 7] FIG. 7 is a partial cross-sectional schematic view showing the surface of the silicon carbide raw material after the pre-firing step. [Figure 8] FIG. 8 is a schematic cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 9 is a schematic cross-sectional view showing a state in which the seed substrate is placed in the crucible. [Figure 10] FIG. 10 is a schematic diagram showing the relationship between the crucible temperature and time in the crystal growth step. [Figure 11] FIG. 11 is a cross-sectional view showing the second heating step. [Figure 12] FIG. 12 is a schematic diagram showing the temperature distribution inside the crucible in the second heating step. [Figure 13] FIG. 13 is a flow diagram schematically showing a method for manufacturing a silicon carbide semiconductor device according to this embodiment. [Figure 14] FIG. 14 is a cross-sectional view schematically illustrating the configuration of a silicon carbide epitaxial substrate according to this embodiment. [Figure 15] FIG. 15 is a schematic cross-sectional view showing a step of forming a body region. [Figure 16] FIG. 16 is a schematic cross-sectional view showing a step of forming a source region. [Figure 17] FIG. 17 is a cross-sectional view schematically illustrating a step of forming a trench in the third main surface of the silicon carbide epitaxial layer. [Figure 18] FIG. 18 is a cross-sectional view showing a process of forming a gate insulating film. [Figure 19] FIG. 19 is a cross-sectional view showing a process of forming a gate electrode and an interlayer insulating film. [Figure 20] FIG. 20 is a cross-sectional view schematically showing the configuration of a silicon carbide semiconductor device in accordance with this embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Description of the embodiments of the present disclosure] First, embodiments of the present disclosure (hereinafter also referred to as the present embodiment) will be listed and described.

[0009] (1) A silicon carbide substrate according to the present disclosure has a primary surface. The silicon carbide substrate contains titanium and nitrogen. The nitrogen has a concentration of 1.0×10 18 cm -3The main surface is formed by an outer edge, a peripheral region, and a central region. The peripheral region is a region within 5 mm from the outer edge. The central region is surrounded by the peripheral region. When the central region is divided into multiple square regions with sides of 10 mm, and the surface density of titanium in each of the multiple square regions is measured using total reflection X-ray fluorescence analysis, the surface density of titanium is found to be 2 x 10 11 atoms / cm 2 The number of square regions that are equal to or greater than this divided by the total number of square regions is 8% or less.

[0010] This prevents a high resistance layer from being formed at the interface between the silicon carbide substrate and the silicon carbide epitaxial layer when the silicon carbide epitaxial layer is formed on the silicon carbide substrate, thereby improving the yield of silicon carbide semiconductor devices manufactured using the silicon carbide substrate.

[0011] (2) A silicon carbide substrate according to the present disclosure has a primary surface. The silicon carbide substrate contains aluminum and nitrogen. The nitrogen concentration is 1.0×10 18 cm -3 The main surface is formed by an outer edge, a peripheral region, and a central region. The peripheral region is a region within 5 mm from the outer edge. The central region is surrounded by the peripheral region. When the central region is divided into multiple square regions with sides of 10 mm, and the surface density of aluminum in each of the multiple square regions is measured using total reflection X-ray fluorescence analysis, the surface density of aluminum is found to be 2×10 11 atoms / cm 2 The number of square regions that are equal to or greater than this divided by the total number of square regions is 8% or less.

[0012] This makes it possible to prevent the occurrence of charging defects due to aluminum contained in the silicon carbide substrate, thereby improving the yield of silicon carbide semiconductor devices manufactured using silicon carbide substrates.

[0013] (3) A silicon carbide substrate according to the present disclosure has a primary surface. The silicon carbide substrate contains titanium and nitrogen. The nitrogen concentration is 1.0×10 18 cm-3 When the titanium concentration at the center was measured using glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the titanium concentration was found to be 0.6 x 10 16 cm -3 The following is the result.

[0014] This prevents a high resistance layer from being formed at the interface between the silicon carbide substrate and the silicon carbide epitaxial layer when the silicon carbide epitaxial layer is formed on the silicon carbide substrate, thereby improving the yield of silicon carbide semiconductor devices manufactured using the silicon carbide substrate.

[0015] (4) A silicon carbide substrate according to the present disclosure has a primary surface. The silicon carbide substrate contains aluminum and nitrogen. The nitrogen concentration is 1.0×10 18 cm -3 When the aluminum concentration at the center was measured using glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the aluminum concentration was 2.5 x 10 16 cm -3 The following is the result.

[0016] This makes it possible to prevent the occurrence of charging defects due to aluminum contained in the silicon carbide substrate, thereby improving the yield of silicon carbide semiconductor devices manufactured using silicon carbide substrates.

[0017] (5) The silicon carbide substrate according to any one of (1) to (4) above may contain zirconium. When the zirconium concentration at the center is measured by glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the zirconium concentration is 2.5 × 10 16 cm -3 It may be the following:

[0018] This more effectively prevents a high resistance layer from being formed at the interface between the silicon carbide substrate and the silicon carbide epitaxial layer when the silicon carbide epitaxial layer is formed on the silicon carbide substrate, thereby more effectively improving the yield of silicon carbide semiconductor devices manufactured using the silicon carbide substrate.

[0019] (6) A method for manufacturing a silicon carbide substrate according to the present disclosure includes the following steps: a silicon carbide raw material is pre-fired; and a silicon carbide crystal is grown on the seed substrate by sublimating the silicon carbide raw material. The step of pre-firing the silicon carbide raw material includes a step of firing the silicon carbide raw material while the pressure in the crucible is at a first pressure, and a step of firing the silicon carbide raw material while the pressure in the crucible is at a second pressure after the step of firing the silicon carbide raw material while the pressure in the crucible is at the first pressure. The first pressure is higher than the second pressure. The first pressure is 200 Pa or more. In the step of growing the silicon carbide crystal, the absolute value of the difference between the average temperature at the surface of the silicon carbide raw material and the average temperature at the bottom of the silicon carbide raw material is 25°C or less.

[0020] This prevents bumping of the silicon carbide raw material, thereby reducing metal impurities contained in the silicon carbide substrate, and as a result, improving the yield of silicon carbide semiconductor devices manufactured using the silicon carbide substrate.

[0021] (7) According to the method for manufacturing a silicon carbide substrate according to (6) above, after the step of growing a silicon carbide crystal, the number of depressions on the surface of the silicon carbide raw material that are 10 mm or more in diameter and 3 mm or more in depth may be 5 or less, or may be zero. In this way, bumping of the silicon carbide raw material is prevented. This allows for a reduction in metal impurities contained in the silicon carbide substrate.

[0022] (8) A method for manufacturing a silicon carbide epitaxial substrate according to the present disclosure includes the following steps: preparing the silicon carbide substrate according to (1) or (2) above; forming a silicon carbide epitaxial layer on the silicon carbide substrate; and improving the yield of silicon carbide semiconductor devices manufactured using the silicon carbide epitaxial substrate.

[0023] (9) A silicon carbide epitaxial substrate according to the present disclosure includes the silicon carbide substrate according to (3) or (4) above and a silicon carbide epitaxial layer. The silicon carbide epitaxial layer is provided on the silicon carbide substrate. This can improve the yield of silicon carbide semiconductor devices manufactured using the silicon carbide epitaxial substrate.

[0024] (10) A method for manufacturing a silicon carbide semiconductor device according to the present disclosure includes the following steps: preparing the silicon carbide substrate according to (1) or (2) above; forming a silicon carbide epitaxial layer on the silicon carbide substrate; and forming an electrode on the silicon carbide epitaxial layer. This can improve the yield of silicon carbide semiconductor devices.

[0025] (11) A silicon carbide semiconductor device according to the present disclosure includes the silicon carbide substrate according to (3) or (4) above, a silicon carbide epitaxial layer, and an electrode. The silicon carbide epitaxial layer is provided on the silicon carbide substrate. The electrode is provided on the silicon carbide epitaxial layer. This can improve the yield of silicon carbide semiconductor devices.

[0026] [Details of the embodiments of the present disclosure] Next, embodiments of the present disclosure will be described with reference to the drawings. In the following drawings, identical or corresponding parts are designated by the same reference numerals, and their description will not be repeated. In the crystallographic descriptions in this specification, individual orientations are indicated by [ ], collective orientations by < >, individual planes by ( ), and collective planes by {}. Regarding negative indices, in crystallography, a "-" (bar) is placed before the number, but in this specification, a negative sign is placed before the number.

[0027] <Silicon carbide substrate> First, the configuration of silicon carbide substrate 100 according to this embodiment will be described. FIG. 1 is a schematic plan view showing the configuration of silicon carbide substrate 100 according to this embodiment. As shown in FIG. 1, silicon carbide substrate 100 according to this embodiment has a first main surface 1 and an outer peripheral surface 9. First main surface 1 is, for example, planar. First main surface 1 extends along each of a first direction 101 and a second direction 102.

[0028] The outer peripheral surface 9 has an orientation flat portion 7 and an arc-shaped portion 8. When viewed along a straight line perpendicular to the first main surface 1 (hereinafter also referred to as a plan view), the orientation flat portion 7 is linear. The orientation flat portion 7 extends in, for example, the <11-20> direction. The arc-shaped portion 8 is continuous with the orientation flat portion 7. In a plan view, the arc-shaped portion 8 is arc-shaped.

[0029] Silicon carbide substrate 100 is made of, for example, hexagonal silicon carbide. The polytype of hexagonal silicon carbide constituting silicon carbide substrate 100 is, for example, 4H.

[0030] The first direction 101 is, for example, the <11-20> direction. The first direction 101 may be, for example, the [11-20] direction. The first direction 101 may be, for example, a direction obtained by projecting the <11-20> direction onto the first main surface 1. From another perspective, the first direction 101 may be, for example, a direction including a <11-20> direction component.

[0031] The second direction 102 is, for example, the <1-100> direction. The second direction 102 may be, for example, the [1-100] direction. The second direction 102 may be, for example, a direction obtained by projecting the <1-100> direction onto the first main surface 1. From another perspective, the second direction 102 may be, for example, a direction including a <1-100> direction component.

[0032] As shown in FIG. 1 , the first main surface 1 is composed of an outer edge 13, an outer peripheral region 11, and a central region 12. The outer peripheral region 11 is a region within 5 mm from the outer edge 13. From another perspective, in a plan view, the distance D between the outer edge 13 and the boundary between the outer peripheral region 11 and the central region 12 is 5 mm. The central region 12 is surrounded by the outer peripheral region 11. The central region 12 is continuous with the outer peripheral region 11. The central region 12 includes a center O of the first main surface 1. In a plan view, the center O is the center of a circle that includes an arc along the arc-shaped portion 8.

[0033] As shown in FIG. 1, the diameter of the first main surface 1 is defined as a first diameter W1. The first diameter W1 is, for example, 100 mm (4 inches). The first diameter W1 may be, for example, 100 mm or more, 150 mm (6 inches) or more, or 200 mm (8 inches) or more. The first diameter W1 may be, for example, 400 mm (16 inches) or less. In a plan view, the first diameter W1 is the longest linear distance between two different points on the outer edge 13.

[0034] As used herein, 4 inches means 100 mm or 101.6 mm (4 inches x 25.4 mm / inch). 6 inches means 150 mm or 152.4 mm (6 inches x 25.4 mm / inch). 8 inches means 200 mm or 203.2 mm (8 inches x 25.4 mm / inch). 16 inches means 400 mm or 406.4 mm (16 inches x 25.4 mm / inch).

[0035] 1, the diameter of the central region 12 is defined as a second diameter W2. The second diameter W2 is, for example, 90 mm. In a plan view, the second diameter W2 is the longest linear distance between two different points on the boundary between the central region 12 and the outer peripheral region 11.

[0036] Fig. 2 is a schematic cross-sectional view taken along line II-II in Fig. 1. The cross section shown in Fig. 2 is perpendicular to first main surface 1 and parallel to first direction 101. As shown in Fig. 2, silicon carbide substrate 100 has second main surface 2. Second main surface 2 is opposite first main surface 1.

[0037] The first main surface 1 may be, for example, a {0001} plane, or a plane inclined relative to the {0001} plane. When the first main surface 1 is inclined relative to the {0001} plane, the inclination angle (off angle θ) of the first main surface 1 relative to the {0001} plane is, for example, greater than 0° and equal to or less than 8°. When the first main surface 1 is inclined relative to the {0001} plane, the inclination direction (off direction) of the first main surface 1 is, for example, the <11-20> direction.

[0038] Outer peripheral surface 9 is continuous with each of first main surface 1 and second main surface 2. Outer peripheral surface 9 is continuous with first main surface 1 at outer edge 13. Third direction 103 is the direction from first main surface 1 toward second main surface 2. Third direction 103 is perpendicular to each of first direction 101 and second direction 102. Silicon carbide substrate 100 has a thickness H in third direction 103 of, for example, not less than 100 μm and not more than 2 mm.

[0039] The silicon carbide substrate 100 contains nitrogen (N) as an n-type impurity. The nitrogen concentration of the silicon carbide substrate 100 is 1.0×10 18 cm -3 The nitrogen concentration in silicon carbide substrate 100 is, for example, 3.0×10 18 cm -3 It may be 5.0 x 10 or more. 18 cm -3 The nitrogen concentration in silicon carbide substrate 100 may be, for example, 1.0×10 19 cm -3 It may be less than or equal to 9.0 x 10 18 cm -3 It may be the following:

[0040] The nitrogen concentration of the silicon carbide substrate 100 can be measured by secondary ion mass spectrometry (SIMS). In SIMS, for example, a secondary ion mass spectrometer (model number: IMS7f) manufactured by Cameca can be used. In SIMS, for example, oxygen (O + ) or cesium (Cs + ) is used. A primary ion beam is scanned at a measurement position. Secondary ions are detected at the measurement position. Specifically, the secondary ions are detected in a circular region centered at a center O, for example. The diameter of the circular region is, for example, about 30 μm or more and 150 μm or less. The detected secondary ions are analyzed to measure the nitrogen concentration of silicon carbide substrate 100.

[0041] (area density of metal impurities) Silicon carbide substrate 100 contains metal impurities. Specifically, silicon carbide substrate 100 contains titanium, aluminum, and zirconium.

[0042] The surface density of metal impurities in the central region 12 will now be described. FIG. 3 is a schematic plan view showing the measurement position of the surface density of metal impurities. As shown in FIG. 3, in plan view, the central region 12 is divided into a plurality of square regions 50. In plan view, each of the plurality of square regions 50 has a substantially square shape. The length L of one side of each of the plurality of square regions 50 is 10 mm.

[0043] For example, if the first diameter W1 is 100 mm, the diameter of the central region 12 (second diameter W2) is 90 mm. In this case, a 90 mm x 90 mm square is first assumed to circumscribe the central region 12 in a plan view. The 90 mm x 90 mm square is divided into 10 mm x 10 mm square regions (9 x 9 = 81).

[0044] In a plan view, the square area intersecting the boundary between the peripheral area 11 and the central area 12 is missing a portion and is not a complete square area. Therefore, the square area intersecting the boundary between the peripheral area 11 and the central area 12 is not considered to be part of the square area 50 that constitutes the central area 12.

[0045] In plan view, one side of each of the square regions 50 is parallel to the extension direction of the orientation flat portion 7. In other words, one side of each of the square regions 50 is parallel to the first direction 101. The surface density of the metal impurities is measured in each of the square regions 50. Specifically, the surface density of the metal impurities is determined by dividing the number of atoms of the metal impurities in the measurement region by the area of ​​the measurement region.

[0046] The surface density of metal impurities can be measured by total reflection x-ray fluorescence (TXRF). As a TXRF device, for example, TXRF-3760 (trademark) manufactured by Rigaku Corporation can be used.

[0047] The surface density of titanium is 2×10 11 atoms / cm 2 The number of square areas 50 where the areal density of titanium is 2×10 or more is measured. 11 atoms / cm 2 The value obtained by dividing the above number of square regions 50 by the total number of the plurality of square regions 50 is set as a first value.

[0048] The first value is 8% or less. The first value may be, for example, 6.5% or less, or 5% or less. The first value may be, for example, 0.1% or more, 1% or more, or 3% or more. First main surface 1 has a titanium areal density of 2×10 11 atoms / cm 2 The square area 50 may be larger than or equal to 100 mm.

[0049] The areal density of aluminum is 2 x 10 11 atoms / cm 2The number of square areas 50 where the areal density of aluminum is 2×10 or more is measured. 11 atoms / cm 2 The value obtained by dividing the number of square regions 50 by the total number of the plurality of square regions is set to a second value.

[0050] The second value is 8% or less. The second value may be, for example, 6.5% or less, or 5% or less. The second value may be, for example, 0.1% or more, 1% or more, or 3% or more. First main surface 1 has an aluminum areal density of 2×10 11 atoms / cm 2 The square area 50 may be larger than or equal to 100 mm.

[0051] (Concentration of metal impurities) Next, the concentration of metal impurities will be described. The concentration of metal impurities is measured by glow discharge mass spectrometry (GDMS). For GDMS, for example, an ELEMENT GD PLUS (trademark) glow discharge mass spectrometer manufactured by ThermoFisher Scientific can be used. The following conditions are used: high-purity argon as the discharge gas, a discharge surface diameter of 8 mm, a discharge current of 22 mA, and a discharge voltage of 1 kV.

[0052] The concentration of metal impurities is measured by GDMS at the center O of the first main surface 1. The concentration of metal impurities is measured by GDMS in a region at a depth of approximately 5 μm or more and 10 μm or less from the first main surface 1. Specifically, the concentration of metal impurities is determined by dividing the number of atoms of the metal impurity in the measurement region by the volume of the measurement region. In this way, the concentration of metal impurities at the center O is measured.

[0053] The concentration of titanium at the center O is 0.6×10 16 cm -3 The concentration of titanium at the center O is, for example, 0.5×10 16 cm -3 It may be less than 0.3 x 10 16cm -3 The titanium concentration at the center O may be, for example, 0.1×10 16 cm -3 It may be 0.15 x 10 or more 16 cm -3 It may be more than that.

[0054] The concentration of aluminum at the center O is 2.5 × 10 16 cm -3 The aluminum concentration at the center O is, for example, 2.2 × 10 16 cm -3 It may be less than or equal to 2.0 x 10 16 cm -3 The aluminum concentration at the center O may be, for example, 0.1×10 16 cm -3 It may be 0.5 x 10 or more 16 cm -3 It may be more than that.

[0055] The concentration of zirconium at the center O is 2.5×10 16 cm -3 The concentration of zirconium at the center O is, for example, 2.2 × 10 16 cm -3 It may be less than or equal to 2.0 x 10 16 cm -3 It may be less than or equal to 1.0 x 10 16 cm -3 It may be less than 0.5 x 10 16 cm -3 The concentration of zirconium at the center O may be, for example, 0.01×10 16 cm -3 It may be 0.1 x 10 or more 16 cm -3 It may be more than that.

[0056] <Method for manufacturing silicon carbide substrate> Next, a method for manufacturing silicon carbide substrate 100 according to this embodiment will be described. Fig. 4 is a flow diagram schematically showing the method for manufacturing silicon carbide substrate 100. As shown in Fig. 4, the method for manufacturing silicon carbide substrate 100 according to this embodiment mainly includes a preparation step (S10), a pre-firing step (S20), a crystal growth step (S30), and a cutting step (S40).

[0057] First, a preparation step (S10) is carried out. Fig. 5 is a cross-sectional schematic diagram showing the preparation step (S10). As shown in Fig. 5, silicon carbide crystal manufacturing apparatus 500 is prepared. Silicon carbide crystal manufacturing apparatus 500 mainly has crucible 30, first resistance heater 81, second resistance heater 82, third resistance heater 83, and a radiation thermometer (not shown).

[0058] Crucible 30 has a raw material storage section 32 and a lid 31. Lid 31 is placed on raw material storage section 32. Raw material storage section 32 has a bottom surface (first bottom surface 78). First resistive heater 81 is placed above lid 31. Second resistive heater 82 is placed so as to surround the outer periphery of raw material storage section 32. Third resistive heater 83 is placed below first bottom surface 78. A radiation thermometer (not shown) is placed below first bottom surface 78. The radiation thermometer measures, for example, the temperature at the center of the bottom surface (first bottom surface 78) of raw material storage section 32.

[0059] As shown in FIG. 5 , silicon carbide raw material 96 is placed in crucible 30. Specifically, silicon carbide raw material 96 is placed in raw material storage portion 32. Silicon carbide raw material 96 is, for example, polycrystalline silicon carbide powder. A surface 97 of silicon carbide raw material 96 faces lid portion 31. A bottom surface (second bottom surface 98) of silicon carbide raw material 96 is opposite surface 97. The direction from lid portion 31 toward silicon carbide raw material 96 is defined as growth direction 105.

[0060] Next, the pre-baking step (S20) is carried out. As shown in Fig. 4, the pre-baking step (S20) includes a first baking step (S21), a decompression step (S22), and a second baking step (S23).

[0061] First, a first firing step (S21) is performed. With silicon carbide raw material 96 placed in crucible 30, the silicon carbide raw material 96 is fired. Specifically, crucible 30 is heated by applying power to each of first resistive heater 81, second resistive heater 82, and third resistive heater 83. In the pre-firing step (S20), crucible 30 is heated to, for example, 2150°C or higher and 2250°C or lower. In this specification, the temperature of crucible 30 is a temperature measured using the above-mentioned radiation thermometer.

[0062] Fig. 6 is a schematic diagram showing the relationship between the pressure inside the crucible 30 and time in the pre-firing step (S20). In Fig. 6, the horizontal axis represents time, and the vertical axis represents the pressure inside the crucible 30. As shown in Fig. 6, the first firing step (S21) is carried out between a first time point T1 and a second time point T2. The time from the first time point T1 to the second time point T2 is, for example, 3 hours.

[0063] In the first firing step (S21), the pressure inside crucible 30 is set to first pressure C1. As a result, silicon carbide source material 96 is fired in a state where the pressure inside crucible 30 is first pressure C1.

[0064] The first pressure C1 is 200 Pa or more. The first pressure C1 may be, for example, 80 kPa. The first pressure C1 may be, for example, 500 Pa or more, or 1 kPa or more. The first pressure C1 may be, for example, 100 kPa or less, or 90 kPa or less.

[0065] Next, a depressurization step (S22) is performed. Specifically, the pressure in the crucible 30 is slowly reduced from the second time point T2 to the third time point T3. The pressure in the crucible 30 is reduced from the first pressure C1 to the second pressure C2. The time from the second time point T2 to the third time point T3 is, for example, one hour. The second pressure C2 is lower than the first pressure C1. The second pressure C2 is, for example, 100 Pa or 500 Pa.

[0066] Next, a second firing step (S23) is carried out between third point in time T3 and fourth point in time T4. Specifically, silicon carbide raw material 96 is fired while the pressure inside crucible 30 is at second pressure C2. The time from third point in time T3 to fourth point in time T4 is, for example, 10 hours. In this way, silicon carbide raw material 96 is pre-fired. After pre-firing step (S20), crucible 30 is cooled to room temperature.

[0067] FIG. 7 is a partial cross-sectional schematic diagram showing the surface of silicon carbide raw material 96 after the pre-firing step (S20). FIG. 7 shows surface 97 of silicon carbide raw material 96 as viewed along growth direction 105. As shown in FIG. 7, after the pre-firing step (S20), depressions 89 may be formed on surface 97 of silicon carbide raw material 96. When viewed along growth direction 105, the shape of depression 89 may be, for example, circular. When viewed along growth direction 105, the diameter of depression 89 (third diameter W3) is 10 mm or more. The third diameter W3 is the longest distance between two different points on the outer edge of depression 89 as viewed along growth direction 105.

[0068] The depression 89 is formed by bumping in the silicon carbide raw material 96. Specifically, in the pre-firing step (S20), when the silicon carbide raw material 96 is heated, a portion of the silicon carbide raw material 96 sublimes. Gas generated by the sublimation of the silicon carbide raw material 96 may be retained within the silicon carbide raw material 96. In this case, the pressure of the gas becomes excessively high, causing a portion of the silicon carbide raw material 96 close to the surface 97 to burst. This causes the depression 89 to be formed on the surface 97.

[0069] Fig. 8 is a schematic cross-sectional view taken along line VIII-VIII in Fig. 7. As shown in Fig. 8, recesses 89 are recessed in growth direction 105 relative to surface 97. Depth F of recesses 89 in growth direction 105 is 3 mm or greater. The number of recesses 89 after the pre-firing step (S20) is, for example, 5 or less, or zero.

[0070] Next, the crystal growth step (S30) is performed. Fig. 9 is a cross-sectional schematic diagram showing a state in which a seed substrate 90 is placed in the crucible 30. The seed substrate 90 is prepared. The seed substrate 90 is fixed to the lid 31 using, for example, an adhesive (not shown). The seed substrate 90 has a growth surface 91 and an attachment surface 92.

[0071] 9, the attachment surface 92 is opposite to the growth surface 91. The growth surface 91 faces the silicon carbide source material 96. The attachment surface 92 faces the lid portion 31.

[0072] Next, the crystal growth step (S30) is carried out. As shown in Fig. 4, the crystal growth step (S30) includes a first heating step (S31), a temperature increasing step (S32), and a second heating step (S33).

[0073] First, a first heating step (S31) is performed. Crucible 30 is heated by applying electric power to each of first resistive heater 81, second resistive heater 82, and third resistive heater 83. Specifically, crucible 30 is heated so that the temperature of silicon carbide source material 96 becomes higher than the temperature of seed substrate 90.

[0074] FIG. 10 is a schematic diagram showing the relationship between the temperature of crucible 30 and time in the crystal growth step (S30). In FIG. 10, the horizontal axis represents time, and the vertical axis represents the temperature of crucible 30. As shown in FIG. 10, a first heating step (S31) is performed between a fifth time point T5 and a sixth time point T6. In the first heating step (S31), the temperature of crucible 30 (first temperature B1) is, for example, 2230°C. The pressure inside crucible 30 is reduced to, for example, 500 Pa. The pressure inside crucible 30 in the crystal growth step (S30) is, for example, lower than first pressure C1 and higher than second pressure C2. Typically, in the initial growth stage when growth begins from the surface of seed substrate 90, step flow growth tends to become unstable, and different polymorphic crystals are likely to be mixed in. By performing the first heating step in which the temperature of the crucible 30 is relatively low, the growth rate in the initial stage of growth can be intentionally reduced, which can prevent the incorporation of different polymorphic crystals, thereby achieving stable crystal growth.

[0075] Next, a temperature increasing step (S32) is performed. Specifically, from the sixth point in time T6 to the seventh point in time T7, the temperature of the crucible 30 is increased from the first temperature B1 to the second temperature B2. The second temperature B2 is, for example, 2310°C.

[0076] Next, a second heating step (S33) is performed from a seventh point in time T7 to an eighth point in time T8. In the second heating step (S33), the temperature of the crucible 30 is maintained at a second temperature B2. This causes the silicon carbide raw material 96 to sublimate, generating silicon carbide gas.

[0077] Fig. 11 is a cross-sectional view showing the second heating step (S33). As shown in Fig. 11, the silicon carbide gas recrystallizes on the surface of seed substrate 90. This causes silicon carbide crystal 110 to grow on the surface of seed substrate 90. After growth of silicon carbide crystal 110 is completed, silicon carbide crystal 110 is cooled to room temperature. In this manner, silicon carbide crystal 110 is formed.

[0078] The average temperature at surface 97 of silicon carbide raw material 96 is defined as a first average temperature. The average temperature at the bottom surface (second bottom surface 98) of silicon carbide raw material 96 is defined as a second average temperature. In the crystal growth step (S30), the second average temperature is, for example, higher than the first average temperature. Each of the first average temperature and the second average temperature can be calculated by finite element analysis based on the temperature of the bottom surface (first bottom surface 78) of crucible 30 measured using a radiation thermometer.

[0079] In the crystal growth step (S30), the power applied to each of the first resistive heater 81, the second resistive heater 82, and the third resistive heater 83 is controlled so as to reduce the absolute value of the difference between the first average temperature and the second average temperature. In the crystal growth step (S30), the absolute value of the difference between the first average temperature and the second average temperature is 25°C or less. Specifically, in each of the first heating step (S31), the temperature increasing step (S32), and the second heating step (S33), the absolute value of the difference between the first average temperature and the second average temperature is 25°C or less.

[0080] In the crystal growth step (S30), the absolute value of the difference between the first average temperature and the second average temperature may be, for example, 20° C. or less, 15° C. or less, 13° C. or less, or 11° C. or less. In the crystal growth step (S30), the absolute value of the difference between the first average temperature and the second average temperature may be, for example, 1° C. or more, or 3° C. or more.

[0081] 12 is a schematic diagram showing the temperature distribution in crucible 30 in the second heating step (S33). In FIG. 12, the horizontal axis represents the position in crucible 30 in a direction parallel to growth direction 105. The vertical axis represents the average temperature in crucible 30 on a plane perpendicular to growth direction 105. In FIG. 12, first position P1 is the position where the bottom surface (second bottom surface 98) of silicon carbide raw material 96 is located. Second position P2 is the position where surface 97 of silicon carbide raw material 96 is located. Third position P3 is the position where growth surface 91 of the seed substrate is located.

[0082] 12, the temperature gradient between first position P1 and second position P2 is smaller than the temperature gradient between second position P2 and third position P3. From another perspective, the temperature gradient of silicon carbide source material 96 in growth direction 105 is smaller than the temperature gradient from silicon carbide source material 96 to seed substrate 90.

[0083] The number of dents 89 (see FIGS. 7 and 8) after the crystal growth step (S30) may be the same as the number of dents 89 after the pre-firing step (S20), or may be greater than the number of dents 89 after the pre-firing step (S20). The number of dents 89 after the crystal growth step (S30) is, for example, 5 or less, or 0. The number of dents 89 after the crystal growth step (S30) may be, for example, 3 or less, or 1 or less.

[0084] Next, the cutting step (S40) is carried out. Specifically, silicon carbide crystal 110 is sliced ​​using, for example, a wire saw. As a result, a plurality of silicon carbide substrates 100 are obtained.

[0085] (Method for manufacturing silicon carbide semiconductor device) Next, a method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment will be described. Fig. 13 is a flow diagram that schematically shows the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment. As shown in Fig. 13, the method for manufacturing the silicon carbide semiconductor device 400 according to this embodiment mainly includes a step (S1) of manufacturing a silicon carbide epitaxial substrate and a step (S2) of forming an electrode on the silicon carbide epitaxial layer.

[0086] First, a step (S1) of manufacturing a silicon carbide epitaxial substrate is performed. The step (S1) of manufacturing a silicon carbide epitaxial substrate includes a step (S50) of preparing a silicon carbide substrate and a step (S60) of forming a silicon carbide epitaxial layer on the silicon carbide substrate. First, the step (S50) of preparing a silicon carbide substrate is performed. Specifically, a silicon carbide substrate 100 (see FIGS. 1 and 2) is prepared using the method for manufacturing a silicon carbide substrate 100 described above.

[0087] Next, a step (S60) of forming a silicon carbide epitaxial layer on the silicon carbide substrate is performed. Specifically, silicon carbide epitaxial layer 40 is formed by epitaxial growth on first main surface 1 of silicon carbide substrate 100. In the epitaxial growth, for example, silane (SiH4) and propane (C3H8) are used as source gases, and hydrogen (H2) is used as a carrier gas. The temperature of the epitaxial growth is, for example, about 1400°C or higher and 1700°C or lower. In the epitaxial growth, an n-type impurity such as nitrogen is introduced into silicon carbide epitaxial layer 40. In this way, silicon carbide epitaxial substrate 300 according to this embodiment is manufactured.

[0088] Fig. 14 is a cross-sectional schematic diagram showing the configuration of a silicon carbide epitaxial substrate 300 according to this embodiment. As shown in Fig. 14, the silicon carbide epitaxial substrate 300 has a silicon carbide substrate 100 and a silicon carbide epitaxial layer 40. The silicon carbide epitaxial layer 40 is provided on the silicon carbide substrate 100. The silicon carbide epitaxial layer 40 has a third main surface 3. The third main surface 3 forms the front surface of the silicon carbide epitaxial substrate 300. The second main surface 2 forms the back surface of the silicon carbide epitaxial substrate 300.

[0089] Silicon carbide epitaxial layer 40 may have a buffer layer 41 and a drift layer 42. Buffer layer 41 is in contact with silicon carbide substrate 100 at first main surface 1. Drift layer 42 is provided on buffer layer 41. Buffer layer 41 and drift layer 42 each contain an n-type impurity such as nitrogen. The concentration of the n-type impurity contained in buffer layer 41 may be higher than the concentration of the n-type impurity contained in drift layer 42.

[0090] Next, a step (S2) of forming an electrode on the silicon carbide epitaxial layer is carried out. Specifically, the following processing is carried out on silicon carbide epitaxial substrate 300. First, ions are implanted into silicon carbide epitaxial substrate 300.

[0091] 15 is a schematic cross-sectional view showing a step of forming a body region. In the step of forming the body region, p-type impurities such as aluminum are ion-implanted into third main surface 3 of silicon carbide epitaxial layer 40. This forms body region 113 having p-type conductivity. Portions where body region 113 is not formed become drift layer 42 and buffer layer 41. Body region 113 has a thickness of, for example, 0.9 μm. Silicon carbide epitaxial layer 40 includes buffer layer 41, drift layer 42, and body region 113.

[0092] Next, a step of forming a source region is performed. Fig. 16 is a cross-sectional view showing the step of forming the source region. Specifically, n-type impurities such as phosphorus are ion-implanted into the body region 113. This forms a source region 114 having n-type conductivity. The thickness of the source region 114 is, for example, 0.4 µm. The concentration of the n-type impurities contained in the source region 114 is higher than the concentration of the p-type impurities contained in the body region 113.

[0093] Next, a p-type impurity such as aluminum is ion-implanted into the source region 114 to form a contact region 118. The contact region 118 is formed to penetrate the source region 114 and the body region 113 and to be in contact with the drift layer 42. The concentration of the p-type impurity contained in the contact region 118 is higher than the concentration of the n-type impurity contained in the source region 114.

[0094] Next, activation annealing is performed to activate the implanted impurities. The temperature of the activation annealing is, for example, 1500°C or higher and 1900°C or lower. The activation annealing time is, for example, about 30 minutes. The atmosphere for the activation annealing is, for example, an argon atmosphere.

[0095] Next, a step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 40 is performed. FIG. 17 is a cross-sectional schematic diagram showing the step of forming trenches in the third main surface 3 of the silicon carbide epitaxial layer 40. A mask 117 having openings is formed on the third main surface 3 including the source region 114 and the contact region 118. The source region 114, the body region 113, and a portion of the drift layer 42 are removed by etching using the mask 117. For example, inductively coupled plasma reactive ion etching can be used as the etching method. Specifically, for example, inductively coupled plasma reactive ion etching using SF or a mixed gas of SF and O as the reactive gas is used. Recesses are formed in the third main surface 3 by the etching.

[0096] Next, thermal etching is performed on the recesses. Thermal etching can be performed, for example, by heating the mask 117 formed on the third main surface 3 in an atmosphere containing a reactive gas having at least one type of halogen atom. The at least one type of halogen atom includes at least one of chlorine (Cl) atoms and fluorine (F) atoms. The atmosphere includes, for example, Cl2, BCl3, SF6, or CF4. For example, a mixed gas of chlorine gas and oxygen gas is used as the reactive gas, and the thermal etching is performed at a heat treatment temperature of, for example, 700°C or higher and 1000°C or lower. The reactive gas may contain a carrier gas in addition to the above-mentioned chlorine gas and oxygen gas. Examples of the carrier gas that can be used include nitrogen gas, argon gas, and helium gas.

[0097] 17 , a trench 56 is formed in the third main surface 3 by thermal etching. The trench 56 is defined by a sidewall surface 53 and a bottom wall surface 54. The sidewall surface 53 is formed by the source region 114, the body region 113, and the drift layer 42. The bottom wall surface 54 is formed by the drift layer 42. Next, the mask 117 is removed from the third main surface 3.

[0098] Next, a step of forming a gate insulating film is performed. Fig. 18 is a cross-sectional schematic view showing the step of forming a gate insulating film. Specifically, silicon carbide epitaxial substrate 300 having trench 56 formed in third main surface 3 is heated in an oxygen-containing atmosphere at a temperature of, for example, 1300°C or higher and 1400°C or lower. This forms gate insulating film 115 that is in contact with drift layer 42 at bottom wall surface 54, in contact with drift layer 42, body region 113, and source region 114 at side wall surface 53, and in contact with source region 114 and contact region 118 at third main surface 3.

[0099] Next, a step of forming a gate electrode is performed. Fig. 19 is a cross-sectional view showing a step of forming a gate electrode and an interlayer insulating film. Gate electrode 127 is formed inside trench 56 so as to contact gate insulating film 115. Gate electrode 127 is disposed inside trench 56 and is formed on gate insulating film 115 so as to face each of sidewall surface 53 and bottom wall surface 54 of trench 56. Gate electrode 127 is formed by, for example, LPCVD (Low Pressure Chemical Vapor Deposition).

[0100] Next, an interlayer insulating film 126 is formed. The interlayer insulating film 126 is formed so as to cover the gate electrode 127 and to be in contact with the gate insulating film 115. The interlayer insulating film 126 is formed by, for example, chemical vapor deposition. The interlayer insulating film 126 is made of, for example, a material containing silicon dioxide. Next, the interlayer insulating film 126 and the gate insulating film 115 are partially etched so as to form openings over the source region 114 and the contact region 118. As a result, the contact region 118 and the source region 114 are exposed from the gate insulating film 115.

[0101] Next, a step of forming a source electrode is performed. The source electrode 116 is formed so as to contact each of the source region 114 and the contact region 118. The source electrode 116 is formed by, for example, a sputtering method. The source electrode 116 is made of a material containing, for example, Ti (titanium), Al (aluminum), and Si (silicon).

[0102] Next, alloying annealing is performed. Specifically, the source electrode 116 in contact with each of the source region 114 and the contact region 118 is maintained at a temperature of, for example, 900°C or higher and 1100°C or lower for about 5 minutes. This causes at least a portion of the source electrode 116 to be silicided. This forms the source electrode 116 in ohmic contact with the source region 114. The source electrode 116 may also form an ohmic contact with the contact region 118.

[0103] Next, the source wiring 119 is formed. The source wiring 119 is electrically connected to the source electrode 116. The source wiring 119 is formed so as to cover the source electrode 116 and the interlayer insulating film 126.

[0104] Next, the step of forming a drain electrode is carried out. First, the silicon carbide substrate 100 is polished at the second main surface 2. This reduces the thickness of the silicon carbide substrate 100. Next, the drain electrode 123 is formed. The drain electrode 123 is formed so as to be in contact with the second main surface 2. In this manner, the silicon carbide semiconductor device 400 according to this embodiment is manufactured.

[0105] 20 is a cross-sectional view schematically illustrating a configuration of a silicon carbide semiconductor device 400 according to this embodiment. The silicon carbide semiconductor device 400 is, for example, a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The silicon carbide semiconductor device 400 mainly includes a silicon carbide epitaxial substrate 300, a gate electrode 127, a gate insulating film 115, a source electrode 116, a drain electrode 123, a source wiring 119, and an interlayer insulating film 126. The silicon carbide epitaxial substrate 300 includes a buffer layer 41, a drift layer 42, a body region 113, a source region 114, and a contact region 118. The silicon carbide semiconductor device 400 may be, for example, an IGBT (Insulated Gate Bipolar Transistor) or the like.

[0106] Next, silicon carbide substrate 100 according to this embodiment, a method for manufacturing silicon carbide substrate 100, a method for manufacturing silicon carbide epitaxial substrate 300, a method for manufacturing silicon carbide epitaxial substrate 300 and silicon carbide semiconductor device 400, and the effects of silicon carbide semiconductor device 400 will be described.

[0107] If the silicon carbide substrate 100 contains titanium, a high-resistance layer may be formed at the interface between the silicon carbide substrate 100 and the silicon carbide epitaxial layer 40 when the silicon carbide epitaxial layer 40 is formed on the silicon carbide substrate 100. When a silicon carbide semiconductor device 400 is manufactured using a silicon carbide epitaxial substrate 300 on which a high-resistance layer is formed, the on-resistance of the silicon carbide semiconductor device 400 increases. As a result, the yield of the silicon carbide semiconductor device 400 decreases.

[0108] In silicon carbide substrate 100 according to the present embodiment, when central region 12 is divided into a plurality of square regions 50 each having a side length of 10 mm, and the areal density of titanium in each of the plurality of square regions 50 is measured using total reflection X-ray fluorescence analysis, the areal density of titanium is found to be 2×10 11 atoms / cm 2 The value obtained by dividing the number of square regions 50 having an excessively high titanium areal density on the first main surface 1 by the total number of the square regions 50 is 8% or less. In this way, the number of square regions 50 having an excessively high titanium areal density on the first main surface 1 is reduced. Therefore, it is possible to reduce the region where a high resistance layer is formed at the interface between the silicon carbide substrate 100 and the silicon carbide epitaxial layer 40. This makes it possible to prevent an increase in the on-resistance of the silicon carbide semiconductor device 400. As a result, it is possible to improve the yield of the silicon carbide semiconductor device 400.

[0109] In the silicon carbide substrate 100 according to this embodiment, when the titanium concentration at the center O is measured using glow discharge mass spectrometry, the titanium concentration is 0.6×10 16 cm -3 The following is an explanation. In this way, the titanium concentration inside silicon carbide substrate 100 is reduced. Therefore, when silicon carbide epitaxial layer 40 is formed on silicon carbide substrate 100, it is possible to prevent a high resistance layer from being formed at the interface between silicon carbide substrate 100 and silicon carbide epitaxial layer 40. This makes it possible to prevent an increase in the on-resistance of silicon carbide semiconductor device 400. As a result, it is possible to improve the yield of silicon carbide semiconductor device 400.

[0110] When the silicon carbide substrate 100 contains aluminum, the aluminum functions as a p-type impurity. Therefore, when the silicon carbide substrate 100 is doped with nitrogen as an n-type impurity, charging defects may occur due to the aluminum contained in the silicon carbide substrate 100. In this case, the electrical resistivity of the silicon carbide substrate 100 increases excessively. Therefore, the yield of silicon carbide semiconductor devices 400 manufactured using the silicon carbide substrate 100 may decrease.

[0111] In silicon carbide substrate 100 according to the present embodiment, when central region 12 is divided into a plurality of square regions 50 each having a side length of 10 mm, and the surface density of aluminum in each of the plurality of square regions 50 is measured using total reflection X-ray fluorescence analysis, the surface density of aluminum is found to be 2×10 11 atoms / cm 2 The value obtained by dividing the number of square regions 50 or more by the total number of the plurality of square regions 50 is 8% or less. In this way, the number of square regions 50 in which the areal density of aluminum is excessively high on the first main surface 1 is reduced. Therefore, it is possible to prevent the occurrence of charging defects caused by the aluminum contained in the silicon carbide substrate 100. From another perspective, it is possible to reduce the number of regions in the silicon carbide substrate 100 in which the electrical resistivity is excessively high. As a result, it is possible to improve the yield of the silicon carbide semiconductor device 400.

[0112] In the silicon carbide substrate 100 according to this embodiment, when the aluminum concentration at the center O is measured using glow discharge mass spectrometry, the aluminum concentration is 2.5×10 16 cm -3 The following is true. In this way, the aluminum concentration inside silicon carbide substrate 100 is reduced. Therefore, it is possible to prevent the occurrence of charging defects caused by aluminum contained in silicon carbide substrate 100. This makes it possible to prevent the electrical resistivity of silicon carbide substrate 100 from becoming excessively high. As a result, it is possible to improve the yield of silicon carbide semiconductor devices 400.

[0113] When the silicon carbide substrate 100 contains zirconium, similarly to titanium, a high resistance layer may be formed at the interface between the silicon carbide substrate 100 and the silicon carbide epitaxial layer 40 when the silicon carbide epitaxial layer 40 is formed on the silicon carbide substrate 100. This reduces the yield of the silicon carbide semiconductor device 400.

[0114] In the silicon carbide substrate 100 according to this embodiment, when the concentration of zirconium at the center O is measured by glow discharge mass spectrometry, the concentration of zirconium is 2.5×10 16 cm -3 The following explains this. In this way, the concentration of zirconium inside silicon carbide substrate 100 is reduced. This makes it possible to more effectively prevent an increase in the on-resistance of silicon carbide semiconductor device 400. As a result, it is possible to more effectively improve the yield of silicon carbide semiconductor device 400.

[0115] The inventors have made the following findings as a result of extensive investigation into measures for reducing metal impurities contained in silicon carbide substrate 100. First, the inventors focused on the shape of the surface of silicon carbide raw material 96 after crystal growth. A large number of depressions 89 existed on the surface of silicon carbide raw material 96 from which silicon carbide substrate 100 having a high surface density and concentration of metal impurities was manufactured.

[0116] In the process of growing silicon carbide crystals, carbonization of silicon carbide raw material 96 may progress significantly at surface 97 of silicon carbide raw material 96. Carbonization of silicon carbide raw material 96 at surface 97 blocks the passage of gas generated by sublimation inside the raw material. This causes the gas pressure inside the raw material to become excessively high, resulting in a phenomenon similar to bumping in silicon carbide raw material 96. It is believed that this bumping forms numerous depressions 89.

[0117] When bumping occurs in silicon carbide raw material 96, metal impurities contained in silicon carbide raw material 96 diffuse into crucible 30. As a result, the metal impurities are mixed into silicon carbide crystal 110. As a result, the amount of metal impurities contained in silicon carbide substrate 100 increases.

[0118] Therefore, the pre-firing step and the crystal growth step were extensively studied to prevent bumping in silicon carbide source material 96. As a result, a method for manufacturing silicon carbide substrate 100 in accordance with this embodiment was found.

[0119] According to the method for manufacturing silicon carbide substrate 100 in this embodiment, in the crystal growth step (S30), the absolute value of the difference between the average temperature at surface 97 of silicon carbide raw material 96 and the average temperature at the bottom surface (second bottom surface 98) of silicon carbide raw material 96 is 25°C or less.

[0120] Therefore, it is possible to prevent the carbonization of silicon carbide raw material 96 near surface 97 from progressing excessively quickly compared to silicon carbide raw material 96 near second bottom surface 98. This allows gas generated inside the raw material to escape from the inside of the raw material through surface 97. Therefore, it is possible to prevent bumping of silicon carbide raw material 96. This makes it possible to reduce metal impurities contained in silicon carbide substrate 100. As a result, it is possible to improve the yield of silicon carbide semiconductor device 400.

[0121] According to the method for manufacturing silicon carbide substrate 100 in accordance with the present embodiment, pre-firing step (S20) includes a first firing step (S21) and a second firing step (S23). The pressure (first pressure C1) in crucible 30 in first firing step (S21) is higher than the pressure (second pressure C2) in crucible 30 in second firing step (S23). First pressure C1 is 200 Pa or higher.

[0122] In this way, by first firing the silicon carbide raw material 96 at a high pressure and then firing the silicon carbide raw material 96 at a low pressure, bumping of the silicon carbide raw material 96 can be prevented. This makes it possible to obtain a silicon carbide raw material 96 with reduced irregularities on the surface 97. By using this silicon carbide raw material 96, it is possible to reduce temperature variations caused by irregularities on the surface 97 in the early stage of the crystal growth step (S30). This makes it easier to control the average temperature of the silicon carbide raw material 96 on the surface 97. Therefore, bumping of the silicon carbide raw material 96 can be more effectively prevented.

[0123] According to silicon carbide substrate 100 in accordance with the present embodiment, after the crystal growth step (S30), the number of recesses 89 on surface 97 is five or less, or zero. In this manner, bumping of silicon carbide raw material 96 is prevented. As a result, metal impurities contained in silicon carbide substrate 100 can be reduced. [Example]

[0124] (Sample preparation) Silicon carbide substrates 100 according to Samples 1 to 3 were prepared. Silicon carbide substrate 100 according to Sample 1 is a comparative example. Silicon carbide substrates 100 according to Samples 2 and 3 are examples. Silicon carbide substrates 100 according to Samples 1 to 3 were manufactured according to the method for manufacturing a silicon carbide substrate 100 shown in FIG. 4 .

[0125] [Table 1]

[0126] Table 1 shows the manufacturing conditions for silicon carbide substrate 100 according to Samples 1 to 3. As shown in Table 1, in Sample 1, the temperature difference between the average temperature at surface 97 of silicon carbide raw material 96 and the average temperature at the bottom surface (second bottom surface 98) was 38°C. In Samples 2 and 3, the temperature difference between the average temperature at surface 97 and the average temperature at second bottom surface 98 was 19°C or less. From another perspective, in Samples 2 and 3, silicon carbide substrate 100 was manufactured using the method for manufacturing silicon carbide substrate 100 according to the present embodiment described above.

[0127] In Sample 1, after the crystal growth step (S30), the number of dents 89 on surface 97 was 10. In Samples 2 and 3, after the crystal growth step (S30), the number of dents 89 on surface 97 was 3 or less.

[0128] In Samples 1 to 3, the pressure inside the crucible 30 in the crystal growth step (S30) was set to 500 Pa. The first temperature B1 was set to 2230°C. The second temperature B2 was set to 2310°C. In Samples 1 to 3, the above-mentioned pre-firing step (S20) was carried out before the crystal growth step (S30).

[0129] (Evaluation method) The areal density of metal impurities was measured by TXRF in each of the plurality of square regions 50 of the silicon carbide substrate 100 according to Samples 1 to 3. Specifically, when the areal density of titanium was 2×10 11 atoms / cm 2 The number of square regions 50 that are equal to or greater than 2×10 was divided by the total number of the square regions 50, and a value (first value) was measured. 11 atoms / cm 2 The value (second value) was measured by dividing the number of square regions 50 by the total number of the plurality of square regions 50. As the TXRF device, TXRF-3760 (trademark) manufactured by Rigaku Corporation was used.

[0130] The concentrations of metal impurities at the center O of the silicon carbide substrates 100 of Samples 1 to 3 were measured by GDMS. For GDMS, an ELEMENT GD PLUS (trademark) glow discharge mass spectrometer manufactured by ThermoFisher Scientific was used. High-purity argon was used as the discharge gas. The diameter of the discharge surface was 8 mm. The discharge current was 22 mA. The discharge voltage was 1 kV. (Evaluation results)

[0131] [Table 2]

[0132] Table 2 shows the measurement results of the areal density and concentration of metal impurities in silicon carbide substrate 100 according to Samples 1 to 3. As shown in Table 2, in Sample 1, the first value was 15%. The second value was 14%. In Samples 2 and 3, the first value was 5% or less. The second value was 7% or less.

[0133] From the above results, it was confirmed that the method for manufacturing a silicon carbide substrate 100 according to the example can reduce the number of square regions 50 with high areal density of titanium and aluminum on the first main surface 1, compared to the method for manufacturing a silicon carbide substrate 100 according to the comparative example.

[0134] As shown in Table 2, in sample 1, the titanium concentration was 0.8 × 10 16 cm -3 The aluminum concentration was 3.0 × 10 16 cm -3 The concentration of zirconium was 2.5 × 10 16 cm -3 In samples 2 and 3, the titanium concentration was 0.4 × 10 16 cm -3 The aluminum concentration was 1.9 × 10 16 cm -3 The concentration of zirconium was 0.3 × 10 16 cm -3 It was as follows.

[0135] From the above results, it was confirmed that the method for manufacturing silicon carbide substrate 100 according to the example can reduce the concentrations of titanium, aluminum, and zirconium in silicon carbide substrate 100, compared to the method for manufacturing silicon carbide substrate 100 according to the comparative example.

[0136] The embodiments and examples disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the present invention is defined by the claims rather than the above-described embodiments and examples, and it is intended to include any modifications within the scope of the claims that are equivalent to the claims. [Explanation of symbols]

[0137] 1 First main surface 2 Second main surface 3 Third principal surface 7 Orientation Flat 8 Arc-shaped part 9 Outer surface 11 Outer area 12 Central area 13 Outer Edge 30 Crucible 31 Lid 32 Raw material storage section 40 Silicon carbide epitaxial layer 41 Buffer layer 42 Drift Layer 50 square area 53 Side wall 54 Bottom wall 56 Trench 78 1st bottom 81 First resistance heater 82 Second resistance heater 83 Third resistance heater 89 dent 90 types of substrates 91 Growth aspect 92 Mounting surface 96 Silicon carbide raw material 97 Surface 98 2nd bottom surface 100 Silicon carbide substrate 101 1st direction 102 Second direction 103 Third direction 105 Growth direction 110 Silicon carbide crystal 113 Body Region 114 Source Region 115 Gate insulating film 116 Source electrode 117 Mask 118 Contact Area 119 Source wiring 123 Drain electrode 126 Interlayer insulating film 127 Gate electrode 300 Silicon carbide epitaxial substrate 400 Silicon carbide semiconductor device 500 Manufacturing equipment B1 1st temperature B2 2nd temperature C1 First pressure C2 Second pressure D distance F Depth H Thickness L length O center P1 1st position P2 2nd position P3 3rd position T1 Time 1 T2 Time point 2 T3 Time 3 T4 Time 4 T5 5th time point T6 6th point T7 7th time point T8 8th time point W1 1st diameter W2 Second diameter W3 3rd diameter θ Off angle

Claims

1. A silicon carbide substrate having a main surface, containing titanium and nitrogen, The concentration of the nitrogen is 1.0×10 １８ cm －３ That's all, the main surface is formed by an outer edge, a peripheral region within 5 mm from the outer edge, and a central region surrounded by the peripheral region, When the central region was divided into a plurality of square regions each having a side length of 10 mm, and the areal density of titanium in each of the plurality of square regions was measured using total reflection X-ray fluorescence analysis, The surface density of the titanium is 2×10 １１ atoms / cm ２ a value obtained by dividing the number of square regions that are equal to or greater than this by the total number of the plurality of square regions is 8% or less.

2. A silicon carbide substrate having a main surface, containing aluminum and nitrogen, The concentration of the nitrogen is 1.0×10 １８ cm －３ That's all, the main surface is formed by an outer edge, a peripheral region within 5 mm from the outer edge, and a central region surrounded by the peripheral region, When the central region was divided into a plurality of square regions each having a side length of 10 mm, and the surface density of the aluminum in each of the plurality of square regions was measured using total reflection X-ray fluorescence analysis, The surface density of the aluminum is 2×10 １１ atoms / cm ２ a value obtained by dividing the number of square regions that are equal to or greater than this by the total number of the plurality of square regions is 8% or less.

3. A silicon carbide substrate having a main surface, containing titanium and nitrogen, The concentration of the nitrogen is 1.0×10 １８ cm －３ That's all, When the titanium concentration at the center of the main surface was measured by glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the titanium concentration was 0.6 × 10 １６ cm －３ The silicon carbide substrate is as follows:

4. A silicon carbide substrate having a main surface, containing aluminum and nitrogen, The concentration of the nitrogen is 1.0×10 １８ cm －３ That's all, When the aluminum concentration at the center of the main surface was measured by glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the aluminum concentration was 2.5 × 10 １６ cm －３ The silicon carbide substrate is as follows:

5. the silicon carbide substrate contains zirconium; When the zirconium concentration at the center of the main surface was measured by glow discharge mass spectrometry under the conditions of a discharge surface diameter of 8 mm, a discharge current of 22 mA or more and 23 mA or less, and a discharge voltage of 1 kV, the zirconium concentration was 2.5 × 10 １６ cm －３ The silicon carbide substrate according to claim 1 , wherein:

6. A step of pre-firing a silicon carbide raw material; and growing a silicon carbide crystal on the seed substrate by sublimating the silicon carbide raw material; The step of pre-firing the silicon carbide raw material includes: firing the silicon carbide raw material in a state where the pressure inside the crucible is a first pressure; after the step of firing the silicon carbide raw material in a state where the pressure inside the crucible is the first pressure, the step of firing the silicon carbide raw material in a state where the pressure inside the crucible is a second pressure, the first pressure is greater than the second pressure; the first pressure is 200 Pa or more, a difference in average temperature at the surface of the silicon carbide source material and the bottom surface of the silicon carbide source material having an absolute value of 25° C. or less in the step of growing the silicon carbide crystal;

7. 7. The method for manufacturing a silicon carbide substrate according to claim 6, wherein after the step of growing the silicon carbide crystal, the number of depressions having a diameter of 10 mm or more and a depth of 3 mm or more on the surface of the silicon carbide raw material is 5 or less, or 0.

8. A step of preparing the silicon carbide substrate according to claim 1 or 2; and forming a silicon carbide epitaxial layer on the silicon carbide substrate.

9. A silicon carbide substrate according to claim 3 or 4; a silicon carbide epitaxial layer provided on the silicon carbide substrate.

10. A step of preparing the silicon carbide substrate according to claim 1 or 2; forming a silicon carbide epitaxial layer on the silicon carbide substrate; and forming an electrode on the silicon carbide epitaxial layer.

11. A silicon carbide substrate according to claim 3 or 4; a silicon carbide epitaxial layer provided on the silicon carbide substrate; an electrode provided on the silicon carbide epitaxial layer.

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