Instruction issuance adjustor, information processing apparatus, and instruction issuance adjustment method

Abstract

To prevent a situation where the number of instructions that a computing unit executes per unit time rapidly changes and noise is generated.SOLUTION: An instruction issuance adjustor determines the timing to issue instructions to a computing unit so that the number of instructions issued to the computing unit per unit time is gradually increased or decreased, when an instruction buffer includes instructions at the determined timing, issues the instructions from the instruction buffer to the computing unit, and when the instruction buffer does not include instructions, issues a dummy instruction to the computing unit.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to an instruction issue adjuster, an information processing device, and an instruction issue adjustment method. [Background technology]

[0002] Noise may occur due to a sudden change in the magnitude of the current (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-205905 Summary of the Invention [Problem to be solved by the invention]

[0004] When the number of instructions executed per unit time by the arithmetic unit changes suddenly, the magnitude of the current changes suddenly, which may cause noise. It is preferable to be able to suppress the generation of such noise.

[0005] An example of an object of the present disclosure is to provide an instruction issuance adjuster, an information processing device, and an instruction issuance adjustment method that can solve the above-mentioned problems. [Means for solving the problem]

[0006] According to a first aspect of the present disclosure, an instruction issuance adjuster determines the timing for issuing instructions to an arithmetic unit so that the number of instructions issued to the arithmetic unit per unit time gradually increases or decreases, and at the determined timing, if there is an instruction in the instruction buffer, issues an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issues a dummy instruction to the arithmetic unit.

[0007] According to a second aspect of the present disclosure, an information processing device comprises an instruction buffer, a dummy instruction issuer, a selector, an instruction issuance adjuster, and an arithmetic unit, wherein the instruction buffer is capable of storing instructions, the dummy instruction issuer issues dummy instructions, the selector selects the instruction buffer if there is an instruction in the instruction buffer, and selects the dummy instruction issuer if there is no instruction in the instruction buffer, the instruction issuance adjuster determines the timing for issuing instructions to the arithmetic unit so that the number of instructions per unit time issued to the arithmetic unit increases or decreases gradually, and at the determined timing, if there is an instruction in the instruction buffer, issues an instruction from the instruction buffer to the arithmetic unit, or if there is no instruction in the instruction buffer, issues a dummy instruction to the arithmetic unit, and the arithmetic unit executes the instruction issued by the instruction issuance adjuster.

[0008] According to a third aspect of the present disclosure, an instruction issuance adjustment method includes an instruction issuance adjuster determining a timing for issuing instructions to an arithmetic unit so that the number of instructions per unit time issued to the arithmetic unit is gradually increased or decreased, and at the determined timing, if there is an instruction in an instruction buffer, issuing an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issuing a dummy instruction to the arithmetic unit. [Effects of the Invention]

[0009] According to one aspect of the present disclosure, it is possible to suppress noise caused by a sudden change in the number of instructions executed per unit time by a computing unit. [Brief explanation of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating an example of a configuration of an information processing device according to at least one embodiment. [Figure 2] 10A and 10B are diagrams illustrating an example of changes in the number of instructions issued to a computing unit by an instruction issue adjuster according to at least one embodiment. [Figure 3] FIG. 10 is a diagram illustrating an example of a procedure of a process performed by an information processing device when there is an instruction in an instruction buffer according to at least one embodiment. [Figure 4] FIG. 10 is a diagram illustrating an example of a procedure of a process performed by an information processing device when there are no instructions in an instruction buffer according to at least one embodiment. [Figure 5] 10A and 10B are diagrams illustrating an example of the number of instructions per time that an instruction issue adjuster issues to an arithmetic unit when instructions are sparsely distributed over time into an instruction buffer, according to at least one embodiment. [Figure 6] FIG. 2 illustrates an example of an instruction issue regulator according to at least one embodiment. [Figure 7] FIG. 1 illustrates an example of an information processing device according to at least one embodiment. [Figure 8] FIG. 1 is a diagram illustrating an example of a processing procedure in an instruction issue adjustment method according to at least one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0011] The following describes embodiments of the present invention, but the following embodiments do not limit the scope of the invention as claimed. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0012] First Embodiment 1 is a diagram illustrating an example of the configuration of an information processing device according to at least one embodiment. In the configuration illustrated in FIG. 1, the information processing device 1 includes an instruction buffer 11, a dummy instruction issuer 12, a selector 13, an instruction issue adjuster 14, and a computing unit 15.

[0013] The information processing device 1 executes instructions stored in the instruction buffer 11. In particular, the information processing device 1 adjusts the number of instructions executed per unit time to avoid sudden changes in current magnitude, thereby reducing noise.

[0014] The instruction buffer 11 stores instructions. For example, the instruction buffer 11 may be a buffer that can store 256 instructions. However, the number of instructions that the instruction buffer 11 can store is not limited to a specific number. The instruction input to the instruction buffer 11 is output to the arithmetic unit 15 via the selector 13 and the instruction issue adjuster 14. The output of the instruction is also referred to as the issuance of the instruction. The dummy instruction issuer 12 issues a dummy instruction to the arithmetic unit 15 via the selector 13 and the instruction issue adjuster 14 .

[0015] The selector 13 periodically checks whether there is an instruction in the instruction buffer 11. If there is an instruction in the instruction buffer 11, the selector 13 selects the instruction buffer 11. If there is no instruction in the instruction buffer 11, the selector 13 selects the dummy instruction issuer 12.

[0016] The instruction issuance adjuster 14 issues the instruction from the instruction buffer 11 or the dummy instruction issuer 12 selected by the selector 13 to the arithmetic unit 15. The instruction issuance adjuster 14 adjusts the number of instructions issued to the arithmetic unit 15 per unit time so that the number of instructions issued to the arithmetic unit 15 does not change suddenly.

[0017] Specifically, the instruction issuance adjuster 14 has two internal parameters, parameters E and P, and adds the value of parameter P to parameter E every clock. Then, the instruction issuance adjuster 14 issues an instruction to the arithmetic unit 15 when the value of parameter E exceeds a threshold value. Parameter P is an example of the first parameter, and parameter E is an example of the second parameter.

[0018] If the selector 13 selects the instruction buffer 11, i.e., if there is an instruction in the instruction buffer 11, the instruction issue adjuster 14 increases the value of the parameter P. On the other hand, if the selector 13 selects the dummy instruction issuer 12, i.e., if there is no instruction in the instruction buffer 11, the instruction issue adjuster 14 decreases the value of the parameter P. The arithmetic unit 15 executes the command input from the command issue adjuster 14 .

[0019] FIG. 2 is a diagram showing an example of changes in the number of instructions issued by the instruction issue adjuster 14 to the arithmetic unit 15. The horizontal axis of the graph in FIG. 2 represents time. The unit of the horizontal axis is 100 nanoseconds. The vertical axis represents the number of instructions. FIG. 2 shows the results obtained by simulation on an actual machine.

[0020] Line L11 shows an example of the number of instructions issued from the instruction buffer 11 to the arithmetic unit 15 per unit time if the instruction issue adjuster 14 does not adjust the number of instructions issued to the arithmetic unit 15. In the example of line L11, the number of instructions issued by the instruction issuance regulator 14 per unit time increases sharply around 1×100 nanoseconds (the beginning of the graph). Also, in the example of line L11, the number of instructions issued by the instruction issuance regulator 14 per unit time decreases sharply around 150×100 nanoseconds. These sudden changes in the number of instructions may cause a sudden change in the magnitude of the current, resulting in noise.

[0021] For example, the arithmetic unit 15 consumes power each time it processes an instruction, and therefore current flows each time the arithmetic unit 15 processes an instruction. When the number of instructions issued to the arithmetic unit 15 per unit time increases, the number of instructions processed per unit time by the arithmetic unit 15 also increases, and the power consumption also increases in proportion to the number of instructions processed. If the number of instructions issued to the arithmetic unit 15 per unit time increases sharply, the magnitude of the current flowing through the arithmetic unit 15 also increases sharply, which may result in noise.

[0022] Line L13 shows an example of the number of instructions issued from the instruction issue adjuster 14 to the arithmetic unit 15 per unit time when the instruction issue adjuster 14 adjusts the number of instructions to be issued to the arithmetic unit 15. In the example of line L13, the number of instructions per unit time gradually increases from around 1×100 nanoseconds to around 180×100 nanoseconds. Also, in the example of line L13, the number of instructions per unit time gradually decreases from around 240×100 nanoseconds to around 401×100 nanoseconds. Thus, in the example of line L13, a sudden change in the number of instructions issued per unit time by the instruction issue adjuster 14 is suppressed. This makes it possible to prevent noise caused by a sudden change in the magnitude of the current.

[0023] Line L12 indicates the number of dummy instructions issued from the dummy instruction issuer 12 out of the number of instructions indicated by line L13. Before around 240×100 nanoseconds, the instruction issue adjuster 14 issues instructions from the instruction buffer 11 to the arithmetic unit 15. Around 240×100 nanoseconds, the instruction buffer 11 runs out of instructions, and thereafter the instruction issue adjuster 14 issues dummy instructions from the dummy instruction issuer 12 to the arithmetic unit 15, thereby reducing the number of instructions issued per unit time. In this way, according to the information processing device 1, even when there are no instructions in the instruction buffer 11, it is possible to avoid a sudden decrease in the number of instructions per unit time that the instruction issue adjuster 14 issues to the arithmetic units.

[0024] FIG. 3 is a diagram showing an example of a procedure of processing performed by the information processing device 1 when there is an instruction in the instruction buffer 11. In the process of FIG. 3, instructions are input to the instruction buffer 11, and the instruction buffer 11 stores the instructions (step S111). The selector 13 confirms that there is an instruction to be issued in the instruction buffer 11 (step S131), and selects the instruction buffer 11 (step S132).

[0025] Furthermore, the instruction issue adjuster 14 adds the value of the parameter P to the parameter E every clock (step S141). Then, the instruction issuance adjuster 14 determines whether the value of the parameter E is greater than a preset threshold value (step S142).

[0026] If it is determined that the value of the parameter E is equal to or less than the threshold value (step S142: NO), the process returns to step S141. When the process returns to step S141, the instruction issue adjuster 14 performs the process from step S141 again at the next clock. On the other hand, if it is determined that the value of the parameter E is greater than the threshold value (step S142: YES), the instruction issuance adjuster 14 issues the instruction of the unit selected by the selector 13 (here, the instruction from the instruction buffer 11) to the arithmetic unit 15 (step S143). The arithmetic unit 15 executes the instruction issued from the instruction issuance adjuster 14 (step S151).

[0027] When the instruction issuance adjuster 14 issues an instruction from the instruction buffer 11 to the arithmetic unit 15, it can be understood that the instruction buffer 11 issues an instruction to the arithmetic unit 15 via the selector 13 and the instruction issuance adjuster 14. When an instruction is issued from the instruction buffer 11, one instruction is taken out from the instruction buffer 11, and the number of instructions stored in the instruction buffer 11 decreases by one.

[0028] After step S143, the instruction issuance adjuster 14 subtracts the threshold value from the value of the parameter E (step S144). Next, the instruction issuance adjuster 14 determines whether the value of the clock counter has reached a preset value (step S145). Here, the clock counter is used to detect the cycle in which the value of the parameter P is increased or decreased.

[0029] If the instruction issuance adjuster 14 determines that the value of the clock counter has not reached the set value (step S145: NO), the process returns to step S141. On the other hand, if it is determined in step S145 that the value of the clock counter has reached the set value (step S145: YES), the instruction issuance adjuster 14 increases the value of the parameter P by a predetermined value (step S146). Then, the instruction issue adjuster 14 sets the value of the clock counter to 0 (step S147). After step S147, the process returns to step S141.

[0030] The instruction issuance adjuster 14 increases the value of the parameter P to be added to the parameter E at regular intervals through the processes of steps S145 to S147. The value of the parameter P to be added to the parameter E increases while the selector 13 continues to select the instruction buffer 11. This shortens the time it takes for the parameter E to exceed the threshold, and also shortens the time interval at which the instruction issuance adjuster 14 issues instructions to the arithmetic unit 15.

[0031] FIG. 4 is a diagram showing an example of a procedure of processing performed by the information processing device 1 when there is no instruction in the instruction buffer 11. 4, the selector 13 confirms that there is no instruction in the instruction buffer 11 (step S231), and selects a dummy instruction (step S232). Selecting a dummy instruction can be considered as selecting the dummy instruction issuer 12 that issues the dummy instruction. The dummy instruction issuer 12 is always in a state where it can issue a dummy instruction.

[0032] Furthermore, the instruction issuance adjuster 14 adds the value of the parameter P to the parameter E for each clock (step S241), and determines whether the value of the parameter E is greater than a preset threshold value (step S242).

[0033] If it is determined that the value of the parameter E is equal to or less than the threshold value (step S242: NO), the process returns to step S241. When the process returns to step S241, the instruction issue adjuster 14 performs the process from step S241 again at the next clock. On the other hand, if it is determined that the value of the parameter E is greater than the threshold value (step S242: YES), the instruction issuance adjuster 14 issues the instruction of the unit selected by the selector 13 (here, the dummy instruction from the dummy instruction issuer 12) to the arithmetic unit 15 (step S243). The arithmetic unit 15 executes the instruction issued from the instruction issuance adjuster 14 (step S251).

[0034] When the instruction issuance adjuster 14 issues an instruction from the dummy instruction issuer 12 to the arithmetic unit 15, it can be understood that the dummy instruction issuer 12 issues an instruction to the arithmetic unit 15 via the selector 13 and the instruction issuance adjuster 14.

[0035] After step S243, the instruction issuance adjuster 14 subtracts the threshold value from the value of the parameter E (step S244). Next, the instruction issue adjuster 14 determines whether the value of the clock counter has reached a preset value (step S245).

[0036] If the instruction issuance adjuster 14 determines that the value of the clock counter has not reached the set value (step S245: NO), the process returns to step S241. On the other hand, if it is determined in step S245 that the value of the clock counter has reached the set value (step S245: YES), the instruction issuance adjuster 14 decreases the value of the parameter P by a predetermined value (step S246). Then, the instruction issue adjuster 14 sets the value of the clock counter to 0 (step S247). After step S247, the process returns to step S241.

[0037] The instruction issuance adjuster 14 decreases the value of the parameter P to be added to the parameter E at regular intervals through the processes of steps S245 to S247. The value of the parameter P to be added to the parameter E decreases while the selector 13 continues to select the dummy instruction issuer 12. This lengthens the time until the parameter E exceeds the threshold, and also lengthens the time interval at which the instruction issuance adjuster 14 issues instructions to the arithmetic unit 15.

[0038] When there are many instructions input to the instruction buffer 11 and the instructions are input continuously, the information processing device 1 may perform the processing shown in FIGS. Alternatively, if the number of instructions stored in the instruction buffer 11 is always at its maximum, the instruction issue adjuster 14 may determine that the program is one in which instructions are continuously input. In this case, after the number of instructions per unit time issued by the instruction issue adjuster 14 to the arithmetic unit 15 reaches its maximum value and does not increase any further, the instruction issue adjuster 14 may issue 11 instructions from the instruction buffer to the arithmetic unit 15 without limiting the number of instructions issued per unit time.

[0039] This is expected to shorten the time required for the calculation by the calculator 15. For example, if the instruction issuance adjuster 14 detects that the number of instructions stored in the instruction buffer 11 has remained at its maximum for a certain period of time or more, the instruction issuance adjuster 14 may issue instructions from the instruction buffer 11 to the arithmetic unit 15 without limiting the number of instructions issued per unit time.

[0040] Even in the case of a program in which the number of instructions input into the instruction buffer 11 increases or decreases at a constant rate, the instruction issue adjuster 14 may issue instructions from the instruction buffer 11 to the arithmetic unit 15 without limiting the number of instructions issued per unit time. This is expected to shorten the time required for the calculation by the calculator 15.

[0041] For example, if the instruction issuance adjuster 14 detects that the number of instructions input to the instruction buffer 11 continues to increase or decrease at a constant rate for a certain period of time or more, it may issue 11 instructions from the instruction buffer to the arithmetic unit 15 without limiting the number of instructions issued per unit time.

[0042] Furthermore, in the case of a program in which instructions are sparsely input to the instruction buffer 11 at intervals, the value of the parameter P may be adjusted to shorten the execution time of the calculation by the arithmetic unit 15. For example, by setting the initial value of the parameter P to a large value, the time until the value of the parameter E exceeds the threshold value is shortened, and the time until the instruction issue adjuster 14 issues the first instruction to the arithmetic unit 15 can be shortened. For example, if the number of instructions stored in the instruction buffer 11 increases or decreases without reaching the maximum number of instructions that the instruction buffer 11 can store, the instruction issue adjuster 14 may determine that the program is one in which instructions are sparsely input into the instruction buffer 11 at regular intervals.

[0043] 5 is a diagram showing an example of the number of instructions per unit time that the instruction issuance adjuster 14 issues to the arithmetic unit 15 when instructions are input sparsely into the instruction buffer 11 at intervals. The horizontal axis of the graph in FIG. 5 represents time. The unit of the horizontal axis is 100 nanoseconds. The vertical axis represents the number of instructions per unit time that the instruction issuance adjuster 14 issues to the arithmetic unit 15.

[0044] FIG. 5 shows an example in which instructions are input to the instruction buffer 11 with time intervals in the order of 1, 20, 5, and 30 instructions. The initial value of the parameter P is set to 10, the increase / decrease value when increasing / decreasing the value of the parameter P is set to 1, and the threshold value of the parameter E is set to 100.

[0045] Line L21 indicates the number of instructions input to the instruction buffer 11 per short time period. Line L22 indicates the sum of the number of instructions issued from the instruction buffer 11 to the arithmetic unit 15 per unit time and the number of dummy instructions issued by the dummy instruction issuer 12 to the arithmetic unit 15 per unit time. Line L23 indicates the number of instructions issued from the instruction buffer 11 to the arithmetic unit 15 per unit time.

[0046] 5, line L21 and line L23 overlap at around 1×100 nanoseconds when one instruction is input to instruction buffer 11, and at around 9×100 nanoseconds when five instructions are input to instruction buffer 11. This indicates that the time lag between inputting an instruction to instruction buffer 11 and instruction issue adjuster 14 issuing the instruction to arithmetic unit 15 is sufficiently small.

[0047] The initial value of parameter P affects the time it takes for the first instruction to be issued from instruction buffer 11 to arithmetic unit 15. In the case of a program in which instructions are continuously input to instruction buffer 11, the initial value of parameter P can be set to a relatively small value, whereas in the case of a program in which instructions are sparsely input to instruction buffer 11 with time intervals between them, the initial value of parameter P can be set to a relatively large value.

[0048] The instruction issue adjuster 14 may store a program corresponding to a program in which instructions are continuously input to the instruction buffer 11, and a program corresponding to a program in which instructions are sparsely input to the instruction buffer 11 at intervals. Then, the instruction issue adjuster 14 may set the initial value of the parameter P in accordance with these programs. This is expected to shorten the time required for the calculation by the calculator 15.

[0049] 2. The threshold value of parameter E, the specified time of the clock, the increase / decrease amount of parameter P, and the magnitude of the upper and lower limits of parameter P affect the slope of the straight line as shown by line L13 in FIG. For example, the instruction issue adjuster 14 may store programs with a large number of instructions and programs with a small number of instructions, and may set the above values ​​so that the slope of the line is small for programs with a large number of instructions, and so that the slope of the line is large for programs with a small number of instructions.

[0050] This is expected to shorten the time required for the calculation by the calculator 15. For example, when the instruction issue adjuster 14 stores a program as having a large number of instructions, it may increase or decrease the parameter P by a smaller amount than when the instruction issue adjuster 14 stores a program as having a small number of instructions, so that the slope of the straight line becomes smaller.

[0051] As described above, the instruction issuance adjuster 14 determines the timing for issuing instructions to the arithmetic unit 15 so that the number of instructions per unit time issued to the arithmetic unit 15 increases or decreases in stages, and at the determined timing, if there is an instruction in the instruction buffer 11, the instruction is issued from the instruction buffer 11 to the arithmetic unit 15, and if there is no instruction in the instruction buffer 11, a dummy instruction is issued to the arithmetic unit 15. The instruction issuance adjuster 14 gradually increases or decreases the number of instructions issued to the arithmetic unit 15 per unit time, thereby preventing a sudden change in the number of instructions executed by the arithmetic unit 15 per unit time, which would otherwise cause noise.

[0052] In addition, the instruction issuance adjuster 14 updates the value of a parameter P for adjusting the number of instructions to be issued to the arithmetic unit 15 per unit time when there are instructions in the instruction buffer 11 so as to increase the number of instructions to be issued to the arithmetic unit 15 per unit time, and updates the value of the parameter P for adjusting the number of instructions to be issued to the arithmetic unit 15 per unit time when there are no instructions in the instruction buffer 11 so as to decrease the number of instructions to be issued to the arithmetic unit 15 per unit time, and determines the timing of issuing an instruction to the arithmetic unit 15 depending on the value of the parameter P.

[0053] The instruction issuance adjuster 14 can gradually increase or decrease the number of instructions per unit time issued to the arithmetic unit 15 by a relatively simple process of increasing or decreasing the value of the parameter P depending on whether or not there are instructions in the instruction buffer 11. This makes it possible for the instruction issuance adjuster 14 to prevent noise from occurring due to a sudden change in the number of instructions executed per unit time by the arithmetic unit 15.

[0054] In addition, the value of parameter P, which adjusts the number of instructions issued to arithmetic unit 15 per unit time, is increased when there are instructions in instruction buffer 11 and is decreased when there are no instructions in instruction buffer 11, and the value of parameter E is increased by the value of parameter P at predetermined time intervals, and an instruction is issued to arithmetic unit 15 at the timing when the value of parameter E becomes greater than or equal to a predetermined threshold value.

[0055] The instruction issuance adjuster 14 can increase or decrease in a stepwise manner the number of instructions per unit time issued to the arithmetic unit 15 by a relatively simple process of increasing or decreasing the value of the first parameter, increasing the value of the second parameter by the value of the first parameter, and comparing the value of the second parameter with a threshold. This allows the instruction issuance adjuster 14 to prevent noise from occurring due to a sudden change in the number of instructions executed per unit time by the arithmetic unit 15.

[0056] Furthermore, in the case of a program stored as a program in which instructions are input sparsely into the instruction buffer 11 at intervals, the instruction issue adjuster 14 sets the initial value of the parameter P to a larger value than in the case of a program stored as a program in which instructions are input continuously into the instruction buffer 11. The instruction issue adjuster 14 is expected to shorten the execution time of the operations by the arithmetic unit 15.

[0057] Furthermore, the instruction issue adjuster 14 sets a smaller increase or decrease in the first parameter for a program stored as having a large number of instructions than for a program stored as having a small number of instructions. The instruction issue adjuster 14 is expected to shorten the execution time of the operations by the arithmetic unit 15.

[0058] Furthermore, when the instruction issuance adjuster 14 detects that the number of instructions stored in the instruction buffer 11 remains at its maximum for a certain period of time or more, it issues instructions from the instruction buffer 11 to the arithmetic unit 15 without limiting the number of instructions issued per unit time. The instruction issue adjuster 14 is expected to shorten the execution time of the operations by the arithmetic unit 15.

[0059] Furthermore, when the instruction issuance adjuster 14 detects that the number of instructions input to the instruction buffer 11 continues to increase or decrease at a constant rate for a certain period of time or more, it issues instructions from the instruction buffer to the arithmetic unit 15 without limiting the number of instructions issued per unit time. The instruction issue adjuster 14 is expected to shorten the execution time of the operations by the arithmetic unit 15.

[0060] Second Embodiment FIG. 6 is a diagram illustrating an example of an instruction issue regulator according to at least one embodiment. The instruction issuance adjuster 610 shown in FIG. 6 determines the timing for issuing instructions to the arithmetic unit so that the number of instructions issued to the arithmetic unit per unit time increases or decreases in stages, and at the determined timing, if there is an instruction in the instruction buffer, issues an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issues a dummy instruction to the arithmetic unit.

[0061] The instruction issuance adjuster 610 gradually increases or decreases the number of instructions issued to the arithmetic unit per unit time, thereby preventing a sudden change in the number of instructions executed by the arithmetic unit per unit time, which can cause noise.

[0062] Third Embodiment FIG. 7 is a diagram illustrating an example of an information processing device according to at least one embodiment. The information processing device 620 shown in FIG. 7 includes an instruction buffer 621, a dummy instruction issuer 622, a selector 623, an instruction issue adjuster 624, and a computing unit 625.

[0063] The instruction buffer 621 is capable of storing instructions. The dummy instruction issuer 622 issues a dummy instruction. The selector 623 selects the instruction buffer 621 if there is an instruction in the instruction buffer 621 , and selects the dummy instruction issuer 622 if there is no instruction in the instruction buffer 621 .

[0064] The instruction issuance adjuster 624 determines the timing for issuing instructions to the arithmetic unit 625 so that the number of instructions per unit time issued to the arithmetic unit 625 increases or decreases in stages, and at the determined timing, if there is an instruction in the instruction buffer 621, issues an instruction from the instruction buffer 621 to the arithmetic unit 625, and if there is no instruction in the instruction buffer 621, issues a dummy instruction to the arithmetic unit 625. The arithmetic unit 625 executes the instruction issued by the instruction issue adjuster.

[0065] According to the information processing device 620, the number of instructions issued to the arithmetic unit 625 per unit time is increased or decreased in stages, thereby preventing a sudden change in the number of instructions executed by the arithmetic unit 625 per unit time, which would otherwise cause noise.

[0066] <Fourth embodiment> 8 is a diagram illustrating an example of a processing procedure in an instruction issuance adjustment method according to at least one embodiment. The instruction issuance adjustment method illustrated in FIG. 8 includes determining whether an instruction exists (step S611) and issuing an instruction (step S612).

[0067] In determining the presence or absence of an instruction (step S611), the instruction issue adjuster determines the timing of issuing instructions to the arithmetic unit so that the number of instructions issued to the arithmetic unit per unit time increases or decreases stepwise. In issuing an instruction (step S612), the instruction issuance adjuster issues an instruction from the instruction buffer to the arithmetic unit at the determined timing if there is an instruction in the instruction buffer, and issues a dummy instruction to the arithmetic unit if there is no instruction in the instruction buffer.

[0068] According to the instruction issuance adjustment method shown in FIG. 8, the number of instructions issued to the arithmetic unit per unit time is gradually increased or decreased, thereby preventing a sudden change in the number of instructions executed by the arithmetic unit per unit time, which would cause noise.

[0069] Although the embodiments of the present invention have been described above in detail with reference to the drawings, the specific configuration is not limited to these embodiments and includes designs within the scope of the present invention. Furthermore, the above-described embodiments may be combined with other embodiments as appropriate.

[0070] Some or all of the above embodiments can be described as, but are not limited to, the following supplementary notes.

[0071] (Appendix 1) determining a timing for issuing instructions to the arithmetic unit so that the number of instructions per unit time to be issued to the arithmetic unit is increased or decreased stepwise, and at the determined timing, if there is an instruction in an instruction buffer, issuing an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issuing a dummy instruction to the arithmetic unit; Instruction issue regulator.

[0072] (Appendix 2) updating a value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are instructions in the instruction buffer, so as to increase the number of instructions per unit time to be issued to the arithmetic unit, and updating the value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are no instructions in the instruction buffer, so as to decrease the number of instructions per unit time to be issued to the arithmetic unit, and determining the timing for issuing instructions to the arithmetic unit according to the value of the parameter; 10. The instruction issue regulator of claim 1.

[0073] (Appendix 3) a first parameter value, which is a parameter for adjusting the number of instructions to be issued to the arithmetic unit per unit time, is increased when there are instructions in the instruction buffer, and is decreased when there are no instructions in the instruction buffer; a second parameter value is increased by the value of the first parameter at predetermined time intervals; and an instruction is issued to the arithmetic unit at a timing when the value of the second parameter becomes equal to or greater than a predetermined threshold value; 2. An instruction issue regulator as defined in claim 2.

[0074] (Appendix 4) In the case of a program stored as a program in which instructions are input sparsely to the instruction buffer at intervals, the initial value of the first parameter is set to a larger value than in the case of a program stored as a program in which instructions are input continuously to the instruction buffer. 4. The instruction issue regulator of claim 3.

[0075] (Appendix 5) In the case of a program stored as a program with a large number of instructions, the increase / decrease amount of the first parameter is set to be smaller than in the case of a program stored as a program with a small number of instructions. 5. The instruction issue regulator of claim 3 or 4.

[0076] (Appendix 6) when it is detected that the state in which the number of instructions stored in the instruction buffer is at a maximum continues for a certain period of time or more, issuing instructions from the instruction buffer to the arithmetic unit without limiting the number of instructions to be issued per unit time; 6. The instruction issue regulator of any one of claims 1 to 5.

[0077] (Appendix 7) When it is detected that the number of instructions input to the instruction buffer continues to increase or decrease at a constant rate for a certain period of time or more, instructions are issued from the instruction buffer to the arithmetic unit without limiting the number of instructions issued per unit time. 7. The instruction issue regulator of any one of claims 1 to 6.

[0078] (Appendix 8) The computer includes an instruction buffer, a dummy instruction issuer, a selector, an instruction issue adjuster, and an arithmetic unit; the instruction buffer is capable of storing instructions; the dummy instruction issuer issues a dummy instruction; the selector selects the instruction buffer when an instruction is present in the instruction buffer, and selects the dummy instruction issuer when no instruction is present in the instruction buffer; the instruction issue adjuster determines a timing for issuing instructions to the arithmetic unit so that the number of instructions per unit time to be issued to the arithmetic unit is increased or decreased stepwise, and at the determined timing, if there is an instruction in the instruction buffer, issues an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issues a dummy instruction to the arithmetic unit; the arithmetic unit executes the instruction issued by the instruction issue adjuster; Information processing device.

[0079] (Appendix 9) updating a value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are instructions in the instruction buffer, so as to increase the number of instructions per unit time to be issued to the arithmetic unit, and updating the value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are no instructions in the instruction buffer, so as to decrease the number of instructions per unit time to be issued to the arithmetic unit, and determining the timing for issuing instructions to the arithmetic unit according to the value of the parameter; 9. The information processing device according to claim 8.

[0080] (Appendix 10) a first parameter value, which is a parameter for adjusting the number of instructions to be issued to the arithmetic unit per unit time, is increased when there are instructions in the instruction buffer, and is decreased when there are no instructions in the instruction buffer; a second parameter value is increased by the value of the first parameter at predetermined time intervals; and an instruction is issued to the arithmetic unit at a timing when the value of the second parameter becomes equal to or greater than a predetermined threshold value; 10. The information processing device according to claim 9.

[0081] (Appendix 11) In the case of a program stored as a program in which instructions are input sparsely to the instruction buffer at intervals, the initial value of the first parameter is set to a larger value than in the case of a program stored as a program in which instructions are input continuously to the instruction buffer. 11. The information processing device according to claim 10.

[0082] (Appendix 12) In the case of a program stored as a program with a large number of instructions, the increase / decrease amount of the first parameter is set to be smaller than in the case of a program stored as a program with a small number of instructions. 12. The information processing device according to claim 10 or 11.

[0083] (Appendix 13) when it is detected that the state in which the number of instructions stored in the instruction buffer is at a maximum continues for a certain period of time or more, issuing instructions from the instruction buffer to the arithmetic unit without limiting the number of instructions to be issued per unit time; 13. An information processing device according to any one of appendices 8 to 12.

[0084] (Appendix 14) When it is detected that the number of instructions input to the instruction buffer continues to increase or decrease at a constant rate for a certain period of time or more, instructions are issued from the instruction buffer to the arithmetic unit without limiting the number of instructions issued per unit time. 14. An information processing device according to any one of appendices 8 to 13.

[0085] (Appendix 15) An instruction issue regulator determining a timing for issuing instructions to the arithmetic unit so that the number of instructions issued to the arithmetic unit per unit time increases or decreases stepwise; At the determined timing, if an instruction exists in the instruction buffer, the instruction from the instruction buffer is issued to the arithmetic unit, and if no instruction exists in the instruction buffer, a dummy instruction is issued to the arithmetic unit. A method for adjusting command issuance, comprising:

[0086] (Appendix 16) determining the timing includes the instruction issuance adjuster updating a value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are instructions in an instruction buffer, so as to increase the number of instructions per unit time to be issued to the arithmetic unit, and updating the value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are no instructions in the instruction buffer, so as to decrease the number of instructions per unit time to be issued to the arithmetic unit, and determining the timing for issuing instructions to the arithmetic unit according to the value of the parameter. 16. The method of coordinating instruction issuance as set forth in Appendix 15.

[0087] (Appendix 17) determining the timing includes the instruction issuance adjuster increasing a value of a first parameter, which is a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit, when there is an instruction in the instruction buffer and decreasing the value of a second parameter when there is no instruction in the instruction buffer, increasing a value of a second parameter by the value of the first parameter at predetermined time intervals, and determining the timing when the value of the second parameter becomes equal to or greater than a predetermined threshold as the timing for issuing an instruction to the arithmetic unit. 17. The method of coordinating instruction issuance as set forth in claim 16.

[0088] (Appendix 18) determining the timing includes setting the initial value of the first parameter to a value larger in a case where the instruction issue adjuster stores the program as a program in which instructions are sparsely input to the instruction buffer at intervals than in a case where the instruction issue adjuster stores the program as a program in which instructions are continuously input to the instruction buffer; 18. The method of coordinating instruction issuance as set forth in Appendix 17.

[0089] (Appendix 19) determining the timing includes setting a smaller increase or decrease in the first parameter for a program stored by the instruction issue adjuster as having a large number of instructions than for a program stored by the instruction issue adjuster as having a small number of instructions; 19. The method of coordinating instruction issuance according to claim 17 or 18.

[0090] (Appendix 20) determining the timing includes, when the instruction issue adjuster detects that the number of instructions stored in the instruction buffer has remained at a maximum for a certain period of time or more, determining the timing to issue instructions so that instructions from the instruction buffer are issued to the arithmetic unit without limiting the number of instructions issued per unit time. 20. The instruction issuance adjustment method according to any one of appendices 15 to 19.

[0091] (Appendix 21) determining the timing includes determining the timing to issue instructions so that instructions from the instruction buffer are issued to the arithmetic unit without limiting the number of instructions issued per unit time, when the instruction issue adjuster detects that a state in which the number of instructions input to the instruction buffer increases or decreases at a constant rate continues for a certain period of time or more. 21. The command issuance adjustment method according to any one of appendices 15 to 20. [Explanation of symbols]

[0092] 1,620 Information processing equipment 11,621 instruction buffer 12,622 Dummy instruction issuer 13,623 Selector 14, 610, 624 Instruction issue regulator 15, 625 Arithmetic unit

Claims

1. determining a timing for issuing instructions to the arithmetic unit so that the number of instructions per unit time to be issued to the arithmetic unit is increased or decreased stepwise, and at the determined timing, if there is an instruction in an instruction buffer, issuing an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issuing a dummy instruction to the arithmetic unit; Instruction issue regulator.

2. updating a value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are instructions in the instruction buffer, so as to increase the number of instructions per unit time to be issued to the arithmetic unit, and updating the value of a parameter for adjusting the number of instructions per unit time to be issued to the arithmetic unit when there are no instructions in the instruction buffer, so as to decrease the number of instructions per unit time to be issued to the arithmetic unit, and determining the timing for issuing instructions to the arithmetic unit according to the value of the parameter; 2. The instruction issue regulator of claim 1.

3. a value of a first parameter, which is a parameter for adjusting the number of instructions to be issued to the arithmetic unit per unit time, is increased when there are instructions in the instruction buffer, and is decreased when there are no instructions in the instruction buffer; a value of a second parameter is increased by the value of the first parameter at predetermined time intervals; and an instruction is issued to the arithmetic unit at a timing when the value of the second parameter becomes equal to or greater than a predetermined threshold value; 3. The instruction issue regulator of claim 2.

4. In the case of a program stored as a program in which instructions are input sparsely to the instruction buffer at intervals, the initial value of the first parameter is set to a larger value than in the case of a program stored as a program in which instructions are input continuously to the instruction buffer.

4. The instruction issue regulator of claim 3.

5. In the case of a program stored as a program with a large number of instructions, the amount of increase or decrease of the first parameter is set to be smaller than in the case of a program stored as a program with a small number of instructions.

4. The instruction issue regulator of claim 3.

6. when it is detected that the state in which the number of instructions stored in the instruction buffer is at a maximum continues for a certain period of time or more, issuing instructions from the instruction buffer to the arithmetic unit without limiting the number of instructions to be issued per unit time; 2. The instruction issue regulator of claim 1.

7. When it is detected that the number of instructions input to the instruction buffer continues to increase or decrease at a constant rate for a certain period of time or more, instructions are issued from the instruction buffer to the arithmetic unit without limiting the number of instructions issued per unit time.

2. The instruction issue regulator of claim 1.

8. The computer includes an instruction buffer, a dummy instruction issuer, a selector, an instruction issue adjuster, and an arithmetic unit; the instruction buffer is capable of storing instructions; the dummy instruction issuer issues a dummy instruction; the selector selects the instruction buffer when an instruction is present in the instruction buffer, and selects the dummy instruction issuer when no instruction is present in the instruction buffer; the instruction issue adjuster determines a timing for issuing instructions to the arithmetic unit so that the number of instructions per unit time to be issued to the arithmetic unit is increased or decreased stepwise, and at the determined timing, if there is an instruction in the instruction buffer, issues an instruction from the instruction buffer to the arithmetic unit, and if there is no instruction in the instruction buffer, issues a dummy instruction to the arithmetic unit; the arithmetic unit executes the instruction issued by the instruction issue adjuster; Information processing device.

9. An instruction issue regulator determining a timing for issuing instructions to the arithmetic unit so that the number of instructions issued to the arithmetic unit per unit time increases or decreases stepwise; At the determined timing, if an instruction exists in the instruction buffer, the instruction from the instruction buffer is issued to the arithmetic unit, and if no instruction exists in the instruction buffer, a dummy instruction is issued to the arithmetic unit. A method for adjusting command issuance, comprising:

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