Semiconductor module and method for manufacturing semiconductor module

A low elastic modulus region with a specific elastic modulus is introduced in the semiconductor module to address thermal stress-induced cracks, enhancing module reliability by alleviating stress on the encapsulating resin.

JP2025158003APending Publication Date: 2025-10-16FUJI ELECTRIC CO LTD
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Patent Information

Application Number
JP2024060419
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-04-03
Publication Date
2025-10-16

AI Technical Summary

Technical Problem

Conventional semiconductor devices face issues with thermal stress due to repeated expansion and contraction, leading to resin cracks and potential module failure, as the encapsulating resin is subjected to high loads.

Method used

Incorporating a low elastic modulus region on the surface of the sealing resin directly above the semiconductor element, with a specific elastic modulus between 0.83% and 100% of the sealing resin, to alleviate stress and suppress resin cracks.

Benefits of technology

The low elastic modulus region effectively mitigates thermal stress, reducing resin cracks and improving the reliability of the semiconductor module.

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Abstract

To provide a semiconductor module and a method for manufacturing the same, which can alleviate stresses repeatedly generated by thermal expansion / contraction, suppress resin cracking, and improve reliability.SOLUTION: A semiconductor module 50 comprises: a laminated substrate 5 mounted with a semiconductor element 1 via an interlayer 25; a sealing resin 8 for encapsulating the encapsulated component including the semiconductor element 1, a bonding layer 25 and the laminated substrate 5; and a low elastic region 30 provided on a surface of a sealing resin 8 above the semiconductor element 1 and having lower elastic modulus than the sealing resin 8. When the storage modulus of the low elastic region 30 is defined as the relative elastic modulus with the storage elastic modulus of sealing resin 8 set at 100%, the relative elastic modulus is 0.83% or higher but less than 100%.SELECTED DRAWING: Figure 1
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Description

[Technical Field]

[0001] This disclosure relates to a semiconductor module and a method for manufacturing a semiconductor module. [Background technology]

[0002] Conventionally, a semiconductor device has been proposed in which peeling between a case containing polyphenylene sulfide and an inorganic filler and a sealing material can be suppressed by exposing the inorganic filler from the matrix on the surface of the case facing the sealing material (see, for example, Patent Document 1 below). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2024-000325 Summary of the Invention [Problem to be solved by the invention]

[0004] However, conventional semiconductor devices have a problem in that repeated thermal expansion and contraction causes thermal stress that places a load on the encapsulating material (encapsulating resin), causing cracks in the resin directly above the chip and potentially destroying the module.

[0005] The present disclosure aims to provide a semiconductor module and a method for manufacturing a semiconductor module that can alleviate the stress caused by repeated thermal expansion / contraction, suppress resin cracks, and improve reliability in order to resolve the problems associated with the conventional technology described above. [Means for solving the problem]

[0006] In order to solve the above-mentioned problems and achieve the object of the present disclosure, the semiconductor module according to the present disclosure has the following features: It includes a laminated substrate on which a semiconductor element is mounted via a bonding layer, a sealing resin that seals a sealed member including the semiconductor element, the bonding layer, and the laminated substrate, and a low elastic modulus region that is provided on the surface of the sealing resin above the semiconductor element and has a lower elastic modulus than the sealing resin. When the storage modulus of the sealing resin is taken as 100%, the storage modulus of the low elastic modulus region is taken as the specific elastic modulus, and the specific elastic modulus is 0.83% or more and less than 100%.

[0007] According to the above disclosure, by placing a low elastic modulus region on the outermost surface of the sealing resin directly above the power semiconductor chip where stress is likely to concentrate, stress can be alleviated and resin cracks can be suppressed. [Effects of the Invention]

[0008] The semiconductor module and the method for manufacturing the semiconductor module according to the present disclosure have the effect of mitigating stresses that occur repeatedly due to thermal expansion / contraction, suppressing resin cracks, and improving reliability. [Brief explanation of the drawings]

[0009] [Figure 1] 1 is a cross-sectional view showing a structure of a power semiconductor module according to an embodiment; [Figure 2] 1 is a top view showing a structure of a power semiconductor module according to an embodiment; [Figure 3] 1 is a cross-sectional view (part 1) schematically showing a state during manufacturing of a power semiconductor module according to an embodiment by a first manufacturing method. [Figure 4] 4 is a cross-sectional view (part 2) schematically illustrating a state during manufacturing of the power semiconductor module according to the embodiment by the first manufacturing method. FIG. [Figure 5] 10 is a cross-sectional view (part 3) schematically showing a state during the manufacture of the power semiconductor module according to the embodiment by the first manufacturing method. FIG. [Figure 6]FIG. 10 is a cross-sectional view schematically showing a state during the manufacturing of the power semiconductor module according to the embodiment by a second manufacturing method. [Figure 7] FIG. 23 is a top view showing the structure of Example 12 of the power semiconductor module according to the embodiment. [Figure 8A] FIG. 23 is a top view showing the structure of Example 13 of the power semiconductor module according to the embodiment. [Figure 8B] FIG. 20 is a top view showing the structure of Example 14 of the power semiconductor module according to the embodiment. [Figure 9] FIG. 10 is a top view showing the structure of a comparative example 7 of the power semiconductor module according to the embodiment. [Figure 10] FIG. 10 is a top view showing the structure of a comparative example 8 of the power semiconductor module according to the embodiment. [Figure 11] FIG. 20 is a top view showing the structure of Example 15 of the power semiconductor module according to the embodiment. [Figure 12] FIG. 20 is a top view showing the structure of Example 16 of the power semiconductor module according to the embodiment. [Figure 13] FIG. 20 is a top view showing the structure of Example 17 of the power semiconductor module according to the embodiment. [Figure 14] FIG. 1 is a cross-sectional view showing the structure of a conventional power semiconductor module. [Figure 15] 1 is a cross-sectional view illustrating a problem in the structure of a conventional power semiconductor module. [Figure 16] FIG. 1 is a top view illustrating a problem in the structure of a conventional power semiconductor module. DETAILED DESCRIPTION OF THE INVENTION

[0010] <Summary of Embodiments of the Present Disclosure> In order to solve the above-mentioned problems and achieve the object of the present disclosure, the semiconductor module according to the present disclosure has the following features: It includes a laminated substrate on which a semiconductor element is mounted via a bonding layer, a sealing resin that seals a sealed member including the semiconductor element, the bonding layer, and the laminated substrate, and a low elastic modulus region that is provided on the surface of the sealing resin above the semiconductor element and has a lower elastic modulus than the sealing resin. When the storage modulus of the sealing resin is taken as 100%, the storage modulus of the low elastic modulus region is taken as the specific elastic modulus, and the specific elastic modulus is 0.83% or more and less than 100%.

[0011] According to the above disclosure, by placing a low elastic modulus region on the outermost surface of the sealing resin directly above the power semiconductor chip where stress is likely to concentrate, stress can be alleviated and resin cracks can be suppressed.

[0012] Furthermore, in the semiconductor module according to the present disclosure, the specific elastic modulus is 8% or more and 75% or less.

[0013] Furthermore, the semiconductor module according to the present disclosure is characterized in that, in the above disclosure, the specific elastic modulus is 25% or more and 50% or less.

[0014] Furthermore, in the semiconductor module according to the present disclosure, the low elastic modulus regions are striped and are provided parallel to the short side direction of the power semiconductor module.

[0015] Furthermore, the semiconductor module according to the present disclosure is characterized in that, in the above-mentioned disclosure, the low elastic modulus region has a stripe shape and is arranged parallel to the short direction of the power semiconductor module and parallel to the long direction of the power semiconductor module.

[0016] Furthermore, in the semiconductor module according to the present disclosure, the low elastic modulus region is provided directly above the semiconductor element.

[0017] Furthermore, in the semiconductor module according to the present disclosure, the low elastic modulus region has a blunt bottom tip on the semiconductor element side.

[0018] Furthermore, in the semiconductor module according to the present disclosure, the curvature R of the bottom tip is 0.5 mm or more.

[0019] In order to solve the above-mentioned problems and achieve the object of the present disclosure, the method for manufacturing a semiconductor module according to the present disclosure has the following features: a first step of mounting a semiconductor element on a laminated substrate via a bonding layer, a second step of encapsulating a member to be encapsulated, the member including the semiconductor element, the bonding layer, and the laminated substrate, with a thermosetting resin composition, a third step of injecting a low-elasticity resin having a lower elastic modulus than the thermosetting resin composition onto a surface of the thermosetting resin composition above the semiconductor element, and a fourth step of heat-curing the thermosetting resin composition and the low-elasticity resin to form an encapsulating resin and a low-elasticity region, the low-elasticity region having a lower elastic modulus than the encapsulating resin.

[0020] Furthermore, the method for manufacturing a semiconductor module according to the present disclosure is characterized in that, in the above disclosure, the viscosity ratio of the thermosetting resin composition to the low-elasticity resin is 1:1 to 1:0.35 when the viscosity of the thermosetting resin composition is 1.

[0021] In order to solve the above-mentioned problems and achieve the object of the present disclosure, the method for manufacturing a semiconductor module according to the present disclosure has the following features: a first step of mounting a semiconductor element on a laminated substrate via a bonding layer, a second step of encapsulating a member to be encapsulated, including the semiconductor element, the bonding layer, and the laminated substrate, with a thermosetting resin composition, a third step of inserting a pre-cured low elastic modulus region into the surface of the thermosetting resin composition above the semiconductor element, and a fourth step of heat-curing the thermosetting resin composition to form an encapsulating resin. The low elastic modulus region has a lower elastic modulus than the encapsulating resin.

[0022] <Findings underlying this disclosure> First, the problems of conventional semiconductor modules will be described. FIG. 14 is a cross-sectional view showing the structure of a conventional power semiconductor module. As shown in FIG. 14, a power semiconductor module 150 includes a power semiconductor chip 101, a laminated substrate 105, a case 107, a heat dissipation base 126, metal terminals 109, and metal wires 110. The power semiconductor chip 101 is a power semiconductor chip such as a MOSFET, an IGBT, or a diode, and is bonded to the laminated substrate 105 with a bonding layer 125 such as solder. The laminated substrate 105 includes an insulating substrate 102 such as a ceramic substrate, a first conductive plate 103 made of copper or the like on its front surface, and a second conductive plate 104 made of copper or the like on its back surface. The laminated substrate 105 is bonded to the heat dissipation base 126 with the bonding layer 125 such as solder. The metal terminals 109, which output signals to the outside, are bonded to the case 107. The metal wires 110 electrically connect the power semiconductor chip 101 and the metal terminals 109. In the case of a MOSFET, a source electrode pad is formed on the surface of the power semiconductor chip 101 as a power terminal electrode pad (current supply terminal). A conductive connection member such as a lead frame or metal wire 110 is then arranged from the power terminal electrode pad as an output terminal. In the case of a lead frame, it is joined to the power semiconductor chip 101 by a bonding layer 125 such as solder. Although not shown, a plurality of these members are mounted on one semiconductor module. A case 107 is bonded to the power semiconductor module 150, and a lid (not shown) is attached, through which metal terminals 109 pass and protrude to the outside. The case 107 is filled with sealing resin (sealant) 108 that insulates and protects the laminated substrate 105 and the power semiconductor chip 101 on the substrate.

[0023] In particular, by using a hard (high elastic modulus) sealing resin 108 such as an epoxy resin filled with a filler such as silica, it is possible to mechanically suppress thermal deformation of the circuit components, thereby preventing load and damage to the circuit components and achieving high reliability.

[0024] FIG. 15 is a cross-sectional view illustrating a problem with the structure of a conventional power semiconductor module. FIG. 16 is a top view illustrating a problem with the structure of a conventional power semiconductor module. Meanwhile, the operation of a power semiconductor module 150 generates heat in the power semiconductor chip 101, causing thermal expansion in the power semiconductor chip 101, the insulating substrate 102, and other peripheral components, resulting in thermal stress 134. In this case, as shown in FIGS. 15 and 16 , the thermal stress 134 repeatedly generated by thermal expansion and contraction applies a load to the sealing resin 108, causing cracks 133 in the sealing resin 108 directly above the power semiconductor chip 101, potentially resulting in module failure. While methods for preventing cracks 133 in the sealing resin 108 include reducing the elasticity of the sealing resin 108 to reduce the thermal stress 134, there is a problem in that reducing the elasticity of the sealing resin 108 imposes a trade-off with the effectiveness of preventing thermal deformation of circuit components. Power semiconductor modules are often rectangular when viewed from above. In such cases, thermal stress occurs, particularly along the center of the long side, which can result in cracks, as shown in FIG. 16 .

[0025] Preferred embodiments of a semiconductor module and a method for manufacturing a semiconductor module according to the present disclosure will be described in detail below with reference to the accompanying drawings. However, the present disclosure is not limited to the embodiments described below.

[0026] (Embodiment) FIG. 1 is a cross-sectional view showing the configuration of a power semiconductor module according to an embodiment. In the power semiconductor module 50, a first conductive plate 3 made of copper is disposed on one surface (front surface) of an insulating substrate 2, and a second conductive plate 4 made of copper or the like is disposed on the other surface (back surface) to form a laminated substrate 5. A plurality of power semiconductor chips 1 are mounted on the front surface of the first conductive plate 3 of the laminated substrate 5 via a bonding layer 25 made of solder. Metal terminals 9 for outputting signals to the outside are bonded to the inside of the case 7. Furthermore, conductive connecting members such as pin terminals and lead frames are attached to the front surface (e.g., source electrode pads) of the power semiconductor chips 1 via metal wires 10 (bonding wires) such as aluminum wires or bonding layers (not shown). The power semiconductor chips 1 and the metal terminals 9 are electrically connected by metal wires 10 such as aluminum wires. A lead frame may also be used (not shown). A primer layer (not shown) may be laminated on the sealed components, such as the power semiconductor chips 1, the laminated substrate 5, the bonding layer 25, and the metal wires 10 (conductive connecting members), to improve adhesion. The inside of the case 7 is filled with sealing resin 8. The configuration of the power semiconductor module 50 shown in the figure is an example, and the present invention is not limited to this configuration. The power semiconductor module has a generally rectangular shape in top view depending on the components, but may also have a generally square shape, with generally rectangular shapes being more commonly used.

[0027] (Power semiconductor chip 1) The power semiconductor chip 1 is a power chip such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), or an SBD (Schottky Barrier Diode), and devices using Si, SiC, or GaN can be used as the semiconductor substrate. The present disclosure is particularly effective for SiC chips and GaN chips that have high power and a high Young's modulus. The number of power semiconductor chips 1 mounted may be one or more.

[0028] A front surface electrode (back surface electrode) on the back surface of the power semiconductor chip 1 is joined to a first conductive plate 3 on the front surface of the laminated substrate 5 with a bonding layer 25 such as solder. A second conductive plate 4 on the back surface of the laminated substrate 5 is joined to the front surface of a heat dissipation base 26 with a bonding layer 25 such as solder. The first conductive plate 3 is formed in a predetermined circuit pattern on the front surface (first main surface) of the insulating substrate 2. The second conductive plate 4 may be a metal foil formed on the entire back surface of the insulating substrate 2.

[0029] (Laminated substrate 5) The laminated substrate 5 can be composed of an insulating substrate 2, a first conductive plate 3 formed in a predetermined shape on one of its main surfaces, and a second conductive plate 4 formed on the other main surface. The insulating substrate 2 can be made of a material with excellent electrical insulation and thermal conductivity. Examples of materials for the insulating substrate 2 include Al2O3, AlN, and SiN. For high-voltage applications, a material that combines electrical insulation and thermal conductivity is preferable, and AlN and SiN can be used, but are not limited to these. The first conductive plate 3 and the second conductive plate 4 can be made of Cu (copper) or a Cu alloy, which has excellent processability. A Cu alloy is an alloy containing 80% or more Cu. Among such conductive plates made of Cu or a Cu alloy, the conductive plate not in contact with the power semiconductor chip 1 is sometimes referred to as a backside copper foil or a backside conductive plate. Methods for disposing the conductive plate on the insulating substrate 2 include a direct copper bonding method and an active metal brazing method. Alternatively, the surface of the conductive substrate may be plated with Ni (nickel) or the like to form a Ni or Ni alloy layer.

[0030] (Heat dissipation base 26) The heat dissipation base 26 is a heat dissipation plate having, for example, a substantially rectangular planar shape made of a metal such as Cu or Al that has excellent thermal conductivity, and is also referred to as a metal substrate. The surface of the heat dissipation base 26 may be covered with a Ni film or Ni alloy film that has an anti-corrosion effect. The back surface of the heat dissipation base 26 may be bonded to a cooling base portion (not shown). The heat dissipation base 26 conducts heat generated in the power semiconductor chip 1 and transmitted via the laminated substrate 5 to the heat dissipation fin portion. The heat dissipation fin portion has a plurality of heat dissipation fins and dissipates the heat conducted from the heat dissipation base 26. The heat dissipation base 26 itself may be a cooling device such as a heat dissipation fin portion.

[0031] (Joining layer 25) The bonding layer 25 can be formed using lead-free solder, such as, but not limited to, Sn—Sb-based, Sn—Cu-based, Sn—Ag-based, and Sn—Sb—Ag-based solder.

[0032] (Case 7) The lower end of a case 7 made of resin or the like is adhered to the periphery of the heat dissipation base 26. The case 7 has a generally rectangular cylindrical shape and surrounds the periphery of the front surface of the heat dissipation base 26. A box-shaped recess is formed, with the front surface of the heat dissipation base 26 as its bottom and the inner wall of the case 7 perpendicular to the front surface of the heat dissipation base 26 as its side wall. The power semiconductor chip 1, which is wired with wiring members such as metal wires 10 and lead frames, as well as the laminated substrate 5 and wiring member components are housed inside this recess. The material of the case 7 may be, for example, a thermoplastic resin such as polyphenylene sulfide (PPS) or polybutylene terephthalate (PBT) or a thermosetting resin such as a phenolic resin. Note that a semiconductor module may be formed by molding the power semiconductor chip, laminated substrate, etc. with a sealing resin without including a case.

[0033] (Primer layer) A primer layer (not shown) may be formed on the member to be sealed. The primer layer may be a layer made of a resin containing polyamide, polyimide, or polyamideimide. The primer layer may be advantageously used because it can improve the adhesion and relieve stress at the interface between the metal wire 10, the lead frame, or other conductive connecting members, the laminated substrate 5 (particularly the first conductive plate 3 on the main surface side), the heat dissipation base 26, the case 7 (inner surface), and the sealing resin 8. The thickness of the primer layer is not particularly limited as long as it can provide adhesion and relieve stress. The thickness of the primer layer can be, for example, approximately 1 to 15 μm, and preferably 2 to 10 μm. The primer layer can be provided so as to cover the entire surface of the member. These primer layers are prone to moisture absorption, which may reduce adhesion. A power semiconductor module without a primer layer may also be used.

[0034] (Sealing resin 8) The encapsulating resin 8 is used as an encapsulating resin layer that encapsulates the encapsulated components. It is provided in contact with the primer layer, or in a power semiconductor module without a primer layer (not shown), it is provided in contact with the encapsulated components. It mainly covers the periphery of the power semiconductor chip 1, the laminated substrate 5, the metal wires 10, the lead frame, etc. The encapsulating resin 8 can be composed of a thermosetting resin composition, and is preferably composed of a highly heat-resistant thermosetting resin composition. The thermosetting resin composition includes a thermosetting resin base and may optionally contain an inorganic filler, a curing agent, a curing accelerator, and necessary additives. The thermosetting resin composition that constitutes the encapsulating resin 8 may or may not contain a fluorine-based silane coupling agent, but it is preferable that it does not contain one. This is because it may lower the glass transition temperature (Tg) of the encapsulating resin 8.

[0035] The thermosetting resin base is not particularly limited, and examples thereof include epoxy resins, phenolic resins, and maleimide resins. Among these, epoxy resins having at least two epoxy groups per molecule are particularly preferred because of their high dimensional stability, water resistance, chemical resistance, and electrical insulation. Specifically, it is preferred to use aliphatic epoxy resins, alicyclic epoxy resins, or mixtures thereof.

[0036] Aliphatic epoxy resins are epoxy compounds in which the carbon atom directly bonded to the epoxy group is a carbon atom constituting an aliphatic hydrocarbon. Therefore, even if the main skeleton contains an aromatic ring, compounds that satisfy the above conditions are classified as aliphatic epoxy resins. Examples of aliphatic epoxy resins include, but are not limited to, bisphenol A epoxy resins, bisphenol F epoxy resins, bisphenol AD ​​epoxy resins, biphenyl epoxy resins, naphthalene epoxy resins, cresol novolac epoxy resins, and trifunctional or higher polyfunctional epoxy resins. These can be used alone or in combination. Furthermore, naphthalene epoxy resins and trifunctional or higher polyfunctional epoxy resins have high glass transition temperatures and are therefore also referred to as high-heat-resistant epoxy resins. The inclusion of these high-heat-resistant epoxy resins can improve heat resistance.

[0037] Alicyclic epoxy resins are epoxy compounds in which the two carbon atoms constituting the epoxy group constitute an alicyclic compound. Examples of alicyclic epoxy resins include, but are not limited to, monofunctional epoxy resins, bifunctional epoxy resins, and trifunctional or higher polyfunctional epoxy resins. Alicyclic epoxy resins can be used alone or in combination with two or more different alicyclic epoxy resins. Mixing an alicyclic epoxy resin with an acid anhydride curing agent and curing it increases the glass transition temperature, so mixing an alicyclic epoxy resin with an aliphatic epoxy resin can improve heat resistance.

[0038] The thermosetting resin base used in the composition according to this embodiment may be a mixture of the above-mentioned aliphatic epoxy resin and alicyclic epoxy resin. When mixed, the mixing ratio may be any, and the mass ratio of the aliphatic epoxy resin to the alicyclic epoxy resin may be about 2:8 to 8:2, or may be about 3:7 to 7:3, and is not limited to a specific mass ratio. Preferably, the thermosetting resin base has a mass ratio of bisphenol A type epoxy resin to alicyclic epoxy resin of 1:1 to 1:4.

[0039] The thermosetting resin composition according to the present embodiment may contain an inorganic filler as an optional component. The inorganic filler may be a metal oxide or a metal nitride, and examples thereof include, but are not limited to, fused silica (fused silicon oxide), silica (silicon oxide), alumina (aluminum oxide), aluminum hydroxide, titania (titanium oxide), zirconia (zirconium oxide), aluminum nitride, talc, clay, mica, and glass fiber. These inorganic fillers can increase the thermal conductivity and reduce the thermal expansion coefficient of the cured product. These inorganic fillers may be used alone or in combination of two or more. These inorganic fillers may be microfillers or nanofillers, and two or more inorganic fillers with different particle sizes and / or types may be mixed and used.

[0040] The thermosetting resin composition may optionally contain a curing agent in addition to the thermosetting resin base, or in addition to the thermosetting resin base and inorganic filler. The curing agent is not particularly limited as long as it reacts with the thermosetting resin base, preferably the epoxy resin base, and can be cured. However, it is preferable to use an acid anhydride curing agent. Examples of the acid anhydride curing agent include aromatic acid anhydrides, specifically phthalic anhydride, pyromellitic anhydride, and trimellitic anhydride. Alternatively, examples of cyclic aliphatic acid anhydrides include tetrahydrophthalic anhydride, methyltetrahydrophthalic anhydride, hexahydrophthalic anhydride, methylhexahydrophthalic anhydride, and methylnadic anhydride; and aliphatic acid anhydrides, specifically succinic anhydride, polyadipic anhydride, polysebacic anhydride, and polyazelaic anhydride. When a bisphenol A type epoxy resin is used alone or in a mixture of a bisphenol A type epoxy resin and one of the high heat-resistant epoxy resins exemplified above as the thermosetting resin base, it may be preferable not to use a curing agent, as this improves heat resistance.

[0041] The thermosetting resin composition may further contain, as an optional component, a curing accelerator, such as imidazole or a derivative thereof, a tertiary amine, a boric acid ester, a Lewis acid, an organometallic compound, or an organic acid metal salt.

[0042] The thermosetting resin composition may also contain optional additives to the extent that their properties are not impaired. Examples of additives include, but are not limited to, flame retardants, pigments for coloring the resin, plasticizers for improving crack resistance, and silicone elastomers. These optional components and their amounts can be appropriately determined by those skilled in the art depending on the specifications required for the semiconductor module and / or encapsulant. The storage modulus of a thermosetting resin composition (cured product) containing the inorganic filler and having an epoxy resin as the main thermosetting resin component can be 10 to 20 GPa, preferably 11 to 13 GPa. The encapsulating resin 8 may be an organosilicon polymer whose main chain is composed of siloxane bonds, such as a silicone resin (silicone gel) having an elastic modulus of 100 MPa or less and a penetration (1 / mm) of 0.1 to 500.

[0043] (Low modulus region 30) In the power semiconductor module 50 of the embodiment, a low elastic modulus region 30 having a low elastic modulus is provided on the outermost surface of the sealing resin 8, where resin cracks are likely to occur. By providing the low elastic modulus region 30 directly above the power semiconductor chip 1, where stress is likely to concentrate, stress can be alleviated and resin cracks can be suppressed.

[0044] Fig. 2 is a top view showing the structure of a power semiconductor module according to an embodiment. As shown in Fig. 2, the low elastic modulus regions 30 are preferably striped and provided parallel to the direction in which resin cracks appear (the short-side direction of the power semiconductor module 50). In Fig. 2, the low elastic modulus regions 30 are formed so as to connect the inner wall of the case in the longitudinal direction, but they do not have to be in contact with the inner wall of the case and may be provided near the center, and are preferably provided near the center of the power semiconductor module in the longitudinal direction when viewed from above.

[0045] The low elastic modulus region 30 of the embodiment has a lower storage elastic modulus than the encapsulating resin 8. As will be explained in detail in the following experimental examples, if the storage elastic modulus of the low elastic modulus region 30 is defined as the specific elastic modulus when the storage elastic modulus of the encapsulating resin 8 is 100%, the P / C resistance is improved when the specific elastic modulus is 0.83% or more but less than 100%. Furthermore, it is more preferable to set the specific elastic modulus between 8% and 75%, as this improves the P / C resistance by 20% or more. Furthermore, it is preferable to set the specific elastic modulus between 25% and 50%, as this improves the P / C resistance by 30% or more.

[0046] As will be explained in detail in the experimental examples below, the cross-sectional shape of the low elastic modulus region 30 has a curved shape in the portion that comes into contact with the sealing resin 8, and the tip (bottom tip) is not sharp, as shown in Figure 1. For example, in the case of a shape that does not include a straight line portion in the curve, such as a semicircle or semi-ellipse, or a half-moon or semi-cylindrical shape that includes a straight line portion in the curve, it is preferable that the sharp tip (bottom tip) has a curvature of at least R = 0.5 mm or more. Furthermore, there are no specifications for the shape of the portion that does not come into contact with the sealing resin 8 (the portion exposed on the module surface).

[0047] (Method of manufacturing a power semiconductor module according to an embodiment) Next, a method for manufacturing a power semiconductor module according to an embodiment will be described. Figures 3 to 5 are cross-sectional views schematically showing a state during manufacturing of a power semiconductor module according to an embodiment by a first manufacturing method. Figure 6 is a cross-sectional view schematically showing a state during manufacturing of a power semiconductor module according to an embodiment by a second manufacturing method. In both the first and second manufacturing methods, first, the power semiconductor chip 1 is bonded to the heat dissipation base 26 and the laminated substrate 5 by the bonding layer 25.

[0048] After this, the case 7 is attached to the heat dissipation base 26, and then the lead frame is joined and wire-bonded with the metal wire 10. Note that the metal wire 10 may be used instead of the lead frame. Next, a primer layer may be formed. The primer layer may be applied to the power semiconductor chip 1, the laminated substrate 5, the lead frame, the metal wire 10, and the case 7, for example, by spray coating. After the primer layer is formed, the assembly is preferably heated in an inert oven containing nitrogen gas at 70 to 90°C for approximately 60 to 80 minutes, and then further heated at 200 to 220°C for 60 to 80 minutes. This heating operation suppresses oxidation of the Cu surface and heats the Cu constituting the lead frame, promoting the reaction between the primer layer and Cu and improving adhesion between the primer layer and the lead frame. Note that the power semiconductor module 50 of this embodiment may not be provided with a primer layer, in which case the spray coating and heating operations in the inert oven can be omitted.

[0049] Next, in the first manufacturing method, as shown in FIG. 3, a thermosetting resin composition 31 that constitutes the molten sealing resin 8 is injected into the case 7. The state in which the thermosetting resin composition 31 has been injected is shown in FIG. 4. Next, as shown in FIG. 5, a low-elasticity resin 32 is partially injected. Here, because the low-elasticity resin 32 has high viscosity, it is unlikely to spontaneously diffuse into the sealing resin. Thereafter, the thermosetting resin composition 31 and the low-elasticity resin 32 are heat-cured to form the sealing resin 8 and the low-elasticity region 30. For example, the thermosetting resin composition 31 is pre-cured at 100 to 120°C for 10 to 120 minutes, and then the main curing is performed at approximately 175 to 185°C for 1 to 2 hours, thereby producing the power semiconductor module 50 shown in FIG. 1.

[0050] In the second manufacturing method, similarly to the first manufacturing method, a molten thermosetting resin composition 31 constituting the sealing resin 8 is partially injected into the case 7 (see FIG. 3). The state after the thermosetting resin composition 31 is injected is similar to that in the first manufacturing method (see FIG. 4). Next, as shown in FIG. 6, a low elastic modulus region 30 in which a low elasticity resin 32 has been previously cured is inserted into the uncured or temporarily cured thermosetting resin composition 31. Thereafter, the thermosetting resin composition 31 is heat-cured. For example, temporary curing is performed at 100 to 120°C for 10 to 120 minutes, and then full curing is performed at about 175 to 185°C for 1 to 2 hours, thereby producing the power semiconductor module 50 shown in FIG. 1.

[0051] The present disclosure will be described in more detail below with reference to experimental examples and examples of the present disclosure. However, the present disclosure is not limited to the scope of the following experimental examples and examples. Experimental Example 1 was conducted on the low-elasticity material used in the low-elasticity region 30. Experimental Examples 2 and 3 were conducted on the location of the low-elasticity region 30. Experimental Example 4 was conducted on the cross-sectional shape of the low-elasticity region 30. Experimental Example 5 was conducted on the viscosity range of the first manufacturing method. Experimental Example 6 was conducted on the manufacturing method.

[0052] (Experimental Example 1) In Experimental Example 1, the power cycle (P / C) resistance was compared when low elastic modulus regions 30 with various storage elastic moduli were formed on a sealing resin 8 with a storage elastic modulus of 12 GPa at 25°C after curing. The results are shown in Table 1. In Table 1, * indicates that the elastic modulus could not be measured by DMS, which will be described below, and the penetration was 35.

[0053] [Table 1]

[0054] The low-elasticity resins used were ordinary sealing resins (epoxy resin A (a mixture of bisphenol A type and alicyclic epoxy)) with storage moduli of 6 GPa or more, up to 14 GPa, and resins with storage moduli of 12 GPa, prepared by adjusting the filler concentration from a standard filler concentration of 73 wt% (Examples 1 to 5, Comparative Examples 1 to 3). For materials with a storage modulus of 3 GPa, silicone rubber was added in addition to the epoxy resin to adjust the storage modulus (Examples 6 to 8). Alternatively, silicone rubber material itself and silicone gel were used (Example 9, Comparative Examples 5 and 6). In addition, to confirm the effect of the shape of low-elasticity region 30 itself, an example was also prepared in which a recess was provided in low-elasticity region 30 but no low-elasticity material was sealed (Comparative Example 4).

[0055] Example 1 The details of Example 1 are given below. 1) Test module Epoxy resin ME-276 (manufactured by Pelnox Corporation) was used as the epoxy resin for the sealing resin 8, and 121 parts by mass of MV-138 (manufactured by Pelnox Corporation) was added as the acid anhydride curing agent relative to 100 parts by mass of the epoxy resin. Spherical silica (manufactured by AGC Corporation) with an average particle size of 10 μm was used as the filler, and 270 parts by mass of it was added relative to 100 parts by mass of the total mass of the epoxy resin and curing agent. In this case, the filler concentration was 73 wt%. 2) Low elastic modulus region 30 ·Material The epoxy resin A used was the same as the material for the sealing resin 8, with epoxy resin ME-276 (manufactured by Pelnox Co., Ltd.) as the base resin and MV-138 (manufactured by Pelnox Co., Ltd.) as the hardener. Similarly, spherical silica (manufactured by AGC Corporation) with an average particle size of 10 μm was used as the filler, but the amount added was 150 parts by mass, assuming that the total mass of the epoxy resin base resin and hardener was 100 parts by mass. This resulted in a filler concentration of 60 wt%. ·Shape, arrangement The low elastic modulus region 30 has a crescent-shaped cross section as shown in Figure 1, and is provided in a direction parallel to the short side of the module and directly above the power semiconductor chip 1 as shown in Figure 2, and is manufactured using the first manufacturing method (in the first manufacturing method, the low elastic resin is manufactured by resin injection at a low viscosity resin temperature of 20°C and a sealing resin temperature of 60°C so that the resin viscosity difference is 1:0.5, and then thermally curing). Specifically, the low elastic modulus region 30 is crescent-shaped, has a depth of 3 mm (more than 20% of the thickness of the sealing resin 8, for example, 10 mm), and a width of 5 mm (about the size of the power semiconductor chip 1 (element), about 50 to 150% of the width of the element), and the size of the sealing resin 8 of the power semiconductor module 50, when viewed from the top, is 50 mm in the short direction and 70 mm in the long direction, and the maximum thickness of the sealing resin 8 is 10 mm. 3) Evaluation method Storage modulus evaluation Using a dynamic viscoelasticity measuring device (DMS), 3 The storage modulus of the resin sample molded into a plate shape was measured in a double-supported beam measurement mode. The measurement was performed at room temperature, with an applied frequency of 1 Hz and a measurement length of 20 mm. Reliability evaluation The P / C test was performed by applying electricity from 40°C to 175°C, with one cycle consisting of 2 seconds of operation and 9 seconds of rest, and the number of cycles until no abnormalities in the electrical properties due to the progression of cracks on the resin surface were observed was recorded.

[0056] Examples 2 to 9 Details of Examples 2 to 9 are shown below. For Examples 2 to 9, modules were produced using the same method and conditions as Example 1, except that the storage modulus was changed by changing the material of the low modulus region 30 as shown in Table 1, and the specific modulus was changed from 8.3% to 100%, and reliability was evaluated. Specifically, for Examples 2 to 5, the filler concentration of Example 1 was changed to the amount shown in Table 1. Furthermore, for Examples 6 to 9, compared to Example 5, KE-66 (manufactured by Shin-Etsu Chemical Co., Ltd.), a two-component silicone rubber, was added as silicone rubber A in the amount shown in Table 1.

[0057] (Comparative Examples 1 to 6) Details of Comparative Examples 1 to 6 are shown below. In Comparative Examples 1 to 3, modules were fabricated using the same method and conditions as in Example 1, except that a material with a storage modulus greater than that of the encapsulating resin 8 was used in the low elastic modulus region 30, as shown in Table 1, and reliability was evaluated. Specifically, in Comparative Examples 1 to 3, the filler concentration in Example 1 was changed to the filler concentration shown in Table 1. In Comparative Example 4, a module was fabricated using the same method and conditions as in Example 1, except that nothing was placed in the low elastic modulus region 30, leaving it as a recess, and reliability was evaluated. In Comparative Example 5, instead of the silicone rubber A in Example 9, KE-1031 (manufactured by Shin-Etsu Chemical Co., Ltd.), a two-component silicone rubber, was used as silicone rubber B. In Comparative Example 6, a silicone gel was used. The silicone gel used was TSE3051FH, a one-component silicone gel manufactured by Momentive, and was cured at 80°C for 30 minutes. The silicone gel (after curing) was too soft to be measured using the storage modulus evaluation method described above, with a penetration of 35. Penetration is a method for measuring the hardness of a material, and involves dropping a conical needle of a specified weight vertically onto the object being measured, and evaluating the degree to which the needle sinks in 1 / 10 mm increments. In this case, the penetration depth was measured when the needle was allowed to penetrate for 5 seconds under the specified conditions specified in ASTM D-1403.

[0058] (result) As a result, if the storage modulus of the low elastic modulus region 30 is taken as the specific modulus when the storage modulus of the sealing resin 8 is taken as 100%, then a specific modulus of 0.83% or more but less than 100% improves the P / C resistance. Furthermore, a specific modulus of 4.2% to 83% is preferable because the P / C resistance improves by 14% or more, and a specific modulus of 8% to 75% is preferable because the P / C resistance improves by 25% or more. Furthermore, a specific modulus of 25% to 50% is even more preferable because the P / C resistance improves by 40% or more.

[0059] On the other hand, when the specific elastic modulus is reduced to less than 0.83%, the effect of improving P / C resistance due to low elasticity disappears, and when the specific elastic modulus is even lower, at 0.083% or less, the P / C resistance actually deteriorates slightly compared to Comparative Example 1. This is thought to be due to the fact that a decrease in P / C resistance was observed even in Comparative Example 4, in which only a recess was provided in the sealing resin 8 and no low elasticity resin was used, and that if the low elasticity region 30 is too soft, the stress relaxation effect is lost, and in addition, the rigidity of the sealing resin 8 is reduced due to the formation of a recess to provide a low stress region and the resulting thinning.

[0060] (Experimental Example 2) In Experimental Example 2, the effects of providing the low elastic modulus region 30 directly above the power semiconductor chip 1 or elsewhere were confirmed. The results are shown in Table 2. FIG. 7 is a top view showing the structure of Example 12 of the semiconductor module according to the embodiment. Example 5 has the same structure as Example 1 of Experimental Example 1. Comparative Example 1 has the same structure as Comparative Example 1 of Experimental Example 1. Note that "directly above" also includes the case where there is a portion that overlaps even partially with the power semiconductor chip in plan view.

[0061] [Table 2]

[0062] In Example 5, a resin with a storage modulus of 6 GPa was used for the low elastic modulus region 30, and it was provided in a direction parallel to the short sides of the module and directly above the power semiconductor chip 1 as shown in Figure 1, and the manufacturing method was Manufacturing Method 1. In Example 12, the same low elastic modulus region 30 as in Example 5 was used, and it was provided in a direction parallel to the short sides of the module and other than directly above the power semiconductor chip 1 as shown in Figure 7, and the manufacturing method was Manufacturing Method 1.

[0063] Specifically, with the center of the power semiconductor chip 1 as the origin, the area within a range of ±10% (±7 mm) in the longitudinal direction of the module was defined as directly above the power semiconductor chip 1, and anything outside of that range was defined as areas other than directly above the power semiconductor chip 1. The results confirmed that the resin crack resistance during P / C was improved both directly above the power semiconductor chip 1 and areas other than directly above it. In this case, it was found that providing a low elastic modulus region directly above the power semiconductor chip 1 was more effective in improving the resin crack resistance during P / C. In this experimental example, the power semiconductor chip was placed approximately in the center of the encapsulating resin in a planar view for verification, but even when multiple power semiconductor chips were placed directly above the power semiconductor chip rather than only in the center, similar effects to those of this experimental example were obtained.

[0064] (Experimental Example 3) In Experimental Example 3, the effect of providing low elastic modulus regions 30 in the short and / or long directions of the module was confirmed. The results are shown in Table 3. FIG. 8A is a top view showing the structure of Example 13 of the semiconductor module according to the embodiment. FIG. 8B is a top view showing the structure of Example 14 of the semiconductor module according to the embodiment. Example 5 has the same structure as Example 1 of Experimental Example 1. Comparative Example 1 has the same structure as Comparative Example 1 of Experimental Example 1.

[0065] [Table 3]

[0066] In Example 5, the low elastic modulus region 30 was made of a resin having a storage modulus of 6 GPa and was provided in a direction parallel to the short sides of the module and directly above the power semiconductor chip 1 as shown in Figure 2, and the manufacturing method was the first manufacturing method. In Example 13, the low elastic modulus region 30 was made of a resin having a storage modulus of 6 GPa and was provided in a direction parallel to the long sides of the module and directly above the power semiconductor chip 1 as shown in Figure 8A, and the manufacturing method was the first manufacturing method. In Example 14, the low elastic modulus region 30 was made of a resin having a storage modulus of 6 GPa and was provided both in a direction parallel to the long sides of the module and directly above the power semiconductor chip 1 and in a direction parallel to the short sides of the module and directly above the power semiconductor chip 1 as shown in Figure 8B, and the manufacturing method was the first manufacturing method.

[0067] The results confirmed that the P / C resistance was improved in Examples 5, 13, and 14, but the effect of improving the P / C resistance was particularly remarkable when the low elastic modulus regions 30 were arranged in the direction parallel to the short sides in Examples 5 and 14. Furthermore, the effect of improving the P / C resistance was most remarkable when the low elastic modulus regions 30 were arranged in the direction parallel to the short sides and the long sides in Example 14.

[0068] (Experimental Example 4) In Experimental Example 4, the effects of the cross-sectional shape of the low elastic modulus region 30, which is 3 mm deep and 5 mm wide, being half-moon, rectangular, inverted triangular, rectangular (with R, R=0.5 mm), and inverted triangular (with R, R=0.5 mm) were confirmed. Note that a half-moon shape refers to a shape that does not include a straight line in the curve, such as a semicircle or semi-ellipse. The results are shown in Table 4.

[0069] [Table 4]

[0070] Comparative Example 1 has the same structure as Comparative Example 1 of Experimental Example 1. A rectangular shape was used in Comparative Example 7. FIG. 9 is a top view showing the structure of Comparative Example 7 for the power semiconductor module according to the embodiment. The storage modulus, position, manufacturing method, etc. are the same as those of Example 15. A reversed triangular shape was used in Comparative Example 8. FIG. 10 is a top view showing the structure of Comparative Example 8 for the power semiconductor module according to the embodiment. The storage modulus, position, manufacturing method, etc. are the same as those of Example 15. Note that a curvature of about R=0.25 was given to the vertices of the rectangle and the reversed triangle, to which R was not intentionally given, for convenience of sample manufacturing.

[0071] In Example 15, a half-moon shape was used. FIG. 11 is a top view showing the structure of Example 15 of a power semiconductor module according to an embodiment. In Example 15, a semi-elliptical shape with a minor radius of 1.5 mm and a major radius of 2.5 mm was used. The low elastic modulus region 30 uses a resin with a storage modulus of 6 GPa, and is applied so as to pass directly above the power semiconductor chip 1, and is fabricated using the second manufacturing method. The low elastic modulus region 30 was fabricated in advance by injecting a predetermined material into a mold.

[0072] In Example 16, a rectangular shape with an R was used. FIG. 12 is a top view showing the structure of Example 16 of a power semiconductor module according to an embodiment. The storage modulus, position, manufacturing method, etc. are the same as those of Example 15. In Example 17, an inverted triangular shape with an R was used. FIG. 13 is a top view showing the structure of Example 17 of a power semiconductor module according to an embodiment. The storage modulus, position, manufacturing method, etc. are the same as those of Example 15.

[0073] The results showed that in Comparative Examples 7 and 8, structures with sharp vertices at the ends of cross-sectional shapes such as the rectangular and inverted triangular shapes, the effect of improving resin crack resistance during P / C tests was reduced compared to Comparative Example 1, whereas in Examples 15 to 17, structures with no vertices in the cross-sectional shapes such as the crescent shape, rectangular (with R), and inverted triangular (with R), the resin crack resistance was improved compared to Comparative Example 1. This is thought to be because a rounded shape without vertices is effective in preventing resin cracks due to stress concentration at the vertices in the low elastic modulus region 30. The results of Experimental Example 4 showed that the R of the corners of polygonal shapes such as rectangles and triangles is undesirable, at least within the range of 0 to 0.25 mm.

[0074] (Experimental Example 5) In Experimental Example 5, we investigated a manufacturing method for imparting the structure of the present disclosure using the first manufacturing method. The elastic modulus of the potting sealing resin is generally adjusted by the concentration of filler added to the resin, with the higher the filler concentration, the higher the elastic modulus. Therefore, to prepare the resin for the low elastic modulus region 30, it is simple to use a sealing resin with a lower elasticity by reducing the filler concentration. However, a low-elasticity resin with a reduced filler concentration also has a lower viscosity. Therefore, if this low-elasticity liquid resin is simply dispensed onto the liquid sealing resin, the low-viscosity resin will float rather than sink, preventing the structure of the present disclosure from being achieved. Therefore, taking advantage of the fact that the viscosity of liquid resins generally decreases with heating, we heated a high-viscosity sealing resin to reduce its viscosity, and then dispensed a low-temperature, high-viscosity low-elasticity resin onto it to produce the structure of the present disclosure. In Experimental Example 5, we evaluated whether the structure of the present disclosure could be imparted when the viscosity was changed by changing the casting temperatures of the sealing resin and low-elasticity resin. The encapsulating resin used in this evaluation was a thermosetting epoxy resin, with silica filler accounting for approximately 73 wt% of its composition. It is known that the higher the filler concentration in an epoxy resin, the higher the elastic modulus of the cured resin and the higher the viscosity of the resin in its uncured state. In Example 1, an epoxy resin was used as the standard encapsulating material, and a fillerless epoxy resin, in which all fillers had been removed from this epoxy resin, was used as the low-elasticity resin. The results are shown in Table 5.

[0075] [Table 5]

[0076] When the viscosity ratio of the encapsulating resin to the low-elasticity resin was 1:1 to 1:0.35, assuming the viscosity of the encapsulating resin to be 1, the configuration of the present disclosure could be manufactured. When the viscosity ratio was 1:0.25 or less, the viscosity of the low-viscosity resin was too low to penetrate into the encapsulating resin, resulting in a configuration in which the low-viscosity resin wetted and spread over the encapsulating resin (NG1). When the viscosity ratio was 1:1.4 or more, the viscosity of the encapsulating resin was too low, so the low-viscosity resin sank deep into the encapsulating resin, making it impossible to manufacture the desired configuration (NG2). The viscosity of each resin was varied by controlling the temperature.

[0077] (Experimental Example 6) In Experimental Example 6, the difference in effect between the first and second manufacturing methods was confirmed. The same resin as in Example 5 was used for the low-elasticity region 30, and it was applied parallel to the short side of the module and directly above the power semiconductor chip 1. The storage modulus of the cured low-elasticity resin was 6 GPa at room temperature. In the first manufacturing method, the low-elasticity resin was produced by casting the resin at a low-viscosity resin temperature of 20°C and an encapsulating resin temperature of 60°C so that the resin viscosity difference was 1:0.5, followed by thermal curing. In the second manufacturing method of Example 15, a low-elasticity resin cured product was previously produced using a rod-shaped mold with a crescent-shaped cross section, inserted into encapsulating resin cast at 60°C, and the encapsulating resin was then thermally cured. Comparative Example 1 has the same structure as Comparative Example 1 of Experimental Example 1. The results are shown in Table 6.

[0078] [Table 6]

[0079] The results showed that both the first and second manufacturing methods showed improved P / C resistance compared to Comparative Example 1, confirming their effectiveness in improving resin crack resistance. It was found that the first manufacturing method was more effective in improving resin crack resistance during P / C. This is due to the injection of a liquid low-filler, low-elasticity resin into the encapsulating resin, which is also a liquid resin, causing filler diffusion at the interface between the two resins before the resin curing was complete, resulting in a filler concentration distribution. This is thought to have improved the stress relaxation effect compared to the second manufacturing method, in which the interface between the two resins is discontinuous. While the first manufacturing method was used in Experimental Examples 1, 2, and 3, the second manufacturing method also produced similar effects. Furthermore, while the encapsulating resin used in the above-mentioned experiments had a storage modulus of 12 GPa, the low-elasticity region produced similar effects even when other storage moduli were used, given the specified shape, arrangement, and specific elastic modulus.

[0080] As described above, according to the embodiment, by placing a low elastic modulus region on the outermost surface of the sealing resin directly above the power semiconductor chip where stress is likely to concentrate, stress can be alleviated and resin cracks can be suppressed.

[0081] The present invention can be modified in various ways without departing from the spirit of the present invention, and in each of the above-described embodiments, for example, the dimensions of each part, the impurity concentration, etc. are variously set according to the required specifications, etc. Furthermore, each of the above-described embodiments can be applied to wide bandgap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) in addition to silicon as the semiconductor. [Industrial Applicability]

[0082] As described above, the semiconductor module and the method for manufacturing the semiconductor module according to the present invention are useful for power semiconductor modules used in power conversion devices such as inverters, power supply devices for various industrial machines, and automotive igniters. [Explanation of symbols]

[0083] 1, 101 Power semiconductor chip 2, 102 insulating substrate 3, 103 First conductive plate 4, 104 Second conductive plate 5, 105 laminated board 7,107 cases 8, 108 Sealing resin 9, 109 Metal terminal 10, 110 Metal Wire 25, 125 bonding layer 26, 126 Heat dissipation base (cooler) 30 Low modulus region 31 Thermosetting resin composition 32 Low elasticity resin 50, 150 Power Semiconductor Module 133 Crack 134 Thermal Stress

Claims

1. a laminated substrate on which a semiconductor element is mounted via a bonding layer; a sealing resin that seals a member to be sealed, including the semiconductor element, the bonding layer, and the laminated substrate; a low elastic modulus region having a lower elastic modulus than the sealing resin, the low elastic modulus region being provided on the surface of the sealing resin above the semiconductor element; Equipped with A semiconductor module characterized in that, when the storage modulus of the sealing resin is 100%, the storage modulus of the low elastic modulus region is taken as the specific elastic modulus, and the specific elastic modulus is 0.83% or more and less than 100%.

2. 2. The semiconductor module according to claim 1, wherein the specific elastic modulus is 8% or more and 75% or less.

3. 2. The semiconductor module according to claim 1, wherein the specific elastic modulus is 25% or more and 50% or less.

4. 2. The semiconductor module according to claim 1, wherein the low elastic modulus region has a stripe shape and is provided parallel to a lateral direction of the power semiconductor module.

5. 2. The semiconductor module according to claim 1, wherein the low elastic modulus regions are striped and are provided parallel to the short-side direction and the long-side direction of the power semiconductor module.

6. 2. The semiconductor module according to claim 1, wherein the low elastic modulus region is provided directly above the semiconductor element.

7. 2. The semiconductor module according to claim 1, wherein the low elastic modulus region has a blunt bottom edge on the semiconductor element side.

8. 8. The semiconductor module according to claim 7, wherein the curvature R of the bottom tip is 0.5 mm or more.

9. a first step of mounting a semiconductor element on a laminated substrate via a bonding layer; a second step of encapsulating the semiconductor element, the bonding layer, and the laminated substrate with a thermosetting resin composition; a third step of injecting a low-elasticity resin having a lower elastic modulus than the thermosetting resin composition onto a surface of the thermosetting resin composition above the semiconductor element; a fourth step of heat-curing the thermosetting resin composition and the low elasticity resin to form an encapsulating resin and a low elasticity region; Including, The method for manufacturing a semiconductor module, wherein the low elastic modulus region has an elastic modulus lower than that of the sealing resin.

10. 10. The method for manufacturing a semiconductor module according to claim 9, wherein the viscosity ratio of the thermosetting resin composition to the low-elasticity resin is 1:1 to 1:0.35 when the viscosity of the thermosetting resin composition is 1.

11. a first step of mounting a semiconductor element on a laminated substrate via a bonding layer; a second step of encapsulating the semiconductor element, the bonding layer, and the laminated substrate with a thermosetting resin composition; a third step of inserting a pre-cured low modulus region into a surface of the thermosetting resin composition above the semiconductor element; a fourth step of heat-curing the thermosetting resin composition to form an encapsulating resin; Including, The method for manufacturing a semiconductor module, wherein the low elastic modulus region has an elastic modulus lower than that of the sealing resin.

Citation Information

Patent Citations

  • Semiconductor device

    JP2024000325A