Semiconductor Devices

Abstract

To provide a transistor that uses an oxide semiconductor having high on-characteristics, and to provide a high-performance semiconductor device that has a transistor capable of responding and driving at a high speed.SOLUTION: At a step of manufacturing a transistor that has an oxide semiconductor film including a channel formation region, a low-resistance region that includes a metal element introduced by being subjected to heat treatment in a state contacted with a film containing the metal element, and a dopant introduced by passing through the film containing the metal element by an injection method, is formed on the oxide semiconductor film. The low-resistance region is formed so as to sandwich a channel formation region in a channel length direction.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] A transistor (thin film transistor) is made using a semiconductor thin film formed on a substrate with an insulating surface. The technology of constructing thin-film transistors (also called TFTs) is attracting attention. It is widely used in electronic devices such as ICs and image display devices. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be applied to transistors. Another material that has attracted attention is oxide semiconductors.

[0004] As for transistors using oxide semiconductors, there are many In transistors using oxide semiconductors, higher electrical characteristics are required. For the purpose of achieving good electrical characteristics, low-resistance source and drain regions are fabricated using an aluminum reaction method. Techniques for forming regions have been reported (see, for example, Non-Patent Document 1). [Prior art documents] [Non-patent literature]

[0005] [Non-Patent Document 1] N. Morosawa et al. SID 11 DIGEST pp.479-482 Summary of the Invention [Problem to be solved by the invention]

[0006] The on-state characteristics (e.g., on-state current and field-effect mobility) of a transistor using an oxide semiconductor This improvement will enable high-speed response and high-speed operation in semiconductor devices, resulting in higher performance semiconductors. The device can be realized.

[0007] In view of this, one embodiment of the present invention provides a transistor including an oxide semiconductor and having excellent on-state characteristics. One of our goals is to provide

[0008] Another aspect of the present invention is a high-performance semiconductor device having a transistor capable of high-speed response and high-speed driving. An object of the present invention is to provide a semiconductor device. [Means for solving the problem]

[0009] In a manufacturing process of a transistor including an oxide semiconductor film including a channel formation region, The metal element is introduced into the semiconductor film by heat treatment in contact with the film containing the metal element. and a dopant introduced by an implantation method through a film containing the metal element. The low resistance regions are formed on both sides of the channel formation region in the channel length direction. Complete.

[0010] Examples of films containing a metal element include metal films, metal oxide films, and metal nitride films.

[0011] The metal elements in the film containing metal elements include aluminum (Al), titanium (Ti), molybdenum (Mo), and fluorine (F). Butan (Mo), Tungsten (W), Hafnium (Hf), Tantalum (Ta), Lanthanum La (La), barium (Ba), magnesium (Mg), zirconium (Zr), and nickel One or more metal elements selected from the group consisting of nickel (Ni) and zinc (Al) can be used. As the film, a metal film containing one or more selected from any of the above metal elements, a metal oxide film, or a metal nitride film (for example, a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) In addition, dopants such as phosphorus (P) and boron (B) can be added to the film containing metal elements. It may also contain cations.

[0012] A film containing a metal element is formed in contact with the oxide semiconductor film, and the film containing the metal element and the oxide semiconductor By performing heat treatment in a state in contact with the oxide semiconductor film, the metal element-containing film is converted into the oxide semiconductor film. The heat treatment is preferably carried out in an oxygen atmosphere. Heat treatment can be performed under reduced pressure or nitrogen atmosphere. The temperature may be 0° C. or lower, preferably 200° C. or higher and 400° C. or lower. By heat treatment for introducing a metal element from the oxide semiconductor film into the oxide semiconductor film, a conductive metal element is For example, a film containing an element becomes a film containing a metal element having insulating properties. By heat treatment to introduce metal elements into the film, the metal film becomes a metal oxide film or a metal nitride film. When a metal oxide film or a metal nitride film has insulating properties, it can be used as an insulating film. It is possible.

[0013] The dopant is an impurity that changes the electrical conductivity of the oxide semiconductor film. , group 15 elements (typically phosphorus (P), arsenic (As), and antimony (Sb)), Uron (B), Aluminum (Al), Nitrogen (N), Argon (Ar), Helium (He) , Neon (Ne), Indium (In), Fluorine (F), Chlorine (Cl), Titanium (Ti) and zinc (Zn).

[0014] The dopant may be contained in a film containing a metal element.

[0015] The dopant is implanted into a film containing a metal element (metal film, metal oxide film, or metal nitride film). The dopant is introduced into the oxide semiconductor film by passing through the oxide semiconductor film. Implantation method, ion doping method, plasma immersion ion implantation method, etc. In this case, the dopant may be a simple ion or a hydride or fluoride. It is preferable to use ions of nitrite and chloride.

[0016] The dopant concentration in the low resistance region is 5×10 18 atoms / cm 3 More than 1×10 22 atoms / cm 3 It is preferable that:

[0017] After the dopant introduction treatment, a heat treatment may be performed. This may also serve as a heat treatment in the process of introducing metal elements from the film.

[0018] In the manufacturing process, a step of introducing a metal element from a film containing a metal element by heat treatment, The order of the dopant introduction process by the implantation method is not limited, and either process can be performed first or later. It may also be performed multiple times.

[0019] For example, a metal film is used as the film containing a metal element, and is subjected to a heat treatment in an oxygen atmosphere to oxidize the metal film. When introducing a metal element into a compound semiconductor film, if the dopant is introduced before the heat treatment, the dopant The dopant passes through the metal film, and when the dopant is introduced after the heat treatment, the dopant penetrates the metal film. It passes through the oxide film.

[0020] The present invention provides a semiconductor device having an oxide semiconductor film including a low-resistance region sandwiching a channel formation region in a channel length direction. As a result, the transistor has high on-state characteristics (for example, on-state current and field-effect mobility), High-speed operation and high-speed response are possible.

[0021] Therefore, by using the transistor with excellent electrical characteristics, a high-performance and highly reliable semiconductor device can be obtained. can be provided.

[0022] One embodiment of the invention disclosed in this specification is a semiconductor device including an oxide semiconductor film having a channel formation region. In the oxide semiconductor film, the resistance is higher between the channel formation region and the adjacent region than between the channel formation region. The low resistance region is formed by forming a low resistance region containing a metal element and a dopant, and the low resistance region is formed by forming an oxide semiconductor a film containing a metal element is formed in contact with the oxide semiconductor film, and a step of introducing a metal element from a film containing the metal element into the oxide semiconductor film by performing heat treatment in a state; and introducing a dopant into the oxide semiconductor film through a film containing a metal element. The present invention relates to a method for manufacturing a semiconductor device.

[0023] One embodiment of the invention disclosed in this specification is a semiconductor device including an oxide semiconductor film having a channel formation region. a gate insulating film and a gate electrode layer are formed on the oxide semiconductor film so as to overlap with the channel formation region; A stack of layers is selectively formed to form an oxide semiconductor film over the oxide semiconductor film, the gate insulating film, and the gate electrode layer. A film containing a metal element is formed in contact with a part of the conductor film, and a gate insulating film and a gate electrode layer are formed as a mask. a dopant is selectively introduced into the oxide semiconductor film through a film containing a metal element; The oxide semiconductor film into which the dopant has been introduced and the film containing the metal element are heated to introduce the dopant. A metal element is introduced from a film containing a metal element into the oxide semiconductor film. The channel forming region is sandwiched between the metal elements and the dopant. The present invention relates to a method for manufacturing a semiconductor device in which a low-resistance region including a metal oxide film is formed.

[0024] One embodiment of the invention disclosed in this specification is a semiconductor device including an oxide semiconductor film having a channel formation region. a gate insulating film and a gate electrode layer are formed on the oxide semiconductor film so as to overlap with the channel formation region; A stack of layers is selectively formed to form an oxide semiconductor film over the oxide semiconductor film, the gate insulating film, and the gate electrode layer. A film containing a metal element is formed in contact with a part of the conductive film, and the oxide semiconductor film and the metal element are formed. The metal element is introduced from the film containing the metal element into the oxide semiconductor film by heating the film, and the gate insulating film and A film containing a metal element is formed on the oxide semiconductor film into which the metal element has been introduced using the gate electrode layer as a mask. The dopant is selectively introduced through the oxide semiconductor film. The low-resistance region has a lower resistance than the channel formation region and contains a metal element and a dopant. The present invention relates to a method for manufacturing a semiconductor device.

[0025] In the above structure, the oxide semiconductor film before the step of forming the film containing a metal element is Alternatively, a heat treatment (dehydration or dehydrogenation treatment) may be carried out to release moisture.

[0026] Furthermore, the dehydration or dehydrogenation treatment can remove oxygen, which is a main component material of the oxide semiconductor. In the oxide semiconductor film, oxygen is released and the amount of oxygen is reduced. Oxygen vacancies exist in the areas where the oxide has been removed, and these oxygen vacancies cause fluctuations in the electrical characteristics of the transistor. This results in the creation of donor levels.

[0027] Therefore, oxygen is preferably supplied to the oxide semiconductor film that has been subjected to dehydration or dehydrogenation treatment. By supplying oxygen to the oxide semiconductor film, oxygen vacancies in the film can be filled. Cut.

[0028] For example, an oxide insulating film containing a large amount (excessive amount) of oxygen, which serves as an oxygen supply source, can be used as an oxide semiconductor film. By providing the oxide insulating film in contact with the oxide semiconductor film, oxygen can be supplied from the oxide insulating film to the oxide semiconductor film. In the above structure, the oxide semiconductor film and the oxide insulating film that have been subjected to the heating step can be reduced. The heating step is performed in a state where the oxide semiconductor film is partially in contact with the oxide semiconductor film, thereby supplying oxygen to the oxide semiconductor film. It is also possible.

[0029] Further, the oxide semiconductor film that has been subjected to the dehydration or dehydrogenation treatment is not subjected to oxygen (at least oxygen radicals). Oxygen may be supplied to the film by introducing oxygen atoms or oxygen ions. The oxygen introduction method includes ion implantation, ion doping, plasma immersion, and The ion implantation method, plasma treatment, etc. can be used.

[0030] Furthermore, the oxide semiconductor film provided in the transistor is preferably a crystalline oxide semiconductor. The state of a film that contains regions with an excess of oxygen compared to the stoichiometric composition ratio in the film state. In this case, the oxygen content is preferably set to a value exceeding the stoichiometric composition ratio of the oxide semiconductor. Alternatively, the oxygen content should be greater than the amount of oxygen in the case of a single crystal. Oxygen may exist between the lattices of the compound semiconductor.

[0031] Hydrogen or moisture is removed from the oxide semiconductor, and the semiconductor is highly purified to minimize the amount of impurities. By supplying oxygen to compensate for oxygen vacancies, an I-type (intrinsic) oxide semiconductor or an I-type By doing so, it is possible to obtain an oxide semiconductor that is as close to intrinsic as possible. Bringing the Fermi level (Ef) of a semiconductor to the same level as the intrinsic Fermi level (Ei) Therefore, by using the oxide semiconductor film in a transistor, the oxide semiconductor film can be effectively prevented from being generated due to oxygen vacancies. The variation in threshold voltage Vth of the transistor and the threshold voltage shift ΔVth are reduced. It is possible. [Effects of the Invention]

[0032] The metal element is introduced from a film containing the metal element formed in contact with the oxide semiconductor, and the metal element is implanted. By introducing the dopant, a low-resistance region containing a metal element and a dopant is formed in the oxide semiconductor film. The oxide semiconductor layer includes a low resistance region sandwiching the channel formation region in the channel length direction. By having a thin film, the transistor has good on-state characteristics (e.g., on-state current and field-effect transition). The high mobility allows for high-speed operation and response.

[0033] Therefore, by using the transistor with excellent electrical characteristics, a high-performance and highly reliable semiconductor device can be obtained. can be provided. [Brief explanation of the drawings]

[0034] [Figure 1] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 2] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 3] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 4] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 5]1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 6] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 7] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 8] 1A to 1C illustrate one embodiment of a semiconductor device and a manufacturing method thereof; [Figure 9] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 10] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 11] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 12] 1A to 1C illustrate one embodiment of a semiconductor device. [Figure 13] 1A and 1B are diagrams illustrating electronic devices. DETAILED DESCRIPTION OF THE INVENTION

[0035] Hereinafter, embodiments of the invention disclosed in this specification will be described in detail with reference to the accompanying drawings. However, the invention disclosed in this specification is not limited to the following description, and various forms and details may be used. It will be readily understood by those skilled in the art that the invention disclosed in this specification can be modified in any manner. The present invention is not limited to the following embodiments. The ordinal numbers such as 2 are used for convenience and do not indicate the order of processes or stacking. Furthermore, the present specification does not indicate specific names as matters for identifying the invention. do not have.

[0036] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. In this embodiment, a transistor including an oxide semiconductor film is used as an example of a semiconductor device. Shows.

[0037] The structure of the transistor is not particularly limited, and may be, for example, a top gate structure or a bottom gate structure. The transistor can be of a staggered type or a planar type. The structure can be a single gate structure with one gate region or a double gate structure with two gate regions. Alternatively, a triple gate structure may be formed in which three gates are formed. A dual gate type has two gate electrode layers arranged with a gate insulating film between them. good.

[0038] The transistor 440 shown in FIGS. 1A to 1F is a top-gate transistor. Here is an example.

[0039] As shown in FIG. 1F, the transistor 440 has an insulating surface on which the insulating film 436 is provided. A channel forming region 409, low resistance regions 404a and 404b, and a low resistance region 404b are formed on a substrate 400 having the above structure. The oxide semiconductor film 403 including the resistor regions 406a and 406b, the source electrode layer 405a, the drain electrode layer 405b, and the The transistor 4 includes a gate electrode layer 405b, a gate insulating film 402, and a gate electrode layer 401. A film 407 containing a metal element is formed on the substrate 40 .

[0040] 1A to 1F illustrate an example of a method for manufacturing the transistor 440. FIG.

[0041] First, an insulating film 436 is formed over a substrate 400 having an insulating surface.

[0042] There is no significant limitation on the substrate that can be used for the substrate 400 having an insulating surface, but at least In either case, it is necessary to have heat resistance to the extent that it can withstand subsequent heat treatment. Glass substrates such as aluminoborosilicate glass and aluminoborosilicate glass, ceramic substrates, A quartz substrate, a sapphire substrate, etc. can be used. Also, silicon or silicon carbide substrates can be used. Any single crystal semiconductor substrate, polycrystalline semiconductor substrate, compound semiconductor substrate such as silicon germanium A substrate, an SOI substrate, or the like can also be used, and a semiconductor element is provided on such a substrate. may be used as the substrate 400.

[0043] Alternatively, a semiconductor device may be manufactured using a flexible substrate as the substrate 400. In order to manufacture such a semiconductor device, a transistor including an oxide semiconductor film 403 is formed over a flexible substrate. Alternatively, a transistor including the oxide semiconductor film 403 may be formed on another substrate. The substrate 440 may be fabricated, and then peeled off and transferred to a flexible substrate. In order to separate and transfer the transistor to a flexible substrate, a substrate for forming the oxide semiconductor film and the transistor including the oxide semiconductor film are It is advisable to provide a release layer on the

[0044] The insulating film 436 is formed by depositing silicon oxide by plasma CVD, sputtering, or the like. , silicon oxynitride, aluminum oxide, aluminum oxynitride, hafnium oxide, oxide Gallium, silicon nitride, silicon nitride oxide, aluminum nitride, aluminum nitride oxide or a mixture of these materials.

[0045] The insulating film 436 may be a single layer or a stacked layer. In this embodiment, the insulating film 436 is formed by a sputtering method. A silicon oxide film formed using the method is used.

[0046] Next, the oxide semiconductor film 403 is formed over the insulating film 436 .

[0047] The insulating film 436 is in contact with the oxide semiconductor film 403 and therefore contains at least one oxide semiconductor layer (a bulk layer). It is preferable that the amount of oxygen contained in the insulating film 436 exceeds the stoichiometric composition ratio. When a silicon oxide film is used, SiO 2+α (However, α>0). By using such an insulating film 436, oxygen can be supplied to the oxide semiconductor film 403. By supplying oxygen to the oxide semiconductor film 403, the film This can compensate for the oxygen deficiency inside.

[0048] For example, the insulating film 436 containing a large amount (excessive amount) of oxygen, which serves as an oxygen supply source, is formed on the oxide semiconductor film 4 By providing the insulating film 436 in contact with the oxide semiconductor film 403, oxygen can be supplied from the insulating film 436 to the oxide semiconductor film 403. The oxide semiconductor film 403 and the insulating film 436 are at least partially in contact with each other. Oxygen may be supplied to the oxide semiconductor film 403 by performing heat treatment in this state. .

[0049] In the step of forming the oxide semiconductor film 403, hydrogen or water is formed in the oxide semiconductor film 403. In order to prevent the inclusion of the oxide semiconductor film 403, a sputtering treatment was performed as a pretreatment for forming the oxide semiconductor film 403. The substrate on which the insulating film 436 is formed is preheated in the preheating chamber of the plating device, and the substrate and the insulating film are It is preferable to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the film 436. The exhaust means provided in the auxiliary heating chamber is preferably a cryopump.

[0050] The oxide semiconductor used for the oxide semiconductor film 403 is at least indium (In). It is preferable that the material contains In or zinc (Zn). It is particularly preferable that the material contains In and Zn. a stabilizer for reducing variations in electrical characteristics of a transistor using the oxide; In addition to these, it is preferable to have gallium (Ga). It is preferable that the stabilizer contains tin (Sn). It is preferable that the glass contains aluminum (Al) as a stabilizer. It is preferable to do so.

[0051] Other stabilizers include lanthanides such as lanthanum (La) and cerium ( Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol Mium (Ho), Erbium (Er), Thulium (Tm), Ytterbium (Yb), Ru It may contain one or more of tetraethion (Te) and tetraethion (Tb).

[0052] For example, oxide semiconductors include indium oxide, tin oxide, zinc oxide, and oxides of binary metals. In-Zn oxides, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides Oxides, Sn-Mg oxides, In-Mg oxides, In-Ga oxides, ternary metal oxides In-Ga-Zn oxide (also written as IGZO), In-Al-Zn oxide Oxides, In-Sn-Zn oxides, Sn-Ga-Zn oxides, Al-Ga-Zn oxides oxides, Sn-Al-Zn oxides, In-Hf-Zn oxides, In-La-Zn oxides In-Ce-Zn oxides, In-Pr-Zn oxides, In-Nd-Zn oxides , In-Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, I n-Er-Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In -Lu-Zn ​​oxides, In-Sn-Ga-Zn oxides, which are oxides of quaternary metals, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide are used. You can be there.

[0053] Here, for example, In-Ga-Zn oxide is a material containing In, Ga, and Zn as its main components. The ratio of In, Ga, and Zn is not important. Metal elements other than a and Zn may be included.

[0054] In addition, as an oxide semiconductor, InMO3(ZnO) m (m>0 and m is not an integer) It is also possible to use a material represented by the formula: where M is selected from Ga, Fe, Mn, and Co. It refers to one or more metal elements. In addition, as an oxide semiconductor, In2SnO5 (ZnO) n A material expressed as (n>0 and n is an integer) may be used.

[0055] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3) or In:G In-Ga-Zn oxide with an atomic ratio of a:Zn=2:2:1 (=2 / 5:2 / 5:1 / 5) Alternatively, In:Sn:Zn=1: 1:1(=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn=2:1:5(=1 / 4:1 / 8:5 / 8) It is preferable to use an In-Sn-Zn oxide with a molecular ratio or an oxide with a composition close to that.

[0056] However, it is not limited to these, and the required semiconductor characteristics (mobility, threshold, variation, etc.) In addition, in order to obtain the required semiconductor characteristics, Carrier concentration, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic bond length, density It is preferable to make the following appropriate.

[0057] For example, high mobility can be obtained relatively easily with In-Sn-Zn oxides. Therefore, even in In-Ga-Zn oxides, the mobility can be increased by reducing the defect density in the bulk. It can be done.

[0058] For example, when the atomic ratio of In, Ga, and Zn is In:Ga:Zn=a:b:c(a+b+ The composition of the oxide with c=1) is In:Ga:Zn=A:B:C (A+B+C = 1), the oxide composition is close to (aA) 2 +(bB) 2 + (cC) 2 ≦r 2 The value of r can be set to, for example, 0.05. The same applies to other oxides.

[0059] The oxide semiconductor may be single-crystal or non-single-crystal. In the latter case, it may be amorphous or polycrystalline. In addition, it may be a structure containing a crystalline portion in an amorphous state or a non-amorphous state. That's fine too.

[0060] Amorphous oxide semiconductors can be easily flattened, This can reduce interface scattering when fabricating a transistor, and can be achieved relatively easily and with relatively high efficiency. High mobility can be obtained.

[0061] In addition, in a crystalline oxide semiconductor, defects in the bulk can be further reduced, and the surface By improving the flatness of the oxide semiconductor, it is possible to obtain a mobility higher than that of an oxide semiconductor in an amorphous state. In order to improve the flatness of the surface, it is preferable to form an oxide semiconductor on a flat surface. Specifically, the average surface roughness (Ra) is 1 nm or less, preferably 0.3 nm or less, and more preferably It is preferable to form it on the surface of 0.1 nm or less.

[0062] Note that Ra is the arithmetic mean roughness defined in JIS B0601 that can be applied to surfaces. It is a three-dimensional extension of the method, which is based on the "average of the absolute value of the deviation from the reference surface to the specified surface." It can be expressed as a "value" and is defined by the following formula:

[0063]

number

[0064] In the above, S0 is the measurement surface (coordinates (x1, y1) (x1, y2) (x2, y1 ) (the rectangular area defined by the four points (x2, y2)), and Z0 is the average height of the measurement surface. Ra is the strength of the AFM (Atomic Force Microscope). It can be evaluated using the OPE.

[0065] Therefore, a planarization layer is formed in a region of the insulating film 436 in contact with the oxide semiconductor film 403. The planarization treatment is not particularly limited, but may be a polishing treatment (for example, a chemical treatment). Chemical Mechanical Polishing (CMP) ) method), dry etching treatment, and plasma treatment can be used.

[0066] The plasma treatment may be, for example, a reverse plasma treatment in which argon gas is introduced to generate plasma. Reverse sputtering is a process in which RF is applied to the substrate side in an argon atmosphere. This method involves applying voltage using a power supply to generate plasma near the substrate, thereby modifying the surface. Instead of the argon atmosphere, nitrogen, helium, oxygen, etc. may be used. When cleaning is performed, powdery substances (also called particles or dust) adhering to the surface of the insulating film 436 are removed. (U) can be removed.

[0067] As a planarization process, polishing, dry etching, and plasma treatment may be performed multiple times. In addition, when the steps are combined, there is no particular limitation on the order of the steps. It is not limited to this but may be set appropriately according to the unevenness of the surface of the insulating film 436.

[0068] The oxide semiconductor film 403 is an oxide semiconductor film containing crystals and having crystallinity (crystalline oxide The crystalline state of the crystalline oxide semiconductor film is determined by the crystal axis. The directions may be in a random state or may have a certain orientation.

[0069] For example, the crystalline oxide semiconductor film may be formed of an oxide semiconductor film containing crystals having a c-axis approximately perpendicular to the surface. A nitride semiconductor film can be used.

[0070] An oxide semiconductor layer containing crystals with a c-axis approximately perpendicular to the surface (hereinafter referred to as a crystalline oxide semiconductor) The structure of the crystalline layer (also called the crystalline layer) is neither a single crystal structure nor an amorphous structure, and has a c-axis orientation. C-Axis Aligned Crystal (CAAC) It has an oxide containing

[0071] CAAC-OS is a type of nanocrystalline silicon that has a c-axis orientation and a triangular shape when viewed from the ab plane, surface, or interface direction. or hexagonal atomic arrangement, and the metal atoms are layered or interdigitated with the metal atoms on the c-axis. The atoms are arranged in layers, and on the ab plane (or surface or interface), It is an oxide semiconductor that contains crystals with different b-axis orientations (rotated around the c-axis). .

[0072] In a broad sense, CAAC-OS is a non-single crystal that has three crystals perpendicular to the ab plane. It has an atomic arrangement of a polygonal or hexagonal, or an equilateral triangle or equilateral hexagonal, and is oriented in the c-axis direction. When viewed from the direction perpendicular to the surface, it contains a phase in which metal atoms are arranged in layers or metal atoms and oxygen atoms are arranged in layers. This refers to materials that

[0073] The CAAC-OS is not a single crystal, but it is not formed solely from amorphous material. CAAC-OS contains crystallized parts (crystalline parts), but one crystalline part and another crystalline part Sometimes the boundaries of the minutes cannot be clearly distinguished.

[0074] A part of oxygen atoms constituting the CAAC-OS may be substituted with nitrogen atoms. The c-axes of the individual crystal parts constituting the CAAC-OS are aligned in a certain direction (for example, They may be aligned in a direction perpendicular to the surface of the plate, the surface of the CAAC-OS, the film surface, the interface, etc. In the case of CAAC-OS, the normal to the ab plane of each crystal part is in a certain direction (e.g., the direction of the base The direction may be perpendicular to the plate surface, surface, film surface, interface, etc.

[0075] By using the crystalline oxide semiconductor film, it is possible to improve the electrical conductivity of the transistor by irradiation with visible light or ultraviolet light. Therefore, the change in electrical characteristics can be further suppressed, and a highly reliable semiconductor device can be obtained.

[0076] There are three methods for obtaining a crystalline oxide semiconductor film having a c-axis orientation. The oxide semiconductor film is formed at a film formation temperature of 200° C. to 500° C., and a roughly The second method is to form a thin film and then heat it at 200°C or higher for 70 The third method is to align the c-axis approximately perpendicular to the surface by heat treatment at 0°C or below. After forming a thin film of the first layer, heat treatment is performed at 200℃ to 700℃. This method involves forming a film and orienting the c-axis approximately perpendicular to the surface.

[0077] The thickness of the oxide semiconductor film 403 is 1 nm to 200 nm (preferably 5 nm to 30 nm). nm or less), and sputtering and MBE (Molecular Beam Epitaxy) axy method, CVD method, pulsed laser deposition method, ALD (Atomic Layer Deposition The oxide semiconductor film 403 can be formed by a sintered-position method or the like. This is done with multiple substrate surfaces set roughly perpendicular to the sputtering target surface. Sputtering equipment for film deposition, so-called CP sputtering equipment (Columnar Plasma Sputtering The film may be formed using a uttering system.

[0078] Note that the oxide semiconductor film 403 is formed under conditions in which a large amount of oxygen is contained (for example, under conditions in which oxygen (e.g., sputtering under a 100% oxygen atmosphere) (preferably, the oxide semiconductor has a stoichiometric composition ratio in a crystalline state, and It is preferable to use a membrane containing regions where the amount of the metal is excessive.

[0079] Examples of targets for forming the oxide semiconductor film 403 by a sputtering method include The composition ratio of the oxides was In2O3:Ga2O3:ZnO=1:1:2 [molar ratio]. The target is used to form an In-Ga-Zn film. For example, a gold alloy having a molar ratio of In2O3:Ga2O3:ZnO=1:1:1 is used. Metal oxide targets may also be used.

[0080] The filling rate of the metal oxide target is 90% or more and 100% or less, preferably 95% or more. By using a metal oxide target with a high filling rate, the film is formed. In addition, the oxide semiconductor film can be a dense film.

[0081] The sputtering gas used in forming the oxide semiconductor film is hydrogen, water, a hydroxyl group, or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0082] The substrate is held in a film-forming chamber that is kept in a reduced pressure state, and the remaining moisture in the film-forming chamber is removed. The sputtering gas from which hydrogen and moisture have been removed is introduced, and the substrate 40 is sputtered using the target. In order to remove residual moisture in the deposition chamber, an oxide semiconductor film 403 is formed on the substrate. type vacuum pumps, such as cryopumps, ion pumps, titanium sublimation pumps It is preferable to use a turbo molecular pump with a cold trap as the exhaust means. The deposition chamber evacuated using a cryopump may be, for example, Hydrogen atoms, compounds containing hydrogen atoms such as water (H2O) (preferably compounds containing carbon atoms) Since gases such as impurities are exhausted, the impurities contained in the oxide semiconductor film 403 formed in the deposition chamber are The concentration of substances can be reduced.

[0083] In addition, the insulating film 436 and the oxide semiconductor film 403 can be successively formed without exposure to the air. It is preferable that the insulating film 436 and the oxide semiconductor film 403 are formed in succession without exposure to air. By doing so, it is possible to prevent impurities such as hydrogen and moisture from being adsorbed on the surface of the insulating film 436. do.

[0084] Further, excess hydrogen (including water and a hydroxyl group) is removed (dehydrated or The temperature for the heat treatment is 300°C or higher and 700°C or lower. The temperature should be below ℃ or below the distortion point of the substrate. The heat treatment should be carried out under reduced pressure or in a nitrogen atmosphere. For example, the substrate can be introduced into an electric furnace, which is one type of heat treatment apparatus, and an oxide semiconductor The film is subjected to a heat treatment at 450° C. for 1 hour in a nitrogen atmosphere.

[0085] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device that heats the object to be treated by radiation may be used. For example, a GRTA (Gas Reactor Tank Apparatus) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp or other lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. Inert gases such as argon or nitrogen that do not react with the material to be treated by heat treatment An active gas is used.

[0086] For example, as a heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650 to 700°C. After heating for several minutes, GRTA may be performed in which the substrate is taken out of the inert gas.

[0087] Note that the heat treatment for dehydration or dehydrogenation is performed after the formation of the oxide semiconductor film 403. Before the formation of the film containing oxygen and before the step of introducing oxygen into the oxide semiconductor film 403, This may be done at any time during the manufacturing process of the resistor 440.

[0088] When heat treatment for dehydration or dehydrogenation is performed before the oxide semiconductor film is processed into an island shape, Therefore, oxygen contained in the insulating film 436 can be prevented from being released by heat treatment. Therefore, it is preferable.

[0089] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen or hydrogen introduced into the heat treatment device is not contained. The purity of rare gases such as sodium, neon, and argon is preferably 6N (99.9999%) or higher. is 7N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 It is preferable to set the concentration to less than 1 ppm.

[0090] After the oxide semiconductor film 403 was heated by the heat treatment, high-purity oxygen gas and high-purity SiO 2 were added to the same furnace. nitrous oxide gas or ultra dry air (CRDS (cavity ring down laser separation) When measured using a dew point meter using the optical method, the moisture content is 20 ppm (-55°C in dew point equivalent). air, preferably 1 ppm or less, more preferably 10 ppb or less, may be introduced. It is preferable that the oxygen gas or nitrous oxide gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or nitrous oxide gas introduced into the heat treatment device is preferably 6N or more. or 7N or more (i.e., impurity concentration in oxygen gas or nitrous oxide gas is 1 ppm or less, Preferably, the concentration is 0.1 ppm or less. This action simultaneously reduces impurities through the removal process of dehydration or dehydrogenation treatment. By supplying oxygen, which is the main component of oxide semiconductors, The semiconductor film 403 can be highly purified and made electrically I-type (intrinsic).

[0091] Note that the oxide semiconductor film may be processed into an island shape, or may be left in a film state without being processed. In addition, an element isolation region made of an insulating film that separates the oxide semiconductor film into elements may be provided. good.

[0092] In this embodiment, the formed oxide semiconductor film is subjected to a photolithography process to form island-shaped oxide films. The oxide semiconductor film 403 is then processed into an island-shaped oxide semiconductor film 403. The resist mask may be formed by an inkjet method. When the film is formed by the method described above, no photomask is used, and therefore the manufacturing cost can be reduced.

[0093] Note that the etching of the oxide semiconductor film may be dry etching or wet etching. For example, an etching method used for wet etching of an oxide semiconductor film may be used. The cleaning solution can be a mixture of phosphoric acid, acetic acid, and nitric acid. O07N (manufactured by Kanto Chemical Co., Ltd.) may also be used.

[0094] Next, a source electrode layer and a drain electrode layer (the same layer as this) were formed over the oxide semiconductor film 403. A conductive film that will become a wiring (including the wiring) is formed. The conductive film is resistant to subsequent heat treatment. As a conductive film used for the source electrode layer and the drain electrode layer, for example, a metal film containing an element selected from the group consisting of I, Cr, Cu, Ta, Ti, Mo, and W, or the above-mentioned Metal nitride films containing elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) ) or the like can be used. In addition, either the upper or lower side of a metal film such as Al or Cu can be used. Both are made of high-melting metal films such as Ti, Mo, W, etc. or their metal nitride films (titanium nitride film, A structure in which a molybdenum nitride film, a tungsten nitride film, etc. are laminated may also be used. The conductive film used for the electrode layer and the drain electrode layer may be formed using a conductive metal oxide. Conductive metal oxides include indium oxide (In2O3) and tin oxide (SnO2 ), zinc oxide (ZnO), indium oxide tin oxide (In2O3-SnO2), indium oxide In2O3-ZnO or these metal oxide materials with silicon oxide It is possible to use one containing

[0095] A resist mask is formed on the conductive film by a photolithography process, and selective etching is performed. After forming the source electrode layer 405a and the drain electrode layer 405b by this method, a resist mask In this embodiment, the source electrode layer 405a and the drain electrode layer 405b are A tungsten film having a thickness of 10 nm is formed. In this way, the source electrode layer 405a and the drain electrode layer 405b are formed. If the electrode layer 405b is thin, the coverage of the gate insulating film 442 formed thereon is good. In addition, the source electrode layer 405a passes through the source electrode layer 405a and the drain electrode layer 405b. In addition, the dopant can be introduced into the oxide semiconductor film 403 under the drain electrode layer 405b. Cut.

[0096] Next, the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b were A covering gate insulating film 442 is formed (see FIG. 1A).

[0097] Note that in order to improve coverage of the gate insulating film 442, the oxide semiconductor film 403 and the source The above-described planarization treatment may also be performed on surfaces of the electrode layer 405a and the drain electrode layer 405b. In particular, when a thin insulating film is used as the gate insulating film 442, It is preferable that the surfaces of the source electrode layer 405a and the drain electrode layer 405b have good flatness. I wish.

[0098] The thickness of the gate insulating film 442 is set to 1 nm or more and 100 nm or less, and is formed by sputtering, MB The E method, CVD method, pulsed laser deposition method, ALD method, etc. can be used as appropriate. The gate insulating film 442 is formed by depositing a plurality of substrate surfaces approximately perpendicular to the sputtering target surface. The film is formed using a sputtering device in which the film is formed with the set, so-called CP sputtering device. Good too.

[0099] The gate insulating film 442 may be made of a silicon oxide film, a gallium oxide film, or an aluminum oxide film. a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or an aluminum nitride film The gate insulating film 442 can be formed using a silicon film. It is preferable that the gate insulating film 442 contains oxygen in the portion in contact with the gate insulating film 442. It is preferable that oxygen is present in the bulk in an amount exceeding the stoichiometric composition ratio. For example, when a silicon oxide film is used as the gate insulating film 442, SiO 2+α (where α>0). In this embodiment, the gate insulating film 442 is made of SiO 2+ α (where α>0) is used. This silicon oxide film is used as the gate insulator. By using the oxide semiconductor film 442, oxygen can be supplied to the oxide semiconductor film 403, and the characteristics can be improved. Furthermore, the gate insulating film 442 can improve the characteristics of the transistor to be manufactured. It is preferable to form the gate insulating film 442 in consideration of its size and step coverage.

[0100] The gate insulating film 442 may be made of hafnium oxide, yttrium oxide, or hafnium. Silicate (HfSi x O y (x>0, y>0)), nitrogen-doped hafnium silicate HfSiO x N y (x>0, y>0)), hafnium aluminate (HfAl x O y (x>0, y>0)), and high-k materials such as lanthanum oxide can be used to Furthermore, the gate insulating film 442 may have a single layer structure or a stacked layer structure. It may also be a structure.

[0101] Then, the gate electrode layer 401 is formed by plasma CVD or sputtering. The gate electrode layer 401 is formed on the insulating film 442. The material of the gate electrode layer 401 is molybdenum, titanium, tantalum, or the like. Metallic materials such as zinc, tungsten, aluminum, copper, chromium, neodymium, and scandium The gate electrode layer can be formed using an alloy material containing these as a main component. 401 is a semiconductor represented by a polycrystalline silicon film doped with impurity elements such as phosphorus. Alternatively, a silicide film such as nickel silicide may be used. It may have a layer structure or a laminate structure.

[0102] The gate electrode layer 401 is made of an indium tin oxide or an indium oxide containing tungsten oxide. Indium oxide, indium zinc oxide with tungsten oxide, indium zinc oxide with titanium oxide Indium oxide, indium tin oxide with titanium oxide, indium zinc oxide, silicon oxide Conductive materials such as indium tin oxide doped with the above-mentioned conductive material can also be used. It is also possible to use a laminated structure of an electrically conductive material and the above-mentioned metal material.

[0103] In addition, a layer of the gate electrode layer 401 in contact with the gate insulating film 442 is made of a metal oxide containing nitrogen. oxide films, specifically, nitrogen-containing In-Ga-Zn-O films and nitrogen-containing In-Sn-O films. film, In-Ga-O film containing nitrogen, In-Zn-O film containing nitrogen, Sn -O film, nitrogen-containing In-O film, or metal nitride film (InN, SnN, etc.) can be used. These films have a work function of 5 electron volts or more, preferably 5.5 electron volts or more. When used as a gate electrode layer, the threshold voltage of the transistor is made positive. This makes it possible to realize a so-called normally-off switching element.

[0104] Next, the gate insulating film 442 is etched using the gate electrode layer 401 as a mask to form an oxide film. A part of the semiconductor film 403 is exposed, and a gate insulating film 402 is formed (see FIG. 1B).

[0105] Next, the oxide semiconductor film 403, the source electrode layer 405a, the drain electrode layer 405b, and the gate electrode layer 405c are A metal oxide film is formed on the gate insulating film 402 and the gate electrode layer 401 in contact with part of the oxide semiconductor film 403. A film 417 containing the element is formed (see FIG. 1C).

[0106] Examples of the film 417 containing a metal element include a metal film, a metal oxide film, and a metal nitride film. .

[0107] The metal elements in the film containing metal elements include aluminum (Al), titanium (Ti), molybdenum (Mo), and fluorine (F). Butan (Mo), Tungsten (W), Hafnium (Hf), Tantalum (Ta), Lanthanum La (La), barium (Ba), magnesium (Mg), zirconium (Zr), and nickel One or more metal elements selected from the group consisting of nickel (Ni) and zinc (Al) can be used. As the film, a metal film containing one or more selected from any of the above metal elements, a metal oxide film, or a metal nitride film (for example, a titanium nitride film, a molybdenum nitride film, or a tungsten nitride film) In addition, dopants such as phosphorus (P) and boron (B) can be added to the film containing metal elements. In this embodiment, the film 417 containing a metal element has conductivity. .

[0108] The film 417 containing a metal element is formed by plasma CVD, sputtering, vapor deposition, or the like. The thickness of the film 417 containing the metal element is set to 5 nm or more and 30 nm or less. That's fine.

[0109] In this embodiment, an aluminum film having a thickness of 10 nm is used as the film 417 containing a metal element. It is formed by a tarring method.

[0110] Next, the oxide semiconductor film 40 3 through a film 417 containing a metal element, a source electrode layer 405a, and a drain electrode layer 405b. The dopant 421 is selectively introduced through the silicon dioxide film to form low resistance regions 414a and 414b ( See Figure 1(D)).

[0111] In this embodiment, the source electrode layer 405a and the drain electrode layer 405b are formed as thin films. Therefore, the oxide semiconductor film under the source electrode layer 405a and the drain electrode layer 405b is also doped. In this example, a source electrode 421 is introduced to form low resistance regions 414a and 414b. The thickness of the electrode layer 405a and the drain electrode layer 405b and the conditions for introducing the dopant 421 are also important. That is, the oxide semiconductor film 403 under the source electrode layer 405a and the drain electrode layer 405b When the dopant 421 is not introduced, even if it is introduced, the concentration is low and the source electrode layer 405a Alternatively, the resistance may be higher than that of the low-resistance region other than the region under the drain electrode layer 405b. be.

[0112] The dopant 421 is an impurity that changes the conductivity of the oxide semiconductor film 403. The 421st group of elements includes group 15 elements (typically phosphorus (P), arsenic (As), and antimony (Ant). Sb), boron (B), aluminum (Al), nitrogen (N), argon (Ar) , helium (He), neon (Ne), indium (In), fluorine (F), chlorine (Cl ), titanium (Ti), and zinc (Zn) may be used. can.

[0113] The dopant may be contained in the film 417 containing the metal element.

[0114] The dopant 421 is implanted into the metal element-containing film 417, the source electrode layer 405a, The dopant passes through the drain electrode layer 405b and is introduced into the oxide semiconductor film 403. The methods for introducing 421 include ion implantation, ion doping, and plasma immersion. Ion implantation or the like can be used. It is preferable to use a simple ion of 1 or an ion of hydride, fluoride, or chloride.

[0115] The dopant 421 introduction process is performed by adjusting the injection conditions such as the acceleration voltage and the dose amount, and the amount of gold to be passed through. The thickness of the metal element-containing film 417 can be appropriately set and controlled. For example, using boron, When implanting boron ions using the ion implantation method, the acceleration voltage is 15 kV and the dose is 1 × 10 15 ions / cm 2 Preferably, the dose is 1×10 13 ions / cm 2 5x10 or more 16 ions / cm 2 The following would suffice.

[0116] The concentration of dopant 421 in the low resistance region is 5×10 18 atoms / cm 3 1 x10 22 atoms / cm 3 It is preferable that:

[0117] The dopant may be introduced while the substrate 400 is heated.

[0118] Note that the treatment of introducing the dopant 421 into the oxide semiconductor film 403 may be performed multiple times. A plurality of types of dopants may be used.

[0119] After the introduction of the dopant 421, a heat treatment may be performed. The temperature is 300°C to 700°C, preferably 300°C to 450°C, for 1 hour in an oxygen atmosphere. It is preferable to carry out heating under nitrogen atmosphere, reduced pressure, or air (ultra-dry air). Processing may be performed.

[0120] When the oxide semiconductor film 403 is a crystalline oxide semiconductor film, the dopant 421 is introduced. In this case, a heat treatment is performed after the introduction of the dopant 421. By this treatment, the crystallinity of the oxide semiconductor film 403 can be restored.

[0121] Next, heat treatment is performed in a state where the film 417 containing a metal element and the oxide semiconductor film 403 are partly in contact with each other. The heat treatment is preferably carried out in an oxygen atmosphere. The heating temperature is 100°C or higher and 700°C or lower, preferably 200°C or lower. The temperature should be between 0°C and 400°C.

[0122] For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the film 417 containing the metal element and The oxide semiconductor film 403 is subjected to heat treatment in an oxygen atmosphere at 300° C. for one hour.

[0123] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat from a heat source such as a resistance heating element. A device that heats the object to be treated by radiation may be used. For example, a GRTA (Gas Reactor Tank Apparatus) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. The LRTA device can be used with halogen lamps, metal halide lamps, etc. lamp, xenon arc lamp, carbon arc lamp, high-pressure sodium lamp, high-pressure mercury lamp It is a device that heats the object to be treated by radiating light (electromagnetic waves) emitted from a lamp or other lamp. The GRTA device is a device that uses high-temperature gas to perform heat treatment. Inert gases such as argon or nitrogen that do not react with the material to be treated by heat treatment An active gas is used.

[0124] For example, as a heat treatment, the substrate is placed in an inert gas heated to a high temperature of 650 to 700°C. After heating for several minutes, GRTA may be performed in which the substrate is taken out of the inert gas.

[0125] Heat treatment is carried out in nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). m or less, more preferably 10 ppb or less of air), or rare gases (argon, helium, etc. The reaction may be carried out under an atmosphere of nitrogen, oxygen, ultra-dry air, or a rare gas. It is preferable that the gas does not contain water, hydrogen, etc. Or the purity of the rare gas is 6N (99.9999%) or more, preferably 7N (99.999%). 99%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm or less). It is preferable that:

[0126] By the heat treatment, a metal element is introduced from the film 417 containing a metal element into the oxide semiconductor film 403. As a result, low-resistance regions 404a and 404b are formed in the oxide semiconductor film 403. , a channel forming region 409 is sandwiched between low resistance regions 404a containing dopants and metal elements. , 404b, and low resistance regions 406a, 406b containing dopants are formed. The low resistance regions 404a and 404b containing the dopant and the metal element are more resistive than the low resistance regions 404a and 404b containing the dopant and the metal element. The resistance can be lower than that of the resistive regions 406a and 406b.

[0127] In this embodiment, boron is used as the dopant and aluminum is used as the metal element. , low resistance regions 404a and 404b contain boron and aluminum, and low resistance region 406a , 406b contains boron.

[0128] In addition, a processing step for introducing a metal element from the film 417 containing a metal element into the oxide semiconductor film 403 is performed. By the heat treatment, the film 417 containing the metal element becomes the film 407 containing the metal element. The metal film used as the film containing the element 417 was a metal oxide insulating film used as the film containing the metal element 407. Such a metal oxide film can be used as an insulating film. In this example, an aluminum film was used as the film 417 containing a metal element, and the aluminum was oxidized by heat treatment. Since the aluminum oxide film is a metal oxide insulating film, it is used as an insulating film. It is possible.

[0129] Through the above steps, the transistor 440 of this embodiment is manufactured (see FIG. 1E). The low resistance regions 404a, 404b and the low resistance region 404c are arranged in the channel length direction with the channel forming region 409 sandwiched therebetween. By including the oxide semiconductor film 403 including the regions 406a and 406b, the transistor The capacitor 440 has high on-state characteristics (for example, on-state current and field-effect mobility), and is suitable for high-speed operation and high-speed response. The answer becomes possible.

[0130] The low resistance regions 404a, 404b and the low resistance regions 406a, 406b are source regions or drain regions. By providing the low resistance regions 404a and 404b, the Therefore, the channel forming region 409 formed between the low resistance regions 404a and 404b is In addition, the oxide in the low resistance regions 406a and 406b can be reduced. The semiconductor film 403 is electrically connected to the source electrode layer 405a and the drain electrode layer 405b. By this, the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b are It is possible to reduce the contact resistance with 05b.

[0131] Another insulating film may be stacked over the film 407 containing a metal element, which is a metal oxide insulating film.

[0132] The film 407 containing the metal element may be removed. For example, if the film 407 containing the metal element is conductive, If the metal element-containing film 407 has the above-mentioned property, the film 407 containing the metal element is removed and another insulating film 416 is formed as shown in FIG. It can be formed.

[0133] FIG. 6A corresponds to FIG. 1E, and shows a metal element covering the transistor 440. If the metal element-containing film 407 is insulating, it can be left as it is. However, if it is conductive or if you want to provide another insulating film, gold The metal element-containing film 407 is then removed (see FIG. 6(B)).

[0134] Then, the insulating film 416 is formed to cover the transistor 440 (see FIG. 6C).

[0135] The insulating film 416 is formed by mixing impurities such as water and hydrogen into the insulating film 416 by a method such as sputtering. The insulating film 416 is preferably formed by a method that does not contain excess oxygen. The film containing the oxygen atom is preferably a film containing the oxygen atom because it serves as an oxygen supply source to the oxide semiconductor film 403.

[0136] In this embodiment, a silicon oxide film having a thickness of 100 nm is deposited as the insulating film 416 by sputtering. The silicon oxide film is formed by sputtering. Typically, under an atmosphere of argon, oxygen, or a mixture of rare gases and oxygen. This can be done.

[0137] In order to remove residual moisture in the deposition chamber of the insulating film 416, similarly to the deposition of the oxide semiconductor film, It is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating film 416 formed in the film formation chamber evacuated using a pump can be reduced. In addition, as an exhaust means for removing residual moisture in the film forming chamber of the insulating film 416, a turbo A molecular pump with a cold trap added may also be used.

[0138] The insulating film 416 is formed using a sputtering gas containing hydrogen, water, a hydroxyl group, or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0139] When the insulating film 416 is stacked, typically, an aluminum oxide film, an oxide film, or the like can be used in addition to a silicon oxide film. An inorganic insulating film such as a silicon oxynitride film, an aluminum oxynitride film, or a gallium oxide film is used. For example, the insulating film 416 may be a silicon oxide film and an aluminum oxide film. A stack of the above can be used.

[0140] The metal element-containing film 407 or the insulating film 416 provided over the oxide semiconductor film 403 The aluminum oxide film that can be used is resistant to both impurities such as hydrogen and moisture, and oxygen. On the other hand, it has a high blocking effect that prevents it from passing through the membrane.

[0141] Therefore, the aluminum oxide film is free from hydrogen, which is a factor of fluctuation during and after the manufacturing process. The inclusion of impurities such as moisture in the oxide semiconductor film 403 and the inclusion of a main component constituting the oxide semiconductor The oxide semiconductor film 403 functions as a protective film for preventing oxygen, which is a material, from being released from the oxide semiconductor film 403.

[0142] In addition, a planarizing insulating film may be formed to reduce surface irregularities caused by the transistor. The planarized insulating film may be made of organic materials such as polyimide, acrylic, or benzocyclobutene resin. In addition to the above organic materials, low dielectric constant materials (low-k materials) can also be used. By laminating multiple insulating films made of these materials, A planarizing insulating film may be formed.

[0143] In this embodiment, a planarization insulating film 415 is formed over the metal element-containing film 407 or the insulating film 416. In addition, the metal element-containing film 407 or the insulating film 416 and the planarization insulating film 415 are formed. Openings reaching the source electrode layer 405a and the drain electrode layer 405b are formed, and source electrodes are The wiring layer 465a electrically connects to the drain electrode layer 405b. 5b is formed (see FIG. 1(F) and FIG. 6(D)).

[0144] As shown in FIGS. 3A to 3F, the source electrode layer 405a and the drain electrode layer 40 5b, the metal element-containing film 407 and the insulating film 41 are formed as wiring layers 465a and 465b. It may also be provided on 6.

[0145] In the case of FIG. 3, a source electrode layer 405a and a source electrode layer 405b are formed to cover a part of the oxide semiconductor film 403 as in FIG. Since the drain electrode layer 405b is not formed, the channel overlapping with the gate electrode layer 401 Metal elements and dopants are introduced into the regions other than the oxide formation region 409. In the semiconductor film 403, the low resistance regions formed on both sides of the channel formation region 409 are The transistor 4 is made up of low resistance regions 404a and 404b containing metal elements and dopants. The number becomes 45.

[0146] Note that in the example of the semiconductor device illustrated in FIG. 3F, a metal oxide insulating film is formed over the transistor 445. The metal element-containing film 407 and the insulating film 416 are stacked. The openings formed in the film 407 and the insulating film 416 and reaching the low resistance regions 404a and 404b are A source electrode layer 405a and a drain electrode layer 405b are formed.

[0147] As shown in FIGS. 7A and 7B, a sidewall structure is formed on the side surface of the gate electrode layer 401. The sidewall insulating layers 412a and 412b may be formed on the gate electrode. After forming an insulating film to cover the gate electrode layer 401, this is subjected to RIE (Reactive Ion Etching). Anisotropic etching by reactive ion etching A sidewall insulating layer 412a having a sidewall structure is formed on the sidewall of the gate electrode layer 401 in a self-aligned manner. , 412b are formed. Here, there is no particular limitation on the insulating film. For example, OS (Tetraethyl-Ortho-Silicate) or silane, etc. and acid Silicon oxide with good step coverage is used, which is formed by reacting silicon dioxide with nitrogen or nitrous oxide. The insulating film can be formed by thermal CVD, plasma CVD, atmospheric pressure CVD, and bias ECRCVD. It can be formed by a method such as low temperature oxidation (LTO) or sputtering. Silicon oxide formed by the Low Temperature Oxidation method It may be used.

[0148] In the case of FIGS. 7A and 7B, the gate insulating film 402 is formed by the gate electrode layer 401 and the sidewall insulating layer 4 The gate insulating film can be etched using 12a and 412b as a mask to form the gate insulating film.

[0149] 7A and 7B, when the insulating film is etched, the insulating film on the gate electrode layer 401 is The film is removed to expose the gate electrode layer 401, but the insulating film is left on the gate electrode layer 401. The sidewall insulating layers 412a and 412b may be formed in such a shape. A protective film may be formed on the electrode layer 401. In this way, the gate electrode layer 401 is protected. This prevents the gate electrode layer from being thinned during etching. The etching method may be either a dry etching method or a wet etching method. A coating method can be used.

[0150] When the step of forming the sidewall insulating layers 412a and 412b is performed before the step of introducing the dopant, As shown in FIG. 7A, the sidewall insulating layers 412a and 412b are also formed during the dopant introduction process. The oxide semiconductor film 403 under the sidewall insulating layers 412a and 412b is doped with dopant to serve as a mask. The transistor 420a has a structure in which no ions are introduced.

[0151] On the other hand, the step of forming the sidewall insulating layers 412a and 412b is performed after the step of introducing the dopant. In this case, as shown in FIG. 7B, the sidewall insulating layers 412a and 41 2b does not serve as a mask, the oxide semiconductor film 403 under the sidewall insulating layers 412a and 412b A dopant is introduced into the structure including low resistance regions 406c and 406d containing the dopant. This becomes transistor 420b.

[0152] The oxide semiconductor film 403, which is highly purified and in which oxygen vacancies are filled, is free of impurities such as hydrogen and water. The hydrogen concentration in the oxide semiconductor film 403 was 5×10 19 atoms / cm 3 Less than or equal to 5 x 10 18 atoms / cm 3 The oxide semiconductor The hydrogen concentration in the film 403 was measured by secondary ion mass spectrometry (SIMS). It is measured by Mass Spectrometry (MSM).

[0153] The oxide semiconductor film 403 has very few carriers (close to zero). The concentration is 1 x 10 14 / cm 3 Less than 1 x 10 12 / cm 3 Less than, even more preferred Or 1 x 10 11 / cm 3 is less than.

[0154] The oxide film produced by this embodiment is highly purified and contains excess oxygen to compensate for the oxygen deficiency. The transistor 440 using the compound semiconductor film 403 has a current value in an off state (off current value ) per 1 μm of channel width at room temperature is 100 zA / μm (1 zA (zeptoampere) is 1×10 -21 A) or less, preferably 10 zA / μm or less, more preferably 1 zA / μm or less It can be further preferably reduced to a level of 100 yA / μm or less.

[0155] As described above, by using the transistor with excellent electrical characteristics, high performance and high reliability semiconductors can be obtained. A body device can be provided.

[0156] (Embodiment 2) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The same parts as those in the above embodiment or parts and steps having similar functions are the same as those in the above embodiment. The same operations can be performed as in the first embodiment, and the repeated explanation will be omitted. The literal meaning is omitted.

[0157] In this embodiment, in a method for manufacturing a semiconductor device according to the disclosed invention, An example will be shown in which the step of introducing a metal element into the silicon dioxide film is carried out before the step of introducing a dopant.

[0158] 2A to 2D illustrate an example of a method for manufacturing the transistor 440 of this embodiment.

[0159] FIG. 2A corresponds to FIG. 1C, and has an insulating surface on which an insulating film 436 is provided. An oxide semiconductor film 403, a source electrode layer 405a, a drain electrode layer 405, and a b, a gate insulating film 402, a gate electrode layer 401, and a film 417 containing a metal element are formed. do.

[0160] In this embodiment, an aluminum film having a thickness of 10 nm is used as the film 417 containing a metal element. It is formed by a tarring method.

[0161] Next, heat treatment is performed in a state where the film 417 containing a metal element and the oxide semiconductor film 403 are partly in contact with each other. The heat treatment is preferably carried out in an oxygen atmosphere. The heating temperature is 100°C or higher and 700°C or lower, preferably 20 The temperature should be between 0°C and 400°C.

[0162] For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the film 417 containing the metal element and The oxide semiconductor film 403 is subjected to heat treatment in an oxygen atmosphere at 300° C. for one hour.

[0163] By the heat treatment, a metal element is introduced from the film 417 containing a metal element into the oxide semiconductor film 403. As a result, low resistance regions 426a and 426b are formed (see FIG. 2(B)). a, 426b contain metal elements.

[0164] In addition, a processing step for introducing a metal element from the film 417 containing a metal element into the oxide semiconductor film 403 is performed. By the heat treatment, the film 417 containing the metal element becomes the film 407 containing the metal element. The metal film used as the film containing the element 417 was a metal oxide insulating film used as the film containing the metal element 407. Such a metal oxide film can be used as an insulating film. In this example, an aluminum film was used as the film 417 containing a metal element, and the aluminum was oxidized by heat treatment. Since the aluminum oxide film is a metal oxide insulating film, it is used as an insulating film. It is possible.

[0165] Next, the oxide semiconductor film 40 3 through a film 407 containing a metal element, a source electrode layer 405a, and a drain electrode layer 405b. A dopant 421 is selectively introduced through the silicon dioxide film to form low resistance regions 404a and 404b.

[0166] In this embodiment, the source electrode layer 405a and the drain electrode layer 405b are formed as thin films. Therefore, the oxide semiconductor film under the source electrode layer 405a and the drain electrode layer 405b is also doped. In this example, a source electrode 421 is introduced to form low resistance regions 406a and 406b. The thickness of the electrode layer 405a and the drain electrode layer 405b and the conditions for introducing the dopant 421 are also important. That is, the oxide semiconductor film 403 under the source electrode layer 405a and the drain electrode layer 405b In some cases, the dopant 421 is not introduced.

[0167] In this embodiment, boron is used as the dopant 421, and boron ions are implanted by ion implantation. Inject the ion.

[0168] Therefore, in the oxide semiconductor film 403, the dopant and the low-resistance regions 404a and 404b containing a metal element, and a low-resistance region 406a containing a dopant. , 406b are formed. Note that low resistance regions 404a, 406b containing dopants and metal elements are formed. The resistance of the low-resistance regions 404b is lower than that of the low-resistance regions 406a and 406b containing the dopant. can be done.

[0169] Through the above steps, the transistor 440 of this embodiment is manufactured (see FIG. 2C). The low resistance regions 404a, 404b and the low resistance region 404c are arranged in the channel length direction with the channel forming region 409 sandwiched therebetween. By including the oxide semiconductor film 403 including the regions 406a and 406b, the transistor The capacitor 440 has high on-state characteristics (for example, on-state current and field-effect mobility), and is suitable for high-speed operation and high-speed response. The answer becomes possible.

[0170] The low resistance regions 404a, 404b and the low resistance regions 406a, 406b are source regions or drain regions. By providing the low resistance regions 404a and 404b, the Therefore, the channel forming region 409 formed between the low resistance regions 404a and 404b is In addition, the oxide in the low resistance regions 406a and 406b can be reduced. The semiconductor film 403 is electrically connected to the source electrode layer 405a and the drain electrode layer 405b. By this, the oxide semiconductor film 403, the source electrode layer 405a, and the drain electrode layer 405b are It is possible to reduce the contact resistance with 05b.

[0171] In this embodiment mode, a planarization insulating film 415 is formed over the film 407 containing a metal element. The metal element-containing film 407 and the planarization insulating film 415 are covered with a source electrode layer 405a and a drain electrode layer 405b. An opening is formed in the opening, reaching the source electrode layer 405a and the drain electrode layer 405b. 5b (see FIG. 2(D)). .

[0172] As described above, by using the transistor with excellent electrical characteristics, high performance and high reliability semiconductors can be obtained. A body device can be provided.

[0173] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0174] (Embodiment 3) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The same parts as those in the above embodiment or parts and steps having similar functions are the same as those in the above embodiment. The same operations can be performed as in the first embodiment, and the repeated explanation will be omitted. The literal meaning is omitted.

[0175] In this embodiment mode, the source electrode layer and the drain electrode An example of a manufacturing method for a transistor having a different structure for connecting a metal oxide film and an oxide semiconductor film will be described.

[0176] 4A to 4F illustrate an example of a method for manufacturing the transistor 450 in this embodiment. vinegar.

[0177] First, an insulating film 436 is formed on a substrate 400 .

[0178] Next, a source electrode layer and a drain electrode layer (formed from the same layer as this) are formed on the insulating film 436. A conductive film is formed to become the wiring (including the wiring).

[0179] A resist mask is formed on the conductive film by a photolithography process, and selective etching is performed. After forming the source electrode layer 405a and the drain electrode layer 405b by this method, a resist mask Remove.

[0180] Then, an oxide semiconductor layer was formed over the insulating film 436, the source electrode layer 405a, and the drain electrode layer 405b. A conductive film 403 is formed. A gate insulating film 442 is formed so as to cover the oxide semiconductor film 403. (See Figure 4(A)).

[0181] A gate electrode layer 401 is formed on the gate insulating film 442 .

[0182] Next, the gate insulating film 442 is etched using the gate electrode layer 401 as a mask to form an oxide film. A part of the semiconductor film 403 is exposed, and a gate insulating film 402 is formed (see FIG. 4B).

[0183] Next, the source electrode layer 405a, the drain electrode layer 405b, the oxide semiconductor film 403, and the gate electrode layer 405b are A metal oxide film is formed on the gate insulating film 402 and the gate electrode layer 401 in contact with part of the oxide semiconductor film 403. A film 417 containing the element is formed (see FIG. 4C).

[0184] In this embodiment, an aluminum film having a thickness of 10 nm is used as the film 417 containing a metal element. It is formed by a tarring method.

[0185] Next, the oxide semiconductor film 40 3, a dopant 421 is selectively introduced through a film 417 containing a metal element, and a low resistance region 414a and 414b are formed (see FIG. 4(D)).

[0186] In this embodiment, phosphorus is used as the dopant 421, and an oxide semiconductor The film 403 is implanted with phosphorus ions.

[0187] The concentration of dopant 421 in the low resistance region is 5×10 18 atoms / cm 3 1 x10 22 atoms / cm 3 It is preferable that:

[0188] After the introduction of the dopant 421, a heat treatment may be performed. The temperature is 300°C to 700°C, preferably 300°C to 450°C, for 1 hour in an oxygen atmosphere. It is preferable to carry out heating under nitrogen atmosphere, reduced pressure, or air (ultra-dry air). Processing may be performed.

[0189] Next, heat treatment is performed in a state where the film 417 containing a metal element and the oxide semiconductor film 403 are partly in contact with each other. The heat treatment is preferably carried out in an oxygen atmosphere. The heating temperature is 100°C or higher and 700°C or lower, preferably 20 The temperature should be between 0°C and 400°C.

[0190] For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the film 417 containing the metal element and The oxide semiconductor film 403 is subjected to heat treatment in an oxygen atmosphere at 300° C. for one hour.

[0191] By the heat treatment, a metal element is introduced from the film 417 containing a metal element into the oxide semiconductor film 403. As a result, low-resistance regions 404a and 404b are formed in the oxide semiconductor film 403. , a channel forming region 409 is sandwiched between low resistance regions 404a containing dopants and metal elements. , 404b are formed. Note that low resistance regions 404a, 404b containing dopants and metal elements are formed. 04b can be low resistance.

[0192] In this embodiment, phosphorus is used as the dopant and aluminum is used as the metal element. The low resistance regions 404a and 404b contain phosphorus and aluminum.

[0193] In addition, a processing step for introducing a metal element from the film 417 containing a metal element into the oxide semiconductor film 403 is performed. By the heat treatment, the film 417 containing the metal element becomes the film 407 containing the metal element. The metal film used as the film containing the element 417 was a metal oxide insulating film used as the film containing the metal element 407. Such a metal oxide film can be used as an insulating film. In this example, an aluminum film was used as the film 417 containing a metal element, and the aluminum was oxidized by heat treatment. Since the aluminum oxide film is a metal oxide insulating film, it is used as an insulating film. It is possible.

[0194] Through the above steps, the transistor 450 of this embodiment is manufactured (see FIG. 4E). The oxide film includes low resistance regions 404a and 404b sandwiching a channel forming region 409 in the channel length direction. By having the nitride semiconductor film 403, the transistor 450 has an on-characteristic (for example, The electron current and field-effect mobility are high, enabling high-speed operation and high-speed response.

[0195] The low resistance regions 404a and 404b can function as a source region or a drain region. By providing the low resistance regions 404a and 404b, The electric field applied to the channel forming region 409 formed between the gate electrodes 404b can be reduced. In addition, in the low resistance regions 404a and 404b, the oxide semiconductor film 403 and the source electrode layer 4 The oxide semiconductor layer 405a and the drain electrode layer 405b are electrically connected to each other. The contact resistance between the film 403 and the source electrode layer 405a and the drain electrode layer 405b is reduced. This can be done.

[0196] In this embodiment mode, a planarization insulating film 415 is formed over the film 407 containing a metal element. The metal element-containing film 407 and the planarization insulating film 415 are covered with a source electrode layer 405a and a drain electrode layer 405b. An opening is formed in the opening, reaching the source electrode layer 405a and the drain electrode layer 405b. 5b (see FIG. 4(F)). .

[0197] As described above, by using the transistor with excellent electrical characteristics, high performance and high reliability semiconductors can be obtained. A body device can be provided.

[0198] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0199] (Fourth embodiment) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The same parts as those in the above embodiment or parts and steps having similar functions are the same as those in the above embodiment. The same operations can be performed as in the first embodiment, and the repeated explanation will be omitted. The literal meaning is omitted.

[0200] In this embodiment, in a method for manufacturing a semiconductor device according to the disclosed invention, An example will be shown in which the step of introducing a metal element into the silicon dioxide film is carried out before the step of introducing a dopant.

[0201] 5A to 5D illustrate an example of a method for manufacturing the transistor 450 of this embodiment.

[0202] FIG. 5A corresponds to FIG. 4C, and has an insulating surface on which an insulating film 436 is provided. On the substrate 400, a source electrode layer 405a, a drain electrode layer 405b, an oxide semiconductor film 40 3, a gate insulating film 402, a gate electrode layer 401, and a film 417 containing a metal element are formed. do.

[0203] In this embodiment, an aluminum film having a thickness of 10 nm is used as the film 417 containing a metal element. It is formed by a tarring method.

[0204] Next, heat treatment is performed in a state where the film 417 containing a metal element and the oxide semiconductor film 403 are partly in contact with each other. The heat treatment may be performed in an oxygen atmosphere.

[0205] For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the film 417 containing the metal element and The oxide semiconductor film 403 is subjected to heat treatment in an oxygen atmosphere at 300° C. for one hour.

[0206] By the heat treatment, a metal element is introduced from the film 417 containing a metal element into the oxide semiconductor film 403. As a result, low resistance regions 426a and 426b are formed (see FIG. 5(B)). a, 426b contain metal elements.

[0207] In addition, a processing step for introducing a metal element from the film 417 containing a metal element into the oxide semiconductor film 403 is performed. By the heat treatment, the film 417 containing the metal element becomes the film 407 containing the metal element. The metal film used as the film containing the element 417 was a metal oxide insulating film used as the film containing the metal element 407. Such a metal oxide film can be used as an insulating film. In this example, an aluminum film was used as the film 417 containing a metal element, and the aluminum was oxidized by heat treatment. Since the aluminum oxide film is a metal oxide insulating film, it is used as an insulating film. It is possible.

[0208] Next, the oxide semiconductor film 40 3 through a film 407 containing a metal element, a source electrode layer 405a, and a drain electrode layer 405b. A dopant 421 is selectively introduced through the silicon dioxide film to form low resistance regions 404a and 404b.

[0209] In this embodiment, phosphorus is used as the dopant 421, and phosphorus ions are implanted by ion implantation. Perform the injection.

[0210] Therefore, in the oxide semiconductor film 403, the dopant and the Low resistance regions 404a and 404b containing dopants and metal elements are formed. The low resistance regions 404a, 404b including the

[0211] Through the above steps, the transistor 450 of this embodiment is manufactured (see FIG. 5C). The oxide film includes low resistance regions 404a and 404b sandwiching a channel forming region 409 in the channel length direction. By having the nitride semiconductor film 403, the transistor 450 has an on-characteristic (for example, The electron current and field-effect mobility are high, enabling high-speed operation and high-speed response.

[0212] The low resistance regions 404a and 404b can function as a source region or a drain region. By providing the low resistance regions 404a and 404b, The electric field applied to the channel forming region 409 formed between the gate electrodes 404b can be reduced. In addition, in the low resistance regions 404a and 404b, the oxide semiconductor film 403 and the source electrode layer 4 The oxide semiconductor layer 405a and the drain electrode layer 405b are electrically connected to each other. The contact resistance between the film 403 and the source electrode layer 405a and the drain electrode layer 405b is reduced. This can be done.

[0213] In this embodiment mode, a planarization insulating film 415 is formed over the film 407 containing a metal element. The metal element-containing film 407 and the planarization insulating film 415 are covered with a source electrode layer 405a and a drain electrode layer 405b. An opening is formed in the opening, reaching the source electrode layer 405a and the drain electrode layer 405b. 5b (see FIG. 5(D)). .

[0214] As described above, by using the transistor with excellent electrical characteristics, high performance and high reliability semiconductors can be obtained. A body device can be provided.

[0215] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0216] (Embodiment 5) In this embodiment mode, another embodiment of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. The same parts as those in the above embodiment or parts and steps having similar functions are the same as those in the above embodiment. The same operations can be performed as in the first embodiment, and the repeated explanation will be omitted. The literal meaning is omitted.

[0217] In this embodiment, an example of a bottom-gate transistor is shown in FIGS. The transistor 410 shown in FIG. 1 is called a channel protection type (also called a channel stop type). It is one of the bottom gate structures and is also called an inverted staggered transistor.

[0218] An example of a method for manufacturing the transistor 410 is shown in FIGS.

[0219] First, a conductive film is formed on a substrate 400 having an insulating surface, and then a first photolithography is performed. A gate electrode layer 401 is formed by the process.

[0220] A gate insulating film 402 is formed on the gate electrode layer 401. An oxide semiconductor film 403 is formed over the gate insulating film 402 .

[0221] A portion of the oxide semiconductor film 403 overlapping with the gate electrode layer 401 functions as a channel protective film. An insulating film 427 is formed (see FIG. 8A).

[0222] The insulating film 427 may be formed using a material and a method similar to those of the insulating film 416. Typically, the insulating film 427 is formed using an oxide film. Silicon film, silicon oxynitride film, aluminum oxide film, aluminum oxynitride film, silicon oxide film gallium oxide film, silicon nitride film, aluminum nitride film, silicon nitride oxide film A single layer or a laminate of inorganic insulating films such as a nitriding film or an aluminum oxide film can be used. .

[0223] The insulating film 427 in contact with the oxide semiconductor film 403 (when the insulating film 427 has a stacked structure, the insulating film 427 is When the oxide semiconductor film 403 is made to contain a large amount of oxygen, 3.

[0224] Next, a gate electrode layer 401, a gate insulating film 402, an oxide semiconductor film 403, and an insulating film 42 A film 417 containing a metal element is formed over the oxide semiconductor film 407 in contact with part of the oxide semiconductor film 403 (FIG. 8(B)).

[0225] In this embodiment, an aluminum film having a thickness of 10 nm is used as the film 417 containing a metal element. It is formed by a tarring method.

[0226] Next, the oxide semiconductor film 40 3, a dopant 421 is selectively introduced through a film 417 containing a metal element, and a low resistance region 414a and 414b are formed (see FIG. 8(C)).

[0227] In this embodiment, the insulating film 427 that functions as a channel protective film is formed by introducing a dopant 421. A separate resist mask is formed to mask the dopant 421. Alternatively, a channel etch type transistor without a channel protection film may be used. In the case of a transistor, a separate resist mask can be formed and dopants can be selectively introduced. stomach.

[0228] In this embodiment, boron is used as the dopant 421, and an oxide semiconductor is formed by ion implantation. Boron ions are implanted into the body film 403 .

[0229] The concentration of dopant 421 in the low resistance region is 5×10 18 / cm 3 More than 1×10 22 / cm 3 It is preferable that:

[0230] After the introduction of the dopant 421, a heat treatment may be performed.

[0231] Next, heat treatment is performed in a state where the film 417 containing a metal element and the oxide semiconductor film 403 are partly in contact with each other. The heat treatment may be performed in an oxygen atmosphere.

[0232] For example, the substrate is introduced into an electric furnace, which is one of the heat treatment devices, and the film 417 containing the metal element and The oxide semiconductor film 403 is subjected to heat treatment in an oxygen atmosphere at 300° C. for one hour.

[0233] By the heat treatment, a metal element is introduced from the film 417 containing a metal element into the oxide semiconductor film 403. As a result, low-resistance regions 404a and 404b are formed in the oxide semiconductor film 403. , a channel forming region 409 is sandwiched between low resistance regions 404a containing dopants and metal elements. , 404b are formed. Note that low resistance regions 404a, 404b containing dopants and metal elements are formed. 04b can be low resistance.

[0234] In this embodiment, boron is used as the dopant and aluminum is used as the metal element. The low resistance regions 404a and 404b contain boron and aluminum.

[0235] In addition, a processing step for introducing a metal element from the film 417 containing a metal element into the oxide semiconductor film 403 is performed. By the heat treatment, the film 417 containing the metal element becomes the film 407 containing the metal element (FIG. 8(D)). reference).

[0236] Next, the film 407 containing the metal element is removed, and the source An electrode layer 405a and a drain electrode layer 405b are formed. If the insulating film has conductivity, the insulating film is not removed, and the source electrode layer 405a and the drain electrode layer 405b are left as masks. By etching the mask, the source electrode layer 405a and the drain electrode layer 4 May be used as part of 05b.

[0237] Through the above steps, the transistor 410 of this embodiment is manufactured (see FIG. 8E). The oxide film includes low resistance regions 404a and 404b sandwiching a channel forming region 409 in the channel length direction. By having the nitride semiconductor film 403, the transistor 410 has an on-characteristic (for example, The electron current and field-effect mobility are high, enabling high-speed operation and high-speed response.

[0238] The low resistance regions 404a and 404b can function as a source region or a drain region. By providing the low resistance regions 404a and 404b, The electric field applied to the channel forming region 409 formed between the gate electrodes 404b can be reduced. In addition, in the low resistance regions 404a and 404b, the oxide semiconductor film 403 and the source electrode layer 4 The oxide semiconductor layer 405a and the drain electrode layer 405b are electrically connected to each other. The contact resistance between the film 403 and the source electrode layer 405a and the drain electrode layer 405b is reduced. This can be done.

[0239] In this embodiment, an insulating film 416 is formed as a protective film over the transistor 410 (see FIG. 8). (See (F)).

[0240] As described above, by using the transistor with excellent electrical characteristics, high performance and high reliability semiconductors can be obtained. A body device can be provided.

[0241] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0242] (Embodiment 6) In this embodiment mode, another embodiment of a method for manufacturing a semiconductor device will be described. A part or a part having the same function and a step can be performed in the same manner as in the above embodiment. Therefore, repeated explanations will be omitted, and detailed explanations of the same parts will be omitted.

[0243] Note that in this embodiment, the transistors 440 and 441 described in any of Embodiments 1 to 5 are Applicable to 45, 420a, 420b, 450, and 410.

[0244] In this embodiment, in a manufacturing method of a semiconductor device according to the disclosed invention, The oxide semiconductor film 403 that has been subjected to the oxidation treatment is treated with oxygen (at least oxygen radicals and oxygen atoms). , or oxygen ions) to supply oxygen into the film.

[0245] By the dehydration or dehydrogenation treatment, oxygen, which is the main component material of the oxide semiconductor, is simultaneously In the oxide semiconductor film 403, oxygen is released and the amount of oxygen decreases. Oxygen vacancies exist in the areas where the oxide has been removed, and these oxygen vacancies cause fluctuations in the electrical characteristics of the transistor. This results in the creation of donor levels.

[0246] Therefore, by supplying oxygen to the oxide semiconductor film 403 that has been subjected to dehydration or dehydrogenation treatment, By supplying oxygen to the oxide semiconductor film 403, oxygen vacancies in the film are filled. By using the oxide semiconductor film in a transistor, the oxide semiconductor film can be The variation in threshold voltage Vth of the transistor and the threshold voltage shift ΔVth are reduced. In addition, the threshold voltage can be shifted in the positive direction, and the transistor can be made to operate normally. It can also be turned off.

[0247] Although oxygen is introduced into the oxide semiconductor film 403 as an example in this embodiment, The introduction of the insulating film 402, the gate insulating film 442, and the insulating film 444 is performed in contact with the oxide semiconductor film 403. This may be applied to the film 436, the film 407 containing a metal element, the insulating film 416, the insulating film 427, and the like. The gate insulating film 402, the gate insulating film 442, and the insulating film 436 in contact with the oxide semiconductor film 403 Oxygen is introduced into the metal element-containing film 407, the insulating film 416, and the insulating film 427 to make them oxygen-excessive. This allows oxygen to be supplied to the oxide semiconductor film 403.

[0248] The oxygen introduction method includes ion implantation, ion doping, and plasma immersion. On-implantation methods, plasma treatment, etc. can be used.

[0249] In the step of introducing oxygen into the oxide semiconductor film 403, The atoms may be introduced directly into the oxide semiconductor film or may be introduced through other films such as a gate insulating film or an insulating film. When oxygen is introduced through another film, ion implantation or ion doping may be used. The plasma immersion ion implantation method, etc. can be used. When introducing a silicon dioxide directly into the exposed oxide semiconductor film, plasma treatment or the like can be used. can.

[0250] The introduction of oxygen into the oxide semiconductor film 403 is performed by the transistors 440, 445, 420a, and 42 In the cases of 0b and 450, the source electrode layer 405 is formed on the exposed oxide semiconductor film 403. a) After forming the drain electrode layer 405b, the gate insulating film 442 or the gate insulating film 402 is formed. After that, after the gate electrode layer 401 is formed, the film 417 containing the metal element is formed, and then the film 40 containing the metal element is formed. 7, after forming the insulating film 416, or after forming the planarizing insulating film 415.

[0251] In addition, oxygen is introduced into the oxide semiconductor film 403 in the transistor 410. After the insulating film 427 is formed on the oxide semiconductor film 403, the film 417 containing a metal element is formed. After forming the film 407 containing the metal element, the source electrode layer 405a and the drain electrode layer 405b are formed. This can be done after the formation of the insulating film 416 or after the formation of the insulating film 416.

[0252] In this way, oxygen is introduced into the oxide semiconductor film after the dehydration or dehydrogenation treatment. The oxide semiconductor that has been subjected to the dehydration or dehydrogenation treatment may be used as the oxide semiconductor. Oxygen may be introduced into the membrane multiple times.

[0253] For example, when the oxygen concentration in the oxide semiconductor film 403 introduced by the oxygen introduction step is 1 x10 18 atoms / cm 3 5x10 or more 21 atoms / cm 3 It is preferable to It's nice.

[0254] In an oxide semiconductor, oxygen is one of the main components. The oxygen concentration in the conductive film was measured by SIMS (Secondary Ion Mass Spectroscopy) It is difficult to estimate accurately using methods such as oxide semiconductors. It is difficult to determine whether oxygen has been intentionally added to the conductive film.

[0255] By the way, oxygen has 17 O and 18There are isotopes such as O, and their existence in nature The respective proportions of oxygen atoms are known to be approximately 0.037% and 0.204% of the total oxygen atoms. In other words, the concentrations of these isotopes in the oxide semiconductor film can be measured by a method such as SIMS. Therefore, by measuring these concentrations, it is possible to estimate the oxide semiconductor It may be possible to estimate the oxygen concentration in the conductive film more accurately. By measuring the oxygen concentration, it may be possible to determine whether oxygen has been intentionally added to the oxide semiconductor film. stomach.

[0256] In addition, when oxygen is directly introduced into the oxide semiconductor film as in this embodiment, The insulating film that comes into contact with the body membrane does not necessarily have to be a film that contains a lot of oxygen. The insulating film in contact with the oxide semiconductor film is made to contain a large amount of oxygen, and oxygen is directly introduced into the oxide semiconductor film. In this case, multiple oxygen supply methods may be used.

[0257] In order to prevent the introduced oxygen from being released from the oxide semiconductor film again, and to prevent hydrogen, water, etc. To prevent impurities contained in the oxide semiconductor film from reconstituting into the oxide semiconductor film, a hydrogen-containing material such as oxygen, hydrogen, or water is used. A film with a high blocking effect against impurities is used as an insulating film covering the oxide semiconductor film. For example, it is preferable to provide a barrier against both impurities such as hydrogen and moisture, and oxygen. It is recommended to use an aluminum oxide film or the like which has a high blocking effect.

[0258] After oxygen is introduced into the oxide semiconductor film, a heating step is preferably performed.

[0259] Oxygen is introduced into an oxide semiconductor film that has been subjected to dehydration or dehydrogenation treatment to supply oxygen into the film. By this, the oxide semiconductor film can be highly purified and made electrically i-type (intrinsic). Cut.

[0260] A transistor having a highly purified and electrically i-type (intrinsic) oxide semiconductor film is Fluctuations in electrical characteristics are suppressed, and the device is electrically stable.

[0261] As described above, a semiconductor device using an oxide semiconductor and having stable electrical characteristics is provided. Therefore, a highly reliable semiconductor device can be provided.

[0262] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0263] (Embodiment 7) A semiconductor device having a display function using the transistor as an example described in any of Embodiments 1 to 6 A semiconductor device (also called a display device) can be manufactured. Part or all of the circuitry is integrated onto the same substrate as the pixel section to form a system-on-panel. It is possible.

[0264] In FIG. 9A, a pixel portion 4002 provided on a first substrate 4001 is surrounded by a A sealant 4005 is provided and the substrate is sealed with a second substrate 4006. In A), the area surrounded by the sealant 4005 on the first substrate 4001 and are formed in different regions using a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. A scanning line driver circuit 4004 and a signal line driver circuit 4003 are mounted on the substrate. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a signal line driver circuit 4005 are applied to the pixel portion 4002. Various signals and potentials are transmitted through the FPC (Flexible Printed Circuit )4018a, 4018b are supplied.

[0265] 9B and 9C, a pixel portion 4002 provided on a first substrate 4001 and a scanning A sealing material 4005 is provided so as to surround the line driver circuit 4004. A second substrate 4006 is provided on the substrate 4002 and the scanning line driver circuit 4004. The pixel portion 4002 and the scanning line driver circuit 4004 are formed by the first substrate 4001 and the sealing material 4004. The display element is sealed by the second substrate 4005 and the second substrate 4006. In C), the area surrounded by the sealant 4005 on the first substrate 4001 and are formed in different regions using a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. 9B and 9C, a signal line driver circuit 4003 is mounted. A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a signal line driver circuit 4005 are applied to the pixel portion 4002. The various signals and potentials are supplied from the FPC4018.

[0266] 9B and 9C, a signal line driver circuit 4003 is formed separately, and the first substrate 4 001, but the present invention is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed and mounted. It may be formed separately and mounted.

[0267] The method of connecting the separately formed drive circuit is not particularly limited, and may be ip On Glass) method, wire bonding method, or TAB (Tape A The C This is an example in which a signal line driver circuit 4003 and a scanning line driver circuit 4004 are implemented by the OG method. FIG. 9(B) shows an example in which a signal line driver circuit 4003 is mounted by the COG method, and FIG. 9(C) shows an example in which a signal line driver circuit 4003 is mounted by the COG method. ) is an example in which the signal line driver circuit 4003 is mounted by the TAB method.

[0268] The display device also includes a panel in which a display element is sealed, and a controller for the panel. and modules in which ICs, etc., including the above are mounted.

[0269] In this specification, the term "display device" refers to an image display device, a display device, or an optical device. Also refers to connectors, such as FPC or TAB tape. Modules with TCP attached, TAB tape or TCP with a printed wiring board attached The IC (integrated circuit) is directly mounted on the module or display element using the COG method. All such modules are also included in the display device.

[0270] The pixel portion and the scanning line driver circuit provided on the first substrate have a plurality of transistors. The transistor described as an example in any of Embodiments 1 to 6 can be used. do.

[0271] The display element provided in the display device may be a liquid crystal element (also called a liquid crystal display element), a light-emitting element ( The light-emitting element emits light by applying a current or a voltage. This category includes elements whose brightness can be controlled, specifically inorganic EL (Electroluminescent) Luminescence, organic electroluminescence, etc. Also, electronic ink, etc. A display medium whose contrast changes depending on use can also be applied.

[0272] One mode of a semiconductor device will be described with reference to FIGS. 9A and 9B. FIG. 10 shows a semiconductor device according to the first embodiment of the present invention. This corresponds to the cross section at MN.

[0273] As shown in FIGS. 9 and 10, the semiconductor device has a connection terminal electrode 4015 and a terminal electrode 4016. The connection terminal electrode 4015 and the terminal electrode 4016 are terminal electrodes of the FPC 4018. The electrode is electrically connected to the electrode via an anisotropic conductive film 4019 .

[0274] The connection terminal electrode 4015 is formed from the same conductive film as the first electrode layer 4030. 016 is the same conductor as the source electrode layer and the drain electrode layer of the transistors 4010 and 4011. It is formed of a conductive film.

[0275] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. 9 and 10, the transistors included in the pixel portion 4002 are 4004 and a transistor 4010 included in the scanning line driver circuit 4004. In FIG. 10A, an insulating film 4020 is provided over the transistors 4010 and 4011. 10(B), an insulating film 4021 is further provided. Reference numeral 23 denotes an insulating film that functions as a base film.

[0276] The transistors 4010 and 4011 are the transistors according to any one of Embodiments 1 to 6. In this embodiment, the transistor shown in Embodiment 1 can be applied. An example in which a transistor having a structure similar to that of the transistor 440 is applied will be described.

[0277] The transistors 4010 and 4011 have channel formation regions in the channel length direction. The transistor has oxide semiconductor films including a low-resistance region sandwiched therebetween. The on-state characteristics (e.g., on-state current and field effect transition) of the transistor 4010 and the transistor 4011 are It has high mobility, allowing for high-speed operation and high-speed response. It can also be miniaturized.

[0278] Therefore, the semiconductor device of this embodiment shown in FIGS. 9 and 10 is a high-performance and highly reliable semiconductor device. A conductor device can be provided.

[0279] The transistor 4010 provided in the pixel portion 4002 is electrically connected to a display element. The display element is not particularly limited as long as it can display, and various display elements can be used. can be used.

[0280] FIG. 10(A) shows an example of a liquid crystal display device using a liquid crystal element as a display element. In the figure, a liquid crystal element 4013, which is a display element, has a first electrode layer 4030 and a second electrode layer 4040. 031 and a liquid crystal layer 4008. The liquid crystal layer 4008 is sandwiched between alignment films. The second electrode layer 4031 is provided with insulating films 4032 and 4033 that function as a second The first electrode layer 4030 and the second electrode layer 4031 are disposed on the substrate 4006 side. The structure is stacked via 008.

[0281] 4035 is a columnar spacer obtained by selectively etching the insulating film. It is provided to control the film thickness (cell gap) of the liquid crystal layer 4008. A pacer may be used.

[0282] When liquid crystal elements are used as display elements, thermotropic liquid crystals, low molecular weight liquid crystals, polymer liquid crystals, etc. The liquid crystals that can be used include polymer dispersed liquid crystals, ferroelectric liquid crystals, and antiferroelectric liquid crystals. The liquid crystal material (liquid crystal composition) can be in a cholesteric phase, a smectic phase, or a cubic phase depending on the conditions. The phases shown are nematic, chiral, isotropic, etc.

[0283] In addition, a liquid crystal composition that exhibits a blue phase without using an alignment film may be used for the liquid crystal layer 4008. The blue phase is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric The blue phase is a phase that appears just before the transition from the black phase to the isotropic phase. The blue phase can be expressed by using a liquid crystal composition in which the above-mentioned compounds are mixed. In order to widen the temperature range, a polymerizable monomer and a polymerization initiator are added to the liquid crystal composition that exhibits the blue phase. The liquid crystal layer can be formed by adding a polymer stabilizer. The liquid crystal composition that exhibits this phase has a short response time and is optically isotropic, so alignment treatment is not required. It has little viewing angle dependency. Also, since there is no need to provide an alignment film, rubbing treatment is not required. Therefore, electrostatic breakdown caused by the rubbing process can be prevented, and the manufacturing process This reduces defects and damage to the liquid crystal display device during the manufacturing process, thereby improving the productivity of the liquid crystal display device. A transistor including an oxide semiconductor film can be easily affected by static electricity. This can cause the electrical characteristics of the transistor to fluctuate significantly, potentially causing it to deviate from the design range. Therefore, a liquid crystal display device having a transistor including an oxide semiconductor film exhibits a blue phase. It is more effective to use a crystalline composition.

[0284] The specific resistance of the liquid crystal material is 1×10 9 Ω·cm or more, preferably 1×10 11 Ω·cm or more, and more preferably 1×10 12 Ω·cm or more. The resistivity values ​​in this document are those measured at 20°C.

[0285] The size of the storage capacitor provided in the liquid crystal display device is determined by the lead of the transistor arranged in the pixel portion. It is set so that the charge can be held for a predetermined period, taking into consideration the current and other factors. The size of the oxide film may be set in consideration of the off-state current of the transistor. By using a transistor with a semiconductor film, the liquid crystal capacitance in each pixel It is sufficient to provide a storage volume having a size of 1 / 3 or less, preferably 1 / 5 or less, of the capacity of the do.

[0286] The transistor including the oxide semiconductor film disclosed in this specification has a current value ( Therefore, the retention time of electrical signals such as image signals can be extended. When the power is on, the write interval can be set longer. This reduces the frequency of the operation, thereby reducing power consumption.

[0287] In addition, the transistor including the oxide semiconductor film disclosed in this specification has high field-effect mobility. For example, a transistor capable of such high-speed driving is By using this transistor in a liquid crystal display device, the switching transistor in the pixel section and the The driver transistors used for the other circuits can be formed on the same substrate. Since it is not necessary to use a semiconductor device formed from a silicon wafer or the like as a driving circuit, Therefore, the number of components in the semiconductor device can be reduced. By using a transistor capable of this, a high-quality image can be provided. High reliability can also be achieved as a semiconductor device.

[0288] There are two types of LCD displays: TN (Twisted Nematic) mode, IPS (In-P lane-Switching) mode, FFS(Fringe Field Switching) mode, ching) mode, ASM(Axially Symmetric aligned) Micro-cell mode, OCB (Optical Compensated B) refrigeration mode, FLC (Ferroelectric Liquid d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0289] Furthermore, normally black type liquid crystal display devices, for example, those employing vertical alignment (VA) mode The liquid crystal display device may be a transmission type. For example, MVA (Multi-Domain Vertical Alignment) mode, PVA (Patterned Vertical Alignment) mode , ASV (Advanced Super View) mode, etc. can be used. It can also be applied to VA type liquid crystal display devices. VA type liquid crystal display devices are: It is a type of method for controlling the alignment of liquid crystal molecules in a liquid crystal display panel. VA type liquid crystal display devices are When no voltage is applied, the liquid crystal molecules are oriented perpendicular to the panel surface. In addition, a pixel is divided into several regions (subpixels), each of which is oriented in a different direction. This is called multi-domain or multi-domain design, which is designed to knock down molecules. The following method can be used.

[0290] In addition, in display devices, black matrices (light-shielding layers), polarizing members, phase difference members, reflecting members, Optical members (optical substrates) such as a protection member are provided as appropriate. For example, a polarizing substrate and a retardation substrate are provided as appropriate. Alternatively, a backlight or a sidelight may be used as the light source. It's fine.

[0291] In addition, the display method in the pixel section uses the progressive method, interlace method, etc. In addition, the color elements controlled by pixels when displaying colors are RGB (R is It is not limited to the three colors (red, green, and blue). For example, RGBW (W stands for white). , or RGB plus one or more colors such as yellow, cyan, magenta, etc. The size of the display area may be different for each dot of the color element. is not limited to color display devices, but also applies to monochrome display devices. It is also possible.

[0292] Furthermore, a light-emitting element that utilizes electroluminescence is used as a display element included in the display device. The light-emitting element using electroluminescence can be applied to a light-emitting material They are distinguished by whether they are organic or inorganic compounds, and generally, the former are organic E The latter is called an inorganic EL element.

[0293] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into the layers containing the light-emitting organic compounds, causing a current to flow. The recombination of the electrons and holes creates an excited state in the light-emitting organic compound. The excited state is then converted to the ground state, at which point light is emitted. Such a light-emitting element is called a current-excited light-emitting element.

[0294] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements depending on the element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor interaction that utilizes the donor and acceptor levels. Thin-film inorganic EL devices sandwich the light-emitting layer between dielectric layers. Furthermore, this structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner-shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0295] In order to extract light emitted from the light-emitting element, at least one of the pair of electrodes needs to be light-transmitting. Then, a transistor and a light emitting element are formed on the substrate, and light is extracted from the surface opposite to the substrate. There are various types of light sources, including top emission, bottom emission, and light emission from the substrate side and the opposite side of the substrate. There are light emitting elements with a double-sided emission structure that emits light from both sides, and light emitting elements of any emission structure can be applied. It is possible.

[0296] FIG. 10(B) shows an example of a light-emitting device using a light-emitting element as a display element. The photoelement 4513 is electrically connected to the transistor 4010 provided in the pixel portion 4002. The light-emitting element 4513 includes a first electrode layer 4030, an electroluminescent layer 4511, The second electrode layer 4031 has a stacked structure, but is not limited to the structure shown. The configuration of the light emitting element 4513 can be changed as needed to suit the direction of the light extracted from 3. Cut.

[0297] The partition wall 4510 is formed using an organic insulating material or an inorganic insulating material, particularly a photosensitive resin. An opening is formed on the first electrode layer 4030 using a material, and the sidewall of the opening has a continuous curved surface. It is preferable to form the inclined surface so as to have a certain slope.

[0298] The electroluminescent layer 4511 may be composed of a single layer or a plurality of layers stacked. It doesn't matter whether it's done or not.

[0299] The second electrode layer is formed to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4513. A protective film may be formed on the insulating film 4031 and the partition wall 4510. The protective film may be made of silicon nitride. A silicon nitride film, a silicon oxide film, a DLC film, etc. can be formed on the first substrate 400. The space sealed by the first substrate 4001, the second substrate 4006, and the sealing material 4005 is filled with a filler 45. 14 is provided and sealed. In this way, it is highly airtight and degassed so as not to be exposed to the outside air. Protective films with low wear (laminating films, UV-curing resin films, etc.) and covering materials It is preferable to package (enclose) the

[0300] Filler 4514 can be an inert gas such as nitrogen or argon, or an ultraviolet curing resin or Thermosetting resin can be used, and PVC (polyvinyl chloride), acrylic, polyimide Mido, epoxy resin, silicone resin, PVB (Polyvinyl Butyral) or EVA (Elastomer) For example, nitrogen may be used as a filler. stomach.

[0301] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, an anti-reflection film may be provided on the polarizing plate or the circular polarizing plate. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0302] It is also possible to provide electronic paper that drives electronic ink as a display device. Electronic paper is also called an electrophoretic display (electrophoretic display), and is a paper It is possible to make it as easy to read as a digital camera, consume less power than other display devices, and have a thinner and lighter form factor. This has the advantage that

[0303] The electrophoretic display device may have various forms, but it has a structure in which first particles having a positive charge and and a second particle having a negative charge. By applying an electric field to the microcapsules, The particles in the cell are moved in opposite directions to each other, and only the color of the particles that gather on one side is displayed. The first particles or the second particles contain a dye, and when there is no electric field, they move. The color of the first particle and the color of the second particle are different (including colorless). )

[0304] In this way, the electrophoretic display device moves materials with high dielectric constants to areas with high electric fields, so-called This is a display that utilizes the dielectrophoretic effect.

[0305] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. Color display is also possible by using color filters or particles containing pigments.

[0306] The first particles and the second particles in the microcapsules may be made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from magnetochromic materials, magnetophoretic materials, or a composite material thereof Just use it.

[0307] In addition, a display device using a twist ball display method can also be applied as electronic paper. The twist ball display method uses spherical particles painted in black and white as the display element. The first electrode layer and the second electrode layer are disposed between the first electrode layer and the second electrode layer. This is a display method that controls the orientation of spherical particles by creating a potential difference between the electrode layers. be.

[0308] 9 and 10, the first substrate 4001 and the second substrate 4006 are made of glass. In addition to the glass substrate, a flexible substrate can also be used, for example, a light-transmitting plastic substrate. As for plastic, FRP (Fibreglass) SS-Reinforced Plastics) plate, PVF (Polyvinyl Fluoride ) film, polyester film or acrylic resin film can be used. If transparency is not required, metal substrates such as aluminum and stainless steel (metal filters) can be used. For example, aluminum foil can be covered with PVF film or polyester film. It is also possible to use a sheet sandwiched between films.

[0309] In this embodiment, the insulating film 4020 is a film containing a metal element, which is converted into a metal oxide film by heat treatment. An aluminum oxide film is used as the insulating film.

[0310] The aluminum oxide film provided as the insulating film 4020 over the oxide semiconductor film is resistant to hydrogen, moisture, and It has a high blocking effect that prevents impurities such as urea and oxygen from passing through the membrane. stomach.

[0311] Therefore, the aluminum oxide film is free from hydrogen, which is a factor of fluctuation during and after the manufacturing process. The intrusion of impurities such as moisture into the oxide semiconductor film and the intrusion of the main component material of the oxide semiconductor The oxide semiconductor film functions as a protective film that prevents oxygen from being released from the oxide semiconductor film.

[0312] The insulating film 4021 functioning as a planarizing insulating film can be formed of a material such as acrylic, polyimide, or benzosilane. Heat-resistant organic materials such as clobutene resin, polyamide, and epoxy can be used. In addition to the above organic materials, low-k materials and siloxane resins can also be used. , PSG (phosphorus glass), BPSG (borophosphorus glass), etc. can be used. The insulating film may be formed by stacking a plurality of insulating films made of these materials.

[0313] The method for forming the insulating film 4021 is not particularly limited, and may be a sputtering method, a S OG method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, etc.), Printing methods (screen printing, offset printing, etc.), doctor knife, roll coater, car A ten coater, knife coater, or the like can be used.

[0314] A display device transmits light from a light source or a display element to display an image. All thin films such as the substrate, insulating film, and conductive film provided in the part are resistant to light in the visible light wavelength range. It shall be translucent.

[0315] A first electrode layer and a second electrode layer (a pixel electrode layer, a common electrode layer, a pair of electrodes) that apply a voltage to the display element In the case of a light-emitting diode (also called a counter electrode layer), the direction of the light to be extracted, the location of the electrode layer, and The light transmission property or reflectivity can be selected depending on the pattern structure of the electrode layer.

[0316] The first electrode layer 4030 and the second electrode layer 4031 are made of an indium oxide containing tungsten oxide. oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide containing titanium oxide, indium tin oxide, indium zinc oxide , silicon oxide-doped indium tin oxide, graphene, and other transparent conductive materials Fees can be used.

[0317] The first electrode layer 4030 and the second electrode layer 4031 are made of tungsten (W) and molybdenum. (Mo), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (N b), Tantalum (Ta), Chromium (Cr), Cobalt (Co), Nickel (Ni), Titanium Metals such as titanium (Ti), platinum (Pt), aluminum (Al), copper (Cu), and silver (Ag), It can be formed by using one or more of the metals, alloys thereof, or metal nitrides thereof. Cut.

[0318] The first electrode layer 4030 and the second electrode layer 4031 are made of a conductive polymer (conductive polymer). The conductive polymer can be formed using a conductive composition containing a conductive polymer. For example, a so-called π-electron conjugated conductive polymer can be used. or its derivatives, polypyrrole or its derivatives, polythiophene or its derivatives, or or a copolymer consisting of two or more of aniline, pyrrole and thiophene, or a derivative thereof Conductors and the like are examples.

[0319] In addition, since transistors are easily damaged by static electricity, a protection circuit for protecting the drive circuit is required. It is preferable that the protection circuit is configured using a non-linear element.

[0320] As described above, by using the transistor described in any of Embodiments 1 to 6, various It is possible to provide semiconductor devices having various functions.

[0321] (Embodiment 8) The transistor exemplified in any one of the first to sixth embodiments is used to read information on an object. Therefore, a semiconductor device having an image sensor function for detecting a pixel can be manufactured.

[0322] FIG. 11A shows an example of a semiconductor device having an image sensor function. FIG. 11(B) is a cross-sectional view showing a part of the photosensor. .

[0323] The photodiode 602 has one electrode connected to a photodiode reset signal line 658 and the other One electrode is electrically connected to the gate of transistor 640. One of the source and drain is connected to the photosensor reference signal line 672, and the other of the source and drain is connected to the photosensor reference signal line 673. The other terminal is electrically connected to one of the source and drain terminals of the transistor 656. The transistor 656 has a gate connected to a gate signal line 659 and a source or drain connected to a photodiode. The signal line 671 is electrically connected to the sensor output signal line 671.

[0324] Note that in the circuit diagrams in this specification, a transistor including an oxide semiconductor film is not clearly shown. To make it easy to identify, the symbol for a transistor using an oxide semiconductor film is written as “OS.” In FIG. 11A, a transistor 640 and a transistor 656 are the same as those in Embodiment 1. The transistors described in any of the above to 6 can be used, and are transistors including an oxide semiconductor film. In this embodiment, a transistor having a structure similar to that of the transistor 440 described in Embodiment 1 is used. An example of applying a transistor is shown below.

[0325] FIG. 11B shows a photodiode 602 and a transistor 640 in the photosensor. 6 is a cross-sectional view of a substrate 601 (TFT substrate) having an insulating surface, on which a sensor function is provided. A photodiode 602 and a transistor 640 are provided. A substrate 613 is provided on the board 602 and the transistor 640 using an adhesive layer 608. There are.

[0326] An insulating film 631, an interlayer insulating film 633, and an interlayer insulating film 634 are provided on the transistor 640. The photodiode 602 is provided on the interlayer insulating film 633. 3 and an electrode layer 642 formed on the interlayer insulating film 634. , a first semiconductor film 606a, a second semiconductor film 606b, and a third semiconductor film 606c are formed in this order from the interlayer insulating film 633 side. It has a structure in which a semiconductor film 606c is stacked.

[0327] The electrode layer 641 is electrically connected to a conductive layer 643 formed on the interlayer insulating film 634. 642 is electrically connected to the conductive layer 645 via the electrode layer 641. The conductive layer 645 is The photodiode 602 is electrically connected to the gate electrode layer of the transistor 640. It is electrically connected to the transistor 640 .

[0328] Here, the first semiconductor film 606a is a semiconductor film having a p-type conductivity, and the second semiconductor film 606b is a high resistance semiconductor film (I-type semiconductor film), and the third semiconductor film 606c is an n-type A pin-type photodiode in which semiconductor films having different conductivity types are stacked is shown as an example.

[0329] The first semiconductor film 606a is a p-type semiconductor film, and is an amorphous film containing an impurity element that imparts p-type. The first semiconductor film 606a can be formed from a group 13 silicon film. Using semiconductor material gas containing impurity elements (e.g., boron (B)), plasma CVD is used. Silane (SiH4) can be used as the semiconductor material gas. Alternatively, i2H6, SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may be used. In addition, after forming an amorphous silicon film that does not contain impurity elements, the film is formed by diffusion or ion implantation. Impurity elements may be introduced into the amorphous silicon film by using a method such as ion implantation. It is preferable to diffuse the impurity element by heating or the like after introducing the impurity element. In this case, the amorphous silicon film can be formed by LPCVD, vapor phase growth, Alternatively, sputtering or the like may be used. The thickness of the first semiconductor film 606a is 10 nm or more and 5 nm or less. It is preferable to form it so that the thickness is 0 nm or less.

[0330] The second semiconductor film 606b is an I-type semiconductor film (intrinsic semiconductor film) and is made of amorphous silicon. The second semiconductor film 606b is formed by amorphous silicon using a semiconductor material gas. A thick silicon film is formed by plasma CVD. The semiconductor material gas is silane. (SiH4) can be used. Alternatively, Si2H6, SiH2Cl2, SiHCl3, S The second semiconductor film 606b may be formed by LPCVD. The second semiconductor film 606b may be formed by vapor deposition, sputtering, or the like. It is preferable to form the film so that the thickness is 00 nm or more and 1000 nm or less.

[0331] The third semiconductor film 606c is an n-type semiconductor film and is an amorphous film containing an impurity element that imparts n-type. The third semiconductor film 606c is formed of a thick silicon film. It is formed by the plasma CVD method using a semiconductor material gas containing silicon (e.g., phosphorus (P)). Silane (SiH4) can be used as the semiconductor material gas. SiH2Cl2, SiHCl3, SiCl4, SiF4, etc. may also be used. After forming an amorphous silicon film that does not contain elements, the film is then doped with silicon using diffusion or ion implantation. An impurity element may be introduced into the amorphous silicon film by ion implantation or the like. After the element is introduced, the impurity element may be diffused by heating or the like. The amorphous silicon film can be formed by LPCVD, vapor phase growth, or sputtering. The thickness of the third semiconductor film 606c is 20 nm or more and 200 nm or less. It is preferable to form it so that it faces downward.

[0332] The first semiconductor film 606a, the second semiconductor film 606b, and the third semiconductor film 606c are Instead of an amorphous semiconductor, it may be formed using a polycrystalline semiconductor, or a microcrystalline (semi-amorphous) semiconductor. Semi Amorphous Semiconductor (SAS) )) may be used.

[0333] Considering the Gibbs free energy, microcrystalline semiconductors are metastable, intermediate between amorphous and single crystal. In other words, a semiconductor with a third state that is stable in terms of free energy It has a short-range order and lattice distortion. Microcrystalline silicon, a typical example of a microcrystalline semiconductor, is characterized by its Raman scattering. The spectrum shows single-crystal silicon at 520 cm -1 It is shifted to the lower wavenumber side. That is, 520 cm, which indicates single crystal silicon -1 and 480 cm, which indicates amorphous silicon - 1 The Raman spectrum of microcrystalline silicon has a peak between these two. Contains at least 1 atomic % or more of hydrogen or halogen to terminate the bonding bonds. It also contains rare gas elements such as helium, argon, krypton, and neon. By increasing the lattice distortion, the stability is increased and a good microcrystalline semiconductor film can be obtained. .

[0334] This microcrystalline semiconductor film is formed by a high-frequency plasma CVD method with a frequency of several tens to several hundreds of MHz, or Alternatively, it can be formed by a microwave plasma CVD device with a frequency of 1 GHz or more. Representative examples include SiH4, Si2H6, SiH2Cl2, SiHCl3, SiCl4, and S It can be formed by diluting silicon-containing compounds such as iF4 with hydrogen. In addition to compounds containing hydrogen (e.g., silicon hydride) and hydrogen, helium, argon, krypton, neon forming a microcrystalline semiconductor film by diluting the semiconductor film with one or more rare gas elements selected from the group consisting of fluorine and fluorine; In these cases, the flow rate ratio of hydrogen to silicon-containing compounds (e.g., silicon hydride) is 5 times or more and 200 times or less, preferably 50 times or more and 150 times or less, and more preferably 100 times Furthermore, in the gas containing silicon, carbide gases such as CH4, C2H6, GeH 4. Germanium gas such as GeF4, F2, etc. may be mixed.

[0335] In addition, the mobility of holes generated by the photoelectric effect is smaller than that of electrons, so the pin-type The photodiode exhibits better characteristics when the p-type semiconductor film side is used as the light receiving surface. From the surface of the substrate 601 on which the in-type photodiode is formed to the photodiode 602 This shows an example of converting the light received by the semiconductor film into an electrical signal. Since light from the semiconductor film side having a pattern becomes disturbance light, a conductive film with light blocking properties is used for the electrode layer. It is also possible to use the n-type semiconductor film side as the light-receiving surface.

[0336] The interlayer insulating film 633 and the interlayer insulating film 634 are made of insulating materials, and depending on the material, , sputtering method, plasma CVD method, SOG method, spin coating, dip, spray Coating, droplet ejection method (inkjet method, etc.), printing method (screen printing, offset printing, etc.) ), doctor knife, roll coater, curtain coater, knife coater, etc. It can be achieved.

[0337] In this embodiment, the insulating film 631 is formed by converting a film containing a metal element into a metal oxide film by heat treatment. The insulating film 631 is formed by sputtering or plasma. It can be formed by a chemical vapor deposition (CVD) method.

[0338] The aluminum oxide film provided as the insulating film 631 over the oxide semiconductor film is resistant to hydrogen, moisture, and the like. High blocking effect that prevents both impurities and oxygen from passing through the membrane .

[0339] Therefore, the aluminum oxide film is free from hydrogen, which is a factor of fluctuation during and after the manufacturing process. The intrusion of impurities such as moisture into the oxide semiconductor film and the intrusion of the main component material of the oxide semiconductor The oxide semiconductor film functions as a protective film that prevents oxygen from being released from the oxide semiconductor film.

[0340] The interlayer insulating films 633 and 634 function as planarizing insulating films to reduce surface irregularities. The interlayer insulating films 633 and 634 are preferably made of, for example, polyimide or acrylic. Heat-resistant organic resins such as resins, benzocyclobutene-based resins, polyamides, and epoxy resins In addition to the organic insulating materials, low-dielectric-constant materials (low- k material), siloxane resin, PSG (phosphor glass), BPSG (borophosphor glass), etc. A single layer or a laminated layer can be used.

[0341] By detecting light 622 incident on the photodiode 602, information on the object to be detected is obtained. When reading the information of the detected object, a light source such as a backlight is used. It can be used.

[0342] As described above, the oxide semiconductor including the low resistance region sandwiching the channel formation region in the channel length direction is The transistor having the thin film has high on-state characteristics (for example, on-state current and field-effect mobility). Therefore, high-speed operation and high-speed response are possible. Furthermore, miniaturization can be achieved. By using the capacitor, a high-performance and highly reliable semiconductor device can be provided.

[0343] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

[0344] (Embodiment 9) The transistor exemplified in any one of the first to sixth embodiments is a transistor stacked in a plurality of layers. The present invention can be suitably applied to a semiconductor device having an integrated circuit. As an example of a semiconductor device, a storage medium (memory element) will be shown.

[0345] In this embodiment mode, a transistor which is a first transistor manufactured over a single crystal semiconductor substrate A second semiconductor film is formed above the transistor 140 via an insulating film. A semiconductor device including the transistor 162 is manufactured. The transistors exemplified in any of the above paragraphs 1 to 6 are suitable for use as the transistor 162. In this embodiment, the transistor 162 is the same as the transistor described in Embodiment 1. An example using a transistor having a structure similar to that of transistor 440 will be shown.

[0346] The semiconductor materials and structures of the stacked transistors 140 and 162 may be the same. In this embodiment, a suitable circuit for a storage medium (memory element) is These are examples using transistors of different materials and structures.

[0347] 12A and 12B show an example of the configuration of a semiconductor device. 12(B) shows a plan view of the semiconductor device. This corresponds to the cross section taken along lines C1-C2 and D1-D2 in FIG. 12(B). An example of a circuit diagram in the case where the semiconductor device is used as a memory element is shown in FIG. The semiconductor device shown in FIG. 12(B) has a transistor using a first semiconductor material in the lower part. The second semiconductor material is used as the second transistor 162. In the embodiment, the first semiconductor material is a semiconductor material other than an oxide semiconductor, and the second semiconductor material is The oxide semiconductor is a semiconductor material other than the oxide semiconductor. Use of ruthenium, silicon germanium, silicon carbide, or gallium arsenide It is preferable to use a single crystal semiconductor, since it is possible to achieve the above. Alternatively, an organic semiconductor material may be used. Transistors using such semiconductor materials are easy to operate at high speeds. The characteristics of transistors using semiconductors enable them to retain charge for long periods of time.

[0348] A method for manufacturing the semiconductor device in FIG. 12 will be described with reference to FIGS.

[0349] The transistor 140 is disposed on a substrate 185 that includes a semiconductor material (e.g., silicon). The channel forming region 116 is formed by doping the impurity ions 116. A region 120, a metal compound region 124 in contact with the impurity region 120, and a channel forming region 1 A gate insulating film 108 is provided on the gate electrode 16, and a gate electrode 109 is provided on the gate insulating film 108. The electrode 110 is a ferroelectric material.

[0350] The substrate 185 containing the semiconductor material may be a single crystal semiconductor substrate such as silicon or silicon carbide, a polycrystalline semiconductor substrate, or a The substrates used include crystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, and SOI substrates. Generally, an "SOI substrate" is a substrate in which a silicon semiconductor film is provided on an insulating surface. However, in this specification, it refers to a substrate having a structure in which a material other than silicon is formed on an insulating surface. In other words, the semiconductor film of the "SOI substrate" The film is not limited to a silicon semiconductor film. In addition, the SOI substrate can be made of an insulating material such as a glass substrate. The term "semiconductor film" includes a structure in which a semiconductor film is provided on a substrate via an insulating film.

[0351] The SOI substrate is fabricated by implanting oxygen ions into a mirror-polished wafer and then heating it at high temperature. By doing so, an oxide layer is formed at a certain depth from the surface, and the cracks that have occurred in the surface layer are removed. a method for eliminating microvoids formed by hydrogen ion irradiation and a method for forming microvoids by heat treatment A method of cleaving a semiconductor substrate by using a length, or a method of forming a single crystal semiconductor film by crystal growth on an insulating surface. A method for forming the above-mentioned film or the like can be used.

[0352] For example, ions are added from one surface of a single crystal semiconductor substrate to form a single crystal semiconductor substrate. A weakened layer is formed at a certain depth from the surface of the single crystal semiconductor substrate, and the single crystal semiconductor substrate is An insulating film is formed on either one of the single crystal semiconductor substrate and the element substrate. While the substrates are stacked together, a crack is generated in the weakened layer, and the single crystal semiconductor substrate is separated at the weakened layer. A heat treatment is performed to form a single crystal semiconductor film on the element substrate as a semiconductor film from the single crystal semiconductor substrate. The SOI substrate manufactured by the above method can also be suitably used.

[0353] An element isolation insulating layer 106 is provided on the substrate 185 so as to surround the transistor 140. In order to achieve high integration, the transistor 140 may be It is desirable to have a structure that does not have a sidewall insulating layer that becomes a sidewall. When the characteristics of the gate electrode 140 are important, a side wall is formed on the side surface of the gate electrode 110. A wall insulating layer may be provided to provide impurity regions 120 including regions with different impurity concentrations.

[0354] The transistor 140 using a single crystal semiconductor substrate can operate at high speed. By using this transistor as a readout transistor, it is possible to read out information at high speed. Two insulating films are formed to cover the transistor 140. As a process before forming the capacitor 162 and the capacitor element 164, the two insulating film layers are subjected to CMP. Then, the planarized insulating film 128 and the insulating film 130 are formed, and at the same time, the upper surface of the gate electrode 110 is Expose.

[0355] The insulating film 128 and the insulating film 130 are typically made of a silicon oxide film, a silicon oxynitride film, or an oxide Aluminum film, aluminum oxynitride film, silicon nitride film, aluminum nitride film, nitride An inorganic insulating film such as a silicon oxide film or an aluminum nitride oxide film can be used. The film 128 and the insulating film 130 are formed by using a plasma CVD method, a sputtering method, or the like. It is possible.

[0356] In addition, organic materials such as polyimide, acrylic resin, and benzocyclobutene resin can be used. In addition to the above organic materials, low-dielectric-constant materials (low-k materials) can also be used. When organic materials are used, insulating films can be formed by wet methods such as spin coating and printing. 128 and an insulating film 130 may be formed.

[0357] Note that the insulating film 130 that is in contact with the semiconductor film is a silicon oxide film.

[0358] In this embodiment, the insulating film 128 is formed by sputtering an oxynitride film having a thickness of 50 nm. A silicon film is formed, and an oxide film having a thickness of 550 nm is formed by a sputtering method as the insulating film 130. A silicon film is formed.

[0359] A semiconductor film is formed on the insulating film 130 that has been sufficiently planarized by CMP processing. In this study, we used an In-Ga-Zn oxide target as a semiconductor film and sputtered it. An oxide semiconductor film is formed.

[0360] Next, the oxide semiconductor film is selectively etched to form an island-shaped oxide semiconductor film 144 . A source electrode or drain electrode 142 a is formed on the oxide semiconductor film 144 . The rain electrode 142b is formed.

[0361] A gate insulating film 146 and a gate electrode layer 148 are formed over the oxide semiconductor film. 148 is formed by forming a conductive layer and then selectively etching the conductive layer. The gate insulating film 146 can be formed by forming an insulating film using the gate electrode layer 148 as a mask. It is formed by etching.

[0362] The gate insulating film 146 is formed by depositing an oxide film using a plasma CVD method, a sputtering method, or the like. Silicon film, silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide Aluminum film, aluminum nitride film, aluminum oxynitride film, aluminum nitride oxide film, aluminum oxide film A gallium oxide film or a gallium oxide film can be formed.

[0363] Gate electrode 110, source or drain electrode 142a, source or drain electrode The conductive layer that can be used for the electrode 142b can be formed by a PVD method such as a sputtering method. The conductive layer can be formed by a CVD method such as a plasma CVD method. The materials include elements selected from Al, Cr, Cu, Ta, Ti, Mo, and W, as well as the above-mentioned elements. Alloys containing elements such as Mn, Mg, Zr, Be, Nd, and Sc can be used. Any one of these materials or a combination of two or more of these materials may be used.

[0364] The conductive layer may have a single layer structure or a laminated structure of two or more layers. single-layer structure of silicon film or titanium nitride film, single-layer structure of aluminum film containing silicon, Two-layer structure with titanium film laminated on titanium nitride film, two-layer structure with titanium film laminated on titanium nitride film Examples include a three-layer structure in which a titanium film, an aluminum film, and a titanium film are laminated. In addition, when the conductive layer has a single layer structure of a titanium film or a titanium nitride film, a tapered shape is The source or drain electrode 142a and the source or drain electrode 142 It has the advantage of being easy to process into b.

[0365] Next, an oxide semiconductor layer is formed on the oxide semiconductor layer 144, the gate insulating film 146, and the gate electrode layer 148. A film containing a metal element is formed in contact with a part of the conductor film 144. In this embodiment, An aluminum film is formed as the film containing elements.

[0366] The dopant (boron in this embodiment) passes through the film containing a metal element and enters the oxide semiconductor film 144. The oxide semiconductor film 144 containing the dopant and the film containing the metal element are in contact with each other. By the heat treatment, metal is transferred from the film containing a metal element to the oxide semiconductor film 144. A low-resistance region containing a dopant and a metal element is formed in the oxide semiconductor film 144. Therefore, the low resistance regions containing the dopant and the metal element are formed on both sides of the channel forming region. The transistor 162 can be manufactured including the oxide semiconductor film 144 including the oxide semiconductor region.

[0367] The oxide semiconductor film 144 includes a low-resistance region and a channel formation region sandwiched between the oxide semiconductor film 144 in the channel length direction. By this, the transistor 162 has on-characteristics (e.g., on-current and field-effect transport This allows for high speed operation and response.

[0368] The low resistance region can function as a source region or a drain region. By providing the low-resistance region, the electric field applied to the channel forming region formed between the low-resistance regions is reduced. In addition, in the low resistance region, the oxide semiconductor film 144 and the source electrode The source or drain electrode 142a and the source or drain electrode 142b are electrically connected to each other. By connecting the oxide semiconductor film 144 and the source electrode or the drain electrode 142 a, and the contact resistance with the source electrode or the drain electrode 142b can be reduced. .

[0369] Furthermore, by the heat treatment for introducing the metal element from the film containing the metal element, The film containing the metal element is a film 150 containing a metal element. For example, the metal film used as the film containing a metal element is The film 150 containing the metal element becomes a metal oxide insulating film. In this embodiment, the film containing the metal element is aluminum. The aluminum oxide film is made of a metal. Since it is an oxide insulating film, it can be used as an insulating film.

[0370] An aluminum oxide film provided as a film 150 containing a metal element over the oxide semiconductor film 144 The blocking effect (blocking effect) prevents impurities such as hydrogen and moisture, as well as oxygen, from passing through the membrane. The effect is high.

[0371] Therefore, the aluminum oxide film is free from hydrogen, which is a factor of fluctuation during and after the manufacturing process. The inclusion of impurities such as moisture in the oxide semiconductor film 144 and the inclusion of a main component constituting the oxide semiconductor The oxide semiconductor film 144 functions as a protective film for preventing oxygen, which is a material, from being released from the oxide semiconductor film 144.

[0372] In addition, the film 150 containing the metal element is removed, or a separate film is stacked on the film 150 containing the metal element. An insulating film may be formed.

[0373] The insulating film is a silicon oxide film formed by plasma CVD or sputtering. Silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum nitride film, oxide Aluminum film, aluminum oxynitride film, aluminum nitride oxide film, hafnium oxide film Alternatively, a gallium oxide film can be used.

[0374] On the film 150 containing a metal element, a portion overlapping with the source electrode or drain electrode 142a is An electrode layer 153 is formed in the region.

[0375] Next, the insulating film 152 is formed over the transistor 162 and the film 150 containing a metal element. The insulating film 152 can be formed by a sputtering method, a CVD method, or the like. , silicon oxide, silicon oxynitride, silicon nitride, hafnium oxide, aluminum oxide The insulating layer 10 can be formed using a material containing an inorganic insulating material such as the above.

[0376] Next, a source electrode is formed on the gate insulating film 146, the film 150 containing a metal element, and the insulating film 152. Alternatively, an opening is formed that reaches the drain electrode 142b. The opening is formed using a mask or the like. This is done by selective etching using a metal or the like.

[0377] Thereafter, a wiring 156 that contacts the source electrode or drain electrode 142b is formed in the opening. 12 shows the connection point between the source electrode or drain electrode 142b and the wiring 156. is not shown.

[0378] The wiring 156 is formed by a PVD method such as a sputtering method, or a C method such as a plasma CVD method. After forming a conductive layer using the VD method, the conductive layer is etched to form The material of the conductive layer is selected from Al, Cr, Cu, Ta, Ti, Mo, and W. The elements mentioned above and alloys containing the elements mentioned above can be used. Any one of R, Be, Nd, and Sc, or a combination of these materials may be used. The details are similar to those of the source electrode or drain electrode 142a.

[0379] Through the above steps, the transistor 162 and the capacitor 164 are completed. The oxide semiconductor film 144 is highly purified and contains excess oxygen to compensate for oxygen vacancies. Therefore, the transistor 162 has suppressed fluctuations in electrical characteristics, and The capacitor 164 is electrically stable. Electrode layer 153.

[0380] If capacitance is not required, the capacitor 164 may not be provided.

[0381] FIG. 12C shows an example of a circuit diagram in which the semiconductor device is used as a memory element. In FIG. 12C, one of the source electrode and the drain electrode of the transistor 162 is One of the electrodes of the capacitor 164 and the gate electrode of the transistor 140 are electrically connected. In addition, the first wiring (also called the source line) and the transistor The source electrode of 140 is electrically connected to the second wiring (2nd Line: bit line The drain electrode of the transistor 140 is electrically connected to the drain electrode of the transistor 140. The third wiring (also called the first signal line) and the source of the transistor 162 The other of the drain electrode and the drain electrode is electrically connected to a fourth wiring (4th Line The second signal line (also referred to as a second signal line) and the gate electrode of the transistor 162 are electrically connected to each other. The fifth line (also called a word line) and the capacitor element 16 The other of the four electrodes is electrically connected.

[0382] The transistor 162 including an oxide semiconductor has an extremely low off-state current. Therefore, by turning off the transistor 162, the source of the transistor 162 One of the electrodes or drain electrodes of the capacitor 164 and the transistor 140 The potential of the node (hereinafter referred to as node FG) electrically connected to the gate electrode of Furthermore, by having the capacitance element 164, This makes it easier to retain the charge given to the gate FG and to read out the retained information. becomes.

[0383] When storing (writing) information in the semiconductor device, first, the potential of the fourth wiring is set to This sets the potential at which the transistor 162 is turned on, turning the transistor 162 on. As a result, the potential of the third wiring is supplied to the node FG, and a predetermined amount of charge is accumulated in the node FG. Here, the charges that give two different potential levels (hereinafter referred to as low level Either a charge or a high level charge is given. The potential of the fourth wiring is set to a potential that turns off the transistor 162. By turning off 162, node FG is in a floating state, so As described above, a predetermined amount of charge is stored in the node FG. By storing and holding information, the memory cell can store information.

[0384] Since the off-state current of the transistor 162 is extremely small, the charge supplied to the node FG is retained for a long time. Therefore, no refresh operation is required or the data is retained for a certain period of time. It is possible to reduce the frequency of cleaning operations extremely, and power consumption can be reduced significantly. In addition, even if there is no power supply, the memory contents can be retained for a long period of time. It is possible.

[0385] When reading out the stored information (reading), a predetermined potential (constant potential) is applied to the first wiring. In this state, when an appropriate potential (read potential) is applied to the fifth wiring, the potential is held at the node FG. Depending on the amount of charge transferred, transistor 140 assumes different states. If 40 is an n-channel type, when a high level charge is held at node FG, The apparent threshold voltage V of transistor 140 th_H A low-level charge is applied to node FG. The apparent threshold voltage V of transistor 140 when held th_L It became lower Here, the apparent threshold is the voltage at which the transistor 140 is turned on. Therefore, the potential of the fifth wiring is V th _H and V th_L By setting the potential V0 between For example, if a high level charge is applied during writing, The potential of the wire 5 is V0 (> V th_H ), transistor 140 is in the "on state" When a low level charge is applied, the potential of the fifth wire becomes V0( <V th _L ), transistor 140 remains in the "off state." The potential of the wiring is controlled to read out the on / off state of the transistor 140 (second The stored information can be read out by reading out the potential of the wiring.

[0386] When the stored information is rewritten, a predetermined amount of electricity is consumed by the rewriting. By supplying a new potential to node FG, which holds the load, node FG is connected to the new information. Specifically, the potential of the fourth wiring is set to a value corresponding to the potential of the fourth wiring when the transistor 162 is turned on. This turns on the transistor 162. A potential (potential related to new information) is supplied to node FG, and a predetermined amount of charge is accumulated in node FG. After that, the potential of the fourth wiring is set to a potential that turns off the transistor 162. By turning off the transistor 162, the node FG receives the new information. That is, a predetermined amount of charge is stored in the node FG by the first write. While the charge is held, the same operation as the first write (second write) is performed. , it is possible to overwrite the stored information.

[0387] The transistor 162 described in this embodiment is a highly purified, oxygen-free transistor disclosed in this specification. By using an oxide semiconductor film containing an excess amount of ZnO as the oxide semiconductor film 144, the transistor 162 The off-state current of the transistor can be sufficiently reduced. As a result, a semiconductor device capable of retaining stored data for an extremely long period of time can be obtained.

[0388] As described above, the oxide semiconductor including the low resistance region sandwiching the channel formation region in the channel length direction is The transistor having the thin film has a low off-state current and good on-state characteristics (e.g., on-state current and field effect). The high mobility (resulting mobility) allows for high-speed operation and high-speed response. By using the transistor, a high-performance and highly reliable semiconductor device can be provided. Cut.

[0389] As described above, the configurations, methods, etc. shown in this embodiment may be applied to the configurations, methods, etc. shown in other embodiments. They can be used in any suitable combination.

[0390] (Embodiment 10) The semiconductor device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras, digital video cameras cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), ), portable game machines, personal digital assistants, audio playback devices, large game machines such as pachinko machines, etc. Examples of electronic devices including the semiconductor device described in the above embodiment will be described. Reveal.

[0391] FIG. 13A shows a notebook personal computer, which includes a main body 3001 and a housing 300 2, a display unit 3003, a keyboard 3004, etc. By applying the semiconductor device shown in any one of the above to 9 to the display portion 3003, high performance and A highly reliable notebook-type personal computer can be obtained.

[0392] FIG. 13B shows a personal digital assistant (PDA), which has a main body 3021 including a display unit 3023 and a An external interface 3025 and operation buttons 3024 are provided. The semiconductor device shown in any of the first to ninth embodiments has a stylus 3022 as an accessory. By applying the body device to the display unit 3023, a more high-performance and highly reliable mobile information terminal can be obtained. (PDA).

[0393] FIG. 13C shows an example of an electronic book. For example, the electronic book has a housing 2701 and The housing 2701 and the housing 2703 are made up of two housings. The opening and closing operation can be performed with the shaft portion 2711 as an axis. This configuration allows the device to function like a paper book.

[0394] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a sentence is displayed on the right display unit (display unit 2705 in FIG. 13C), and An image can be displayed on the display portion (the display portion 2707 in FIG. 13C). The semiconductor device shown in any one of 1 to 9 can be applied to the display portion 2705 and the display portion 2707. As a result, a high performance and highly reliable e-book can be obtained. When using a transmissive or reflective LCD device, it is expected that it will be used in relatively bright conditions. Therefore, solar panels will be installed to generate electricity and charge the battery. It is also possible to use a lithium-ion battery as the battery, which can be made smaller. This has the advantage of being able to

[0395] FIG. 13C shows an example in which an operation unit and the like are provided in the housing 2701. For example, The housing 2701 includes a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The back of the housing may be provided with a keyboard, a pointing device, etc. On the front and sides, there are external connection terminals (earphone terminal, USB terminal, etc.), a recording medium insertion port, etc. Furthermore, the electronic book may be configured to have a function as an electronic dictionary. You may do so.

[0396] The electronic book may also be configured to be capable of transmitting and receiving information wirelessly. It is also possible to purchase and download desired book data from the server. be.

[0397] FIG. 13D shows a mobile phone that is configured with two housings, a housing 2800 and a housing 2801. The housing 2801 contains a display panel 2802, a speaker 2803, a microphone, and 2804, pointing device 2806, camera lens 2807, external connection terminal 2808. The housing 2800 also includes a solar cell for charging the mobile phone. The antenna is mounted on the housing 28 The semiconductor device according to any one of the first to ninth embodiments is incorporated in the display panel. By applying this to the Nel 2802, a high performance and highly reliable mobile phone can be achieved. .

[0398] The display panel 2802 is equipped with a touch panel, and the image displayed on the display panel 2802 is shown in FIG. The multiple operation keys 2805 are indicated by dotted lines. It also has a boost circuit to boost the voltage required for each circuit.

[0399] The display direction of the display panel 2802 changes appropriately depending on the usage mode. The camera lens 2807 is located on the same surface as the camera lens 2802, so video calls are possible. The speaker 2803 and microphone 2804 are not limited to voice calls, but also to video calls, Recording and playback are possible. Furthermore, the housing 2800 and the housing 2801 can be slid apart. As shown in 13(D), it can be folded from the unfolded state to the overlapped state, making it suitable for carrying. This makes it possible to miniaturize the device.

[0400] The external connection terminal 2808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 2811, it is possible to store and transfer a larger amount of data. do.

[0401] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0402] FIG. 13(E) shows a digital video camera, which includes a main body 3051, a display unit (A) 3057, Eyepiece 3053, operation switch 3054, display unit (B) 3055, battery 3056, etc. The semiconductor device according to any one of the first to ninth embodiments is configured as a display device. By applying this to (A) 3057 and display (B) 3055, high performance and high reliability can be achieved. The image capturing apparatus may be a digital video camera.

[0403] 13(F) shows an example of a television device. The television device has a housing 96 The display unit 9603 is incorporated in the camera body 9601. The display unit 9603 can display images. In this example, the housing 9601 is supported by a stand 9605. The semiconductor device described in any of Embodiments 1 to 9 is applied to the display portion 9603. This makes it possible to provide a television device with high performance and reliability.

[0404] The television set can be operated using an operation switch on the housing 9601 or a separate remote control. In addition, the remote control device can be configured to output the A display unit for displaying information may be provided.

[0405] The television device is assumed to be equipped with a receiver, modem, etc. It can receive television broadcasts and can also communicate by wire or wireless via a modem. By connecting to a network, you can send and receive data in one direction (sender to receiver) or two directions (sender to receiver). It is also possible to communicate information between the recipient and the receiver, or between receivers themselves.

[0406] This embodiment mode can be implemented by being appropriately combined with the configurations described in other embodiments. is.

Claims

1. A semiconductor device comprising a first transistor, a second transistor, and a capacitance element, a channel formation region of the first transistor includes silicon; a channel formation region of the second transistor includes an oxide semiconductor; a gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and one electrode of the capacitor element are electrically connected to each other; a first conductive layer having a region located above a channel formation region of the first transistor and functioning as a gate electrode of the first transistor; a first insulating layer having a region in contact with a side surface of the first conductive layer; a second insulating layer having a region located above the first insulating layer; an oxide semiconductor layer having a region located above the second insulating layer and including a channel formation region of the second transistor; a second conductive layer having a region in contact with a top surface of the oxide semiconductor layer and a region in contact with a top surface of the first conductive layer and functioning as one of a source electrode and a drain electrode of the second transistor; a third insulating layer having a region located above the oxide semiconductor layer; a third conductive layer having a region overlapping with the oxide semiconductor layer with the third insulating layer interposed therebetween and functioning as a gate electrode of the second transistor; a fourth conductive layer having a region overlapping with the second conductive layer and functioning as the other electrode of the capacitor element; The first conductive layer has a region that overlaps with the second conductive layer and also overlaps with the fourth conductive layer.

2. A semiconductor device comprising a first transistor, a second transistor, and a capacitance element, a channel formation region of the first transistor includes silicon; a channel formation region of the second transistor includes an oxide semiconductor; a gate electrode of the first transistor, one of a source electrode and a drain electrode of the second transistor, and one electrode of the capacitor element are electrically connected to each other; a first conductive layer having a region located above a channel formation region of the first transistor and functioning as a gate electrode of the first transistor; a first insulating layer having a region in contact with a side surface of the first conductive layer; a second insulating layer having a region located above the first insulating layer; an oxide semiconductor layer having a region located above the second insulating layer and including a channel formation region of the second transistor; a second conductive layer having a region in contact with a top surface of the oxide semiconductor layer and a region in contact with a top surface of the first conductive layer and functioning as one of a source electrode and a drain electrode of the second transistor; a third insulating layer having a region located above the oxide semiconductor layer; a third conductive layer having a region overlapping with the oxide semiconductor layer with the third insulating layer interposed therebetween and functioning as a gate electrode of the second transistor; a fourth conductive layer having a region overlapping with the second conductive layer and functioning as the other electrode of the capacitor element; the first conductive layer has a region overlapping the second conductive layer and also overlapping the fourth conductive layer; the oxide semiconductor layer does not have a region overlapping with a channel formation region of the second transistor.

3. In claim 1 or 2, The fourth conductive layer has a thickness different from that of the third conductive layer.

Images