Processing apparatus and processing method

Abstract

To enable the formation of more devices on a semiconductor wafer while allowing the wafer to be positioned in a predetermined orientation.SOLUTION: A processing method is a processing method for a semiconductor wafer which includes a surface, a back surface of the surface, and the side surface extending from the surface to the back surface, and a flat mirror surface indicating the crystal orientation of a semiconductor wafer on its side, and the method comprises a detection step 101 for detecting the flat mirror surface of the semiconductor wafer, and a storing step 102 for storing the semiconductor wafer in a wafer cassette such that the flat mirror surface faces a predetermined orientation.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a processing apparatus and a processing method for semiconductor wafers. [Background technology]

[0002] A wafer made of a semiconductor material has a notch, an orientation flat, or other notch formed on the periphery of the wafer as a mark indicating the crystal orientation of the wafer.

[0003] Notches and orientation flats are used to roughly align wafers in the semiconductor device manufacturing process. Notches on the outer edge of the wafer are detected within various equipment used in the semiconductor device manufacturing process, and the wafer is positioned in a specified orientation based on the position of the notch.

[0004] For this reason, a method of detecting a notch or the like has been conventionally used (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Publication No. 2022-072520 Summary of the Invention [Problem to be solved by the invention]

[0006] However, wafers with notches or orientation flats have a limit on the number of devices that can be formed on the surface, and improvements are eagerly needed.

[0007] By not forming notches in the wafer, the number of devices that can be formed on the surface can be increased compared to a wafer with notches formed in it. However, in conventional devices that position the wafer in a predetermined direction based on the position of the notches, a problem occurs in that a wafer without notches cannot be positioned in the predetermined direction, that is, the wafer cannot be positioned so that the crystal orientation is in the predetermined direction.

[0008] SUMMARY OF THE INVENTION It is an object of the present invention to provide a processing apparatus and method that allows for the positioning of a semiconductor wafer in a predetermined orientation while enabling the formation of more devices on the semiconductor wafer. [Means for solving the problem]

[0009] In order to solve the above-mentioned problems and achieve the object, the processing apparatus of the present invention is a processing apparatus for semiconductor wafers, wherein the semiconductor wafer includes a front surface, a back surface behind the front surface, and a side surface extending from the front surface to the back surface, and the side surface has a flat mirror surface portion that indicates the crystal orientation of the semiconductor wafer, and the processing apparatus is characterized by comprising: a loading stage on which a wafer cassette that can freely accommodate the semiconductor wafer is placed; a detection unit that detects the flat mirror surface portion; and a transport unit that transports the semiconductor wafer, whose flat mirror surface portion has been detected by the detection unit, to the wafer cassette placed on the loading stage, and the transport unit places the semiconductor wafer in the wafer cassette so that the flat mirror surface portion is oriented in a predetermined direction relative to the wafer cassette.

[0010] The processing method of the present invention is a method for processing a semiconductor wafer, wherein the semiconductor wafer includes a front surface, a back surface behind the front surface, and a side surface extending from the front surface to the back surface, and the side surface has a flat mirror surface portion that indicates the crystal orientation of the semiconductor wafer, and is characterized by comprising a detection step of detecting the flat mirror surface of the semiconductor wafer, and a storage step of storing the semiconductor wafer in a wafer cassette so that the flat mirror surface portion is oriented in a predetermined direction.

[0011] The processing method may further include a transport step of transporting the semiconductor wafer from the wafer cassette to a destination via a predetermined transport path after the storage step is performed, and in the storage step, the semiconductor wafer may be stored in the wafer cassette so that the semiconductor wafer transported to the destination is positioned in a predetermined orientation. [Effects of the Invention]

[0012] The present invention has the advantage that it is possible to position a semiconductor wafer in a predetermined orientation while allowing more devices to be formed on the semiconductor wafer. [Brief explanation of the drawings]

[0013] [Figure 1] FIG. 1 is a perspective view schematically showing a semiconductor wafer to be processed by the processing method according to the first embodiment. [Figure 2] FIG. 2 is a perspective view schematically showing the semiconductor wafer shown in FIG. 1 from the back surface side. [Figure 3] FIG. 3 is a flowchart showing the flow of the processing method according to the first embodiment. [Figure 4] FIG. 4 is a perspective view schematically showing an example of the configuration of a processing apparatus that performs the detecting step and the storing step of the processing method shown in FIG. [Figure 5] FIG. 5 is a plan view, partially in section, showing an example of semiconductor wafers accommodated in a wafer cassette placed on a first cassette mounting table in the detection step of the processing method shown in FIG. [Figure 6] FIG. 6 is a side view that schematically illustrates the detection step of the processing method shown in FIG. [Figure 7] FIG. 7 is another side view that schematically illustrates the detection step of the processing method shown in FIG. [Figure 8] FIG. 8 is a front view schematically showing a wafer cassette containing wafers in the containing step of the processing method shown in FIG. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a perspective view schematically showing the configuration of a tape mounter that performs the transport step of the processing method shown in FIG. [Figure 11] FIG. 11 is a plan view schematically showing a work unit formed by the tape mounter shown in FIG. [Figure 12] FIG. 12 is a perspective view schematically showing a state in which a semiconductor wafer and a frame are placed on a tape application stage in the transport step of the processing method shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0014] Modes (embodiments) for carrying out the present invention will be described in detail with reference to the drawings. The present invention is not limited to the contents described in the following embodiments. Furthermore, the components described below include those that can be easily imagined by a person skilled in the art and those that are substantially the same. Furthermore, the configurations described below can be combined as appropriate. Furthermore, various omissions, substitutions, or modifications of the configuration can be made within the scope of the gist of the present invention.

[0015] [Embodiment 1] A processing method according to a first embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a perspective view schematically showing a semiconductor wafer to be processed by the processing method according to the first embodiment. Fig. 2 is a perspective view schematically showing the semiconductor wafer shown in Fig. 1 from the back surface side. Fig. 3 is a flowchart showing the flow of the processing method according to the first embodiment.

[0016] (semiconductor wafers) The processing method according to the first embodiment is a method for processing a semiconductor wafer 1 shown in Figures 1 and 2. In the first embodiment, the semiconductor wafer 1 to be processed by the processing method according to the first embodiment is made of silicon and is formed into a disk shape as a whole as shown in Figures 1 and 2. In the first embodiment, the semiconductor wafer 1 is made of single crystal silicon, which is a semiconductor material. Note that in the present invention, the semiconductor material constituting the semiconductor wafer 1 is not limited to silicon.

[0017] 1 and 2, the semiconductor wafer 1 includes a circular front surface 2, a circular back surface 3 that is the back surface of the front surface 2, and a side surface 4 that extends from the outer edge of the front surface 2 to the outer edge of the back surface 3. The front surface 2 and the back surface 3 are each formed flat, have the same diameter, and are arranged parallel to each other. In the first embodiment, the side surface 4 of the semiconductor wafer 1 is formed linearly in a vertical cross section that is a cross section passing through the axis of the semiconductor wafer 1.

[0018] In the first embodiment, the semiconductor wafer 1 has devices 5 formed on the front surface 2. The devices 5 are formed in areas defined by a plurality of mutually intersecting planned dividing lines 6 on the front surface 2. The devices 5 are, for example, integrated circuits such as ICs (Integrated Circuits) or LSIs (Large Scale Integration), image sensors such as CCDs (Charge Coupled Devices) or CMOSs ​​(Complementary Metal Oxide Semiconductors), or memories (semiconductor memory devices). In the present invention, the semiconductor wafer 1 does not necessarily have devices formed on the front surface 2.

[0019] In addition, in the first embodiment, the semiconductor wafer 1 has a flat mirror surface portion 7 that indicates a crystal orientation, as shown in Figures 1 and 2. In the first embodiment, the flat mirror surface portion 7 is formed concavely from the side surface 4, extends along the thickness direction of the semiconductor wafer 1, and is formed over the entire length in the thickness direction. However, in the present invention, it is sufficient that the flat mirror surface portion 7 is formed on at least a portion of the semiconductor wafer 1 in the thickness direction. In the example shown in Figure 13, the semiconductor wafer 1 has a flat mirror surface portion 7 formed on the (011) plane.

[0020] The flat mirror surface portion 7 has a mirror-finished bottom. Therefore, in the semiconductor wafer 1, the flat mirror surface portion 7 has a higher light reflectivity than the side surface 4. The width 8 of the flat mirror surface portion 7 is 0.05 mm or more and 34.5 mm or less. The reason why the width 8 of the flat mirror surface portion 7 is 0.05 mm or more and 34.5 mm or less is that if it is less than 0.05 mm, the flat mirror surface portion 7 cannot be detected in the detection step 101 described below, and if it exceeds 34.5 mm, the number of devices 5 formed on the semiconductor wafer 1 will be reduced, which is undesirable.

[0021] In the present invention, the width 8 of the flat mirror surface portion 7 is preferably 0.05 mm or more and 10 mm or less, and more preferably 0.05 mm or more and 5 mm or less. In short, it is desirable that the width 8 of the flat mirror surface portion 7 is as narrow as possible as long as it is 0.05 mm or more, so as not to reduce the number of devices 5 formed on the semiconductor wafer 1. In the first embodiment, the width 8 of the flat mirror surface portion 7 is 1 mm.

[0022] (Processing method) The processing method according to the first embodiment is a method for processing the semiconductor wafer 1 having the above-described configuration, and includes a detection step 101, a storage step 102, and a transfer step 103, as shown in FIG.

[0023] (Processing device) The detection step 101 and the storage step 102 are performed by a processing device 30 shown in Fig. 4. Next, the processing device 30 will be described. Fig. 4 is a perspective view that schematically shows an example of the configuration of a processing device that performs the detection step and the storage step of the processing method shown in Fig. 3.

[0024] The processing device 30 detects the crystal orientation by detecting the flat mirror surface 7 of the semiconductor wafer 1. As shown in Fig. 4, the processing device 30 includes an apparatus base 31, a first cassette mounting table 321 (corresponding to a mounting table) installed on the apparatus base 31, a second cassette mounting table 322 (corresponding to a mounting table) installed on the apparatus base 31, a holding unit 33 installed on the apparatus base 31, a detection unit 34, a transport unit 35, and a controller 36.

[0025] A wafer cassette 40 is placed on each of the cassette placement stages 321 and 322. The wafer cassette 40 is a storage container that has multiple slots and can store multiple semiconductor wafers 1 at intervals in the vertical direction. The wafer cassette 40 stores multiple semiconductor wafers 1 before and after their crystal orientations are detected.

[0026] In the first embodiment, the cassette mounting stages 321, 322 support the wafer cassette 40 so that it can move up and down along the Z-axis direction. In the first embodiment, the cassette mounting stages 321, 322 mount the wafer cassette 40 with the openings 41, through which the semiconductor wafers 1 are inserted and removed, facing each other. The first cassette mounting stage 321 mounts the wafer cassette 40 containing the semiconductor wafers 1 before the crystal orientation is detected. The second cassette mounting stage 322 mounts the wafer cassette 40 containing the semiconductor wafers 1 after the crystal orientation has been detected.

[0027] The holding unit 33 and the detection unit 34 are provided between the cassette mounting stages 321, 322 of the apparatus base 31. The holding unit 33 holds the semiconductor wafer 1 on an upper surface 331 formed flat along the horizontal direction. The holding unit 33 rotates around an axis parallel to the vertical direction and is formed in a disk shape with a smaller diameter than the semiconductor wafer 1. The holding unit 33 holds the semiconductor wafer 1 on the upper surface 331 by suction.

[0028] The detection unit 34 detects the flat mirror surface portion 7 of the semiconductor wafer 1 held by the holding unit 33 to detect the crystal orientation of the semiconductor wafer. The detection unit 34 faces the side surface 4 of the semiconductor wafer 1 held by the holding unit 33 in the horizontal direction. The detection unit 34 includes a light emitting unit 341 that emits light 343 toward the side surface 4 of the semiconductor wafer 1 held by the holding unit 33, and a light receiving unit 342 that receives reflected light 344 from the side surface 4. The detection unit 34 detects the amount of reflected light 344 received by the light receiving unit 342 and outputs the detected amount of light to the controller 36. The detection unit 34 detects the flat mirror surface portion 7 by the light receiving unit 342 outputting the amount of reflected light 344 to the controller 36.

[0029] The transfer unit 35 transfers the semiconductor wafer 1 between the wafer cassette 40 placed on the cassette placement stages 321, 322 and the holding unit 33. The transfer unit 35 transfers the semiconductor wafer 1, whose flat mirror surface portion 7 has not yet been detected, from the wafer cassette 40 placed on the first cassette placement stage 321 to the holding unit 33, and transfers the semiconductor wafer 1, whose flat mirror surface portion 7 has been detected by the detection unit 34, from the holding unit 33 to the wafer cassette 40 placed on the second cassette placement stage 322. In the first embodiment, the transfer unit 35 is, for example, a robot pick equipped with a U-shaped hand, and the U-shaped hand suction-holds and transfers the semiconductor wafer 1.

[0030] The controller 36 controls each component of the processing device 30 to cause the processing device 30 to perform an operation of detecting the crystal orientation of the semiconductor wafer 1. The controller 36 is a computer having an arithmetic processing device with a microprocessor such as a CPU (central processing unit), a storage device with memory such as a ROM (read only memory) or RAM (random access memory), and an input / output interface device. The arithmetic processing device of the controller 36 performs arithmetic processing in accordance with a computer program stored in the storage device, and outputs control signals for controlling the processing device 30 to each component of the processing device 30 via the input / output interface device.

[0031] The controller 36 is connected to a display unit (not shown) that is configured with a liquid crystal display device or the like that displays the status of the processing operation, images, etc., and an input unit (not shown) that the operator uses to register processing content information, etc. The input unit is configured with at least one of a touch panel provided on the display unit and an external input device such as a keyboard.

[0032] (Detection step) Next, the detection step 101 will be described. Fig. 5 is a plan view, partially in cross section, showing an example of a semiconductor wafer accommodated in a wafer cassette placed on a first cassette mounting table in the detection step of the processing method shown in Fig. 3. Fig. 6 is a side view schematically showing the detection step of the processing method shown in Fig. 3. Fig. 7 is another side view schematically showing the detection step of the processing method shown in Fig. 3. The detection step 101 is a step of detecting the flat mirror surface portion 7 of the semiconductor wafer 1.

[0033] In the first embodiment, in the detection step 101, the semiconductor wafer 1 is accommodated in the wafer cassette 40. At this time, the back surface 3 of the semiconductor wafer 1 is positioned downward, and the front surface 2 is exposed upward. Furthermore, when the semiconductor wafer 1 is accommodated in the wafer cassette 40, the flat mirror surface portion 7 is positioned at an arbitrary position (i.e., a random position), as shown in an example in FIG. 5. Note that in the present invention, the semiconductor wafer 1 may be accommodated in the wafer cassette 40 with the front surface 2 of the semiconductor wafer 1 positioned downward and the back surface 3 exposed upward.

[0034] In the first embodiment, in the detection step 101, a wafer cassette 40 containing semiconductor wafers 1 is placed on the first cassette mounting table 321, and a wafer cassette 40 that does not contain semiconductor wafers 1, i.e., an empty wafer cassette 40, is placed on the second cassette mounting table 322. In the first embodiment, in the detection step 101, the operator registers processing conditions in the controller 36, and when the controller 36 receives an instruction from the operator to start the processing operation, the processing device 30 starts the operation of detecting the crystal orientation. Note that the processing conditions include the orientation of the flat mirror surface 7 of the semiconductor wafers 1 contained in the wafer cassette 40 placed on the second cassette mounting table 322.

[0035] In embodiment 1, in the detection step 101, the processing device 30 causes the controller 36 to cause the transport unit 35 to remove one semiconductor wafer 1 from the wafer cassette 40 placed on the first cassette mounting table 321 and place it on the upper surface 331 of the holding unit 33.

[0036] In the first embodiment, in the detection step 101, the controller 36 of the processing device 30 suction-holds the front surface 2 of the semiconductor wafer 1 on the upper surface 331 of the holding unit 33, and as shown in Figures 6 and 7, the controller 36 of the processing device 30 stops the rotation of the holding unit 33 around its axis at an angle at which the amount of reflected light 344 is maximized based on the detection result of the light receiving unit 342.

[0037] (Containment Step) Fig. 8 is a front view schematically showing a wafer cassette containing wafers in the containing step of the processing method shown in Fig. 3. Fig. 9 is a cross-sectional view taken along line IX-IX in Fig. 8. The containing step 102 is a step in which, after the detection step 101 has been performed, the semiconductor wafer 1 is contained in the wafer cassette 40 with the flat mirror surface portion 7 oriented in a predetermined direction.

[0038] In the first embodiment, in the storing step 102, the processing device 30 stops suction holding of the semiconductor wafer 1 on the upper surface 331 of the holding unit 33, and uses the transport unit 35 to carry the semiconductor wafer 1 from the upper surface 331 of the holding unit 33 into the wafer cassette 40 installed on the second cassette mounting table 322. At this time, in the first embodiment, in the storing step 102, the processing device 30 uses the transport unit 35 to store the semiconductor wafer 1 in the wafer cassette 40 so that the flat mirror surface portion 7 is positioned in the center in the width direction of the semiconductor wafer 1 when viewed from the front of the opening 41 of the wafer cassette 40 through which the semiconductor wafer 1 is inserted and removed, as shown in, for example, Figures 8 and 9 .

[0039] For this reason, in the first embodiment, in the storing step 102, the processing apparatus 30 stores the semiconductor wafer 1 in the wafer cassette 40 placed on the second cassette placing table 322 so that the flat mirror surface portion 7 of the semiconductor wafer 1 overlaps in the thickness direction of the semiconductor wafer 1. Thus, in the storing step 102, the transport unit 35 stores the semiconductor wafer 1 in the wafer cassette 40 so that the flat mirror surface portion 7 is oriented in a predetermined direction relative to the wafer cassette 40, and thus, in the transport step 103, the semiconductor wafer 1 can be stored in the wafer cassette 40 placed on the second cassette placing table 322 so that the flat mirror surface portion 7 of the semiconductor wafer 1 transported to the destination is positioned in the predetermined direction. Note that, in the present invention, the predetermined orientation for storing the semiconductor wafer 1 in the wafer cassette 40 is not limited to the orientation shown in FIGS. 8 and 9 .

[0040] (Tape mounter) The transport step 103 is performed by a tape mounter 60 shown in FIG. 10, which is an apparatus that performs the next step of the processing apparatus 30. Next, the tape mounter 60 will be described. FIG. 10 is a perspective view that schematically shows the configuration of a tape mounter that performs the transport step of the processing method shown in FIG. 3. FIG. 11 is a plan view that schematically shows a work unit formed by the tape mounter shown in FIG. 10.

[0041] The tape mounter 60 shown in Fig. 10 is an apparatus that adheres a disk-shaped tape 12 having a diameter larger than that of the semiconductor wafer 1 to the back surface 3 of the semiconductor wafer 1, and attaches an annular frame 11 to the outer edge of the tape 12 to form the work unit 10 shown in Fig. 11. As shown in Fig. 10, the tape mounter 60 includes an apparatus base 61, a cassette mounting table 621, a frame cassette mounting table 622, a work cassette mounting table 623, a tape application stage 63, a stage moving unit 64, a wafer transport unit 65, a frame transport unit 66, an application unit 67, and a control unit 68.

[0042] The cassette mounting tables 621, 622, and 623 are each arranged in the Y-axis direction, which is parallel to the horizontal direction and perpendicular to the X-axis direction, at one end of the apparatus base 61 in the X-axis direction, which is the longitudinal direction parallel to the horizontal direction. The cassette mounting table 621 is mounted with a wafer cassette 40 containing semiconductor wafers 1 whose flat mirror surface portions 7 have been positioned in a predetermined orientation by the processing apparatus 30 in the containing step 102.

[0043] A frame cassette 42 containing a plurality of frames 11 is placed on the frame cassette placing table 622. The frame cassette 42 is a container that has a plurality of slots and can freely contain a plurality of frames 11 spaced apart in the vertical direction.

[0044] A work unit cassette 44 capable of accommodating a plurality of work units 10 is placed on the work cassette placement stage 623. The work unit cassette 44 is a storage container that has a plurality of slots and can freely accommodate a plurality of work units 10 spaced apart in the vertical direction.

[0045] In the first embodiment, the cassette mounting stages 621, 622, 623 support the cassettes 40, 42, 44 so that they can move up and down along the Z-axis direction, which is parallel to the vertical direction. In the first embodiment, the cassette mounting stages 621, 622, 623 mount the cassettes 40, 42, 44 such that the opening 41 for loading and unloading the semiconductor wafers 1 of the wafer cassette 40, the opening 43 for loading and unloading the frames 11 of the frame cassette 42, and the opening 45 for loading and unloading the work units 10 of the work unit cassette 44 face the other end in the X-axis direction.

[0046] The semiconductor wafer 1 and the frame 11 are placed on an upper surface 631 of the tape adhering stage 63. The upper surface 631 of the tape adhering stage 63 has an annular frame holding portion 633 that holds the frame 11, and a wafer holding portion 632 that holds the semiconductor wafer 1. An opening is formed in the center of the frame holding portion 633, and the wafer holding portion 632 is disposed within the opening of the frame holding portion 633.

[0047] The stage moving unit 64 is installed on the apparatus base 61, and moves the tape application stage 63 in the X-axis direction between a load / unload position where the semiconductor wafer 1 and frame 11 are loaded and the work unit 10 is unloaded, and a transfer position where the tape 12 is transferred to the semiconductor wafer 1 and frame 11 held by the tape application stage 63. The stage moving unit 64 includes a well-known ball screw rotatable about its axis, a well-known motor for rotating the ball screw about its axis, and a well-known guide rail for supporting the tape application stage 63 movably in the X-axis direction.

[0048] The wafer transport unit 65 transports the semiconductor wafer 1 from the wafer cassette 40 placed on the cassette mounting table 621 to the wafer holding portion 632 of the tape application stage 63 positioned at the load / unload position. The frame transport unit 66 transports the frame 11 from the frame cassette 42 placed on the frame cassette mounting table 622 to the frame holding portion 633 of the tape application stage 63 positioned at the load / unload position, and stores the work unit 10 from the upper surface 631 of the tape application stage 63 positioned at the load / unload position into the work unit cassette 44 placed on the work cassette mounting table 623. In the first embodiment, the transport units 65, 66 are, for example, robot picks equipped with U-shaped hands, and the U-shaped hands suction-hold and transport the semiconductor wafer 1, frame 11, and work unit 10.

[0049] The adhering unit 67 adheres the tape 12 to the semiconductor wafer 1 and frame 11 held on the tape adhering stage 63 positioned at the adhering position, and cuts the tape 12 between the inner and outer edges of the frame 11 to form the work unit 10.

[0050] The control unit 68 controls each of the above-mentioned constituent units that make up the tape mounter 60, causing the tape mounter 60 to perform operations to form the work unit 10. The control unit 68 is a computer that has an arithmetic processing device having a microprocessor such as a CPU (central processing unit), a storage device having memory such as a ROM (read only memory) or RAM (random access memory), and an input / output interface device.

[0051] The arithmetic processing device of the control unit 68 performs arithmetic processing in accordance with a computer program stored in the storage device, and outputs control signals for controlling the tape mounter 60 to the above-mentioned components of the tape mounter 60 via the input / output interface device. The control unit 68 is also connected to a display unit configured with a liquid crystal display device or the like for displaying the status of the processing operation and images, an input unit used by the operator to register information, and a notification unit for notifying the operator.

[0052] The input unit is composed of at least one of a touch panel provided on the display unit, a keyboard, etc. The notification unit notifies the operator by emitting at least one of sound, light, and a message on the touch panel.

[0053] (Transport step) Next, the transport step 103 will be described. Fig. 12 is a perspective view that schematically shows the state in which the semiconductor wafer and frame are placed on the tape application stage in the transport step of the processing method shown in Fig. 3. The transport step 103 is a step in which, after the storage step 102 is performed, the semiconductor wafer 1 is transported from the wafer cassette 40 to the tape application position, which is the destination, by the stage movement unit 64, which is a predetermined transport path.

[0054] In the first embodiment, in the transport step 103, the wafer cassette 40, which has the flat mirror surface 7 positioned in a predetermined orientation in the storage step 102 and which stores the semiconductor wafers 1, is placed on the cassette placement table 621, the frame cassette 42 which stores a plurality of frames 11 is placed on the frame cassette placement table 622, and the work unit cassette 44 which does not store any work units 10, i.e., is empty, is placed on the work cassette placement table 623. In the first embodiment, in the transport step 103, the operator registers the bonding conditions in the control unit 68, and when the control unit 68 receives an instruction from the operator to start the bonding operation, the tape mounter 60 starts the bonding operation.

[0055] 12 , in the transport step 103, the tape mounter 60 places the semiconductor wafer 1 stored in the wafer cassette 40 on the tape application stage 63 with the flat mirror surface portion 7 positioned at a predetermined position. Specifically, in the transport step 103, in the embodiment 1, the tape mounter 60 causes the wafer transport unit 65 to carry out the semiconductor wafer 1 from the wafer cassette 40 placed on the cassette placement table 621 with a constant movement, and places the front surface 2 side of the semiconductor wafer 1 on the wafer holding portion 632 of the tape application stage 63.

[0056] As described above, in the transport step 103, since the semiconductor wafer 1 is accommodated in the wafer cassette 40 in a predetermined orientation, the semiconductor wafer 1 is positioned so that the flat mirror surface portion 7 will be in a predetermined position when it is transported onto the tape application stage 63. That is, in the accommodation step 102, the semiconductor wafer 1 is accommodated in advance in the wafer cassette 40 with the flat mirror surface portion 7 oriented in a predetermined direction relative to the wafer cassette 40 so that the flat mirror surface portion 7 of the semiconductor wafer 1 transported to the destination in the transport step 103 in the next process of the processing device 30 will be oriented to be in a predetermined position. Also, in the transport step 103 in the tape mounter 60 in the first embodiment, as shown in FIG. 12 , the frame transport unit 66 transports the frame 11 out of the frame cassette 42 placed on the frame cassette placement table 622 with a constant movement and places it on the frame holding portion 633 of the tape application stage 63.

[0057] In embodiment 1, in the transport step 103, the tape mounter 60 causes the stage moving unit 64 to move the tape application stage 63 to the application position, and at the application position the application unit applies the tape 12 to the back surface 3 of the semiconductor wafer 1 and the frame 11, thereby forming the work unit 10. In embodiment 1, in the transport step 103, after the tape mounter 60 forms the work unit 10, the stage moving unit 64 moves the tape application stage 63 to the carry-in / out position, and the frame transport unit 66 stores the work unit 10 in the work unit cassette 44 from the tape application stage 63 at the carry-in / out position.

[0058] In the first embodiment, the tape mounter 60 transports the semiconductor wafer 1 to the destination in the transport step 103. However, in the present invention, the transport of the semiconductor wafer 1 to the destination may be performed not only by the tape mounter 60 but also by various devices used in the semiconductor manufacturing process, such as a cutting device or an exposure device.

[0059] The processing method according to the first embodiment described above forms a flat mirror surface 7 indicating the crystal orientation on the semiconductor wafer 1 instead of a cutout portion such as a notch or an orientation flat, and therefore, more devices 5 can be formed on the semiconductor wafer 1.

[0060] Moreover, in the processing method according to the first embodiment, the flat mirror surface portion 7 indicating the crystal orientation of the semiconductor wafer 1 is detected in the detection step 101, and the semiconductor wafer 1 is stored in the wafer cassette 40 in the storage step 102 so that the flat mirror surface portion 7 is oriented in a predetermined direction relative to the wafer cassette 40. Thus, the semiconductor wafer 1 can be positioned in the predetermined direction.

[0061] As a result, the processing method according to the first embodiment has the effect of enabling a larger number of devices 5 to be formed on the semiconductor wafer 1 while positioning the semiconductor wafer 1 in a predetermined orientation.

[0062] The present invention is not limited to the above-described embodiment, and can be implemented in various modifications without departing from the gist of the present invention. [Explanation of symbols]

[0063] 1. Semiconductor wafer 2 surface 3 Back side 4 Sides 7 Flat mirror surface 30 Processing equipment 321 First cassette stand (cassette stand) 322 Second cassette stand (cassette stand) 34 Detection Unit 35 Transport unit 40 wafer cassettes 64 Stage movement unit (transport path) 101 Detection Steps 102 Containment Steps 103 Transport Steps

Claims

1. A semiconductor wafer processing apparatus, The semiconductor wafer includes a front surface, a back surface behind the front surface, and a side surface extending from the front surface to the back surface, and the side surface has a flat mirror surface portion indicating the crystal orientation of the semiconductor wafer, The processing device comprises: a mounting table on which a wafer cassette capable of accommodating the semiconductor wafer is mounted; a detection unit for detecting the flat mirror surface portion; a transport unit that transports the semiconductor wafer, the flat mirror surface portion of which has been detected by the detection unit, to the wafer cassette placed on the mounting table, The transport unit places the semiconductor wafer in the wafer cassette so that the flat mirror surface is oriented in a predetermined direction relative to the wafer cassette.

2. A method for processing a semiconductor wafer, comprising: The semiconductor wafer includes a front surface, a back surface behind the front surface, and a side surface extending from the front surface to the back surface, and the side surface has a flat mirror surface portion indicating the crystal orientation of the semiconductor wafer, a detecting step of detecting the flat mirror surface portion of the semiconductor wafer; and a step of storing the semiconductor wafer in a wafer cassette so that the flat mirror surface portion is oriented in a predetermined direction.

3. a transport step of transporting the semiconductor wafer from the wafer cassette to a destination via a predetermined transport path after the accommodation step is performed; 3. The processing method according to claim 2, wherein in the storing step, the semiconductor wafer is stored in the wafer cassette so that the semiconductor wafer transferred to the destination is positioned in a predetermined orientation.

Images