Field effect transistor

Abstract

To provide a field effect transistor capable of improving maximum effective power gain.SOLUTION: A field effect transistor 1 comprises: source electrodes S1a, S1b; a drain electrode D1; gate fingers 10a, 10b having one end to which a signal is input and the other end; and impedance elements 18a, 18b connected between the one end and the other end of the gate fingers 10a, 10b.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present disclosure relates to high frequency field effect transistors (FETs). [Background technology]

[0002] In recent years, wireless communication systems and wireless power transmission systems have been developed. These systems require high-frequency amplification elements. For example, Patent Document 1 discloses a high-frequency MOSFET. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2009-16686 Summary of the Invention [Problem to be solved by the invention]

[0004] In conventional field-effect transistors, the maximum available power gain (MAG) decreases as the gate width increases, so it is desirable to improve the MAG.

[0005] The present disclosure has been made in view of the above problems, and one of its exemplary purposes is to provide a field effect transistor that can improve the maximum available power gain. [Means for solving the problem]

[0006] In order to solve the above problem, a field-effect transistor according to one embodiment of the present disclosure includes a source electrode, a drain electrode, a gate finger having one end to which a signal is input and the other end, and an impedance element connected between the one end and the other end of the gate finger.

[0007] Any combination of the above components, or mutual substitution of the components or expressions of the present disclosure between methods, systems, etc., are also valid aspects of the present disclosure. [Effects of the Invention]

[0008] According to the present disclosure, a field effect transistor capable of improving the maximum available power gain can be provided. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 10 is a plan view showing the configuration of a field effect transistor of a comparative example. [Figure 2] FIG. 2 is a diagram showing the frequency dependence of MAG in the field-effect transistor of FIG. [Figure 3] 3(a) and 3(b) are diagrams showing the configuration of a field effect transistor according to an embodiment. [Figure 4] 4(a) and 4(b) are diagrams showing circuit models of the field effect transistors of FIGS. 3(a) and 3(b). [Figure 5] FIG. 4 is a diagram showing a circuit model of the field-effect transistors of FIGS. 3(a) and 3(b) for simulating impedance ZL. [Figure 6] FIG. 6 is a diagram showing a circuit model that shows the circuit model of FIG. 5 in detail. [Figure 7] FIG. 10 is a diagram showing the frequency dependence of MAG in the field effect transistor of the embodiment and the field effect transistor of the comparative example. [Figure 8] FIG. 10 is a diagram showing another example of the frequency dependence of MAG in the field effect transistor of the embodiment and the field effect transistor of the comparative example. [Figure 9] FIG. 10 is a plan view showing another configuration example of the field effect transistor according to the embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] The present inventors have studied field-effect transistors for high frequencies in the microwave and millimeter-wave bands and have discovered the following: Figure 1 is a plan view showing the configuration of a comparative field-effect transistor 100. The field-effect transistor 100 includes a gate electrode G1, a source electrode S1a, a source electrode S1b, and a drain electrode D1.

[0011] The gate electrode G1 has a gate finger 10a and a gate finger 10b. Hereinafter, the gate finger 10a and the gate finger 10b will be collectively referred to as "gate fingers 10" where appropriate. One end of each of the two gate fingers 10 is connected to a connection portion 12. The connection portion 12 forms a signal input terminal for a high-frequency signal. The end of the gate finger 10 opposite the signal input terminal is open. The width of the gate finger 10 is defined as a gate finger width Wg. The field-effect transistor 100 has a known configuration, and therefore further detailed description will be omitted.

[0012] FIG. 2 shows the frequency dependence of MAG in the field-effect transistor 100 of FIG. 1. In this example, the field-effect transistor 100 is a HEMT (High Electron Mobility Transistor). FIG. 2 shows the measured values ​​of a GaN HEMT with a gate length of 0.25 μm, gate finger width Wg = 50 μm, 100 μm, or 200 μm, and the number of gate fingers is 2. The bias conditions are Vds = 28 V and Ids = 100 mA / mm.

[0013] As shown in FIG. 2, in the field-effect transistor 100 of the comparative example, for example, in a high frequency band of approximately 10 GHz or higher, the MAG decreases as the gate finger width Wg increases.

[0014] After extensive consideration and analysis, the inventors have discovered that one of the main reasons for the phenomenon in which MAG decreases as the gate finger width Wg increases is that the behavior of the gate finger 10 as a distributed constant line becomes more pronounced as the gate finger width Wg increases.

[0015] Based on these findings, the inventors conducted further research and discovered that by connecting an impedance element between the signal input end of the gate finger 10 and the end opposite the signal input end, i.e., between both ends of the gate finger 10, it is possible to effectively utilize the behavior of the gate finger 10 as a distributed constant line and improve MAG in a predetermined frequency band. The embodiments were devised based on these considerations, and the specific configurations thereof will be described below.

[0016] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. In the description, the same elements are denoted by the same reference numerals, and duplicate descriptions will be omitted as appropriate.

[0017] 3(a) and (b) show the configuration of a field-effect transistor 1 according to an embodiment. Fig. 3(a) is a plan view of the field-effect transistor 1, and Fig. 3(b) is a longitudinal cross-sectional view of the field-effect transistor 1 taken along line A-A' in Fig. 3(a). The field-effect transistor 1 can be used as an amplifying element in, for example, a power amplifier or a low-noise amplifier.

[0018] The field-effect transistor 1 includes a gate electrode G1, a source electrode S1a, a source electrode S1b, a drain electrode D1, an impedance element 18a, and an impedance element 18b. Hereinafter, the source electrode S1a and the source electrode S1b will be collectively referred to as the "source electrode S1" as appropriate. The impedance elements 18a and 18b will be collectively referred to as the "impedance element 18" as appropriate. Although the configuration other than the impedance element 18 is the same as in the comparative example, other field-effect transistor configurations may also be used.

[0019] As shown in FIG. 3(b), the gate electrode G1, the source electrode S1, and the drain electrode D1 are formed on a semiconductor substrate 30. The impedance element 18 is also formed on the semiconductor substrate 30. The semiconductor substrate 30 is not particularly limited, and may be, for example, a semiconductor substrate such as silicon, a compound semiconductor substrate, or a substrate including a compound semiconductor layer. The compound semiconductor is not particularly limited, and may be, for example, gallium arsenide (GaAs) or a nitride semiconductor such as gallium nitride (GaN). The field-effect transistor 1 is not particularly limited, and may be, for example, a high electron mobility transistor using gallium nitride, i.e., a GaN HEMT.

[0020] The drain electrode D1 extends in a first direction d1 along the surface of the semiconductor substrate 30. The drain terminal 22 is connected to one end of the drain electrode D1.

[0021] The source electrode S1a and the source electrode S1b are arranged substantially parallel to each other on either side of the drain electrode D1 in the second direction d2 and extend in the first direction d1. The second direction d2 is perpendicular to the first direction d1 and extends along the surface of the semiconductor substrate 30. The source electrode S1a is arranged apart from the drain electrode D1, and the source electrode S1b is arranged apart from the drain electrode D1.

[0022] The source electrode S1a is connected to the via 20a. The via 20a is connected to a ground conductor 32 formed on the back surface of the semiconductor substrate 30. The source electrode S1b is connected to the via 20b. The via 20b is connected to the ground conductor 32. In other words, the source electrode S1 is grounded. Note that the source electrode S1 does not have to be grounded.

[0023] The gate electrode G1 has a gate finger 10a, a gate finger 10b, and a connection portion 12. The gate finger 10a is disposed between the source electrode S1a and the drain electrode D1 and extends in the first direction d1. The gate finger 10b is disposed between the source electrode S1b and the drain electrode D1 and extends in the first direction d1.

[0024] One end of the gate finger 10a and one end of the gate finger 10b are connected by a connection part 12. The connection part 12 is one end of the gate electrode G1, and a high-frequency input signal is input to the connection part 12. The number of gate fingers is "2" in the example of FIGS. 3(a) and 3(b), but it may be "1" or "3" or more.

[0025] One impedance element 18a is connected between one end and the other end of one gate finger 10a. The other impedance element 18b is connected between one end and the other end of the other gate finger 10b. The number of impedance elements 18 is the same as the number of gate fingers. The impedance elements 18 are connected between both ends of gate fingers 10 in one-to-one correspondence. Multiple impedance elements 18 may have the same configuration and may have the same impedance. Note that in a configuration with multiple gate fingers 10, the number of impedance elements 18 may be less than the number of gate fingers, and some gate fingers 10 may not have an impedance element 18 connected between both ends.

[0026] The impedance of the impedance element 18 seen from the other end of the gate finger 10 is capacitive or inductive in the frequency band of the input signal. The impedance of the impedance element 18 is an open circuit impedance, i.e., substantially infinite, for direct current.

[0027] The impedance element 18a includes a transmission line 14a and a capacitance element 16a, which are connected in series between one end and the other end of the gate finger 10a.

[0028] The transmission line 14a includes a transmission line 141a and a transmission line 142a. The transmission line 141a has one end connected to one end of the gate finger 10a and the other end. The transmission line 141a is generally L-shaped and has a first portion extending from one end of the gate finger 10a in the second direction d2 and a second portion extending from the end of the first portion to the other end of the gate finger 10a in the first direction d1. The second portion of the transmission line 141a overlaps a portion of the source electrode S1a. As shown in FIG. 3(b), the transmission line 141a is in contact with the semiconductor substrate 30, and a portion of the source electrode S1a straddles the transmission line 141a.

[0029] The transmission line 142a has one end connected to the other end of the gate finger 10a, and the other end. The transmission line 142a is generally L-shaped and has a first portion extending in a first direction d1 from the other end of the gate finger 10a, and a second portion extending in a second direction d2 from an end of the first portion.

[0030] The capacitive element 16a is, for example, a MIM (Metal-Insulator-Metal) capacitor, and is connected between the other end of the transmission line 141a and the other end of the transmission line 142a. It can also be said that the capacitive element 16a is connected between an end of a second portion of the transmission line 141a and an end of a second portion of the transmission line 142a. For example, an upper electrode of the capacitive element 16a is connected to the other end of the transmission line 142a, and a lower electrode of the capacitive element 16a is connected to the other end of the transmission line 141a.

[0031] The impedance element 18b includes a transmission line 14b and a capacitance element 16b, which are connected in series between one end and the other end of the gate finger 10b.

[0032] The transmission line 14b includes a transmission line 141b and a transmission line 142b. The transmission line 141b has one end connected to one end of the gate finger 10b and the other end. The transmission line 141b is generally L-shaped and has a first portion extending from one end of the gate finger 10b in the second direction d2 and a second portion extending from the end of the first portion to the other end of the gate finger 10b in the first direction d1. The second portion of the transmission line 141b overlaps a portion of the source electrode S1b. As shown in FIG. 3(b), the transmission line 141b is in contact with the semiconductor substrate 30, and a portion of the source electrode S1b straddles the transmission line 141b.

[0033] The transmission line 142b has one end connected to the other end of the gate finger 10b, and the other end. The transmission line 142b is generally L-shaped and has a first portion extending in a first direction d1 from the other end of the gate finger 10b, and a second portion extending in a second direction d2 from an end of the first portion.

[0034] The capacitive element 16b is, for example, an MIM capacitor, and is connected between the other end of the transmission line 141b and the other end of the transmission line 142b.

[0035] Hereinafter, transmission line 14a and transmission line 14b will be collectively referred to as "transmission line 14" where appropriate. Capacitance element 16a and capacitance element 16b will be collectively referred to as "capacitance element 16" where appropriate. The "length of transmission line 14" refers to the sum of the lengths of transmission lines 141a and 142a that constitute impedance element 18a, and the sum of the lengths of transmission lines 141b and 142b that constitute impedance element 18b.

[0036] The width and length of the transmission line 14 and the capacitance of the capacitive element 16 can be determined appropriately by experiment or simulation so that MAG becomes a desired value in the frequency band of the input signal. The inductance component of the capacitive element 16 may be included in the length of the transmission line 14.

[0037] The impedance of the impedance element 18 is not particularly limited, but for example, the absolute value of the impedance may be 0Ω or more and 10 kΩ or less in the frequency band of the input signal.

[0038] 4(a) and (b) show circuit models of the field-effect transistor 1 of FIGS. 3(a) and (b). FIG. 4(a) shows a detailed circuit model, and FIG. 4(b) shows a circuit model that conceptually expresses the circuit model of FIG. 4(a). As shown in FIGS. 4(a) and 4(b), the field-effect transistor operates as a voltage-controlled current source.

[0039] In Figure 4(a), the area surrounding the gate finger 10 is modeled as a distributed parameter line. The gate finger 10 is represented by a distributed parameter line in which a resistance component Rdx and an inductance component Ldx are distributed within an infinitesimal section dx in the direction of the gate finger width Wg. The resistance R represents the resistance value per unit length of the gate finger 10. The inductance L represents the inductance per unit length of the gate finger 10.

[0040] Between each position of the gate finger 10 and the grounded source, there are serially connected capacitance components Cdx and conductance components Gin·dx. The capacitance C represents the gate-source capacitance per unit length. The conductance Gin represents the conductance per unit length that exists in series with the capacitance C between the gate and source.

[0041] In FIG. 4(a), for clarity of the drawing, only a portion of the resistance component Rdx, the inductance component Ldx, the capacitance component Cdx, and the conductance component Gin·dx are shown. Also, the equivalent impedance between the other end of the gate finger 10 and the source due to the connection of the impedance element 18 is represented as Z L Let impedance Z L is different from the impedance of impedance element 18.

[0042] The input voltage to the gate, i.e., the input voltage to one end of the gate finger 10, is denoted as Vi. The gate voltage in a small section within the gate finger 10 due to the input voltage Vi is denoted as Vg(x). The gate voltage Vg(x) in the small section is the voltage applied to the capacitance component Cdx.

[0043] First, a comparative example will be described. In the comparative example, the other end of the gate finger 10 is open, so the impedance Z L Therefore, the input voltage Vi of the high frequency signal input to the gate is totally reflected at the other end of the gate finger 10, which is the open end, causing a standing wave to form within the gate finger 10, and the gate voltage Vg(x) in the minute section within the gate finger 10 is distributed in the direction of the gate finger width Wg, i.e., the x direction.

[0044] The output current id is calculated by multiplying the gate voltage Vg(x) in the small section by the transconductance per unit length gmo, and integrating the resulting current over the gate finger width Wg. The effective transconductance gm eff is calculated as id / Vi. Therefore, the effective transconductance gm eff is the average value of the gate voltage Vg(x) within a finger <vg>Proportional to av.

[0045] From the above, the effective mutual conductance gm eff is expressed by the following equation (1).

[0046]

number

[0047] Here, the propagation constants γ, Zs, and Gp are expressed by the following equation (2).

[0048]

number

[0049] As mentioned above, the effective transconductance gm eff depends on the integral value of the gate voltage Vg(x) in a small section within the gate finger 10. Therefore, in the embodiment, the other end of the gate finger 10 is not left open, but is connected to one end of the input side of the gate finger 10 via an impedance element 18 of a predetermined impedance, thereby creating an impedance Z L This generates an equivalent change in the distribution of the gate voltage Vg(x) in the minute section within the gate finger 10. This causes the effective mutual conductance gm eff can be increased in a predetermined frequency band compared to the comparative example.

[0050] That is, impedance Z L By utilizing the fact that the distribution of the gate voltage Vg(x) in a small section in the gate finger 10 changes due to the eff As a result, the MAG can be improved in a predetermined frequency band compared to the comparative example. In other words, the average value of the gate voltage Vg(x) in the finger in a predetermined signal frequency band can be increased. <vg>Impedance Z so that av is larger than the comparative example L Just set the impedance Z L Since is frequency dependent, the average value within a finger at a certain frequency <vg>Even if av reaches a maximum, it usually does not reach a maximum at a different frequency, and the effective mutual conductance gm eff becomes frequency dependent with a peak in the signal frequency band, and the maximum available power gain MAG and impedance Z L The feature of this embodiment is that it has a peak in the signal frequency band where the average value within the finger is effective, that is, it shows a frequency-dependent characteristic that is convex upward. <vg>By maximizing av, the effect of this embodiment can be increased compared to the comparative example.

[0051] In the embodiment, the effective transconductance gm eff is expressed by the following equation (3).

[0052]

number

[0053] Here, as shown in FIG. 4(a), the impedance Z L The reflection coefficient looking towards the side is Γ L Let's say.

[0054] In the embodiment, as shown in equation (3), the effective transconductance gm eff is the impedance Z L Therefore, as described above, an impedance element 18 with an appropriate impedance is connected to obtain an appropriate impedance Z L By setting the effective transconductance gm eff The effective mutual conductance gm of the comparative example shown in equation (1) eff The impedance of the impedance element 18 is determined so that the maximum available power gain MAG of the field-effect transistor 1 has an upwardly convex frequency dependency in the frequency band of the signal input to the gate electrode G1.

[0055] Figure 5 shows the impedance Z L 3(a) and 3(b) show circuit models of the field-effect transistor 1 for simulation. FIG. 6 shows a circuit model that represents the circuit model of FIG. 5 in detail. In FIG. 6, the input voltage at one end of the gate finger 10 is V1, and the voltage at the other end of the gate finger 10 is V2. The voltage V2 is applied to both ends of an element with an impedance Zm that is virtually connected for calculation purposes. The results of a simulation of the field-effect transistor 1 based on the circuit model of FIG. 6 are described below.

[0056] FIG. 7 shows the frequency dependence of MAG in the field effect transistor 1 of the embodiment and the field effect transistor 100 of the comparative example.

[0057] The simulation conditions are as follows: the width of the transmission line 14 is 5 μm and the length is 100 μm; the capacitance of the capacitive element 16 is 60 fF; a GaN HEMT model with a gate length of 0.12 μm, a gate finger width Wg=100 μm, and two gate fingers is used; the bias conditions are Vds=28 V and Ids=10 mA / mm.

[0058] In Figure 7, the characteristics of the embodiment are shown by a solid line, and the characteristics of the comparative example are shown by a dashed line. As shown in Figure 7, the MAG is improved compared to the comparative example in the frequency range of approximately 80 GHz or higher, and has an upwardly convex frequency dependency in this frequency range. The fact that the MAG has an upwardly convex frequency dependency means that there is a region in which the MAG increases as the frequency increases. For example, the MAG at 105 GHz is larger than the MAG at 80 GHz. In the example of Figure 7, the lower limit frequency of the signal frequency band is around 80 GHz. The maximum oscillation frequency fmax, which is the frequency at which MAG = 0, is also improved compared to the comparative example.

[0059] FIG. 8 shows another example of the frequency dependence of MAG in the field-effect transistor 1 of the embodiment and the field-effect transistor 100 of the comparative example. The simulation conditions are the same as those in FIG. 7 except that the capacitance of the capacitive element 16 is 200 fF. As shown in FIG. 8, MAG is improved over the comparative example in a frequency range of approximately 30 GHz or higher, and exhibits an upwardly convex frequency dependence in this frequency range. For example, MAG at 95 GHz is larger than MAG at 80 GHz. In the example of FIG. 8, the lower limit frequency of the signal frequency band is around 30 GHz. The maximum oscillation frequency fmax is also improved over that of the comparative example.

[0060] By adjusting the characteristics of the impedance element 18, that is, the length and width of the transmission line 14 and the capacitance of the capacitive element 16, it is possible to adjust the frequency range in which the MAG is improved and the amount of improvement in the MAG.

[0061] When the field-effect transistor 1 is used as an amplifying element such as a power amplifier, the total Wg must be increased. In this case, in the configuration of the comparative example, it is common to secure the total Wg while suppressing a decrease in MAG by shortening the gate finger width Wg and increasing the number of gate fingers. However, increasing the number of gate fingers can have the effect of decreasing MAG.

[0062] On the other hand, in the embodiment, since the decrease in MAG can be suppressed even if the gate finger width Wg is increased, the number of gate fingers can be reduced compared to the case where the configuration of the comparative example is used under the same total Wg condition. Therefore, it is possible to suppress the decrease in MAG due to the influence of increasing the number of gate fingers.

[0063] As described above, according to the embodiment, the impedance element 18 can change the phase of the reflection coefficient at the other end of the gate finger 10, as compared to the comparative example in which the other end of the gate finger 10 is open, and as a result, the voltage distribution within the gate finger 10 can be made different. This makes it possible to reduce the effective transconductance gm eff can be increased, so that the MAG can be increased in a predetermined frequency band.

[0064] By using the transmission line 14 and the capacitance element 16 connected in series as the impedance element 18, the capacitance element 16 can be used to adjust the phase of the reflection coefficient, thereby expanding the impedance adjustment range of the impedance element 18 and effectively increasing MAG. Here, the physical length of the transmission line 14 is longer than the gate finger width Wg. Therefore, if a transmission line 14 shorter than the gate finger width Wg is required, it is difficult to physically connect it using only the transmission line 14. In this case, by using the capacitance element 16 to return the phase of the reflection coefficient, the transmission line 14 can be lengthened, making it physically possible to connect it. In this way, using the capacitance element 16 can also alleviate restrictions on the length of the transmission line 14.

[0065] Furthermore, if the absolute value of the impedance of the impedance element 18 is 0Ω or more and 10 kΩ or less in the frequency band of the input signal, the MAG can be increased more effectively.

[0066] The inventors believe that it is extremely difficult to improve MAG by, for example, about two or three times, i.e., about 3 dB to 5 dB, by improving semiconductor process technology, such as by shortening the gate length. The improvement of semiconductor process technology requires a great deal of cost and time. In contrast, in the embodiment, MAG can be improved by, for example, about 6 dB simply by adding impedance element 18 to an existing field-effect transistor using existing semiconductor process technology, thereby suppressing cost increases and eliminating the need for a long development period.

[0067] Next, various configuration examples of the impedance element 18 will be described below. Any configuration can be adopted for the impedance element 18 as long as it can achieve the desired impedance. The following description will focus on differences from the configurations in Figures 3(a) and (b).

[0068] For example, the positional relationship between the transmission line 141a and the source electrode S1a in the thickness direction of the semiconductor substrate 30 may be interchanged so that the entire source electrode S1a is in contact with the semiconductor substrate 30 and the transmission line 141a straddles the source electrode S1a. Similarly, the positional relationship between the transmission line 141b and the source electrode S1b may be interchanged.

[0069] Furthermore, the position of the capacitive element 16 may be on one end side of the gate finger 10a, that is, on the connection portion 12 side, instead of on the other end side of the gate finger 10.

[0070] Also, for example, if the required length of the transmission line 14 is longer than the example of FIG. 3(a), the transmission line 141a may be arranged around the source electrode S1, bypassing the source electrode S1, so as not to overlap with the source electrode S1.

[0071] Furthermore, one of the transmission lines 142 a and 142 b in the impedance element 18 may be omitted, and the upper electrode of the capacitance element 16 may be directly connected to the other end of the gate finger 10 .

[0072] Furthermore, an inductor element may be connected in place of one of the transmission lines 142a, 142b in the impedance element 18. The inductor element may be formed on the semiconductor substrate 30 in a spiral shape or a meander shape.

[0073] According to these configuration examples, the degree of freedom in the configuration of the field effect transistor 1 can be improved.

[0074] Furthermore, as shown in Fig. 9, the capacitance element 16 may not be provided, and the impedance element 18 may be configured with a transmission line 14. In the configuration of Fig. 9, both ends of the impedance element 18 have the same DC potential, so there is no effect on the bias state of the field-effect transistor 1. Fig. 9 is a plan view showing another configuration example of the field-effect transistor 1 according to the embodiment. The longitudinal cross-sectional view of the field-effect transistor 1 of Fig. 9 taken along line A-A' is the same as Fig. 3(b).

[0075] The transmission line 14a has one end connected to one end of the gate finger 10a and the other end connected to the other end of the gate finger 10a. The transmission line 14b has one end connected to one end of the gate finger 10b and the other end connected to the other end of the gate finger 10b. The transmission line 14 has a roughly angular U-shape in a plan view. In this configuration example, the impedance of the impedance element 18 is not an open impedance in DC. According to this configuration example, the impedance element 18 is formed by the transmission line 14 and does not use the capacitance element 16, thereby enabling the impedance element 18 to be realized with a small and simple configuration.

[0076] Alternatively, the transmission line 14 may be omitted, and the capacitance element 16 may be directly connected between one end and the other end of the gate finger 10. That is, the impedance element 18 may be the capacitance element 16. In this case, the capacitance element 16 may have a shape similar to that of the transmission line 14 in FIG. 9 in plan view, i.e., a roughly angular U-shape. That is, the upper electrode and the lower electrode of the capacitance element 16 each have a roughly angular U-shape. For example, one end of the lower electrode of the capacitance element 16 may be directly connected to one end of the gate finger 10, and one end of the upper electrode of the capacitance element 16 may be directly connected to the other end of the gate finger 10. In this case, the source electrode S1 straddles the capacitance element 16. This configuration example improves the degree of freedom in the configuration of the field-effect transistor 1.

[0077] The present disclosure has been described above based on the embodiments. It will be understood by those skilled in the art that the present disclosure is not limited to the above embodiments, that various design changes are possible, and that various modifications are possible, and that such modifications are also within the scope of the present disclosure.

[0078] An outline of one aspect of the present disclosure is as follows: A field-effect transistor according to one aspect of the present disclosure includes a source electrode, a drain electrode, a gate finger having one end to which a signal is input and the other end, and an impedance element connected between the one end and the other end of the gate finger.

[0079] According to this embodiment, the maximum available power gain can be improved.

[0080] The impedance element may include a transmission line and a capacitive element connected in series between one end and the other end of the gate finger, which can effectively increase the maximum available power gain in a predetermined frequency band.

[0081] The impedance element may be a capacitance element connected between one end and the other end of the gate finger, which improves the degree of freedom in the configuration of the field effect transistor.

[0082] The impedance element may be a transmission line, in which case the impedance element can be realized with a small and simple configuration.

[0083] The impedance of the impedance element may be determined so that the maximum available power gain of the field-effect transistor has an upwardly convex frequency dependency in the frequency band of the signal, thereby effectively increasing the maximum available power gain in the frequency band of the signal.

[0084] The impedance of the impedance element may be an open circuit impedance in a direct current. In this case, the impedance element may include a capacitive element. [Explanation of symbols]

[0085] 1...field effect transistor, 10, 10a, 10b...gate fingers, 14, 14a, 14b...transmission lines, 16, 16a, 16b...capacitive elements, 18, 18a, 18b...impedance elements, 100...field effect transistor, 141a, 141b, 142a, 142b...transmission lines, D1...drain electrode, G1...gate electrode, S1, S1a, S1b...source electrodes.< / vg> < / vg> < / vg> < / vg>

Claims

1. A source electrode; A drain electrode; a gate finger having one end to which a signal is input and the other end; an impedance element connected between one end and the other end of the gate finger; A field effect transistor comprising:

2. the impedance element includes a transmission line and a capacitance element connected in series between one end and the other end of the gate finger; 2. The field effect transistor according to claim 1 .

3. the impedance element is a capacitance element connected between one end and the other end of the gate finger; 2. The field effect transistor according to claim 1 .

4. the impedance element is a transmission line; 2. The field effect transistor according to claim 1 .

5. the impedance of the impedance element is determined so that the maximum available power gain of the field effect transistor has an upwardly convex frequency dependency in the frequency band of the signal; 5. A field effect transistor according to claim 1.

6. The impedance of the impedance element is an open circuit impedance in DC.

4. The field effect transistor according to claim 1, wherein the first and second electrodes are electrically connected to each other.

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