Metal-semiconductor contact structure and manufacturing method therefor, solar cell, solar cell string and manufacturing method therefor, and photovoltaic module

Abstract

To provide a metal-semiconductor contact structure and a manufacturing method therefor, a solar cell, a solar cell string and a manufacturing method therefor, and a photovoltaic module, in relation to the technical filed of solar cells.SOLUTION: A metal-semiconductor contact structure includes a doped silicon semiconductor layer, and a metal electrode that is in contact with the doped silicon semiconductor layer and has a metal element. The doped silicon semiconductor layer and the metal electrode have a contact region therebetween, and the contact region includes a first conductive region and a second conductive region located outside the first conductive region. The first conductive region is formed with a pit island in which the metal electrode is recessed toward a direction to the inside of the doped silicon semiconductor layer itself, and the pit island has therein a silicon eutectic crystal electrically in contact with the doped silicon semiconductor layer, and the first conductive region further has a conductive crystal electrically connected to the silicon eutectic crystal. The second conductive region has a conductive aggregate including glass-phase material and conductive metal particles, and the conductive metal particles have a metal element of the same type as the conductive crystal.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present application relates to the technical field of solar cells, and in particular to metal-semiconductor contact structures and fabrication methods, solar cells, solar cell strings and fabrication methods, and photovoltaic modules. [Background technology]

[0002] The metal-semiconductor contact structure is formed when the metal electrode of a solar cell comes into contact with a doped silicon-based semiconductor layer. As a key component of a solar cell, the metal-semiconductor contact structure has a significant impact on the performance of the solar cell.

[0003] In the current metal-semiconductor contact structure of solar cells, the conductive contact performance between the metal material and the semiconductor material is insufficient, resulting in high contact resistance in the conductive contact region. As a result, it is difficult to substantially improve the electrical performance indicators of the solar cell, such as the open circuit voltage and photoelectric conversion efficiency. Summary of the Invention

[0004] In order to solve the above-mentioned technical problems, the present application discloses a metal-semiconductor contact structure and fabrication method, a solar cell, a solar cell string and fabrication method, and a photovoltaic module, which reduces the contact resistance of the conductive contact region of the metal-semiconductor contact structure and improves the performance of the solar cell.

[0005] In a first aspect, the present application provides a metal-semiconductor contact structure, a doped silicon-based semiconductor layer; a metal electrode having a metal element and in contact with the doped silicon-based semiconductor layer, a contact region between the doped silicon-based semiconductor layer and the metal electrode, the contact region including a first conductive region and a second conductive region located outside the first conductive region; In the first conductive region, the metal electrode is recessed toward the inside of the doped silicon-based semiconductor layer itself to form a pit island, and the pit island contains a silicon-based eutectic that is in electrical contact with the doped silicon-based semiconductor layer, and the first conductive region further contains a conductive crystal that is electrically connected to the silicon-based eutectic, The second conductive region has a conductive aggregate including a glass phase material and conductive metal particles, and the conductive metal particles have the same metal element as the conductive crystals.

[0006] Furthermore, some of the conductive metal particles are located on the surface of the doped silicon-based semiconductor layer, and another part of the conductive metal particles is distributed in the glass phase material, and the conductive aggregates contact the doped silicon-based semiconductor layer via the conductive metal particles.

[0007] Furthermore, the pit island includes a plurality of holes and pits positioned on the outer periphery of the holes.

[0008] Furthermore, the distribution density of the holes is 1 / μm 2 ~50 pieces / μm 2 and / or The hole diameter is 10 nm to 100 nm.

[0009] Furthermore, the surface of the area surrounded by the pit islands has a higher roughness than the second conductive area.

[0010] Furthermore, the surface of the doped silicon-based semiconductor layer has a pyramidal texture structure, and the pit islands are located at or near the tips of the pyramidal texture structure.

[0011] Furthermore, the metal electrode includes a silver electrode.

[0012] As an option, the doped silicon-based semiconductor layer may include any one of a doped amorphous silicon layer, a doped polysilicon layer, a doped microcrystalline silicon layer, or a doped crystalline silicon layer, and the doping element may include an N-type doping element or a P-type doping element, the N-type doping element including at least one of a phosphorus element, an antimony element, or an arsenic element, and the P-type doping element including at least one of a boron element, an indium element, or a gallium element.

[0013] Furthermore, the conductive crystal includes a crystalline main chain and crystalline side chains extending from the crystalline main chain in a growth direction different from that of the crystalline main chain.

[0014] Furthermore, the size of the conductive crystals is 1 nm to 30 nm.

[0015] In a second aspect, the present application provides a method for fabricating a metal-semiconductor contact structure, the metal-semiconductor contact structure being the metal-semiconductor contact structure of the first aspect, the method comprising: printing an electrode paste on the doped silicon-based semiconductor layer, the electrode paste including the glass phase material, a metal material, and an organic carrier; pre-sintering the electrode paste at a high temperature to form the pit islands on a portion of a surface of the doped silicon-based semiconductor layer and to form an electrode precursor on the doped silicon-based semiconductor layer, the electrode precursor including the glass phase material and the conductive metal particles encapsulated in the glass phase material; performing a laser-induced contact process on the electrode precursor to form the metal electrode, and forming the metal-semiconductor contact structure between the metal electrode and the doped silicon-based semiconductor layer.

[0016] Furthermore, in the step of pre-sintering the electrode paste at a high temperature, the sintering temperature is 700°C to 850°C.

[0017] Furthermore, in the laser-induced contact treatment, a reverse bias voltage of 9V to 15V is applied.

[0018] Furthermore, the step of subjecting the electrode precursor to laser-induced catalytic treatment includes applying a reverse bias voltage, and the laser-induced catalytic treatment is performed under the conditions of a single wavelength spectrum of 500 nm to 1200 nm and a current density of 1000 A / cm. 2 ~1400A / cm 2 and the scanning speed is 35m / s to 55m / s.

[0019] Furthermore, the method for fabricating the metal-semiconductor contact structure includes the steps of: further comprising performing light injection after the step of pre-sintering the electrode paste at an elevated temperature and before the step of performing a laser-induced contact treatment on the electrode precursor; Alternatively, the method for fabricating the metal-semiconductor contact structure comprises the steps of: The method further includes performing optical injection after the step of performing laser-induced contact treatment on the electrode precursor.

[0020] Furthermore, the step of injecting light includes: The electrode precursor is heated for the first time, and the peak temperature of the first heating is 200°C to 600°C; The electrode precursor is heated for a second time and irradiated with light, the peak temperature of the second heating is 100°C to 300°C, and the energy density of the light irradiation is 10 kW / m 2 ~100kW / m 2 and the wavelength of the light irradiation is in a continuous spectral band of 500 nm to 1200 nm.

[0021] In a third aspect, the present application provides a solar cell, the solar cell comprising the metal-semiconductor contact structure according to the first aspect, or comprising a metal-semiconductor contact structure fabricated by the method for fabricating a metal-semiconductor contact structure according to the second aspect.

[0022] Optionally, the solar cell comprises a PERC cell, a HJT cell, a TOPCon cell, an IBC cell or a perovskite-crystalline silicon stack solar cell.

[0023] In an alternative embodiment, the solar cell is a TOPCon cell; a silicon substrate; a PN junction region, a first passivation layer, and a first metal electrode are sequentially provided on a light-receiving surface of the silicon base layer along a direction away from the light-receiving surface, the PN junction region being a first doped silicon-based semiconductor layer; a passivation contact structure, a second passivation layer, and a second metal electrode are sequentially provided on the non-light-receiving surface of the silicon substrate along a direction away from the non-light-receiving surface, the passivation contact structure including a tunnel passivation layer provided close to the silicon substrate and a doped silicon layer provided away from the silicon substrate, the doped silicon layer being a second doped silicon-based semiconductor layer having the same conductivity type as the silicon substrate; The first metal electrode penetrates a portion of the first passivation layer and contacts the first doped silicon-based semiconductor layer, thereby forming the metal-semiconductor contact structure between the PN junction region and the first metal electrode, and / or the second metal electrode penetrates the second passivation layer and contacts the doped silicon layer, thereby forming the metal-semiconductor contact structure between the doped silicon layer and the second metal electrode.

[0024] Furthermore, the first doped silicon-based semiconductor layer is formed by thermally diffusing a doping element into the silicon substrate, or the first doped silicon-based semiconductor layer is a doped polysilicon layer or a doped amorphous silicon layer deposited on the light-receiving surface of the silicon substrate; and / or the first passivation layer is one or more of an aluminum oxide layer, a silicon oxide layer, a silicon nitride oxide layer, or a silicon nitride layer deposited on the PN junction region; and / or the tunnel passivation layer is at least one of a silicon oxide layer, an amorphous silicon layer, a polysilicon layer, a silicon carbide layer, and / or The second passivation layer is one or more of a silicon oxide layer, a silicon nitride oxide layer, or a silicon nitride layer deposited on the second doped silicon-based semiconductor layer.

[0025] In an alternative embodiment, the solar cell is an HJT cell; a silicon substrate; a first intrinsic amorphous silicon layer, a first doped silicon-based semiconductor layer, a first transparent conductive layer, and a first metal electrode disposed on the light-receiving surface of the silicon substrate, which are sequentially disposed on the light-receiving surface of the silicon substrate; a second intrinsic amorphous silicon layer, a second doped silicon-based semiconductor layer, a second transparent conductive layer, and a second metal electrode disposed on the non-light-receiving surface of the silicon substrate, which are sequentially disposed on the non-light-receiving surface of the silicon substrate; The metal-semiconductor contact structure is formed between the first metal electrode, the first doped silicon-based semiconductor layer, and the first transparent conductive layer, and / or the metal-semiconductor contact structure is formed between the second metal electrode, the second doped silicon-based semiconductor layer, and the second transparent conductive layer.

[0026] Furthermore, the first intrinsic amorphous silicon layer comprises one or more of an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer, and a silicon oxide layer; and / or the first doped silicon-based semiconductor layer is one or more doped silicon layers; and / or the first transparent conductive layer is one or more of an indium tin oxide layer, an aluminum doped zinc oxide layer, a zinc oxide layer, an indium oxide layer, or a tin oxide layer; and / or the second intrinsic amorphous silicon layer comprises one or more of an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer, and / or the second doped silicon-based semiconductor layer is one or more doped silicon layers; and / or The second transparent conductive layer is one or more of an indium tin oxide layer, an aluminum doped zinc oxide layer, a zinc oxide layer, an indium oxide layer, or a tin oxide layer.

[0027] In an alternative embodiment, the solar cell is a PERC solar cell; a silicon substrate; a first doped silicon-based semiconductor layer and a first passivation layer sequentially formed on the light-receiving surface of the silicon substrate; a first metal electrode extending through the first passivation layer and forming the metal-semiconductor contact structure with the first doped silicon-based semiconductor layer.

[0028] Furthermore, the first doped silicon-based semiconductor layer is one or more doped silicon layers; and / or The solar cell further includes a second doped silicon-based semiconductor layer and a back surface field passivation layer sequentially disposed on the non-light-receiving surface of the silicon substrate, and a second metal electrode is further provided on the non-light-receiving surface side of the silicon substrate in ohmic contact with the second doped silicon-based semiconductor layer.

[0029] In an alternative embodiment, the solar cell is an IBC solar cell; a silicon substrate; a tunnel passivation layer of an N-type conductive region, a first doped silicon-based semiconductor layer, a first passivation layer, and a first metal electrode, which are sequentially disposed on the non-light-receiving surface of the silicon substrate; the tunnel passivation layer of a P-type conductive region, a second doped silicon-based semiconductor layer, a second passivation layer, and a second metal electrode, which are sequentially disposed on a non-light-receiving surface of the silicon substrate, wherein one of the first doped silicon-based semiconductor layer and the second doped silicon-based semiconductor layer has an N-type doping element, and the other has a P-type doping element; The first metal electrode penetrates the first passivation layer and contacts the first doped silicon-based semiconductor layer, so that the first metal electrode and the first doped silicon-based semiconductor layer form the metal-semiconductor contact structure, and / or the second metal electrode penetrates the second passivation layer and contacts the second doped silicon-based semiconductor layer, so that the second metal electrode and the second doped silicon-based semiconductor layer form the metal-semiconductor contact structure.

[0030] In a fourth aspect, the present application provides a method of making a solar cell string, comprising: welding a plurality of solar cells according to the third aspect to form a cell string precursor; and performing a laser-induced contact treatment on the battery string precursor to obtain the solar cell string.

[0031] Furthermore, the step of subjecting the battery string precursor to a laser-induced contact treatment comprises: The applied reverse bias voltage is between 10V and 50V, and / or The wavelength of the laser is between 500 nm and 1200 nm, and / or The laser energy density is 10 kW / m 2 ~10000kW / m 2 and / or The laser scanning speed is 26 m / s to 65 m / s.

[0032] In a fifth aspect, the present application provides a solar cell string, the solar cell string being produced by the method for producing a solar cell string according to the fourth aspect.

[0033] In a sixth aspect, the present application provides a photovoltaic module, the photovoltaic module comprising the solar cell string according to the fifth aspect.

[0034] Compared with the prior art, the present invention has at least the following beneficial effects:

[0035] The present embodiment provides a metal-semiconductor contact structure with a novel configuration, which has a wide variety of conductive structures and excellent conductive ability, and can effectively improve the contact performance between the metal electrode and the doped silicon-based semiconductor layer, reduce the contact resistance therebetween, improve the carrier transport ability, and effectively improve indicators such as the open circuit voltage, fill factor, and photoelectric conversion efficiency of the solar cell.

[0036] In order to more clearly explain the technical aspects of the embodiments of the present application, the accompanying drawings used in the embodiments will be briefly introduced below. However, the accompanying drawings in the following description are only a part of the embodiments of the present application, and it is clear to those skilled in the art that other accompanying drawings can be obtained from these drawings without any creative efforts. [Brief explanation of the drawings]

[0037] [Figure 1] FIG. 1 is a schematic diagram illustrating the configuration of a first solar cell according to an embodiment of the present invention. [Figure 2] FIG. 2 is an enlarged schematic diagram of the configuration of part A in FIG. [Figure 3] FIG. 2 is a schematic diagram illustrating the configuration of a first conductive region in a metal-semiconductor contact structure according to an embodiment of the present invention. [Figure 4] FIG. 2 is a schematic diagram illustrating the configuration of a second solar cell according to an embodiment of the present invention. [Figure 5] FIG. 10 is a schematic diagram illustrating the configuration of a third solar cell according to an embodiment of the present invention. [Figure 6] FIG. 10 is a schematic diagram illustrating the configuration of a fourth solar cell according to an embodiment of the present invention. [Figure 7] FIG. 2 is an SEM image of the contact interface of the metal-semiconductor contact structure of the solar cell of Example 1 of the present application. [Figure 8] FIG. 8 is an enlarged schematic view of the pit island in FIG. 7. DETAILED DESCRIPTION OF THE INVENTION

[0038] The technical aspects of the present invention will be described below clearly and completely with reference to the accompanying drawings of the present invention, but it is clear that the described embodiments are only a part of the present invention and do not include all of the embodiments. Based on the present invention, any other embodiments that can be obtained by a person skilled in the art without paying any creative effort also fall within the scope of protection of the present invention.

[0039] In this application, terms such as "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "vertical," "horizontal," "lateral," "longitudinal," etc., indicate orientations or positional relationships based on those shown in the accompanying drawings. These terms are primarily used to better explain the application and its embodiments, and are not intended to limit the illustrated devices, elements, or components to have a particular orientation or to be constructed and operated in a particular orientation.

[0040] Furthermore, the terms described above may be used to indicate other meanings in addition to orientation or positional relationships, for example, the term "on" may also be used to indicate a particular dependency or connection relationship in some cases. Those skilled in the art will be able to understand the specific meanings of these terms in the present application depending on the specific circumstances.

[0041] Furthermore, terms such as "mounted," "installed," "provided," "connected," and "contacted" should be understood broadly. For example, they may refer to a fixed connection, a removable connection, or an integral structure, a mechanical connection, an electrical connection, a direct connection, an indirect connection via an intermediate medium, or an internal connection between two devices, elements, or components. Those skilled in the art can understand the specific meanings of the above terms in this application depending on the specific circumstances.

[0042] Furthermore, terms such as "first," "second," etc. are used primarily to distinguish between different devices, elements, or components (which may be the same or different in specific type or structure) and are not intended to specify or imply the relative importance or number of the indicated devices, elements, or components. Unless otherwise specified, the term "plurality" means two or more.

[0043] A metal-semiconductor contact structure is a metal-semiconductor contact structure formed by contacting a metal electrode and a semiconductor layer in a solar cell. Because carriers are transported through the metal-semiconductor contact structure, the performance of the metal-semiconductor contact structure has a significant impact on performance indicators such as the photoelectric conversion efficiency of the solar cell.

[0044] In the related art, the contact resistance between the metal electrode and the semiconductor layer in a solar cell is insufficient. Therefore, the present application proposes a novel metal-semiconductor contact structure and a method for fabricating the same, a solar cell, a solar cell string and a method for fabricating the same, and a photovoltaic module, which further optimizes the contact performance between the metal electrode and the semiconductor layer and reduces the contact resistance therebetween.

[0045] The metal-semiconductor contact structure of the present embodiment is applicable to solar cells (especially crystalline silicon solar cells), and therefore, when introducing the solar cells of the present embodiment, the metal-semiconductor contact structure and its fabrication method will also be introduced, and the metal-semiconductor contact structure and its fabrication method will not be described repeatedly.

[0046] In a first aspect, the present invention provides a solar cell having a metal-semiconductor contact structure. As shown in FIG. 1, FIG. 1 is a schematic diagram of the structure of a first solar cell of the present invention, and the solar cell comprises: a silicon substrate 100; a doped silicon-based semiconductor layer 200 and a passivation layer 400 sequentially disposed on the surface of a silicon substrate 100; and a metal electrode 300 that penetrates the passivation layer 400 and is in physical contact with the doped silicon-based semiconductor layer 200.

[0047] That is, the metal electrode 300 and the doped silicon-based semiconductor layer 200 in physical contact form a metal-semiconductor contact structure 1, where "in physical contact" means direct contact between the metal electrode 300 structure and the doped silicon-based semiconductor layer 200 structure.

[0048] The doped silicon-based semiconductor layer 200 can be disposed on the light-receiving surface and / or the non-light-receiving surface of the silicon base layer 100, and correspondingly, the metal-semiconductor contact structure 1 can be disposed on the light-receiving surface and / or the non-light-receiving surface of the silicon base layer 100. As shown in Fig. 1 , the doped silicon-based semiconductor layer 200 includes a first doped silicon-based semiconductor layer 201 disposed on the light-receiving surface of the silicon base layer 100 and a second doped silicon-based semiconductor layer 202 disposed on the non-light-receiving surface of the silicon base layer 100. The passivation layer 400 includes a first passivation layer 401 disposed on the surface of the first doped silicon-based semiconductor layer 201 facing away from the silicon base layer 100, and a second passivation layer 402 disposed on the surface of the second doped silicon-based semiconductor layer 202 facing away from the silicon base layer 100. The metal electrode 300 includes a first metal electrode 301 in contact with the first doped silicon-based semiconductor layer 201 and a second metal electrode 302 in contact with the second doped silicon-based semiconductor layer 202. The first doped silicon-based semiconductor layer 201 contacts the first metal electrode 301, thereby forming a metal-semiconductor contact structure 1 located on the light-receiving surface of the silicon base layer 100. The second doped silicon-based semiconductor layer 202 contacts the second metal electrode 302, thereby forming a metal-semiconductor contact structure 1 located on the non-light-receiving surface of the silicon base layer 100.

[0049] The metal-semiconductor contact structure 1 according to the embodiment of the present invention will be further described below by taking the metal-semiconductor contact structure 1 located on the light-receiving surface of the silicon substrate 100 as an example.

[0050] As shown in Figures 2 and 3, Figure 2 is an enlarged schematic diagram of the configuration of part A in Figure 1 and is also a schematic diagram of the configuration of the metal-semiconductor contact structure of an embodiment of the present application, and Figure 3 is a schematic diagram of the configuration of the first conductive region in the metal-semiconductor contact structure of an embodiment of the present application.

[0051] In the metal-semiconductor contact structure 1, the first doped silicon-based semiconductor layer 201 contains a doping element, and the first metal electrode 301 contains a metal element. A contact region is formed between the first doped silicon-based semiconductor layer 201 and the first metal electrode 301, and the contact region includes a first conductive region 11 and a second conductive region 12 located outside the first conductive region 11.

[0052] In the first conductive region 11, the first metal electrode 301 in contact with the first doped silicon-based semiconductor layer 201 is recessed toward the first doped silicon-based semiconductor layer 201 (i.e., in FIG. 2, the upper surface of the first doped silicon-based semiconductor layer 201 is recessed downward), and a pit-island 111 shown in FIG. 7 is formed.

[0053] The pit island 111 includes a silicon-based eutectic 112, specifically, a plurality of silicon-based eutectics 112 are included in at least some of the pits of the pit island 111, and these silicon-based eutectics 112 are in electrical contact with the first doped silicon-based semiconductor layer 201. The first conductive region 11 further includes a conductive crystal 113 electrically connected to the silicon-based eutectic 112. The silicon-based eutectic 112 includes a co-crystal formed by co-crystallization of a silicon element and a metal element. The conductive crystal 113 is formed extending from the silicon-based eutectic 112 to the first metal electrode 301 (i.e., in FIG. 2, the conductive crystal 113 is formed extending upward from the silicon-based eutectic 112), and includes a crystal formed by crystallization of a metal element.

[0054] The second conductive region 12 has conductive aggregates 121, and the conductive aggregates 121 include a glass phase material 1211 and conductive metal particles 1212 distributed in the glass phase material 1211. The conductive metal particles 1212 contain the same metal element as the silicon-based eutectic 112 and the conductive crystals 113.

[0055] Compared with metal-semiconductor contact structures of the related art, the metal-semiconductor contact structure 1 of the present embodiment includes conductive crystal 113 with higher conductivity and silicon-based eutectic 112 for improving the conductivity of the semiconductor silicon material, thereby significantly improving the conductivity of the conductive structure that outputs holes or electrons of the solar cell, and optimizing the conductive structure effectively improves the contact performance between the metal electrode 300 and the doped silicon-based semiconductor layer 200. Thus, by improving and optimizing the metal-semiconductor contact structure 1 as described above, the contact performance between the doped silicon-based semiconductor layer 200 and the metal electrode 300 is improved, the contact resistance is reduced, and the carrier transport capacity is improved, and further the open circuit voltage and photoelectric conversion efficiency of the solar cell are effectively improved.

[0056] The first conductive region 11 includes a silicon-based eutectic 112 and conductive crystals 113 in electrical contact with the silicon-based eutectic 112. The silicon-based eutectic 112 is present in the doped silicon-based semiconductor layer 200 corresponding to the pit islands 111, and includes a co-crystal formed of a metal element and a silicon element, so that the silicon-based eutectic 112 is in electrical contact with the doped silicon-based semiconductor layer 200. Such a silicon-based eutectic 112 is formed by doping a semiconductor silicon material with metal atoms having high conductivity, which can significantly improve the conductivity of the semiconductor silicon material, i.e., the transport ability of photo-generated carriers in the silicon-based eutectic 112 is greatly improved, and the contact resistance between the metal electrode 300 and the doped silicon-based semiconductor layer 200 is reduced.

[0057] Furthermore, the conductive crystals 113 are formed extending from the silicon-based eutectic 112 to the metal electrode 300, and include crystals formed by crystallizing metal elements, so that the conductive crystals 113 are in electrical contact with the silicon-based eutectic 112. Compared to a configuration in which the conductive metal particles 1212 are in contact with a semiconductor material, the conductive crystals 113 formed by crystallizing metal elements have high purity and high conductivity, which reduces the series resistance of the solar cell and improves the photoelectric conversion efficiency.

[0058] As a result, in the present embodiment, in the first conductive region 11, due to the conductive contact between the doped silicon-based semiconductor layer 200 and the silicon-based eutectic 112, and the conductive contact between the silicon-based eutectic 112 and the conductive crystal 113, a first carrier transport path for photo-generated carriers in the contact region of the metal-semiconductor contact structure 1, i.e., a path extending from the silicon base layer 100, the doped silicon-based semiconductor layer 200, the silicon-based eutectic 112, and the conductive crystal 113, is formed.

[0059] Furthermore, in the conductive aggregate 121, some of the conductive metal particles 1212 are located on the surface of the doped silicon-based semiconductor layer 200, and other conductive metal particles 1212 are distributed within the glass phase material 1211, and the conductive aggregate 121 is in electrical contact with the doped silicon-based semiconductor layer 200 via the conductive metal particles 1212.

[0060] As a result, in the present embodiment, in the second conductive region 12, the conductive contact between the doped silicon-based semiconductor layer 200 and the conductive assemblies 121 forms a second carrier transport path for photo-generated carriers in the contact interface region of the metal-semiconductor contact structure 1, i.e., a path extending from the silicon substrate 100 to the doped silicon-based semiconductor layer 200 and the conductive assemblies 121. After being transported into the doped silicon-based semiconductor layer 200, the photo-generated carriers generated in the silicon substrate 100 can also be transported by the conductive metal particles 1212 that are in direct contact with the doped silicon-based semiconductor layer 200. Because the conductive assemblies 121 contain a glass phase material 1211 with high resistivity, the conductive performance of the second carrier transport path is weaker than that of the first carrier transport path.

[0061] The pit island 111 will be further described below.

[0062] 7, a pit island 111 includes a plurality of adjacent or connected holes 111a, and a plurality of pits 111b of different depths extend around the periphery of the holes 111a, and the depth of the pits 111b gradually decreases in the direction away from the holes 111a, forming the peripheral boundary of the pit island 111. When the boundary distance between two adjacent holes 111a within a pit island 111 is 200 nm or less, the adjacent holes 111a belong to the same pit island 111, and the boundary distance between the two adjacent holes 111a is defined as the shortest connecting distance between the boundaries of the two adjacent holes 111a.

[0063] Furthermore, the distribution density of the holes 111a is 1 / μm 2 ~50 pieces / μm 2 The diameter of the holes 111a is 10 nm to 100 nm.

[0064] The pit islands 111 are concentrated in a narrow region on the surface of the doped silicon-based semiconductor layer 200, and the surface of the region surrounded by the pit islands 111 has a higher roughness than the second conductive region 12. The above-mentioned roughness can characterize the degree of erosion of the passivation film layer corresponding to the doped silicon-based semiconductor layer 200, with a higher roughness indicating a higher degree of erosion of the passivation film layer. Taking the pit islands 111 shown in FIGS. 7 and 8 as an example, the higher roughness of the central hole 111A indicates a high degree of erosion of the passivation film layer and significant corrosion of the doped silicon-based semiconductor layer. The pits 111b formed around the hole 111a are also rougher than the surface of the second conductive region 12; specifically, there is shallow erosion in the surface of the doped silicon-based semiconductor layer. The silicon-based eutectic 112 located within the pit islands 111 allows the silicon-based eutectic 112 in the metal-semiconductor contact structure 1 to be more abundant and densely distributed. The silicon-based eutectic 112 and conductive crystals 113 distributed within the pit islands 111 contribute to further reducing the contact resistance between the metal electrode 300 and the doped silicon-based semiconductor layer 200 .

[0065] Furthermore, the surface of the doped silicon-based semiconductor layer 200 has a pyramidal texture structure, and the pit islands 111 are located at and / or near the tips of the pyramidal texture structure, for example, on the side surfaces close to the tips.

[0066] Hereinafter, the metal electrode and the doped silicon-based semiconductor layer will be further described by taking the first metal electrode and the first doped silicon-based semiconductor layer as an example.

[0067] The first metal electrode 301 containing a metal element means that the first metal electrode 301 is mainly composed of a material corresponding to the metal element. For example, if the first metal electrode 301 is a silver electrode, the main component of the first metal electrode 301 is elemental silver. Preferably, the metal electrode 300 is a silver electrode. More preferably, the silver electrode contains less than 0.1 wt% metallic aluminum impurities.

[0068] The first doped silicon-based semiconductor layer 201 containing a doping element means that the first doped silicon-based semiconductor layer 201 is mainly composed of silicon element and doped with a small amount of other doping element, thereby improving the transport ability of the first doped silicon-based semiconductor layer 201 for electron carriers or hole carriers. For example, if the first doped silicon-based semiconductor layer 201 is a PN junction region, the first doped silicon-based semiconductor layer 201 is mainly composed of a doped silicon-based film layer having P-type doping or N-type doping. The PN junction region may be a diffused silicon layer formed by diffusing a doping element different from that of the silicon base layer 100 into the silicon base layer 100, or may be a crystalline silicon layer doped with a doping element formed on the silicon base layer 100 by deposition (e.g., deposition method such as LPCVD or PECVD). The doping element includes an N-type doping element or a P-type doping element, where the N-type doping element includes at least one of a phosphorus element, an antimony element, or an arsenic element, and the P-type doping element includes at least one of a boron element, an indium element, or a gallium element. Illustratively, the doping element is, for example, a phosphorus element or a boron element, which means that when the main component is a silicon layer, a certain concentration of the doping element may be further doped.

[0069] Note that no passivation layer is included in the contact region between the first doped silicon-based semiconductor layer 201 corresponding to the pit island and the conductive crystal 113, but a passivation layer is included in the contact region between the first doped silicon-based semiconductor layer 201 corresponding to the second conductive region 12 and the conductive aggregate 121.

[0070] As an option, the first doped silicon-based semiconductor layer 201 is a doped silicon layer. The doped silicon layer includes at least one of a doped amorphous silicon layer, a doped polysilicon layer, a doped microcrystalline silicon layer, and a doped crystalline silicon layer. When the first doped silicon-based semiconductor layer 201 includes a doped crystalline silicon layer, the doped crystalline silicon layer can be fabricated by thermally diffusing a doping element onto the crystalline silicon. For example, in a passivation contact solar cell, the first doped silicon-based semiconductor layer 201 is a doped silicon layer, such as a doped amorphous silicon layer or a PN junction region (the PN junction region is a silicon layer formed on the silicon substrate 100 by high-temperature diffusion). For example, the silicon substrate 100 is an N-type silicon substrate 100, the first metal electrode 301 is a silver electrode, and the first doped silicon-based semiconductor layer 201 is a PN junction region formed by diffusing boron into the N-type silicon substrate 100. The above-mentioned metal-semiconductor contact structure 1 is a contact structure formed by a silver electrode and a PN junction. In the conductive structure at the contact interface, the silicon-based eutectic 112 is a co-crystalline structure formed by silver atoms and silicon atoms, the conductive crystal 113 is a crystal formed by crystallization of silver atoms, i.e., a crystalline silver monomer, and the conductive aggregate 121 includes a glass phase material 1211 and conductive silver particles, which are silver nanoparticles.

[0071] The conductive crystal 113 will be further described below.

[0072] 3, in the metal-semiconductor contact structure 1 of the present embodiment, the conductive crystal 113 includes a crystalline main chain 1131 and crystalline side chains 1132 extending from the crystalline main chain 1131 in a growth direction different from that of the crystalline main chain 1131. In the present embodiment, the entire conductive crystal 113 has a dendritic crystal structure due to the crystalline main chain 1131 and the side chains growing laterally from the crystalline main chain 1131.

[0073] The size of the conductive crystals is 1 nm to 30 nm.

[0074] The method for fabricating the above-mentioned metal-semiconductor contact structure will now be further introduced.

[0075] The method for fabricating the metal-semiconductor contact structure comprises: printing an electrode paste, including a glass phase material, conductive metal particles, and an organic carrier, onto the first doped silicon-based semiconductor layer; pre-sintering the electrode paste at a high temperature to form pit islands on a portion of a surface of the first doped silicon-based semiconductor layer and to form an electrode precursor on the first doped silicon-based semiconductor layer, the electrode precursor including a glass phase material and conductive metal particles encapsulated in the glass phase material, and the sintering temperature is equal to or higher than a peak sintering temperature of the electrode paste; and performing a laser-induced contact process on the electrode precursor to form a first metal electrode and forming the above-described metal-semiconductor contact structure between the first metal electrode and the first doped silicon-based semiconductor layer.

[0076] The peak sintering temperature of an electrode paste refers to the sintering temperature range at which the glass phase material in the electrode paste erodes the passivation film layer and reduces the resistivity of the conductive metal particles in the electrode paste after sintering (to less than 1.5 mΩ·cm). Those skilled in the art typically define this sintering temperature range as the peak sintering temperature of the electrode paste. Furthermore, at this peak sintering temperature, most of the organic carrier in the electrode paste is decomposed or volatilized, so the electrode precursor formed after sintering mainly contains the glass phase material and the conductive metal particles encapsulated in the glass phase material.

[0077] Based on this, in the fabrication method of the present embodiment, a laser-induced contact treatment is further performed on the electrode precursor (at which time a reverse bias voltage is applied). The reverse bias voltage further enhances the built-in electric field of the solar cell at the contact interface between the first doped silicon-based semiconductor layer and the electrode precursor, while the laser-induced contact treatment generates a large number of photogenerated carriers (i.e., electron-hole pairs). These actions cooperate to sort electron carriers and hole carriers by the electric field, and carriers with a single type of charge characteristic are rapidly transported to the first doped silicon-based semiconductor layer due to the acceleration of the electric field (for example, if the first doped silicon-based semiconductor layer has a pyramidal texture structure, carriers are more likely to be transported to the tips and their vicinity). A large amount of heat is generated when these carriers pass through the glass phase material with high resistivity. Because carriers are transported along the path of maximum conductivity and the passivation layer at and near the tips of the pyramids is prone to being bombarded and tumbled by the deposited atoms during the formation of the passivation layer, the passivation layer at and near the tips of the pyramids is thinner and has a higher conductivity that is favorable for carrier transport compared to the non-tip parts of the pyramids. Therefore, pit islands usually appear at and near the tips of the pyramids in the areas covered by the electrode grid lines of the solar cell electrodes.

[0078] As can be seen from the above, in the method for fabricating a metal-semiconductor contact structure according to the present embodiment, by combining high-temperature pre-sintering of a specific electrode paste with laser-induced contact treatment, it is possible to form a metal-semiconductor contact structure having the above-mentioned structural characteristics, and since extensive corrosion of the passivation layer covering the surface of the doped silicon-based semiconductor layer is not caused, the metal-semiconductor contact structure has an excellent surface passivation effect.

[0079] Furthermore, in the high-temperature pre-sintering step of the electrode paste, the high-temperature (peak) sintering temperature is 700° C. to 850° C. Compared with the high-temperature pre-sintering operation in the related art, the present example does not extensively corrode the surface of the doped silicon-based semiconductor layer despite adopting the high-temperature pre-sintering conditions.

[0080] Furthermore, in the step of performing laser-induced contact treatment on the electrode precursor, the applied reverse bias voltage is 9V to 15V. The level of heat generated when carriers generated by the laser-induced contact treatment pass through the contact interface between the first doped silicon-based semiconductor layer and the electrode precursor is closely related to the above-mentioned range of reverse bias voltage. When the reverse bias voltage is within the above-mentioned range, the carriers pass through the contact interface and generate high heat of 1500K to 8000K. This high heat decomposes the glass phase material at the corresponding location, appropriately expanding the pit islands and providing space for the continued growth of more silicon-based eutectic. Furthermore, in the region where the metal electrode is located within the pit island, pits are generated due to the decomposition of the glass phase material, providing space for the growth of conductive crystals. Under the above-mentioned reverse bias voltage conditions, the glass phase material in the pits is completely or almost completely decomposed. When the reverse bias voltage is a small voltage value within the above range, most of the glass phase material in the pits is decomposed, leaving only a small portion, and conductive crystals still grow in the pits. In addition, since the volume fraction of the glass phase material is reduced, the cooperative effect of the pits and the conductive structure can also improve the carrier transport ability of the first conductive region. Exemplary reverse bias voltages are 9V, 10V, 11V, 12V, 13V, 14V, or 15V.

[0081] Preferably, the reverse bias voltage applied in the step of performing laser-induced contact treatment on the electrode precursor is 11 V. Under the above-mentioned preferable reverse bias voltage conditions, a high temperature of 1000 K to 8000 K can be generated at the contact interface. Such an instantaneous high temperature not only decomposes the glass phase material, leaving only conductive crystals or almost only conductive crystals in the pits, but also melts the conductive metal particles at the contact interface, causing mutual melt diffusion of molten semiconductor atoms and metal atoms, forming a semiconductor silicon layer doped with metal atoms, and improving the carrier transport ability of the silicon-based eutectic.

[0082] Furthermore, in the step of applying a reverse bias voltage to the electrode precursor and the step of performing a laser-induced contact treatment, the conditions of the laser-induced contact treatment are a single wavelength spectrum of 500 nm to 1200 nm, a current density of 1000 A / cm 2 ~1400A / cm 2 , including scanning speeds of 35m / s to 55m / s.

[0083] Under the conditions of the laser-induced catalytic treatment described above, a laser with a single wavelength is used to excite photo-generated carriers in the first doped silicon-based semiconductor layer 201. For example, the wavelength of the incident laser in the laser-induced catalytic treatment is 532 nm, 635 nm, 650 nm, 808 nm, 980 nm, or 1064 nm. When the semiconductor element of the first doped silicon-based semiconductor layer 201 is silicon element and the laser-induced catalytic treatment is performed using a laser, a laser with a wavelength of 1064 nm or 808 nm is preferred.

[0084] Preferably, the method for fabricating the metal-semiconductor contact structure further comprises the step of light injection.

[0085] In one embodiment, photoinjection is performed after the step of high temperature pre-sintering of the electrode paste and before the step of laser-induced contact treatment on the electrode precursor. In another embodiment, photoinjection is performed after the step of laser-induced contact treatment on the electrode precursor.

[0086] The primary purpose of the photo-implantation process is to improve passivation performance. The photo-implantation annealing furnace process involves two steps: first, increasing the temperature to activate H atoms in the silicon nitride passivation film; and second, controlling the valence state of the H atoms through photoirradiation so that they combine with recombination centers (defects) in the P+ emitter and N-type substrate to form non-recombination centers. Ultimately, a good passivation effect is achieved, achieving the goals of improving the open-circuit voltage and fill factor.

[0087] Furthermore, compared to the laser-induced contact treatment followed by photoimplantation, the method of pre-sintering the electrode paste at high temperature, followed by photoimplantation, and then laser-induced contact treatment on the electrode precursor is advantageous for optimizing solar cell performance because the photoimplantation process generates a certain amount of heat, and photoimplantation before laser-induced contact treatment on the electrode precursor can have a passivation effect on grain boundaries and defect states.

[0088] Furthermore, the light injection process adjusts the Fermi energy level change by temperature and light irradiation intensity, controls the total amount and valence of hydrogen, and improves passivation performance. The light injection step includes: first heating the electrode precursor, with the peak temperature of the first heating being 200°C to 600°C; and second heating and light irradiation of the electrode precursor, with the peak temperature of the second heating being 100°C to 300°C; and the energy density of the light irradiation is 10 kW / m2 to 100 kW / m2. 2 and the wavelength of the light irradiation is a continuous spectral band of 500 nm to 1200 nm. By controlling the heating conditions and light irradiation conditions within the above ranges in the light injection step, a good passivation effect can be achieved and the occurrence of a situation in which the glass phase material corrodes the first doped silicon-based semiconductor layer due to an excessively high heating temperature can be avoided. Note that in the light injection step of the present embodiment, a continuous spectral band of wavelengths of 500 nm to 1200 nm is irradiated, which is different from the single-wavelength laser used in the laser-induced contact treatment step.

[0089] Other structural film layers of the solar cell of the present embodiment will be further described below.

[0090] 1 , in the solar cell of the present embodiment, the silicon substrate 100 has N-type or P-type conductivity, for example, the silicon substrate 100 is an N-type silicon wafer. The light-receiving surface of the silicon substrate 100 has a textured structure, for example, a pyramidal textured structure. The textured structure reduces the reflectivity of the surface of the silicon substrate 100 and contributes to increasing the refraction and scattering of light within the silicon substrate 100.

[0091] On the light-receiving surface of the silicon substrate 100, the first doped silicon-based semiconductor layer 201 may be a diffusion layer formed by diffusing an N-type doping element or a P-type doping element into the silicon substrate 100, or may be a doped polysilicon layer or a doped amorphous silicon layer formed on the light-receiving surface of the silicon substrate 100 by a deposition method. For example, the first doped silicon-based semiconductor layer 201 may be a boron diffusion layer of the silicon substrate, thereby forming a PN junction between an N-type silicon wafer and the first doped silicon-based semiconductor layer 201. When the silicon substrate 100 has a textured structure, the surface of the first doped silicon-based semiconductor layer 201 also has a similar textured structure.

[0092] The first doped silicon-based semiconductor layer 201 further includes a first passivation layer 401 on the surface opposite to the silicon substrate 100. The first passivation layer 401 includes one or more composite layers of an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer. In the solar cell shown in FIG. 1 , the first passivation layer 401 includes an aluminum oxide passivation layer 4011 disposed adjacent to the first doped silicon-based semiconductor layer 201, and an anti-reflection layer 4012 with anti-reflection function disposed away from the first doped silicon-based semiconductor layer 201. The first metal electrode 301 sequentially passes through the anti-reflection layer 4012 and the aluminum oxide passivation layer 4011 to contact the first doped silicon-based semiconductor layer 201.

[0093] The above is an introduction to the structured film layers on the light-receiving surface of a solar cell. It should be understood that, depending on the structural characteristics of different types of solar cells, film layers with different structural characteristics may be provided on the light-receiving surface and non-light-receiving surface of the solar cell. For example, the metal-semiconductor contact structure 1 described above can be employed even when the non-light-receiving surface film layer includes a second metal electrode 302 and a second doped silicon-based semiconductor layer 202 that contact each other. Furthermore, the method for forming the structured film layers may be conventionally employed in the prior art. For example, the silicon substrate 100 having a textured structure may be obtained by texturing, the first doped silicon-based semiconductor layer 201 having a PN junction may be obtained by doping with a doping element through thermal diffusion doping, and the first passivation layer 401 may be obtained by an ALD or PECVD process. Furthermore, in the embodiments of the present application, conventional methods such as polishing and cleaning may be employed during the formation of each structured film layer, depending on the formation of the plating layer, borosilicate glass layer, or phosphosilicate glass layer, but the present application is not limited thereto.

[0094] For example, the solar cell shown in FIG. 1 is a TOPCON solar cell. On the non-light-receiving surface of the silicon substrate 100, a tunnel passivation layer 500, a second doped silicon-based semiconductor layer 202, a second passivation layer 402, and a patterned second metal electrode 302 are sequentially formed along the direction opposite to the silicon substrate 100, and the second metal electrode 302 penetrates the second passivation layer 402 and contacts the second doped silicon-based semiconductor layer 202.

[0095] The material of the tunnel passivation layer 500 includes at least one of a plurality of dielectric materials, such as silicon oxide, amorphous silicon, polysilicon, and silicon carbide. Specifically, the tunnel passivation layer 500 may be composed of a silicon oxide layer containing silicon oxide. This is because a silicon oxide layer has excellent passivation performance, minimizes recombination loss of minority carriers at the surface of the semiconductor substrate, and is a film with excellent durability against subsequent high-temperature processes. The tunnel passivation layer 500 may also serve as a pinhole channel for free carrier movement within the solar cell. Heavily doped polysilicon selectively allows majority carriers to pass through, thereby contributing to reducing recombination loss of minority carriers. The second doped silicon-based semiconductor layer 202 is a phosphorus-doped polysilicon layer, and the second passivation layer 402 is a passivation layer, and its material may be selected from any one or any combination of silicon oxide, aluminum oxide, silicon carbide, vaporized silicon, or silicon oxynitride layers.

[0096] As shown in FIG. 4, FIG. 4 is a schematic diagram of the configuration of a second solar cell of the present embodiment, which is an HJT solar cell; a silicon substrate 100; a first intrinsic amorphous silicon layer 601, a first doped silicon-based semiconductor layer 201, and a first transparent conductive layer 701, which are sequentially disposed on the light-receiving surface of the silicon substrate 100; a first metal electrode 301 which, together with the first doped silicon-based semiconductor layer 201 and the first transparent conductive layer 701, forms a metal-semiconductor contact structure 1.

[0097] The silicon substrate 100 has N-type or P-type conductivity, for example, an N-type crystalline silicon layer. The light-receiving surface of the silicon substrate 100 has a textured structure, for example, a pyramidal textured structure. The first intrinsic amorphous silicon layer 601 is one or more intrinsic amorphous silicon layers and / or hydrogenated amorphous silicon layers. The first doped silicon-based semiconductor layer 201 is one or more N-type or P-type doped silicon layers, and the doped silicon layers are doped amorphous silicon layers or doped microcrystalline silicon layers. The first transparent conductive layer 701 is one or more of an indium tin oxide layer, an aluminum-doped zinc oxide layer, a zinc oxide layer, an indium oxide layer, or a tin oxide layer.

[0098] In an alternative embodiment, the silicon base layer 100 is an N-type crystalline silicon layer, the first doped silicon-based semiconductor layer 201 is a P-type doped microcrystalline silicon layer or an N-type doped microcrystalline silicon layer, the first transparent conductive layer 701 is an indium tin oxide layer, and the first metal electrode 301 is a silver electrode.

[0099] When fabricating the metal-semiconductor contact structure 1, the laser-induced contact process instantaneously generates localized heat concentration points, and the doped microcrystalline silicon layer, the first transparent conductive layer 701, and the metallic silver particles in the electrode paste are instantaneously melted by a large amount of heat, and some of the silver atoms are sequentially diffused into the first transparent conductive layer 701 and the P-type doped microcrystalline silicon film, and in the subsequent cooling process, a metal-semiconductor contact structure 1 consisting of doped silicon, indium tin oxide, and silver atoms is formed.

[0100] It should be understood that the non-light-receiving surface of the silicon substrate 100 may have a structure film layer symmetrical to the light-receiving surface, that is, the second intrinsic amorphous silicon layer 602, the second doped silicon-based semiconductor layer 202, and the second transparent conductive layer 702 are sequentially disposed on the non-light-receiving surface of the silicon substrate 100, and the second metal electrode 302 is formed on the non-light-receiving surface, where the second metal electrode 302, the second doped silicon-based semiconductor layer 202, and the second transparent conductive layer 702 form a metal-semiconductor contact structure 1.

[0101] As shown in FIG. 5, FIG. 5 is a schematic diagram of the configuration of a third solar cell according to an embodiment of the present invention, which is a PERC solar cell; a silicon substrate 100; a first doped silicon-based semiconductor layer 201 and a first passivation layer 401 sequentially formed on the light-receiving surface of the silicon substrate 100; a first metal electrode 301 that penetrates the first passivation layer 401 and forms an ohmic contact with the first doped silicon-based semiconductor layer 201; The first metal electrode 301 and the first doped silicon-based semiconductor layer 201 form a metal-semiconductor contact structure 1 .

[0102] The silicon substrate 100 has an N-type conductivity or a P-type conductivity, for example, the silicon substrate 100 is a P-type silicon substrate 100. The light-receiving surface of the silicon substrate 100 has a textured structure, for example, a pyramidal textured structure. The textured structure reduces the reflectivity of the surface of the silicon substrate 100 and contributes to increasing the refraction and scattering of light within the silicon substrate 100. The first doped silicon-based semiconductor layer 201 is one or more N-type doped silicon layers or P-type doped silicon layers. In an alternative embodiment, the silicon substrate 100 is a P-type crystalline silicon layer, the first doped silicon-based semiconductor layer 201 is an N-type doped crystalline silicon layer, and the metal electrode 300 is a silver electrode.

[0103] It should be understood that the non-light-receiving surface of the silicon substrate 100 may have other structural film layers corresponding to the structural characteristics of a PERC battery. For example, a back surface field passivation layer 800 having negative charge characteristics is provided on the non-light-receiving surface of the silicon substrate 100. A second metal electrode 302 on the non-light-receiving surface is provided on the surface of the back surface field passivation layer 800 opposite the silicon substrate 100 and makes ohmic contact with the second doped silicon-based semiconductor layer 202.

[0104] As shown in FIG. 6, FIG. 6 is a schematic diagram of the configuration of a fourth solar cell according to the present invention, which is an IBC solar cell. a silicon substrate 100; a tunnel passivation layer 500 of an N-type conductive region, a first doped silicon-based semiconductor layer 201 having an N-type doping element, and a first passivation layer 401, which are sequentially disposed on the non-light-receiving surface of the silicon substrate 100; and a tunnel passivation layer 500 of a P-type conductive region, a second doped silicon-based semiconductor layer 202 having a P-type doping element, and a second passivation layer 402, which are sequentially disposed on the non-light-receiving surface of the silicon substrate 100; a first metal electrode 301 penetrating the first passivation layer 401 of the N-type conductive region and making ohmic contact with the first doped silicon-based semiconductor layer 201 so as to form a first metal-semiconductor contact structure 1 together with the first doped silicon-based semiconductor layer 201; and a second metal electrode 302 that penetrates the second passivation layer 402 of the P-type conductivity region and makes ohmic contact with the second doped silicon-based semiconductor layer 202 so as to form a second metal-semiconductor contact structure 1 together with the second doped silicon-based semiconductor layer 202.

[0105] The silicon substrate 100 has an N-type conductivity or a P-type conductivity. For example, the silicon substrate 100 is an N-type silicon substrate 100. The light-receiving surface of the silicon substrate 100 has a textured structure, for example, a pyramidal textured structure. The textured structure reduces the reflectance of the surface of the silicon substrate 100 and contributes to improving the light trapping effect of light within the silicon substrate 100. In addition, other structural film layers may be provided on the light-receiving surface of the silicon substrate 100 according to actual needs. For example, a third passivation layer 403 is provided on the light-receiving surface of the silicon substrate 100.

[0106] The present embodiment further provides a fifth solar cell (not shown) that is a perovskite-crystalline silicon stacked solar cell, in which a perovskite cell functions as the top cell and any one of the first to fourth solar cells described above functions as the bottom cell, and a metal-semiconductor contact structure consisting of a first conductive region having a conductive crystal and a silicon-based eutectic and a second conductive region having a conductive aggregate is simply disposed on the non-light-receiving surface of the crystalline silicon bottom cell.

[0107] In a second aspect, the present invention provides a method for fabricating a solar cell string, the method comprising: welding a plurality of solar cells according to the second aspect to form a battery string precursor; and performing a laser-induced contact treatment on the battery string precursor to obtain the solar cell string.

[0108] The present application welded solar cells having the aforementioned metal-semiconductor contact structure and found that significant performance degradation occurred after welding for several solar cells in the present examples. Through investigation, it was found that the main cause was that conductive structures such as silicon-based eutectic and conductive crystals, which are intended to improve the contact performance of the metal-semiconductor contact structure, were prone to fracture and melt during the solar cell string welding process, resulting in a decrease in the conductive ability of the solar cells. Therefore, the present application re-performs a laser-induced contact treatment on the battery string precursor formed after welding the solar cell string, repairing the fractured and melted silicon-based eutectic and conductive crystals and restoring the carrier transport path, ensuring good contact performance of the metal-semiconductor contact structure and mitigating the problem of attenuation of photoelectric conversion efficiency during welding of the solar cells to the solar cell string.

[0109] Furthermore, in the step of subjecting the battery string precursor to a laser-induced contact treatment, The reverse bias voltage is between 10V and 50V, and / or The wavelength of the laser is between 500 nm and 1200 nm, and / or The laser energy density is 10 kW / m 2 ~10000kW / m 2 and / or The laser scanning speed is 26 m / s to 65 m / s.

[0110] In a third aspect, the present invention provides a solar cell string fabricated by the fabrication method described in the second aspect.

[0111] In a fourth aspect, the present embodiment provides a photovoltaic module comprising the solar cell according to the first aspect. A plurality of the solar cells described above are connected in series and / or parallel and packaged to form a photovoltaic module.

[0112] The present application will be further described below based on more specific examples. The sodium hydroxide, TS40 additive, electrode paste, and other materials used in the following examples are all commercially available products. For example, the electrode paste used is commercially available DK-93T type silver electrode paste, which has an Al content of 0.05 wt% to 0.10 wt% and an oxygen content of 1.0 wt% to 5.0 wt%. The element contents in the silver electrode paste can be measured using an energy dispersive spectrometer (EDS).

[0113] Example 1 This example provides a solar cell having a metal-semiconductor contact structure, and the fabrication method thereof is as follows.

[0114] (1) Texturing In a tank-type device, sodium hydroxide and TS40-type additives are used in a volume ratio of 7:1, and the temperature is maintained at 80°C for 7 minutes to perform high-speed texturing on the silicon substrate, resulting in a silicon substrate with a thinning amount controlled to 5 μm.

[0115] (2) Boron diffusion The textured silicon substrate is placed in a boron diffusion furnace, and BCl3 is introduced at 850°C to 1050°C to diffuse the boron, forming a boron diffusion layer.

[0116] (3) Alkaline etching A chain-type high-frequency device is used to remove the borosilicate glass formed by boron diffusion on the non-light-receiving surface of the silicon substrate, and a tank-type alkaline etching device is used to remove the PN junction on the non-light-receiving surface and edge of the silicon substrate.

[0117] (4) Fabrication of tunnel passivation layer A tunnel passivation layer of silicon oxide is deposited on the non-light-receiving surface of the silicon substrate using a tube-type PECVD apparatus.

[0118] (5) Preparation of phosphorus-doped amorphous silicon layer A phosphorus-doped polysilicon layer is deposited on the tunnel passivation layer using a tube-type PECVD apparatus.

[0119] (6) Annealing Annealing is performed in a tube-type annealing furnace.

[0120] (7) RCA cleaning The phosphorus-doped polysilicon layer plated on the light-receiving surface and its mask layer are removed by 5% mass concentration hydrofluoric acid while passing through a chain-type device, and then loaded into a tank-type alkaline etching device to remove the plating layer on the light-receiving surface.

[0121] (8) Deposition of passivation layer An aluminum oxide layer is deposited as a first passivation layer on the boron diffusion layer using an ALD apparatus, a silicon nitride oxide layer is deposited as an anti-reflection layer on the aluminum oxide layer using a PECVD apparatus, and a silicon nitride oxide layer is deposited as a second passivation layer on the phosphorus-doped polysilicon layer using a PECVD apparatus, and the first passivation layer, the anti-reflection layer, and the second passivation layer can all be understood as passivation layers provided on doped silicon-based semiconductor layers.

[0122] (9) Fabrication of metal-semiconductor contact structures (9.1) Screen-print electrode paste onto the anti-reflection layer and the second passivation layer, respectively.

[0123] (9.2) High-temperature pre-sintering of electrode paste The electrode paste is pre-sintered at a high sintering temperature of 800°C to form an electrode precursor.

[0124] (9.3) Light injection The electrode precursor was heated to 500°C, which was the peak temperature of the first heating, and then heated to 200°C, which was the peak temperature of the second heating, with the light energy density being 50 kW / m 2The light injection is performed in a continuous spectral band with a wavelength of 500 nm to 1200 nm.

[0125] (9.4) Application of reverse bias voltage to electrode precursor after photo-implantation and laser-induced contact treatment A reverse bias voltage is applied to the electrode precursor and laser irradiation is performed to convert the electrode precursor located on the light-receiving surface and / or the non-light-receiving surface into a first metal electrode and a second metal electrode, the first metal electrode penetrates the anti-reflection layer and the first passivation layer to contact the boron diffusion layer and form a first metal-semiconductor contact structure, and the second metal electrode penetrates the second passivation layer to contact the phosphorus-doped polysilicon layer and form a second metal-semiconductor contact structure, the reverse bias voltage is 15 V, and the laser-induced contact treatment conditions are a laser wavelength of 1064 nm and a current density of 1200 A / cm 2 , including a scanning speed of 40 m / s.

[0126] The metal-semiconductor contact structure in the solar cell of this example was photographed using a scanning electron microscope, and an SEM image such as that shown in FIG. 7 was obtained.

[0127] Example 2 The difference between this embodiment and the first embodiment is that in the step of fabricating the metal-semiconductor contact structure, the electrode paste is pre-sintered at a high temperature, followed by laser-induced contact treatment, and then optical injection.

[0128] Example 3 This embodiment is different from the first embodiment in that no light injection is performed in the step of fabricating the metal-semiconductor contact structure.

[0129] Example 4 This embodiment provides a solar cell string, and the manufacturing method thereof includes: welding six solar cells of Example 1 to form a battery string precursor; and performing a laser-induced catalytic treatment on the battery string precursor to form a solar cell string, wherein the reverse bias voltage is 50 V, and the laser-induced catalytic treatment conditions are a laser wavelength of 1064 nm and a light energy density of 5000 kW / m 2 , including a scanning speed of 50 m / s.

[0130] Performance test description Scanning Electron Microscope (SEM) Test By chemical etching, first, the silver block of the metal electrode on the outermost layer of the solar cell is corroded with nitric acid to expose the glass phase material component for burning off the passivation layer, and then the glass phase material component layer is corroded with hydrofluoric acid to expose the pit islands located at the contact interface of the metal-semiconductor contact structure, which are then photographed by a scanning electron microscope to obtain the corresponding SEM images.

[0131] Although the technical aspects disclosed in the examples of the present application have been introduced in detail and specific examples have been used to explain the principles and embodiments of the present application, the explanation of the above examples is merely intended to facilitate understanding of the technical aspects of the examples and the core of the invention. Furthermore, those skilled in the art may make changes to the specific embodiments and application scope based on the spirit of the present application. In light of the above, the contents of this specification should not be construed as limiting the present application. [Explanation of symbols]

[0132] 100 silicon substrate, 200 doped silicon-based semiconductor layer, 201 first doped silicon-based semiconductor layer, 202 second doped silicon-based semiconductor layer, 300 metal electrode, 301 first metal electrode, 302 second metal electrode, 400 passivation layer, 401 first passivation layer, 4011 aluminum oxide passivation layer, 4012 anti-reflection layer, 402 second passivation layer, 403 third passivation layer, 500 tunnel passivation layer, 601 first intrinsic amorphous silicon layer, 602 second intrinsic amorphous silicon layer, 701 first transparent conductive layer, 702 second transparent conductive layer, 800 back surface field passivation layer 1 metal-semiconductor contact structure, 11 first conductive region, 111 pit island, 111a hole, 111b pit, 112 silicon-based eutectic, 113 conductive crystal, 1131 crystalline main chain, 1132 crystalline side chain, 12 second conductive region, 121 conductive aggregate, 1211 glass phase material, 1212 conductive metal particle.

Claims

1. A metal-semiconductor contact structure comprising: a doped silicon-based semiconductor layer; a metal electrode having a metal element and in contact with the doped silicon-based semiconductor layer, a contact region between the doped silicon-based semiconductor layer and the metal electrode, the contact region including a first conductive region and a second conductive region located outside the first conductive region; In the first conductive region, the metal electrode is recessed toward the inside of the doped silicon-based semiconductor layer itself, forming a pit island, and the pit island contains a silicon-based eutectic that is in electrical contact with the doped silicon-based semiconductor layer, and the first conductive region further contains a conductive crystal that is electrically connected to the silicon-based eutectic, The second conductive region has a conductive aggregate including a glass phase material and conductive metal particles, and the conductive metal particles have the same metal element as the conductive crystals.

2. 2. The metal-semiconductor contact structure according to claim 1, wherein a portion of the conductive metal particles is located on the surface of the doped silicon-based semiconductor layer, and another portion of the conductive metal particles is distributed in the glass phase material, and the conductive aggregates contact the doped silicon-based semiconductor layer via the conductive metal particles.

3. 2. The metal-semiconductor contact structure according to claim 1, wherein the pit island includes a plurality of holes and pits positioned on the periphery of the holes.

4. The distribution density of the holes is 1 / μm ２ ~50 pieces / μm ２ and / or 4. The metal-semiconductor contact structure according to claim 3, wherein the hole has a diameter of 10 nm to 100 nm.

5. 2. The metal-semiconductor contact structure of claim 1, wherein the surface of the area surrounded by the pit islands has a higher roughness than the second conductive area.

6. 2. The metal-semiconductor contact structure according to claim 1, wherein the surface of the doped silicon-based semiconductor layer has a pyramidal texture structure, and the pit islands are located at or near the tips of the pyramidal texture structure.

7. the metal material of the metal electrode comprises a silver material; and / or 7. The metal-semiconductor contact structure according to claim 1, wherein the doped silicon-based semiconductor layer comprises any one of a doped amorphous silicon layer, a doped polysilicon layer, a doped microcrystalline silicon layer, and a doped crystalline silicon layer.

8. The metal-semiconductor contact structure according to any one of claims 1 to 6, characterized in that the conductive crystal includes a crystalline main chain and a crystalline side chain extending from the crystalline main chain in a growth direction different from that of the crystalline main chain.

9. 7. The metal-semiconductor contact structure according to claim 1, wherein the conductive crystals have a size of 1 nm to 30 nm.

10. 1. A method for fabricating a metal-semiconductor contact structure, comprising: The metal-semiconductor contact structure is a metal-semiconductor contact structure according to any one of claims 1 to 6, The method for fabricating the metal-semiconductor contact structure comprises: printing an electrode paste on the doped silicon-based semiconductor layer, the electrode paste including the glass phase material, a metal material, and an organic carrier; pre-sintering the electrode paste at a high temperature to form the pit islands on a portion of a surface of the doped silicon-based semiconductor layer and to form an electrode precursor on the doped silicon-based semiconductor layer, the electrode precursor including the glass phase material and the conductive metal particles encapsulated in the glass phase material; performing a laser-induced contact process on the electrode precursor to form the metal electrode; and forming the metal-semiconductor contact structure between the metal electrode and the doped silicon-based semiconductor layer.

11. 11. The method for fabricating a metal-semiconductor contact structure according to claim 10, wherein in the step of pre-sintering the electrode paste at a high temperature, the sintering temperature is 700 to 850°C.

12. 11. The method for producing a metal-semiconductor contact structure according to claim 10, wherein a reverse bias voltage of 9V to 15V is applied in the laser-induced contact treatment.

13. The conditions for the laser-induced contact treatment were a single wavelength spectrum of 500 nm to 1200 nm and a current density of 1000 A / cm ２ ~1400 A / cm ２ 11. The method for fabricating a metal-semiconductor contact structure according to claim 10, wherein the scanning speed is 35 m / s to 55 m / s.

14. The method for fabricating the metal-semiconductor contact structure comprises: further comprising performing light injection after the step of pre-sintering the electrode paste at an elevated temperature and before the step of performing a laser-induced contact treatment on the electrode precursor; Alternatively, the method for fabricating the metal-semiconductor contact structure comprises the steps of:

11. The method of claim 10, further comprising photo-implanting the electrode precursor after the step of subjecting the electrode precursor to laser-induced contact processing.

15. The step of injecting light includes: The electrode precursor is heated for the first time, and the peak temperature of the first heating is 200°C to 600°C; The electrode precursor is heated for a second time and irradiated with light, the peak temperature of the second heating is 100°C to 300°C, and the energy density of the light irradiation is 10 kW / m ２ ~100kW / m ２ 15. The method for fabricating a metal-semiconductor contact structure according to claim 14, further comprising: a) applying light having a wavelength in a continuous spectral band of 500 nm to 1200 nm;

16. comprising a metal-semiconductor contact structure according to any one of claims 1 to 6, or A solar cell comprising a metal-semiconductor contact structure produced by the method for producing a metal-semiconductor contact structure according to any one of claims 10 to 15.

17. 17. The solar cell of claim 16, wherein the solar cell comprises a PERC cell, a HJT cell, a TOPCon cell, an IBC cell, or a perovskite-crystalline silicon stacked solar cell.

18. the solar cell is a TOPCon cell; a silicon substrate; a PN junction region, a first passivation layer, and a first metal electrode are sequentially provided on a light-receiving surface of the silicon base layer along a direction away from the light-receiving surface, the PN junction region being a first doped silicon-based semiconductor layer; a passivation contact structure, a second passivation layer, and a second metal electrode are sequentially provided on the non-light-receiving surface of the silicon substrate along a direction away from the non-light-receiving surface, the passivation contact structure including a tunnel passivation layer provided close to the silicon substrate and a doped silicon layer provided away from the silicon substrate, the doped silicon layer being a second doped silicon-based semiconductor layer having the same conductivity type as the silicon substrate; 18. The solar cell according to claim 17, wherein the first metal electrode penetrates a portion of the first passivation layer and contacts the first doped silicon-based semiconductor layer, thereby forming the metal-semiconductor contact structure between the PN junction region and the first metal electrode, and / or the second metal electrode penetrates the second passivation layer and contacts the doped silicon layer, thereby forming the metal-semiconductor contact structure between the doped silicon layer and the second metal electrode.

19. The first doped silicon-based semiconductor layer is formed by thermally diffusing a doping element into the silicon substrate, or the first doped silicon-based semiconductor layer is a doped polysilicon layer or a doped amorphous silicon layer deposited on the light-receiving surface of the silicon substrate; and / or the first passivation layer is one or more of an aluminum oxide layer, a silicon oxide layer, a silicon nitride oxide layer, or a silicon nitride layer deposited on the PN junction region; and / or the tunnel passivation layer is at least one of a silicon oxide layer, an amorphous silicon layer, a polysilicon layer, a silicon carbide layer, and / or 20. The solar cell of claim 18, wherein the second passivation layer is one or more of a silicon oxide layer, a silicon nitride oxide layer, or a silicon nitride layer deposited on the second doped silicon-based semiconductor layer.

20. The solar cell is a HJT cell, a silicon substrate; a first intrinsic amorphous silicon layer, a first doped silicon-based semiconductor layer, a first transparent conductive layer, and a first metal electrode disposed on the light-receiving surface of the silicon substrate, which are sequentially disposed on the light-receiving surface of the silicon substrate; a second intrinsic amorphous silicon layer, a second doped silicon-based semiconductor layer, a second transparent conductive layer, and a second metal electrode disposed on the non-light-receiving surface of the silicon substrate, which are sequentially disposed on the non-light-receiving surface of the silicon substrate; 18. The solar cell according to claim 17, wherein the metal-semiconductor contact structure is formed between the first metal electrode, the first doped silicon-based semiconductor layer, and the first transparent conductive layer, and / or the metal-semiconductor contact structure is formed between the second metal electrode, the second doped silicon-based semiconductor layer, and the second transparent conductive layer.

21. the first intrinsic amorphous silicon layer comprises one or more of an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer, a silicon oxide layer; and / or the first doped silicon-based semiconductor layer is one or more doped silicon layers; and / or the first transparent conductive layer is one or more of an indium tin oxide layer, an aluminum doped zinc oxide layer, a zinc oxide layer, an indium oxide layer, or a tin oxide layer; and / or the second intrinsic amorphous silicon layer comprises one or more of an intrinsic amorphous silicon layer, a hydrogenated amorphous silicon layer, and / or the second doped silicon-based semiconductor layer is one or more doped silicon layers; and / or 21. The solar cell of claim 20, wherein the second transparent conductive layer is one or more of an indium tin oxide layer, an aluminum doped zinc oxide layer, a zinc oxide layer, an indium oxide layer, or a tin oxide layer.

22. the solar cell is a PERC solar cell; a silicon substrate; a first doped silicon-based semiconductor layer and a first passivation layer sequentially formed on the light-receiving surface of the silicon substrate; 18. The solar cell of claim 17, further comprising: a first metal electrode extending through the first passivation layer to form the metal-semiconductor contact structure with the first doped silicon-based semiconductor layer.

23. 23. The solar cell of claim 22, further comprising a second doped silicon-based semiconductor layer and a back surface field passivation layer sequentially disposed on a non-light-receiving surface of the silicon substrate, and a second metal electrode in ohmic contact with the second doped silicon-based semiconductor layer is further provided on the non-light-receiving surface side of the silicon substrate.

24. the solar cell is an IBC solar cell, a silicon substrate; a tunnel passivation layer of an N-type conductive region, a first doped silicon-based semiconductor layer, a first passivation layer, and a first metal electrode, which are sequentially disposed on the non-light-receiving surface of the silicon substrate; the tunnel passivation layer of a P-type conductive region, a second doped silicon-based semiconductor layer, a second passivation layer, and a second metal electrode, which are sequentially disposed on a non-light-receiving surface of the silicon substrate, wherein one of the first doped silicon-based semiconductor layer and the second doped silicon-based semiconductor layer has an N-type doping element, and the other has a P-type doping element; 18. The solar cell according to claim 17, wherein the first metal electrode penetrates the first passivation layer and contacts the first doped silicon-based semiconductor layer, thereby forming the metal-semiconductor contact structure between the first metal electrode and the first doped silicon-based semiconductor layer, and / or the second metal electrode penetrates the second passivation layer and contacts the second doped silicon-based semiconductor layer, thereby forming the metal-semiconductor contact structure between the second metal electrode and the second doped silicon-based semiconductor layer.

25. A method for fabricating a solar cell string, comprising: welding a plurality of solar cells according to claim 16 to form a cell string precursor; and performing a laser-induced contact treatment on the battery string precursor to obtain the solar cell string.

26. The step of subjecting the battery string precursor to a laser-induced contact treatment comprises: the applied reverse bias voltage is between 10V and 50V; and / or the wavelength of the laser is between 500 nm and 1200 nm; and / or The laser energy density is 10 kW / m ２ ~10000kW / m ２ and / or 26. The method for producing a solar cell string according to claim 25, wherein the laser scanning speed is 26 m / s to 65 m / s.

27. 27. A solar cell string manufactured by the method for manufacturing a solar cell string according to claim 25 or 26, wherein the solar cell string includes the solar cells connected in series and / or in parallel.

28. 1. A photovoltaic module comprising: The photovoltaic module includes the solar cell string according to claim 25 or 26, Alternatively, the photovoltaic module comprises the solar cell string according to claim 27.

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