Scanning Ion Beam Deposition and Etching
By employing asymmetric scanning speeds in ion beam etching, the process effectively compensates for and controls inboard and outboard asymmetry, ensuring uniform etching across the wafer and improving the precision of etched features.
Patent Information
- Application Number
- JP2024548715
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-03-03
- Filing Date
- 2023-02-08
- Publication Date
- 2025-04-10
AI Technical Summary
Ion beam etching processes often result in inboard and outboard asymmetry of etched device shapes on wafers due to beam divergence and wafer tilt, leading to non-uniform etching across the wafer.
The use of asymmetric scanning speeds during the ion beam etch process, where the scanning speed varies based on the position of the wafer relative to the ion beam, helps to compensate for and even exaggerate the asymmetry between the inboard and outboard sides of the device, while maintaining overall etching uniformity across the wafer.
This approach effectively addresses the asymmetry issues in ion beam etching, ensuring that the etched features on the wafer exhibit consistent shapes and dimensions, regardless of their location, thereby improving the precision and uniformity of the etching process.
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Figure 2025508752000001_ABST
Abstract
Description
[Technical field]
[0001] This application is a continuation-in-part of U.S. patent application Ser. No. 17 / 536,025, "Scanning Ion Beam Etch," filed November 27, 2021, which is a divisional application of U.S. patent application Ser. No. 16 / 398,487, "Scanning Ion Beam Etch," filed April 30, 2019, which claims the benefit of U.S. patent application Ser. No. 62 / 666,324, filed May 3, 2018, the contents of which are incorporated by reference in their entirety herein.
[0002] This disclosure relates to the field of charged particle sources, including plasma sources for direct etching and deposition, broad beam ion sources for ion beam deposition and etching, and electron sources for surface modification. [Background technology]
[0003] FIG. 1 shows an ion beam etch (IBE) system. In an IBE process, a wafer 180 is placed in front of an ion source 105. At least one surface of the wafer 180 can be exposed to the beam 130. The ion source 105 can be comprised of a plasma chamber 110 and an ion extraction grid system 150. The ion extraction grid system 150 is comprised of a number of conductive plates with a number of holes aligned between the plates. The grid system 150 helps extract and collimate the ion beamlets emerging from each of the holes in the plates to form a substantially parallel ion beam 130. The plasma in the plasma source may be generated by methods known in the art, including direct current (DC) and radio frequency (RF) inductively coupled plasma (ICP) coils 160. The energy of the ions extracted from the ion source 105 is determined by the voltage applied to the grid system 150.
[0004] To prevent charge damage from ions bombarding the wafer, an electron source 230 may be placed between the ion extraction grid system 150 and the wafer stage. The wafer 180 is placed on the wafer stage 140. The stage 140 may rotate the wafer about a central axis 220. The stage 140 may tilt the wafer 180 relative to the ion beam 130 for at least a portion of the etching process. Ions from the beam 130 may be directed at any angle relative to the wafer surface by tilting the wafer 180. Any solid material may be etched in the IBE process. Provision may be made on the wafer stage 140 for cooling the wafer 180 during the etching process to prevent thermal damage to devices on the wafer 180. The wafer 180 may be heated to a certain temperature to enhance the ion beam etching process.
[0005] A typical wafer 180 may contain many devices and may be covered with a photoresist mask or other type of mask. These devices may be processed using ion beam exposure to etch a desired shape of the device onto the wafer 180. The desired shape of the device may be achieved by adjusting process parameters including, for example, the wafer tilt angle during etching, duration of etching, beam energy, beam current, photoresist mask sidewall angle, wafer temperature, etc. If the device is made of multiple layers of material and precise end pointing of the etch at a given layer is often desired, an end point detector 240 may be placed in line of sight of the wafer 180.
[0006] Devices on the wafer 180 being etched are expected to exhibit similar shapes (e.g., sidewall profiles, etc.) to each other. However, devices may exhibit different shapes depending on the location of the device on the wafer 180. One example of a specific type of shape difference is called inboard asymmetry and outboard asymmetry. Figures 2a-c are schematic diagrams of the asymmetry of the inboard (IB) side 191 of a device and the outboard (OB) side 192 of a device after ion beam etching. The asymmetry can be quantified as the sidewall angle difference on one side α to the other side β. Figure 2a shows a symmetric etch. Figures 2b and 2c show an asymmetric etch.
[0007] Asymmetry between the IB side 191 and the OB side 192 of a device in ion beam etching often has a particular relationship to the tilt of the wafer 180. This relationship is illustrated in Figures 3a-3b. Figure 3a is a top view of a wafer 180 being etched. The tilt axis runs along the diagonal of the wafer as shown for the top view of the wafer. In Figure 3a, the wafer 180 is being etched by an ion beam impinging on it from a direction perpendicular to the page. Figure 3b is a cross-section of Figure 3a along the wafer diagonal perpendicular to the tilt axis. In Figure 3b, the cross-section of the wafer, the direction of the tilt axis runs along the center of the wafer and perpendicular to the page. Asymmetry between the IB side 191 of a device and the OB side 192 of a device can be seen on devices located towards the top and bottom of the wafer 180. The asymmetry becomes more pronounced as the device moves further away from the tilt axis and the tilt angle increases, for example, the wafer 180 is tilted further away from the normal incidence angle of the incident beam.
[0008] In a perfect ion source and grid system, all beamlets would be perfectly collimated and would not diverge from the intended direction. In such a system, all features etched into the wafer 180 would be perfectly symmetric. A practical ion beam etching system would have a non-zero beam divergence.
[0009] In practice, as shown in FIG. 4, the ion source generates an ion beam, which is a collection of beamlets with a finite, non-zero beam divergence. The beamlet divergence 131 is shown in this figure. The result of the beamlet divergence is that as the wafer is tilted away from normal beam incidence, more intense etching occurs on the side of the wafer 180 closer to the ion source and less intense etching occurs on the side of the wafer 180 farther from the ion source. By rotating the wafer 180 about axis 220, the etch depth can be made more uniform in the areas of the wafer 180 that are feature-free. However, devices on the wafer 180 are typically made of three-dimensional features rather than flat surfaces. On three-dimensional features on the wafer 180, the effect of tilting the wafer 180 away from normal beam incidence, combined with the beam divergence, is that the inboard side 191 of the devices on the wafer 180 receives a different amount of beam exposure than the outboard side 192 of the devices. This inboard and outboard asymmetry becomes more pronounced as the device location moves further away from the tilt axis of the wafer 180 and as the tilt angle moves further away from normal beam incidence.
[0010] By translating (e.g., scanning) the wafer 180 across the beam, asymmetries between the inboard side 191 of the device and the outboard side 192 of the device can be addressed. In FIG. 5, the region marked by double arrow 550 is the region where ion beam exposure of the wafer occurs. A single instance of wafer translation, i.e., a translation starting from any point where all areas of the wafer are outside the region indicated by 550, i.e., a translation path that passes the wafer through the region represented by 550, is considered one scan. In FIG. 7, the region 550 where ion beam exposure occurs is defined by the introduction of physical beam blocks 171 and 172.
[0011] In some embodiments, the path of the wafer 180 during translation is defined as a scan path. The scan path can be in a plane that is parallel (or nearly parallel) to the plane of the tilted wafer surface during at least one scan. The scan path of the wafer translation can be linear for at least one scan. The path of the wafer translation can be non-linear (e.g., curved) for at least one scan. The scan path can be parallel to the tilted wafer 180 for at least one scan. The wafer tilt can be constant during the scan path for at least one scan. The wafer tilt can vary along the scan path for at least one scan. The scan path can be parallel to the wafer 180 for at least one point in the scan for at least one scan. The scan path can be parallel to the wafer 180 at all points during the scan for at least one scan. The scan path can be in a different plane than the wafer 180 for at least one scan. The scan path may be in a plane parallel (or nearly parallel) to the plane of the tilted wafer surface for all scans. The scan path of wafer translation may be linear for all scans. The path of wafer translation may be non-linear (e.g., curved) for all scans. The scan path may be parallel to the tilted wafer 180 for all scans. The wafer tilt may be constant throughout the scan path for all scans. The wafer tilt may vary along the scan path for all scans. The scan path may be parallel to the wafer 180 for at least one point in the scan for all scans. The scan path may be parallel to the wafer 180 at all points during the scan for all scans. The scan path may be in a different plane than the wafer 180 for all scans. Summary of the Invention
[0012] According to an embodiment, the present disclosure relates to using asymmetric scan rates in an ion beam etching process to correct for etch asymmetry between the inboard and outboard sides of device structures on a wafer while maintaining overall etch uniformity across the entire wafer.
[0013] According to another embodiment, the present disclosure relates to using asymmetric scan rates in an ion beam etching process to generate exaggerated asymmetry in etching between the inboard and outboard sides of devices on a wafer while maintaining overall uniformity of the etching across the entire wafer.
[0014] According to another embodiment, the present disclosure relates to using symmetric velocity scanning to allow control of inboard and outboard asymmetry even when the ion beam system is configured with a small ion source and a small grid. Without asymmetric velocity scanning, the ion source and grid would need to be of lateral dimensions larger than the sum of the wafer diameter and twice the divergence of the beamlets projected onto the plane of the scan, and the ion beam density would need to be highly uniform across the lateral dimensions.
[0015] According to another embodiment, the present disclosure relates to using asymmetric velocity scans in combination with symmetric velocity scans to address inboard and outboard asymmetry and wafer etch uniformity when the number of scans required to complete the etch process is one scan or multiple scans.
[0016] According to another embodiment, the present disclosure relates to a process where the scanning motion may be a linear motion of the wafer center across the ion beam or may include slight deviations from a straight line, such as a curved path of motion of the wafer center across the ion beam.
[0017] According to another embodiment, the present disclosure relates to an alternative asymmetric velocity scan motion of the wafer in which the ion beam current or voltage is modulated as the wafer moves across the ion beam. If the wafer center is scanning distal to the scan beyond the midplane of the ion source, the wafer may be exposed to a higher beam current or higher beam voltage.
[0018] According to another embodiment, the present disclosure relates to an alternative to asymmetric velocity profile scanning by modulating the path of the scan such that after the wafer passes the midplane of the ion source, the wafer is exposed to the ion beam for a longer period of time on the distal side of the scan.
[0019] According to another embodiment, the present disclosure relates to an alternative to asymmetric velocity scanning of the wafer across the ion beam by placing the beam block asymmetrically with respect to the midplane of the ion source and grid such that a symmetric velocity profile of the scan still results in the wafer being exposed to the ion beam more time distal to the scan.
[0020] According to one aspect of an embodiment of the present disclosure, there is provided a method of correcting asymmetries in a wafer etching process, the method including generating a plasma from a plasma source, the plasma source including a plasma chamber and an ion extraction grid system, the ion extraction grid system configured to generate an ion beam from the plasma, the ion beam having a central axis; supporting a wafer on a stage; scanning the wafer with respect to the ion beam along a scan path; and modifying an applied beam flux as a function of a position of the wafer.
[0021] According to another aspect of an embodiment of the present disclosure, there is provided a method of correcting asymmetries during a wafer etching process, the method including generating a plasma from a plasma source, the plasma source including a plasma chamber and an ion extraction grid system, the ion extraction grid system configured to generate an ion beam from the plasma, the ion beam having a central axis, and supporting a wafer on the stage, the stage including at least one of rotating a stage about the central axis and tilting the stage relative to the ion beam during at least a portion of the etching process; scanning the wafer relative to the ion beam along a scan path according to a scan velocity function; and modifying the applied beam fluence as a function of wafer position by varying the scan velocity function as the wafer progresses along the scan path.
[0022] According to another aspect of an embodiment of the present disclosure, there is provided a method of correcting asymmetry in a wafer etching process, the method including generating a plasma from a plasma source, the plasma source including a plasma chamber and an ion extraction grid system, the ion extraction grid system configured to generate an ion beam from the plasma, the ion beam having a central axis; supporting a wafer on a stage; scanning the wafer relative to the ion beam along a scan path, the scan path including a scan out path from a first end of the ion beam to a second end of the ion beam according to a scan out velocity function and a scan back path from the second end of the ion beam to the first end of the ion beam according to a scan back velocity function, wherein either the scan out velocity function or the scan back velocity function varies as a function of time; and modifying an applied beam flux as a function of a position of the wafer.
[0023] According to another aspect of an embodiment of the present disclosure, there is provided a method of correcting asymmetries in a wafer deposition process, the method including generating a plasma from a plasma source, the plasma source including a plasma chamber and an ion extraction grid system, the ion extraction grid system configured to generate an ion beam from the plasma, the ion beam having a central axis; supporting a wafer on a stage; scanning the wafer with respect to the ion beam along a scan path; and modifying an applied beam flux as a function of a position of the wafer.
[0024] According to another aspect of an embodiment of the present disclosure, in an ion beam sputtering system having a vacuum chamber, a wafer on a stage, a target material, and an ion beam source, a method for depositing a uniform layer of sputtered material on the wafer in the ion beam sputtering system includes generating ions from the ion beam source; directing the generated ions toward a target material, where a portion of the target material is sputtered toward the wafer as part of a deposition plume; exposing the wafer to the deposition plume in a deposition zone; and scanning the wafer across the deposition zone along a scan path relative to the deposition plume, where a scan speed of the wafer varies as the wafer progresses along the scan path, where the scan speed decreases as an area of the wafer exposed to the deposition plume decreases.
[0025] According to another aspect of an embodiment of the present disclosure, in an ion beam sputtering system having a vacuum chamber, a wafer on a stage, a target material, and an ion beam source, a method of depositing a uniform layer of material on the wafer in the ion beam sputtering system includes generating ions from the ion beam source; directing the generated ions at the target material whereby a portion of the target material is sputtered toward the wafer as part of a deposition plume; exposing the wafer to the deposition plume in a deposition zone; and scanning the wafer across the deposition zone along a scan path relative to the deposition plume according to a scan velocity function, wherein the scan velocity of the wafer varies as the wafer progresses along the scan path, and wherein the scan velocity decreases as an area of the wafer exposed to the deposition plume decreases.
[0026] Additional features and advantages of the disclosure will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the principles disclosed herein. The features and advantages of the disclosure may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the disclosure will become more fully apparent from the following description and the appended claims, or may be learned by practice of the principles described herein.
[0027] To explain how the above-mentioned disclosure and other advantages and features can be obtained, a more particular description of the principles briefly described above will be provided with reference to specific embodiments of those principles that are illustrated in the accompanying drawings. With the understanding that these drawings depict only exemplary embodiments of the disclosure and therefore should not be considered as limiting its scope, the principles herein will be described and explained with additional specificity and detail using the accompanying drawings. [Brief description of the drawings]
[0028] [Figure 1] A diagram showing an ion beam etching system. [Figure 2a] FIG. 1 illustrates symmetric etching. [Figure 2b] FIG. 1 illustrates asymmetric etching. [Figure 2c] FIG. 1 illustrates asymmetric etching. [Figure 3a] FIG. 1 shows a top view of a wafer 180 being etched. [Figure 3b] FIG. 3b is a cross-sectional view of FIG. 3a taken along a wafer diagonal perpendicular to the tilt axis. [Figure 4] Figure 3 shows ion beam divergence. [Diagram 5] FIG. 1 illustrates an improved scanning ion beam etching system according to an embodiment of the present disclosure. [Figure 6] FIG. 1 illustrates an improved scanning ion beam etching system according to an embodiment of the present disclosure. [Figure 7] FIG. 1 illustrates an improved scanning ion beam etching system according to an embodiment of the present disclosure. [Figure 8] FIG. 1 illustrates a variable scan speed according to an embodiment of the present disclosure. [Figure 9] FIG. 13 illustrates relative etching from the wafer center with constant and variable scan speeds according to an embodiment of the present disclosure. [Figure 10a] FIG. 13 illustrates beamlet divergence and the effect of divergence on the inboard side of the wafer relative to the outboard side of the wafer as the wafer is scanned across the beam according to an embodiment of the disclosure. [Figure 10b] FIG. 13 illustrates beamlet divergence and the effect of divergence on the inboard side of the wafer relative to the outboard side of the wafer as the wafer is scanned across the beam according to an embodiment of the disclosure. [Figure 11a] FIG. 1 illustrates a beam with higher flux in the center of the beam. [Figure 11b]FIG. 1 illustrates a uniform beam whose flux is independent of the position of the beam. [Figure 12] FIG. 13 shows the mid-plane of the source and the distal side of the scan where preferential etching of the outboard side of the device occurs. [Figure 13] FIG. 13 illustrates one type of asymmetric velocity profile (solid line) that preferentially etches the outboard side at the distal side of the scan compared to a symmetric velocity (dashed line) scan. [Figure 14] FIG. 13 shows the mid-plane of the source and the proximal side of the scan, where preferential etching of the inboard side of the device occurs. [Figure 15] FIG. 13 shows one type of asymmetric velocity profile that is step-type (solid line) that preferentially etches the distal outboard side of the scan compared to a smoothly varying type of asymmetric velocity profile (dashed line) scan. [Figure 16] FIG. 1 shows an ion beam deposition system. [Figure 17] FIG. 1 illustrates an improved scanning ion beam deposition system according to an embodiment of the present disclosure. [Figure 18] FIG. 1 illustrates an ion beam deposition system equipped with a pre-cleaning assist source. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0029] Like reference characters refer to like parts throughout the several views of the drawings.
[0030] 5 shows an improved scanning ion beam etching (IBE) system of the present disclosure. A wafer 180 can be tilted away from normal incidence to the ion beam and scanned across the beam starting outside the beam at one end and ending outside the beam at the opposite end.
[0031] In some embodiments, the wafer scan velocity can be varied during a wafer scan to compensate for non-uniform beam flux. As shown in FIG. 5, the wafer 180 is typically scanned back and forth in and / or through the beam 130. A typical wafer scan can begin with the wafer 180 at position 500. The wafer 180 is scanned (e.g., translated) through the beam to position 510. The wafer 180 can then be scanned (e.g., translated) back through the beam from position 510 to position 500. The wafer 180 can be stopped (e.g., at zero velocity) between scans (at either or both positions 500 and 510). The path from position 500 to position 510 and back again can be a continuous path. The path that the wafer 180 is scanned from position 500 to position 510 can be the same path that the wafer 180 is scanned from position 500 to position 510 to position 500. The path that wafer 180 takes to be scanned from position 510 to position 500 may be different than the path that wafer 180 takes to be scanned from position 500 to position 510 .
[0032] Wafer 180 at position 500 and / or position 510 can be at least partially exposed to the beam. Wafer 180 at position 500 and / or position 510 can be fully exposed to the beam. Wafer 180 at position 500 and / or position 510 can be at least partially outside of the beam (e.g., not exposed to the beam). Wafer 180 at position 500 and / or position 510 can be completely outside of the beam (e.g., not exposed to the beam). Position 500 and / or 510 can be invariant between at least two scans. Position 500 and / or 510 can be invariant for more than two scans. Position 500 and / or 510 can be invariant for all scans. Position 500 and / or 510 can be changed between at least two scans. Position 500 and / or 510 can be changed between more than two scans. Position 500 and / or position 510 can vary between each scan. The length of the wafer scan (e.g., the distance between points 500 and 510) can be constant for at least two scans. The length of the wafer scan can be constant for all scans. The length of the wafer scan can be different for at least two scans. The length of the wafer scan can be different for more than two scans. The length of the wafer scan can be different for all wafer scans.
[0033] In some embodiments, at least a portion of the wafer 180 can begin the scan outside of the ion beam. All of the wafer 180 can begin the scan outside of the ion beam. Portions of the wafer 180 can be exposed to the beam during the scan. All of the wafer 180 can be exposed to the beam during the scan. Portions of the wafer 180 can be outside of the beam (e.g., not exposed to the beam) at the end of the scan. All of the wafer 180 can be outside of the beam (e.g., not exposed to the beam) at the end of the scan. In one embodiment, the wafer 180 is not exposed to the beam at the start of the scan, portions of the wafer 180 are exposed to the beam during the scan, and the wafer 180 is not exposed to the beam at the end of the scan. The wafer 180 can be scanned back and forth at a desired tilt angle relative to the ion beam. The wafer 180 can be rotated about axis 220 as it is scanned across the beam. The rotation speed during the scan can be constant. The rotation speed can be varied during the scan. The process of scanning at a fixed scan rate can be repeated until the desired etch depth is achieved. The scan path can be centered within the beam (e.g., the midpoint of the scan is approximately coincident with the center of the beam). The scan path can be offset within the ion beam (e.g., the midpoint of the scan is not coincident with the center of the beam).
[0034] This scanning method addresses the inboard and outboard asymmetries resulting from tilt of the wafer 180 and beamlet divergence that cause the proximal side of the wafer 180 to be etched at a higher rate than the distal side of the wafer 180 in conventional ion beam etching (IBE) machines.
[0035] Many ion beam tasks, such as ion beam smoothing, sidewall etching, and sidewall cleaning, require a large tilt angle relative to the ion beam. The wafer 180 can be tilted greater than about 10 degrees from normal incidence of the ion beam. The wafer 180 can be tilted greater than 30 degrees from normal incidence of the ion beam. Scanning at a large tilt angle, as shown in FIG. 6, can increase the scan length so that the midpoint of the scan moves further away from the ion source and the wafer 180 can be scanned across the ion beam. The increased scan length and the increased distance between the wafer 180 and the source can be difficult to accommodate in a high / ultra-high vacuum chamber.
[0036] The required scan length can be reduced by inserting physical blocks 171 and 172 towards the ends of the scan as shown in FIG. 7. Blocks 171 and 172 form an aperture that narrows beam 130, thus creating a portion or "slit" of the ion beam through which wafer 180 is scanned. Blocks 171 and 172 may be inserted symmetrically with respect to the central plane 310 of ion source 105 and ion extraction grid system 150 as shown in FIG. 7. Blocks 171 and 172 can be inserted asymmetrically with respect to central plane 310. The slit width can be made adjustable by adjusting the position of top block 171, or bottom block 172, or both. However, if wafer 180 needs to be scanned across the slit at a large tilt angle, the distance from ion extraction grid system 150 to wafer 180 at its scan midpoint can be much larger than in a conventional ion beam etching (IBE) system.
[0037] In a practical IBE system, the beam density of the beam 130 can be spatially non-uniform. This non-uniformity can be due to divergence of the beamlets. This effect often increases with increasing source-to-wafer distance and can be amplified as the distance between the midpoints of the wafer scan increases. Scanning the wafer 180 through the beam 130 at a constant scan speed can result in very non-uniform etching, with the center of the wafer being etched much faster than the edge of the wafer. Deploying a variable scan speed, as shown in the schematic diagram of Figure 8, can dramatically improve the etch uniformity across the wafer 180. Slowing down the speed of the scan when the wafer 180 is away from the midpoint of the scan can enhance etching at points away from the center of the wafer 180.
[0038] In some embodiments, the wafer velocity can be changed during the wafer scan. The wafer scan velocity can be continuously changed during the scan. The wafer scan velocity can be constant during a portion of the scan. The wafer velocity profile can be identical for at least two scans. The wafer scan velocity profile can be identical for all scans. The wafer scan velocity can vary between at least two scans. The wafer scan velocity profile can vary for each scan. The wafer scan velocity can be zero during at least one point during the scan. The wafer velocity profile can be symmetric (see, e.g., FIG. 8). The scan velocity profile can be monotonic. The scan velocity profile can be discontinuous.
[0039] An example of a symmetric variable speed to achieve a highly uniform etch on the entire wafer 180 is shown in FIG. 8. The midpoint of the scan is represented by X=0. The direction of the scan is along the x-axis. Negative x-axis positions are closer to the ion source 105 than positive x-axis positions. A variable speed that is symmetric about the midpoint of the scan is shown in the example of FIG. 8. Using a symmetric variable speed of the scan, a uniform etch across the wafer 180 can be obtained. The symmetric variable speed profile can be a step function or a smooth function, as shown in the example of FIG. 8. A symmetric variable speed as shown in the example here is used to obtain a uniform etch across the entire wafer 180, as shown in FIG. 9.
[0040] Scanning the wafer 180 across the beam 130 does not address the second source of asymmetry of the inboard and outboard sides of the device. This second source of asymmetry is caused by the large distance required to allow scanning of the tilted wafer 180 across the beam 130, the finite size of the ion source 105 and ion extraction grid system 150, and the divergence of the beamlets. This effect is shown in Figures 10a-10b. At large distances, the inboard side 191 of the device is exposed to a larger amount of ions than the outboard side of the device due to the finite lateral size of the ion source 105 and the divergence of the beamlets. This asymmetry is present at all tilt angles. This is shown in Figures 10a-10b. As the rotating wafer 180 is scanned across the beam 130, it causes the outboard side 192 of the device at the outer edge of the wafer 180 to etch much less than the inboard side 191 of the device, as seen in Figures 10a-10b. The solid angles projected onto the plane of the ion extraction grid system 150 from the inboard side 191 of the device and the outboard side 192 of the device represent the beam exposure at the inboard side 191 and outboard side 192, respectively, as the wafer 180 is scanned across the beam 130. The imbalance in the beam exposure at the inboard side 191 and outboard side 192 of the device can be clearly seen in Figures 10a and 10b.
[0041] The asymmetry of the inboard and outboard etching associated with the finite dimensions of the ion source 105 and the beamlet divergence can be addressed by making the ion source 105 and the grid of the ion extraction grid system 150 significantly larger in the Y-axis direction as shown in Figures 11a-11b. Figure 11a shows a beam 130 with a higher flux at the center of the beam 130. It is possible to have a beam 130 with a higher flux at the edge of the beam 130 than at the center of the beam 130 (not shown). Figure 11b shows a uniform beam 130 where the flux is independent of the position within the beam 130. The Y-axis direction is the direction of the scan. Increasing the lateral dimension of the grid of the ion source 105 and ion extraction grid system 150 to be at least equal to the sum of the wafer diameter and twice the beamlet divergence and making the ion flux uniform across the entire lateral dimension can eliminate the asymmetry between the inboard 191 and outboard 192 sides of the device, allowing both sides to be exposed to the same amount of ion beam exposure, as shown in FIG. 11b.
[0042] The non-ideal ion beam shown in FIG. 11a illustrates an example where the flux of the ion beam 130 is higher at the center of the beam 130 compared to the edges of the beam 130. An ion beam 130 can be obtained (e.g., via magnetic confinement of the beam, a non-uniform grid system, etc.) where the flux of the ion beam 130 is higher at the edges of the beam 130 compared to the center of the beam 130. In this case, it may be desirable to increase the exposure at the center of the wafer 180 compared to the edges of the wafer 180 during the scan. The scan speed at the end of the scan can be greater than the scan speed at the center of the scan (e.g., the scan speed of at least one point toward the end of the scan is faster than points toward the center of the scan).
[0043] Establishing and maintaining a uniform plasma distribution across a large ion source 105 can be practically difficult. Large variations in plasma density across the lateral dimensions of the plasma source can be difficult to address. Large lateral dimensions of the grid can lead to failures resulting from mechanical instabilities associated with the thermal expansion and contraction cycles of ion source operation. Because the challenges associated with large ion source dimensions and large grid sizes are extraordinary, it is desirable to address the asymmetry issues with smaller ion sources and smaller grids.
[0044] Referring to FIG. 12, slowing the scan speed when the wafer center is distal to the scan 301 (e.g., the wafer scan is located farther from the ion beam source 105) can also improve uniformity. As shown in FIG. 12, the scan speed can be slowed for at least a portion of the points below the midplane 310 of the ion source 105 and ion extraction grid system 150. The slower scan speed enhances etching of the outboard side 192 of the device. Slowing the scan speed when the wafer center is distal to the scan can improve inboard and outboard asymmetries that can occur with symmetrical speed scans.
[0045] 13 shows an example of a scan velocity profile as described by the system of the present disclosure. In the schematic diagram shown in FIG. 13, the positive x position is a position 301 distal to the wafer center where the scan velocity is reduced to increase etching of the outboard side 192 of the device. By increasing the scan velocity on the negative x side of the scan (e.g., when the wafer 180 is closer to the ion source 105), better overall uniformity of etching across the entire wafer 180 is maintained than would be required for good uniformity with a symmetric variable scan profile 303.
[0046] The scan speed may be a function of the wafer distance from the ion beam 105 during scanning. The scan speed may decrease as the distance between the wafer 180 and the ion beam 130 increases during scanning. The scan speed may increase as the area of the wafer 180 exposed to the beam 130 increases. The scan speed may decrease as the area of the wafer 180 exposed to the beam 130 decreases.
[0047] In some embodiments, the scan acceleration may vary during a scan. The scan acceleration profile may be asymmetric. The scan acceleration may be the same for at least two scans. The scan acceleration curve is a plot of the acceleration of the wafer versus the position of the wafer 180 along the scan path. The scan acceleration curve may be the same for more than two scans. The scan acceleration curve may be the same for all scans. The scan acceleration curve may be different for at least two scans. The scan acceleration curve may be different for more than two scans. The scan acceleration curve may be different for all scans. The scan acceleration may be constant during at least a portion of the scan. The scan speed may be selected to maintain a constant dose of ions across at least one region of the wafer 180 during the scan. The scan speed may be selected to maintain a constant dose of ions across all exposed regions of the wafer 180 during the scan.
[0048] Increasing the scan speed when the wafer center is on the proximal side of the scan 302, i.e., a point above the mid-plane 310 of the ion source 105 and grid system 150, reduces etching on the inboard side 191 of the device, as shown, for example, in FIG. 14. In the schematic diagrams shown in FIGS. 8, 13, 14, and 15, the negative X position is on the proximal side 302 of the scan. When the wafer center is on the proximal side 302, increasing the scan speed reduces etching on the inboard side 191 of the device. Good overall uniformity of etching across the entire wafer 180 is maintained by reducing the scan speed on the positive X side of the scan. The relationship of such a speed profile to the symmetrical speed profile 303 required for good film uniformity across the wafer 180 is shown in FIG. 13.
[0049] In some embodiments, the velocity versus position profile can be a stepped velocity configuration or a smoothly varying configuration, as represented at 304 in FIG. 15. The asymmetric velocity profile causes the wafer 180 to spend more time on the positive x side (e.g., the side farther away from the ion source 105) than on the negative x side, ensuring more etching on the outboard side 192 of the device compared to the inboard side 191 of the device. This process of asymmetric velocity of scanning allows for inboard and outboard asymmetric control even when the etching system is configured with an ion source 105 having lateral dimensions smaller than the sum of the wafer diameter and twice the beamlet divergence projection on the wafer scan plane.
[0050] The inboard side 191 of the device can be preferentially etched by slowing the scan speed on the proximal side to correct the asymmetry that occurs in systems with sources having a less dense beam at the center of the source compared to the density away from the center of the source.
[0051] Exemplary ion beam etching process parameters are as follows:
[0052] - A plasma power source in the range of approximately 100W to 5kW.
[0053] - Process chamber pressure ranging from 1.33E-1 Pa (1E-3 Torr) to 1.33E-3 Pa (1E-5 Torr).
[0054] The gas composition may include an inert gas (eg, Ar, Kr, Xe, He, etc., or mixtures thereof).
[0055] - The gas composition may include reactive gases (e.g., halogen-containing gases, C x H y F z , Cl2, an oxygen-containing gas, O2, a nitrogen-containing gas, N2, NF3, a carbon-containing gas, CH4, CO, CO2, a sulfur-containing gas, SF6, a hydrogen-containing gas, H2, H2O, or a mixture thereof).
[0056] - The gas composition may include a mixture of inert and reactive gases
[0057] - The wafer temperature ranges from approximately -40°C to 400°C.
[0058] The wafer scan speed ranges from about 0.01 mm / sec to 1 cm / sec. In one embodiment, the wafer scan speed ranges from 1 mm / sec to 100 mm / sec.
[0059] - The wafer rotation speed ranges from approximately 0.5 RPM to 1000 RPM.
[0060] - The ion beam voltage is typically less than about 500 eV.
[0061] The wafer tilt angle ranges from about 1 degree (eg, 1 degree away from perpendicular to the ion beam 105) to about 85 degrees (eg, a glancing angle to the ion beam 105).
[0062] Any of the steps and procedures described above, although referred to herein as being included in an etching process, may also be applied to a deposition process.
[0063] FIG. 16 shows an ion beam deposition (IBD) system. In an IBD process, a target 145 is placed in front of an ion source 105. The ion source 105 can be comprised of a plasma chamber 110 and an ion extraction grid system 150. The ion extraction grid system 150 is comprised of a number of conductive plates with a number of holes aligned between the plates. The grid system 150 helps extract and collimate the ion beamlets emerging from each hole in the plates to form a substantially parallel ion beam 130. The plasma in the plasma chamber 110 may be generated by methods known in the art, including direct current (DC) and radio frequency (RF) inductively coupled plasma (ICP) coils 160. The energy of the ions extracted from the ion source 105 is defined by the voltage applied to the grid system 150. The extracted ions in the collimated ion beam 130 impact the target 145, causing sputtering of the target material in a deposition plume that is directed toward a wafer on a wafer stage 140.
[0064] The stage 140 can rotate the wafer about a central axis. The stage 140 can tilt the wafer relative to the sputtered material for at least a portion of the deposition process. The deposition plume of sputtered material from the target 145 can be directed at any angle relative to the wafer surface by tilting the wafer stage 140. Provisions may be made on the wafer stage 140 for cooling the wafer during the deposition process to prevent thermal damage to devices on the wafer. The wafer may be heated to a particular temperature to enhance the ion beam deposition process.
[0065] In a perfect ion beam deposition system, all beamlets and sputtered material in the deposition plume would be perfectly collimated, with no divergence of ions and / or sputtered material from their intended direction. In such a system, all features deposited on the wafer would be perfectly symmetric. However, real ion beam deposition systems have non-zero beam divergence and non-zero deposition plume divergence.
[0066] In reality, an ion source generates an ion beam that is a collection of beamlets with a finite, nonzero beam divergence. In addition, the sputtered material in the deposition plume has a finite, nonzero divergence. The result of the divergence of the sputtered material in the deposition plume is that as the wafer is tilted away from the normal incidence of the sputtered material, stronger deposition occurs on the side of the wafer closer to the target and weaker deposition occurs on the side of the wafer farther from the target. Rotating the wafer about an axis can make the deposition depth more uniform in feature-free areas of the wafer. However, devices on the wafer are typically made of three-dimensional features rather than flat surfaces. On three-dimensional features on the wafer, the effect of tilting the wafer away from the normal sputtered material incidence of the deposition plume, combined with the beam divergence, is that the inboard side of the device on the wafer receives a different amount of sputtered material exposure from the deposition plume than the outboard side of the device. This inboard vs. outboard asymmetry becomes more pronounced as the device location moves away from the wafer tilt axis and as the tilt angle increases away from the normal sputtered material incidence of the deposition plume.
[0067] Asymmetries between the inboard side of the device and the outboard side of the device can be addressed by translating (e.g., scanning) the wafer across the deposition plume of sputtered material. In FIG. 17, where deposition plume exposure occurs is defined by the introduction of physics beam blocks 171 and 172. The required scan length can be reduced by inserting physics blocks 171 and 172 toward the ends of the scan, as shown in FIG. 17. Blocks 171 and 172 form an aperture that narrows the deposition plume of sputtered material, thus creating a portion or "slit" of the deposition plume through which the wafer is scanned. Blocks 171 and 172 may be inserted symmetrically relative to the midplane of the deposition plume, as shown in FIG. 17. Blocks 171 and 172 can be inserted asymmetrically relative to the midplane of the deposition plume. The slit width can be made adjustable by adjusting the position of top block 171, or bottom block 172, or both. However, if the wafer needs to be scanned at large tilt angles across the deposition plume slit, the distance from the target to the wafer at the midpoint of the scan can be much larger than in conventional ion beam deposition (IBD) systems.
[0068] In practical IBD systems, the beam density of the deposition plume of sputtered material can be spatially non-uniform. This non-uniformity can be due to divergence of the deposition plume. This effect is often greater with increasing target-to-wafer distance and can be amplified with increasing distance between the midpoints of the wafer scan. Scanning the wafer through the deposition plume at a constant scan speed can result in highly non-uniform deposition, with deposition occurring much faster at the wafer center than at the wafer edge. By deploying a variable scan speed, deposition uniformity across the wafer can be dramatically improved. Slowing down the speed of the scan when the wafer is moving away from the midpoint of the scan can enhance the deposition process at points on the wafer away from the wafer center.
[0069] In some embodiments, the wafer velocity can be varied during a wafer scan. The wafer scan velocity can be varied continuously during a scan. The wafer scan velocity can be constant during a portion of the scan. The wafer velocity profile can be the same for at least two scans. The wafer scan velocity profile can be the same for all scans. The wafer scan velocity can be varied between at least two scans. The wafer scan velocity profile can be varied for each scan. The wafer scan velocity can be zero for at least one point during the scan. The wafer velocity profile can be symmetric. The scan velocity profile can be monotonic. The scan velocity profile can be discontinuous.
[0070] FIG. 18 shows an ion beam deposition system with a pre-cleaning auxiliary source. In this embodiment of the invention, an additional ion source 106 is provided in the ion beam deposition system. At least one surface of a wafer on a wafer stage 140 can be exposed to a beam 135 from the ion source 106. The ion source 106 can be comprised of a plasma chamber 111 and an ion extraction grid system 151. The ion extraction grid system 151 is comprised of a number of conductive plates with a number of holes aligned between the plates. The grid system 151 helps to extract and collimate the ion beamlets emerging from each hole in the plates to form the ion beam 135. The plasma in the plasma chamber 111 may be generated by methods known in the art, including direct current (DC) and radio frequency (RF) inductively coupled plasma (ICP) coils 161. The energy of the ions extracted from the ion source 106 is defined by the voltage applied to the grid system 151. The ion beam 135 from the ion source 106 can be used to improve the film properties of the deposited material, such as compound stoichiometry, intrinsic stress, optical properties, etc. The ion beam 135 from the ion source 106 can also be utilized to pre-clean the wafer prior to the deposition process to enhance film adhesion to the wafer. However, the integration of the ion source 106 in the IBD does not change the inherent inboard / outboard asymmetry of the sidewall deposition thickness on 3D features.
[0071] Although various examples and other information have been used to describe aspects within the scope of the appended claims, those skilled in the art may use these examples to derive a wide variety of implementations, and therefore claims limitations should not be implied based on the specific features or arrangements in such examples. Furthermore, while some subject matter may be described in language specific to example structural features and / or method steps, it should be understood that the subject matter defined in the appended claims is not necessarily limited to these described features or acts. For example, such functionality may be distributed in different ways or performed in components other than those identified herein. Rather, the described features and steps are disclosed as example components of systems and methods within the scope of the appended claims. Furthermore, claim language reciting "at least one of" a set indicates that one member of the set or multiple members of the set satisfy the claim.
Claims
1. 1. A method for depositing a uniform layer of sputtered material on a wafer in an ion beam sputtering system having a vacuum chamber, a wafer on a stage, a target material, and an ion beam source, the method comprising: generating ions from the ion beam source; directing the generated ions at the target material, where portions of the target material are sputtered toward the wafer as part of a deposition plume; exposing the wafer to the deposition plume in a deposition zone; scanning the wafer across the deposition zone along a scan path relative to the deposition plume, a scan speed of the wafer varying as the wafer progresses along the scan path, the scan speed decreasing as an area of the wafer exposed to the deposition plume decreases; A method comprising:
2. The method of claim 1 , further comprising the step of rotating the stage during at least a portion of the scanning step.
3. The method of claim 1 , further comprising tilting the stage relative to the deposition plume during at least a portion of the scanning step.
4. The method of claim 1 , wherein the scan path is linear.
5. The method of claim 1 , wherein the scan path is non-linear.
6. The method of claim 1 , further comprising inserting a plurality of physical blocks along the scan path.
7. The method of claim 1 , further comprising adjusting the amount of time the wafer is exposed to the deposition plume.
8. The method of claim 1 , wherein the scanning speed of the wafer is slowed as the center of the wafer progresses along a distal side of the scan path.
9. The method of claim 1 , wherein the scan speed decreases as the distance between the wafer and the target material increases during the scanning step.
10. 1. A method for depositing a uniform layer of material on a wafer in an ion beam sputtering system having a vacuum chamber, a wafer on a stage, a target material, and an ion beam source, the method comprising: generating ions from the ion beam source; directing the generated ions at the target material, where portions of the target material are sputtered toward the wafer as part of a deposition plume; exposing the wafer to the deposition plume in a deposition zone; scanning the wafer across the deposition zone along a scan path relative to the deposition plume according to a scan velocity function, the wafer scan velocity varying as the wafer progresses along the scan path, the scan velocity decreasing as an area of the wafer exposed to the deposition plume decreases; A method comprising:
11. The method of claim 10 , further comprising the step of rotating the stage during at least a portion of the scanning step.
12. The method of claim 10 , further comprising tilting the stage relative to the deposition plume during at least a portion of the scanning step.
13. The method of claim 10 , wherein the scan path is linear.
14. The method of claim 10 , wherein the scan path is non-linear.
15. The method of claim 10 further comprising inserting a plurality of physical blocks along the scan path.
16. The method of claim 10 further comprising adjusting the amount of time the wafer is exposed to the deposition plume.
17. 11. The method of claim 10, wherein the scan path further comprises a scan out path from a first end of the deposition plume to a second end of the deposition plume and a scan back path from the second end of the deposition plume to the first end of the deposition plume, the scan out path being the same as the scan back path.
18. 11. The method of claim 10, wherein the scan path further comprises a scan out path from a first end of the deposition plume to a second end of the deposition plume and a scan back path from the second end of the deposition plume to the first end of the deposition plume, the scan out path being different from the scan back path.
19. 11. The method of claim 10, wherein the scan path further comprises a scan out path from a first end of the deposition plume to a second end of the deposition plume and a scan back path from the second end of the deposition plume to the first end of the deposition plume, an end point of the scan out path being different from an end point of the scan back path.
20. 11. The method of claim 10, wherein the scan path further comprises a scan out path from a first end of the deposition plume to a second end of the deposition plume according to a scan out speed function, and a scan back path from the second end of the deposition plume to the first end of the deposition plume according to a scan back speed function, the scan out speed function being different from the scan back speed function.
21. 11. The method of claim 10, wherein the scan path further comprises a scan out path from a first end of the deposition plume to a second end of the deposition plume according to a scan out velocity function, and a scan back path from the second end of the deposition plume to the first end of the deposition plume according to a scan back velocity function, wherein the scan out velocity function or the scan back velocity function varies as a function of time.