Radial Line Slot Antenna Array
By integrating active switching devices and a drive circuit within a single semiconductor wafer element for a radial slot line antenna array, the challenges of size, weight, and power consumption are addressed, achieving efficient beam control and improved performance.
Patent Information
- Application Number
- JP2024556111
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-03-21
- Filing Date
- 2023-03-16
- Publication Date
- 2025-04-11
- Estimated Expiration
- 2043-03-16
AI Technical Summary
Existing antenna arrays face challenges with size, weight, power consumption, and cost, leading to suboptimal deployments. Current solutions either require multiple voltage sources for control, resulting in inefficiencies and increased size, or use expensive and large systems for beam control.
A radial slot line antenna array is fabricated using a single semiconductor wafer element, integrating active switching devices and a drive circuit within the wafer. This configuration allows for individual control of each switching device, eliminating the need for bond wires and reducing parasitic reactance.
The solution enables efficient control of the antenna array's beam, reducing size, weight, and power consumption while improving performance by eliminating bond wires and their associated parasitic reactance.
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Figure 2025509948000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an antenna array. An embodiment relates to a radial slot line antenna array. [Background technology]
[0002] The size, weight, power consumption, and cost of an antenna or antenna array implementation on a platform can be prohibitive, leading to suboptimal deployment, where, for example, certain desired features may be sacrificed in favor of lower cost or smaller size alternatives. For example, active electronically scanned antenna arrays (AESA) and passive electronically scanned antenna arrays (PESA) are heavy, expensive, and require large amounts of power to operate and keep cool. Similarly, unpowered reflector type antennas are large and do not benefit from implementation on some platforms, such as modern aircraft, where (at least) their size may interfere with the aerodynamic profile of the platform.
[0003] To reduce cost and size, some antenna structures use a single voltage source to drive the elements of the antenna, thereby reducing the physical size of the structure and its implementation costs. However, by using only a single voltage source, individual elements cannot be selectively controlled. This therefore limits their use, for example, with respect to radiated beams, as the array cannot be scanned. To provide some control over the radiated beam, phase shifters or time delay devices may be employed, but these are generally ferrite-based and therefore lossy, thereby leading to inefficiencies. In the case of phase shifters, they are also generally narrowband. Conversely, a transmitter provided at each antenna element can provide full control of the phase and amplitude of the radiated beam, for example, allowing scanning. However, such systems are expensive and generally large, for example as a result of the increased implementation area required for the drive mechanism. Thus, there is often a trade-off between implementing an antenna that is expensive and / or large / heavy, but efficient and more controllable, and an antenna that is cheaper and / or small / light, but less efficient and less functionally useful. Summary of the Invention
[0004] According to a first aspect of the present disclosure, there is provided a method for fabricating a switching structure of a radial slot line antenna (RLSA) array using a single semiconductor wafer element, the method comprising: forming a set of active switching devices in the wafer element; a position of each active switching device on the wafer element is selected according to a predefined configuration representing a slot element layout of the RLSA array; and forming a drive circuit in the wafer element, the drive circuit individually addressing each of the set of active switching devices, thereby enabling a selected bias signal to be applied to the set of active switching devices.
[0005] Thus, the wafer elements may be fabricated to effectively form large scale (i.e., wafer-scale) integrated circuits that form the switching structures or surfaces for the antenna array. This eliminates the issues surrounding wafer dicing and packaging and provides improved performance since bond wires are not required to couple the components to control circuits, however, the bond wires also add a significant amount of parasitic reactance that can be a source of component failure while itself having a significant detrimental effect on the performance of the antenna elements.
[0006] In one implementation of the first aspect, an array of slot elements of the RLSA array may be fabricated on a wafer element by forming a plurality of slots according to a predefined configuration representing a slot element layout of the RLSA array. The array of slot elements of the RLSA array may be fabricated on a substrate structure of the RLSA array. In one example, the substrate structure may be bonded to the wafer element. A plurality of bias control lines may be provided in the wafer element for the set of active switching devices. A plurality of bias control lines may be formed on a control layer. The control layer may be formed in the wafer element. The control layer may be bonded to the wafer element.
[0007] According to a second aspect of the present disclosure, there is provided a radial slot line antenna array comprising: a substrate having a radiating surface of the array; a set of active switching devices integrally formed in a semiconductor wafer element bonded to the substrate, the radiating surface comprising a plurality of slots arranged in a predefined configuration representative of a slot element layout of an RLSA array; a plurality of bias control lines integrally formed in the semiconductor wafer element, each switching device being structurally aligned with a respective slot thereby enabling tuning of a slot element resonant frequency; and a drive circuit integrally formed in the semiconductor wafer element and configured to individually address the active switching devices thereby enabling selected bias signals to be applied to the active switching devices using the bias control lines.
[0008] In one implementation of the second aspect, at least some of the set of active switching devices may comprise Microelectromechanical System (MEMS) switches. The MEMS switches may comprise charge-controlled or field-controlled MEMS switches. At least some of the MEMS switches may comprise cantilever, bridge or diaphragm type MEMS. At least some of the set of active switching devices may comprise varactor diodes and / or memory capacitors. The drive circuit may comprise at least one high voltage driver configured to provide a high voltage bias signal. The radiating surface may comprise a metal layer interposed between and bonded to the semiconductor wafer element and the substrate.
[0009] Embodiments of the present invention will now be described, by way of example only, with reference to the drawings in which: [Brief description of the drawings]
[0010] [Figure 1] Schematic diagram of an RLSA array according to an example. [Diagram 2] 1 is a schematic diagram of a radial slot line antenna array in accordance with an example. [Diagram 3] 1 is a schematic diagram of a portion of an RLSA array in accordance with an example. [Figure 4] 1 is a schematic diagram of a lithography process used on a wafer element, according to an example. [Diagram 5] 4 is a flow chart of a method for fabricating a switching structure of a radial slot line antenna array using a single semiconductor wafer component, according to an example. [Figure 6] 4 is a flow chart of a method for fabricating a switching structure of a radial slot line antenna array using a single semiconductor wafer component, according to an example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] Exemplary embodiments are described below in sufficient detail to enable those skilled in the art to embody and implement the systems and processes described herein. It is important to understand that the embodiments may be provided in many alternative forms and should not be construed as being limited to the examples set forth herein.
[0012] Thus, while the embodiments can be modified in various ways and take various alternative forms, specific embodiments thereof are shown in the drawings and will be described in detail below by way of example. There is no intention to be limited to the particular forms disclosed. On the contrary, all modifications, equivalents, and alternatives falling within the scope of the appended claims should be covered. Elements of exemplary embodiments are consistently designated by the same reference numerals throughout the drawings and detailed description, where appropriate.
[0013] The terms used herein to describe the embodiments are not intended to be limiting in scope. The articles "a", "an", and "the" are singular in that they have a single referent, but the use of the singular in this document does not exclude the presence of more than one referent. In other words, an element referred to in the singular can be counted as one or more, unless the context clearly indicates otherwise. Furthermore, it will be understood that the terms "comprises", "comprising", "includes", and / or "including" as used herein specify the presence of stated features, items, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, items, steps, operations, elements, components, and / or groups thereof.
[0014] Unless otherwise defined, all terms used herein (including technical and scientific terms) should be interpreted as customary in the art. It will be further understood that commonly used terms should also be interpreted as customary in the relevant art, and should not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
[0015] A radial line slot antenna (RSLA) is a low-cost antenna structure that comprises a radiating element, a cavity, a background plate, and a feed for feeding a signal to the radiating element. The radiating element and background plate generally comprise a pair of metal disks, such as aluminum, copper, brass, or molybdenum, separated by a cavity, thereby forming a parallel plate waveguide that is fed at the center by a feed or waveguide transition, which can be, for example, a coaxial feed. The cavity between the parallel plates can be filled with a low dielectric constant substrate, such as a dielectric material or a slow-wave structure. This can help prevent the formation of grating lobes in the far-field pattern. Together with the radiating element and background plate, the cavity acts as a circular waveguide that guides the signal from the feed as it propagates radially.
[0016] A RLSA typically comprises a number of through slots or apertures in a radiating element, nominally arranged as a number of slot pairs, with each pair effectively acting as an antenna element of the RLSA, such that all of the multiple slot pairs of a radiating element form an array antenna. The slot pairs are arranged in a predefined pattern arranged to generate a fixed beam at a given frequency in a given polarization, with the slots of a slot pair typically being arranged with respect to each other such that their major axes are mutually orthogonal. The orientation of the slots can be determined by analyzing the field vectors propagated by each slot in the array, and it is common to consider the slots of a slot pair as in-phase and out-of-phase, and then use a cumulative sum of these sets of slots to achieve the desired polarization.
[0017] FIG. 1 is a schematic diagram of an RLSA array according to an example. The RLSA array comprises a radiating element 101, a cavity 105, a background plate 103, and a coaxial feed 107. A number of slots 109 are provided in the radiating surface 101. The slots 109 form discontinuities in the radiating surface. Thus, a signal from the feed 107 generates a voltage across the slots. The walls 111 may be a conductive material, may be left open, or may be terminated with a lossy material. There are numerous ways in which the slots may be arranged in the radiating element, and the methods described herein do not depend on the overall slot pattern. For example, a two-dimensional spiral slot array may be used. In the example of FIG. 1, the RLSA array is shown in the form of a single layer structure. However, such an array may be implemented with a double layer feed structure.
[0018] According to one example, the resonance of at least one of the multiple slots may be controlled or changed by adjusting or selecting a value of the capacitance of a variable capacitance device disposed across the slot. That is, the resonant frequency of the slot may be tuned by varying the capacitance of the slot. Since the beam pattern of the RLSA changes depending on the activity state of the slot, various beam patterns may be generated using various combinations of capacitance of one or more slots to vary the degree to which the slot resonates. Thus, given a desired beam pattern of the array, a slot activation configuration may be used to define a set of slots that are switched on or off (or are in a semi-active state of radiation). The radiation state of a slot is defined, in one example, by the capacitive reactance of the slot in question. Such a value may be selected to effectively prevent the slot from being in a radiating state, radiating at a maximum value, or anywhere between these extremes. Thus, in tuning the resonant frequency of the slot, the value of the antenna gain for a given combination of capacitance values associated with the slots of the array gives rise to beam patterns due to coupling between the slots in their various activity states.
[0019] According to an example, the slots may be switched on or off or provided in a semi-active state, for example, by applying a capacitance selected from one of a plurality of values, which may be discrete values. Thus, a desired beam pattern to be radiated by the array may involve a slot activation configuration in which some of the slots radiate at a first level, some of the slots radiate at a second level, and so on. The first level may correspond to the slots being effectively off, and the second level may correspond to the slots being effectively on and radiating at or near resonance. In between these states, various other levels of slot activity may be provided in which the slots are radiating below resonance but are not "off" depending on a predominant value of the capacitance of one or more slots.
[0020] In one example, the resonant frequency of the slot can be adjusted or selected using an active switching device. The active switching device can include any of a microelectromechanical system (MEMS) switch, a varactor diode, and a memory capacitor. The MEMS can be a radio frequency MEMS (RF MEMS). In one example, the RF MEMS is a capacitive RF MEMS. That is, the contact interface of the RF MEMS can be, for example, capacitive. The capacitive RF MEMS according to one example can be biased below its pull-in voltage to allow control over the resonance of the slot on which the capacitive RF MEMS is placed. Thus, as described above, the capacitance can be selected from one of a plurality of values, which can be, for example, discrete values, thereby ultimately allowing beam steering using the RLSA. In one example, the RF MEMS used can be, for example, a capacitive MEMS or a cantilever type MEMS.
[0021] References herein to MEMS switches are not intended to be limiting, but merely represent, by way of example, one of many active switching devices that may be implemented.
[0022] Typically, MEMS switches are fabricated on a die that is part of a semiconductor wafer, which may be, for example, up to about 300 mm in diameter. There may be hundreds to thousands of dies on a single wafer, depending on the size of the die. Dies may range from 1 or 2 mm to tens of mm. To allow for packaging, the die are removed from the wafer by dicing the wafer by scribing and breaking, etching (deep reactive ion etching), sawing, or laser cutting. The dies removed from the wafer may then be packaged. The individually packaged dies are then bonded into structures to provide the desired functionality.
[0023] According to one example, instead of fabricating active switching devices, such as capacitive RF MEMS, on a die and then dicing and packaging them, wafer elements may be fabricated to form a large integrated circuit that forms the switching structure of the RLSA. Such a switching structure may, for example, comprise a substrate with a metal ground plane having several etched slots thereon. The slots may be rectangular or have another form to resonate at the desired frequency of the RF radiation. In one example, the primary operating frequency may comprise bands within the X, Ku, K, and Ka bands (as defined by the IEEE). The wafer elements may, for example, be 4-8 inch wafers, although other wafer sizes may also be used.
[0024] According to one example, in addition to the slots, several bias control lines may be provided for applying an actuation voltage to the active switching devices, along with semiconductor transistors or alternative equivalent switches located adjacent to the active switching devices. This location does not need to be identical for the slots across the array to aid in the lithography process. For example, this allows individual capacitive RF MEMS to be turned on or off across the surface of the RLSA. In one example, these elements are fabricated on a single wafer element, thereby avoiding the need for wafer dicing and packaging, thus providing an improvement over existing methods of packaging large quantities of switches and then reflow soldering the semiconductor devices or packaged MEMS onto a printed circuit board (PCB), typically at a pitch not different from that of the bare die fabricated on the wafer. Furthermore, performance improvements are provided because bond wires are not used to couple the components to the control circuitry. The bond wires used when packaging the bare die into a format that can be soldered directly to the PCB, while being a source of component failure, also add a significant amount of parasitic reactance that can have a significant detrimental effect on the performance of the antenna elements used to tune. Furthermore, tuning may be undertaken across the wafer surface in the fabrication process to ensure that the tunable capacitance is uniform across the array, and to account for and correct for fabrication variations in the wafer fabrication process that may mean that devices fabricated in the center of the wafer will be different from devices on the edge of the wafer. Such tuning is difficult when discrete components are used.
[0025] FIG. 2 is a schematic diagram of a radial slot line antenna array according to an example. In particular, the example of FIG. 2 is a schematic diagram of an exploded view of components of a radial slot line antenna array according to an example. A substrate 207, such as, for example, a printed circuit board (PCB), is provided. In the example of FIG. 2, the substrate 207 comprises a radio frequency (RF) feed structure 209 of the RLSA array. A radiating surface 205 of the array comprises a plurality of slots arranged in a predefined configuration representing a slot element layout of the RLSA array. In an example, the radiating surface 205 defining the slot layer may be formed on the substrate 207 and may comprise a metal layer. The control layer 203 comprises a plurality of bias control lines. In an example, the bias control lines comprise metallized control tracks. The bias control lines may be formed on the substrate 207. A semiconductor wafer element 201 is provided. The element 201 comprises an active wafer. In an example, either or both of the radiating surface 205 and the control layer 203 may be integrally formed within the element 201. Alternatively, element 201 may be bonded to any one or all of emitting surface 205 , control layer 203 , and substrate 207 .
[0026] According to one example, a set of active switching devices are integrally formed in the semiconductor wafer element 201. Each switching device is formed in the wafer element 201 at a selected position, thereby structurally aligning the switching device with a respective slot in the radiating surface 205. Thus, the element 201 comprises a set of active switching devices aligned with the slots in the radiating surface 205, thereby allowing for tuning of the slot element resonant frequency. A drive circuit for individually addressing the active switching devices is integrally formed in the semiconductor wafer element 201. In one example, the drive circuit is configured to individually address the active switching devices, thereby allowing selected bias signals to be applied to the active switching devices using bias control lines in the control layer 203. In one example, the active switching devices can comprise any one or more of varactor diodes, MEMS switches, or memory capacitors. The drive circuit elements may be simple transistors configured to drive relatively simple switching devices, such as varactor diodes, for example, or may be more complex sub-circuits comprising, for example, MOSFETs of a high voltage driver when driving MEMS devices, for example.
[0027] 2, element 201 may be bonded to substrate 207. In one example, either or both of layers 203, 205 may be fabricated separately or as part of either substrate 207 or element 201. Thus, either or both of layers 203, 205 may be interposed between and bonded to element 201 and other layers of a structure, such as substrate 207. That is, slot layer 205 may be manufactured or fabricated on substrate 207 or as part of wafer-scale IC (WSIC) 201. Similarly, control layer 203 may be manufactured or fabricated on substrate 207 or as part of WSIC 201.
[0028] Thus, according to one example, the active switching devices that define the switching surface of the RLSA array can be manufactured or fabricated as WSICs. This reduces processing steps in the transfer of the switching components to the product, minimizes unwanted parasitic artifacts as a result of packaging, and allows for trimming and tuning of the devices on the wafer to allow for an electrically more uniform surface. In addition, it provides the ability to create larger RLSA arrays since the WSIC surface can be tessellated, thus reducing the cost of the product since the number of processing and packaging steps required is reduced. For example, a single large PCB can be manufactured and then the WSICs can be arranged in a grid on the PCB surface. This is particularly advantageous for larger antennas for use in, for example, SATCOM, where a larger gain and therefore a larger diameter is required.
[0029] In one example, for example, substrate 207, which comprises a PCB, may be manufactured using conventional PCB manufacturing techniques, or alternatively using machined material.
[0030] Thus, according to one example, a set of active switching devices may be fabricated in or on an entire semiconductor wafer element and then bonded (with intermediate layers, e.g., layer 205 and / or layer 203, if applicable) on the top surface of a PCB substrate. Alignment of the wafer element 201 with the substrate 207 may be achieved with extremely high tolerances. In one example, the wafer element 201 may be positioned on the entire top surface of the substrate 207, thereby covering all slots. In some implementations, the wafer 201 may be a silicon wafer. Thus, the wafer 201 may have a high dielectric constant Er=10. Considering that the wafer 201 may be on the order of about 200-400 μm thick, this may have the effect of detuning the slots. According to one example, to prevent this from occurring, for example, deep reactive ion etching (DRIE) may be utilized to remove the silicon substrate in the vicinity of the slots. DRIE can also be used to mitigate mismatches in the coefficients of thermal expansion (CTE) or stress points of the wafer.
[0031] FIG. 3 is a schematic diagram of a portion of an RLSA array according to an example. In the example of FIG. 3, a radiating surface 205 is provided on a substrate 207. A slot 305 is provided in the radiating surface 205, and a corresponding active switching device (not shown for clarity) is provided in a wafer element 303. In the example of FIG. 2, a driving circuit in the form of a transistor is shown. In the case of a MEMS switch, for example, the control circuitry becomes more complex, but ultimately depends on the type of MEMS switch. As can be seen in FIG. 3 and as explained above, a portion of the wafer element 303 is removed in the vicinity of the slot 305.
[0032] In one example, forming the slot layer 205 on the wafer means that through silicon vias 309 can be provided to connect pads on the bottom of the wafer to pads on the top. As mentioned above, the slot layer 205 can be created on a PCB. In another example, the slot layer 205 can be made from a metal such as aluminum or molybdenum that can be plated. Using this as the slot layer 205 means that the slot layer 205 can be bonded directly to the silicon wafer 201, especially in the case of molybdenum where the CTE of the material is matched. Thus, active switching devices and control circuits can be created on or in the wafer 201. Thus, there is no need to couple the control devices fabricated on the wafer to control lines fabricated on the substrate 207. There is a capacitive coupling between the control devices and the slot layer 205.
[0033] According to one example, the driver circuits and active switching devices may be fabricated using standard CMOS foundry processing techniques, thereby enabling electronic trimming, self-testing, redundancy, and reconfiguration that cannot be achieved in packaging devices directly disposed on the PCB 207. In one example, multi-level metallization may be applied to the top of the driver switching device pairs as part of the CMOS process. Additionally, metallization of the edges of the wafer element 303 may be performed, for example, by sputtering copper onto the silicon wafer surface. This may be a process that is complementary to the initial CMOS process and may be completed, for example, according to the flowchart of FIG. 6.
[0034] In a CMOS process, lithography is used to create individual dies on a wafer. Thus, in a CMOS process, the steppers used in the lithography process use a 4:1 or 5:1 reduction in the optics. This generally means that only a small portion of the wafer can be patterned at any one time. However, according to an example, a 4:1 stepper lithography process can be used to create the dies on the wafer 303. A 1:1 process can then be used to bond the individual dies with the metal layer, i.e., the tracks that connect the switches together. To minimize the number of dies required in the lithography process, design compromises can be made where the location of the dies and capacitive components are variously located around each radiating element.
[0035] In examples where MEMS switches are implemented, a gap may be created in the wafer, for example, by stacking additional structures on top of the device to create a sealed cavity for the MEMS.
[0036] FIG. 4 is a schematic diagram of a wafer element according to an example. In the example of FIG. 4, wafer element 401 comprises multiple dies 403. Each die, painted black, may comprise an active switching device. These are coupled together using bias control lines 405 in the example of FIG. 4. Thus, wafer 401 is sparsely populated but does not require dicing in a post-processing step. Furthermore, as explained above, all drive, tuning, and self-test electronics may be included with the active switching devices, meaning that any wafer-to-wafer variations may be accounted for in the manufacturing process.
[0037] FIG. 5 is a flow chart of a method for fabricating a switching structure of a radial slot line antenna array using a single semiconductor wafer element, according to an example. In block 501, a set of active switching devices is formed in the wafer element. As explained above, the location of each active switching device on the wafer element can be selected according to a predefined configuration 503 representing the slot element layout of the RLSA array. In block 505, a drive circuit is formed. In one example, the drive circuit can be formed, for example, by doping the wafer element, and can depend on the active switching devices and the resulting drive circuit required. The drive circuit is configured to individually address each of the set of active switching devices, thereby allowing a selected bias signal to be applied to the set of active switching devices, for example, using a bias control line.
[0038] 6 is a flow chart of a method for fabricating a switching structure of a radial slot line antenna array using a single semiconductor wafer element, according to an example. In block 601, an array of slot elements of the RLSA array is fabricated on the wafer element by forming a plurality of slots according to a predefined configuration representing the slot element layout of the RLSA array. In block 603, a plurality of bias control lines in the wafer element are formed for a set of active switching devices.
[0039] The above description has been provided to enable those skilled in the art to best utilize various aspects of the exemplary embodiments disclosed herein. This exemplary description is not intended to be exhaustive or to be limited to any precise form disclosed. Many modifications and variations are possible without departing from the spirit and scope of the present disclosure. The embodiments disclosed herein should be considered in all respects as illustrative and not restrictive. In determining the scope of the present disclosure, reference should be made to the appended claims and their equivalents.
Claims
1. 1. A method for fabricating a switching structure for a radial slot line antenna (RLSA) array using a single semiconductor wafer component, comprising: forming a set of active switching devices within the wafer element, and a location of each active switching device on the wafer element is selected according to a predefined configuration representing a slot element layout of the RLSA array; forming a drive circuit within the wafer element, the drive circuit individually addressing each of the set of active switching devices thereby enabling selected bias signals to be applied to the set of active switching devices; A method for providing the above.
2. 2. The method of claim 1, further comprising fabricating an array of slot elements of the RLSA array on the wafer element by forming a plurality of slots according to the predefined configuration representing the slot element layout of the RLSA array.
3. The method of claim 1 , further comprising fabricating an array of slot elements of the RLSA array on a substrate structure of the RLSA array.
4. The method of claim 3 further comprising bonding the substrate structure to the wafer element.
5. 5. The method of claim 1, further comprising forming a plurality of bias control lines in the wafer element for the set of active switching devices.
6. The method of claim 1 , further comprising forming a plurality of bias control lines on the control layer.
7. The method of claim 6 , wherein the control layer is formed within the wafer element.
8. The method of claim 6 , further comprising bonding the control layer to the wafer element.
9. A radial slot line antenna array, comprising: a substrate having a radiating surface of the array, the radiating surface having a plurality of slots arranged in a predefined configuration representing a slot element layout of the RLSA array; a set of active switching devices integrally formed within a semiconductor wafer element bonded to said substrate, each switching device being structurally aligned with a respective slot, thereby allowing tuning of a slot element resonant frequency; a plurality of bias control lines integrally formed within the semiconductor wafer element; a driver circuit integrally formed within the semiconductor wafer element and configured to individually address the active switching devices, thereby enabling selected bias signals to be applied to the active switching devices using the bias control lines; A radial slot line antenna array comprising:
10. 10. The radial slot line antenna array of claim 9, wherein at least some of said set of active switching devices comprise micro-electromechanical system (MEMS) switches.
11. The radial slot line antenna array of claim 10 , wherein the MEMS switch comprises a charge-controlled or field-controlled MEMS switch.
12. 12. The radial slot line antenna array of claim 10 or 11, wherein at least some of the MEMS switches comprise cantilever, bridge or diaphragm type MEMS.
13. 10. The radial slot line antenna array of claim 9, wherein at least some of said sets of active switching devices comprise varactor diodes and / or memory capacitors.
14. 14. The radial slot line antenna array of claim 9, wherein the drive circuit comprises at least one high voltage driver configured to provide a high voltage bias signal.
15. 15. A radial slot line antenna array as claimed in any one of claims 9 to 14, wherein the radiating surface comprises a metal layer interposed between the semiconductor wafer element and the substrate and bonded to the semiconductor wafer element and to the substrate.
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