Photonic associative memory and its applications

Abstract

A photonic associative memory (CAM) and its applications are provided. The CAM includes a photonic crossbar array having a plurality of row and column waveguides, and a plurality of photonic filter devices. Each filter device is selectively programmable to first and second states representing a respective stored bit value that filters out light according to programming. An encoder for encoding a plurality of input bit strings into optical signals such that bit values ​​in different bit strings are encoded using optical signals in different pairs of optical states, simultaneously providing optical signals corresponding to each bit position in the bit strings to each row waveguide of the array. The CAM further includes a detector for detecting light in one of the optical states in each column waveguide, thereby identifying any discrepancies between each input bit string and the bit value stored in the filter device that couples light to that waveguide.

Description

[Background technology]

[0001] This disclosure relates generally to photonic content-addressable memories and their applications, along with devices and methods that utilize such memories.

[0002] An associative memory is a type of associative memory that can perform search operations with O(1) time complexity. In a content-addressable memory (CAM), data is addressed by data content rather than by data address, as in traditional memories such as random-access memory (RAM) and hard disks. The input to the memory is a bit string (a "search term" or "search vector") that is compared with multiple bit strings stored in the memory. The stored bit strings can be stored in an array of memory cells connected between a set of input search lines and a set of output match lines. The input search term is applied on the search lines, and the output on the match lines indicates whether the search term matches the word stored in the cells connected to the match lines. The match lines typically draw a low (logic 0) if no bits in the search term match the corresponding bits in the stored word, where a high match line (logic 1) indicates a match. For a binary CAM operation, all input search bits must match the corresponding stored bits. In a ternary CAM (TCAM), a memory cell can store a third "don't-care" bit value X that matches both input bit values ​​0 and 1.

[0003] CAMs are commonly used for fast lookups for data routing in network switching devices (routers, switches, gateways, etc.), where they are used to determine the appropriate output port for forwarding a data packet arriving at an input port. Routing bandwidth is limited by the speed at which these lookups can be performed. Other applications include cache memory, decision trees, neural networks, and data mining, among various others.

[0004] CAMs are generally implemented using digital electronics. A typical SRAM (Static Random-Access Memory) TCAM memory cell requires two SRAM bit cells and four additional transistors. Memristive TCAM cells are an emerging hardware approach that reduces the power consumption and space complexity incurred in digital CAMs. Typical memristive hardware uses 6T2M (6 transistors, 2 memristors) CAM cells, 2T2M cells, or 5T2M cells, which reduce the requirements of SRAM or DRAM-based CAM cells. While memristive CAMs address the space and latency issues of digital CAMs to some extent, these issues remain a challenge for many applications.

[0005] Optical, or photonic, CAMs are another promising approach. These CAMs offer high-speed operation by processing input search terms encoded in optical signals rather than electrical signals, processing data at the speed of light. While such CAMs offer faster operation than their electronic counterparts, which rely on the same basic operating principles, current photonic CAMs do not have sufficient area / time and / or energy efficiency to meet the ever-increasing demands for miniaturization, speed, and efficiency in CAM applications. Summary of the Invention

[0006] A first aspect of the present disclosure provides a photonic associative memory. The photonic CAM includes a photonic crossbar array having a plurality of row and column waveguides, and a plurality of photonic filter devices located at respective intersections of the row and column waveguides, each of which selectively couples light from the row waveguides to the column waveguides at the intersection. Each filter device is selectively programmable to first and second states representing a respective stored bit value. Each filter device is operable, in its first programmable state, to filter out light that is in any of a first plurality of optical states from light coupled to the column waveguide, and, in its second programmable state, to filter out light that is in any of a second plurality of different optical states from light coupled to the column waveguide. The CAM comprises an encoder for encoding a plurality of input bit strings into optical signals such that bit values ​​in different bit strings are encoded using optical signals in different pairs of optical states, each pair including one state from each of the first and second pluralities, and for simultaneously supplying an optical signal corresponding to each bit position in the bit string to each row waveguide of the array. The CAM further comprises a detector for detecting light in one of the optical states in each column waveguide, thereby identifying any discrepancy between each input bit string and the bit value stored in the filter device that couples light to that waveguide.

[0007] Unlike previous CAMs in which input search terms are processed sequentially, i.e., one at a time, embodiments of the present disclosure provide a photonic CAM capable of searching multiple search terms simultaneously. If light is detected on a column waveguide in any of the optical states used to encode a given input bit string, the bit string will not match that stored in the filter device associated with that column waveguide. Because a different pair of optical states is used to encode each input word, multiple input words can be searched in parallel in O(1) time complexity. This provides processing speeds several orders of magnitude higher than current state-of-the-art CAMs. Additionally, the memory is implemented in a compact photonic crossbar array, with the same photonic filter device at each crosspoint storing the bit strings. This provides a very simple, area-efficient, integrated CAM with ultrafast operation.

[0008] Embodiments of the present disclosure can be readily configured for ternary CAM operation, where an encoder is adapted to encode an input bit string including bit values ​​0, 1, and X, where X indicates a don't care bit. Bit values ​​0 and 1 in the bit string are encoded using optical signals in associated pairs of optical states, and bit value X is encoded as a zero signal. Thus, no signal is detected for an input bit of value X, whether 1 or 0, indicating a match with the corresponding stored bit value.

[0009] The optical states used to encode the input bit sequence may correspond to different wavelengths of light, whereby the optical signal encoding the input bit sequence is wavelength division multiplexed onto the row waveguides. Other embodiments may use different polarization states of light.

[0010] Photonic filter devices are conventionally implemented with directional couplers for coupling light from row waveguides to column waveguides at cross points and programmable filters for operation in first and second programmable states. Here, the directional couplers can be adapted to equally distribute optical power among the column waveguides of the array, simplifying operation at the detector. In wavelength-division multiplexing-based embodiments, the programmable filter can be a frequency filter. In preferred embodiments, the frequency filter includes first and second ring resonators operable to filter light in first and second programmable states, respectively. These embodiments can utilize the multiple resonant wavelengths of the ring resonators to filter out optical signals having a desired wavelength. The ring resonators may include respective memory elements, and preferably nonvolatile elements such as phase-change memory elements, that are programmable to tune the ring resonators for operation in the first and second programmable states. This provides a nonvolatile, easily programmable array for energy-efficient operation.

[0011] A CAM embodying the present disclosure also provides ease for in-memory logic computation to accommodate application-level requirements. In particular, the encoder can be operable to encode, for each input bit string, at least one additional logical bit associated with the bit string using at least one additional optical signal in at least one additional optical state different from the state in the first and second plurality of states. The additional optical signals for corresponding logical bits of the bit string are simultaneously provided to row waveguides of the array. Here, the memory also includes a plurality of programmable logic devices arranged to selectively couple the additional optical signal to the column waveguides, and the detector is operable to detect the additional optical signal in each column waveguide. The operation of such in-memory logic is further described below.

[0012] The output of a CAM embodying the present disclosure can be adapted to the requirements of a particular application. For a simple match search, for example, the detector can be adapted to generate an output for each column waveguide indicating whether or not each input bit string matches a bit value stored in a filter device that couples light to that waveguide. Additionally or alternatively, the detector can be connected to logic for performing desired processing operations based on the detection results. Examples of such processing operations are described below.

[0013] A memory device embodying the present disclosure may include multiple CAMs as described above and a memory controller for feeding input bit strings to the multiple CAMs in parallel. Such a memory device may use the CAMs for various parallel search operations, allowing for parallel searches of more words and / or parallel searches of longer words distributed across multiple arrays.

[0014] Another aspect of the present disclosure provides a network switching device having a plurality of input ports for receiving input data packets and a plurality of output ports for outputting the data packets. The device includes a switch fabric for forwarding input data packets to output ports depending on respective address bit sequences within the input packets, and a switch controller having at least one CAM as described above for storing the address bit sequences in a filter device of the CAM. The switch controller is adapted to provide address bit sequences of a plurality of data packets as input bit sequences to the at least one CAM, and to determine output ports for forwarding the data packets depending on a match of the input bit sequence to the stored address bit sequence.

[0015] A further aspect of the present disclosure provides a method for simultaneously comparing a plurality of first bit sequences with each of a plurality of second bit sequences, the method comprising storing each second bit sequence in the CAM described above such that successive bits are stored in filter devices located at successive intersections of column and row waveguides, the method further comprising providing the plurality of first bit sequences to an encoder of the CAM as the input bit sequences, and determining a comparison result based on detection of light in one of the optical states at a detector of the CAM.

[0016] Embodiments of the present disclosure are described in more detail below, by way of illustrative and non-limiting examples, with reference to the accompanying drawings, in which: [Brief explanation of the drawings]

[0017] A brief description of some of the figures in the drawing [Figure 1] FIG. 1 is a schematic diagram of a photonic CAM embodying the present disclosure.

[0018] [Figure 2] 1 illustrates the structure of a photonic filter device used in an embodiment of a CAM.

[0019] [Figure 3] 3 illustrates the operation of the filter device of FIG. 2.

[0020] [Figure 4] A simple example of binary CAM operation is shown.

[0021] [Figure 5] A simple example of ternary CAM operation is shown.

[0022] [Figure 6] 1 is a schematic diagram of a network switching device embodying the present disclosure;

[0023] [Figure 7A] 1 illustrates the structure and operation of a CAM incorporating in-memory logic in accordance with an embodiment of the present disclosure. [Figure 7B] 1 illustrates the structure and operation of a CAM incorporating in-memory logic in accordance with an embodiment of the present disclosure.

[0024] [Figure 8] 1 illustrates the operation of in-memory logic in a routing application.

[0025] [Figure 9] 1 illustrates additional features of a CAM embodying the present disclosure.

[0026] [Figure 10] 1 illustrates a memory device using multiple CAMs embodying the present disclosure.

[0027] [Figure 11A] 11 illustrates different modes of operation of the device of FIG. 10; [Figure 11B] 11 illustrates different modes of operation of the device of FIG. 10; DETAILED DESCRIPTION OF THE INVENTION

[0028] 1 illustrates components of an exemplary photonic CAM embodying the present disclosure. CAM 1 comprises a photonic crossbar array, generally designated 2, having a plurality of row and column waveguides. Array 2 is an n x m array in this embodiment, having n row waveguides 3 and m column waveguides 4. CAM 1 is illustrated as a photonic crossbar array generally designated 2, having n row waveguides 3 and m column waveguides 4. ij (i=1 to m, j=1 to n), each of which is a photonic filter device f ijis located at each intersection of the matrix waveguides for selectively coupling light from row waveguide j to column waveguide i at that intersection. The CAM further comprises an encoder, generally designated 5, and a detector, generally designated 6. The encoder 5 is adapted to encode a plurality of input bit sequences into optical signals provided to the row waveguides of the array 2. The detector 6 is adapted to detect optical signals coupled from the row waveguides to the column waveguides of the array.

[0029] Each filter device ij are selectively programmable into first and second states representing their respective stored bit values. Thus, each column i=1 to m of these filter devices can be programmed with a stored bit string (stored word) that is to be compared with an input bit string (input word). When in the first programmable state (corresponding to a stored bit value of 1 in this example), each filter device f ij is operable to filter light in any of a first plurality of optical states from light coupled into column waveguide i. When in a second programmable state (corresponding to a stored bit value of 0 in this example), each filter device f ij is operable to remove light in any of a second plurality of different optical states from light coupled into column waveguide i. In this embodiment, the different optical states correspond to respective wavelengths of light. The first plurality of optical states includes wavelengths denoted λ1, λ2, λ3, ..., etc., and the second plurality of optical states includes wavelengths denoted λ1', λ2', λ3', ..., etc.

[0030] The encoder 5 is operable to encode a plurality of input words into optical signals such that bit values ​​in different input words are encoded using optical signals in different pairs of optical states, where each pair includes one state from each of a first and second plurality of states. k1 ,s k2 ,...,s kn Including, Sk (k={1,2,3}) are input. Each input word S k is the wavelength of the corresponding pair λ k ,λ k ' In this example, S k The bit value 1 in k is encoded into the signal S k The bit value 0 in k In this embodiment, the encoder 5 encodes the input word S k the corresponding bits of s k1 From s kn , the bit encoders E1 to E n Thus, each bit encoder encodes the input bits of word S1 into an optical signal of wavelength λ1 (if the bit value is 1) or λ1' (if the bit value is 0). The input bits of word S2 are encoded into an optical signal of wavelength λ2 (if the bit value is 1) or λ2' (if the bit value is 0). The input bits of word S3 are encoded into an optical signal of wavelength λ3 (if the bit value is 1) or λ3' (if the bit value is 0). Although three input words are shown here for simplicity, the corresponding wavelength pairs λ k ,λ k ' Add the input word S using k , k=4, 5, 6, etc. can be encoded similarly.

[0031] Each bit encoder E1 to E n The optical signals output by the array 2 are fed to corresponding multiplexers (MUX) coupled to respective row waveguides 3 of the array 2. The encoder 5 therefore converts the input word S k The optical signals corresponding to each bit position in are simultaneously fed to respective row waveguides of the array. The signals on each row waveguide are filtered by a filter device f at each array intersection. ijThe filter device f is selectively coupled to the column waveguide at the intersection depending on the programmed state of the filter device f. ij is programmed to store a bit value of 1, optical signals at wavelengths λ1, λ2, λ3, ..., etc. (which encode input bits of value 1) are filtered out. Only signals at wavelengths λ1', λ2', λ3', ..., etc. (which encode input bits of value 0) are transmitted to the column waveguides. Conversely, the filter device f ij is programmed to store a bit value of 0, the optical signals at wavelengths λ1', λ2', λ3', ..., etc. (which encode input bits of value 0) are filtered out, and signals at wavelengths λ1, λ2, λ3, ..., etc. (which encode input bits of value 1) are transmitted to the column waveguides. Thus, the input bit s kj is device f ij If a bit matches a bit stored in S, then no optical signal is sent to the column waveguide for that bit. k Every bit of k1 From s kn is the number of devices f in a given column i of the array. i1 From f in If it matches the corresponding bit stored in k or λ k ' signal is not transmitted to the column waveguide for that column i of the array.

[0032] Detector 6 is adapted to detect light in one of a first and second plurality of optical states (here wavelengths λ1, λ2, λ3, ..., and λ1', λ2', λ3', ...) in each column waveguide of the array. In this embodiment, the detector is a set of demultiplexers (DEMUX) coupled to each column waveguide, and photodetectors PD1 to PD m Each demultiplexer separates the light output onto the associated column waveguide 4 into its component wavelengths and provides the resulting signal (if any) to a corresponding photodetector. Each photodetector detects the input word S kAll pairs of wavelengths λ used to encode k ,λ k ' and detecting light from the input bit string and thereby identifying any discrepancies between each input bit string and the bit values ​​stored in the corresponding string of the filter device. i is an arbitrary wavelength λ k ,λ k ' When detecting light, the corresponding input word S k does not match any stored word in column i of the array. Therefore, a given input word can be compared in parallel with all stored words. Furthermore, for each input word S k To encode the different pairs of optical states λ k ,λ k ' is used, all input words can be compared simultaneously with the words stored in the array. This simultaneous searchability provides significantly increased throughput for CAM search operations.

[0033] CAM1 can be adapted to provide an output depending on the particular search application. For the simple match / mismatch search described above, the detector compares, for each column waveguide i, the bit value stored in the filter device that couples light into that waveguide with each input bit string S k For example, each photodetector PD may provide an output indicating whether or not the i is the input signal S k may provide a k-bit output indicating whether the word stored in column i matches (1) or does not match (0) the word stored in column i. Alternatively, or in addition, detector 6 may be connected to logic for performing desired processing operations depending on the result of the detection of light by the detector. Illustrative examples of such application-dependent logic are described below.

[0034] FIG. 2 shows a filter device f in a preferred embodiment of CAM1. ij1 is a more detailed illustration of a filter device 10 shown in FIG. The enlargement in this figure shows two filter devices 10 at adjacent intersections of a column waveguide 4 and two row waveguides 3. Each filter device 10 includes a directional coupler and a programmable filter. The directional coupler is here implemented by a broadband coupling waveguide 11 for coupling light of all operating wavelengths from the row waveguides to the column waveguides. (Note that no coupling occurs at the actual intersections of the row and column waveguides in the array, and any coupling losses there are negligible for the operation described.) The directional couplers 11 of all filter devices 10 in the array are adapted for equal distribution of optical power among the column waveguides of the array.

[0035] The programmable filter, which can be selectively programmed to first and second programmable states, comprises a frequency filter in this embodiment. The frequency filter, generally designated 12, has first and second ring resonators R1 and R2 and a drop port implemented by a waveguide 13 and a grating 14. The first ring resonator R1, in the first programmable state of the frequency filter 12, is operable to remove light having one of a first plurality of wavelengths λ1, λ2, λ3, ..., from light transmitted to the column waveguide via the directional coupler 11. The second ring resonator R2, in the second programmable state of the frequency filter, is operable to remove light having one of a second plurality of wavelengths λ1', λ2', λ3', ..., from light transmitted to the column waveguide.

[0036] As shown in the figure, ring resonators R1 and R2 include respective memory elements, here phase-change memory (PCM) elements, that are programmable to tune the ring resonators for operation in first and second programmable states. Each PCM element can be implemented by a layer of PCM material (e.g., a chalcogenide such as GST (germanium-antimony-tellurium)) covering a portion of the ring resonator waveguide. As is well known in the art, such PCM elements can be programmed to amorphous or crystalline states, which have different opto-electrical properties, by heating the PCM material. Here, heat can be applied by applying a programming voltage to a heater, e.g., a metal layer, covering the PCM material. Alternatively, heating can be achieved by applying an optical signal to the PCM material with appropriate power to induce the desired phase state.

[0037] Selective filtering by filter device 10 utilizes wavelengths within the resonant spectrum of ring resonators R1 and R2. Figure 3 illustrates tuning the ring resonators for operation in two programmable states of the filter device. Here, the top diagram shows the resonant spectrum of ring R1 in two programmable states (crystalline and amorphous) of the PCM element in that ring. In the on (e.g., crystalline) state, wavelengths λ1, λ2, λ3, ..., are evanescently coupled into ring R1 from directional coupler 11. These wavelengths are then coupled from R1 to drop port 13 and dispersed by grating 14. Thus, when R1 is on, all wavelengths λ1, λ2, λ3, ..., on the associated row waveguide 3 are transmitted to the drop port and are therefore removed from the light coupled into column waveguide 4. In the off state of ring R1, the resonant wavelength is shifted as shown, thereby transmitting wavelengths λ1, λ2, λ3, ..., into the column waveguide. Similarly, when ring R2 is on, as shown in the bottom diagram, all wavelengths λ1', λ2', λ3', ..., on the row waveguides are sent to the drop port and are therefore removed from the light coupled into column waveguide 4. When ring R2 is off, all wavelengths λ1', λ2', λ3', ..., are sent to the column waveguides.

[0038] In a first programmable state of filter device 10, ring R1 is on (representing a stored bit value of 1) and ring R2 is off. Thus, wavelengths λ1, λ2, λ3, ... (encoding a bit value of 1 in the input word) are dropped, while wavelengths λ1', λ2', λ3', ... (encoding a bit value of 0 in the input word) are transmitted to the column waveguides. In a second programmable state of device 10, ring R2 is on (representing a stored bit value of 0) and ring R2 is off. Thus, wavelengths λ1', λ2', λ3', ... (encoding a bit value of 0) are dropped, while wavelengths λ1, λ2, λ3, ... (encoding a bit value of 1) are transmitted. Figure 4 is a schematic diagram of the resulting filtering operation for a simple example. The diagram shows two columns of an array with n=4 filter devices 10 per column. The devices in the first column, labeled a1 through a4, store respective bits of the first word A as shown here. The devices in the second column, labeled b1 through b4, store respective bits of the second word B. The corresponding states of the resonators R1 and R2 for these devices are shown in the table in the figure.

[0039] The array operation is shown for three input words S1 to S3, whose bit values ​​are assigned to the wavelengths λ k ,λ k ' The labeled arrows on the column waveguides next to each filter device indicate the input wavelengths transmitted by that device. For the first column, photodetector PD1 detects the wavelengths used to encode inputs S1 and S3, indicating a mismatch with word A. However, wavelengths λ2, λ2 ' No signal is detected at (or below a predetermined threshold level corresponding to the expected coupling loss), indicating a match between S2 and A. Thus, the output of PD1 correctly indicates a match with S2. Similarly, the output of PD2 correctly indicates a match between S1 and word B.

[0040] It will be appreciated that CAM 1 can be fabricated as an integrated on-chip structure using standard material processing techniques. Array 2 is a filter device f ij All filter devices f can be implemented using nanophotonic waveguides and microring resonators (MMRs) for the rings R1 and R2. ij It should be noted that the photodetectors PD and PD are identical, resulting in a particularly simple design and facilitating array fabrication. The encoder 5 and detector 6 can be implemented using commonly known devices and well-known techniques as will be apparent to those skilled in the art. For example, an optical signal at the required wavelength may be generated by an integrated laser in the encoder 5. i may be implemented by a photodiode in the detector 6.

[0041] The above embodiments provide exceptionally area- and energy-efficient CAM implementations with ultra-fast operation through simultaneous search of multiple input bit strings. While operation with three input words is described for simplicity, ring resonators can support hundreds of resonant modes. This provides orders of magnitude higher throughput for parallel searches, limited only by the number of signal wavelengths that can be generated in a practical design. By way of example, simultaneous searches of up to approximately 100 input words may be feasible with current technology, with roughly 20 to 30 parallel input words being sufficient for many applications.

[0042] Programming of the array 2 is performed by a controller (not shown in FIG. 1), for example, which receives the word to be stored in the array and sends the appropriate programming signal to a filter device f ijThe filter design of Figure 2 provides ease of programming (and reprogramming) through the use of PCM elements as described above and non-volatile storage for low-energy operation. The paired ring resonators storing respective bits 1 and 0 provide high SNR (signal-to-noise ratio) operation. Signal detection in detector 6 is a simple binary operation, whereby any signal above a predetermined coincidence threshold can be considered a mismatch. This coincidence threshold can be low and set to be just above the noise threshold for detector operation.

[0043] The bit sequence input to the encoder 5 may generally be defined by an electrical or optical input signal. It should be noted that although a regular array of parallel orthogonal matrix waveguides is shown in FIG. 1 , in general, the waveguides need not be parallel or regularly spaced, and the matrix waveguides need not be orthogonal. However, this array structure provides a particularly efficient implementation. The terms "row" and "column" waveguides are, of course, interchangeable and are not intended to imply any particular array orientation. Also, the programming / coding of ones and zeros described above can, of course, be reversed.

[0044] Filter device f ij Various other implementations of the present invention are envisioned. For example, in some embodiments, other non-volatile memory elements, such as resistive memory elements, may be used. Other embodiments may use volatile memory elements based on modulators using nanomechanical, electro-optical, plasma dispersion, or thermal effects. The directional couplers may be implemented by other devices, such as MZIs (Mach-Zehnder Interferometers), and the programmable filters may be implemented by, for example, tunable gratings. Also, embodiments can be envisioned in which the optical states used to encode the input bits correspond to different polarization states rather than different wavelengths of light. In this case, the filter device f ijmay be implemented using devices such as meta-waveguides that are sensitive to different polarizations of light and can be tuned to selectively remove desired polarization states, suitable implementations of which will be apparent to those skilled in the art from the operation described herein.

[0045] A CAM embodying this disclosure can be readily adapted for ternary CAM operation. In particular, the encoder 5 determines whether the bit values ​​0 and 1 in the bit string are paired with the state λ k ,λ k ' , and can be adapted to encode an input bit string containing bit values ​​0, 1, and X (X indicating a don't care bit) such that bit value X is encoded as a zero signal. Figure 5 illustrates this operation for the same example as in Figure 4, but now input S3 contains two don't care bits X. Because X are encoded as zero signals in encoder 5, wavelengths λ3 or λ3' for these bits are not transmitted by filter devices a3, a4, b3, or b4, causing X to match both stored bit values ​​1 and 0. Detector 6 therefore detects a further match between S3 and, here, the stored word A.

[0046] CAMs embodying the present disclosure can be applied to particular interest in network switching devices such as routers, switches, gateways, etc., where incoming data packets must be routed to the appropriate device output port for onward transmission in the network. Figure 6 is a schematic diagram of one embodiment of such a switching device. In this example, a router 20 has input ports I1 through I2 for receiving incoming data packets from network nodes. p and a set of output ports O1 to O2 for outputting data packets to the network node. mPackets received at an input port are sent to an output port via the high-speed switch fabric 21. The input packets are stored in an input queue buffer Q IN Packets sent to an output port are queued as needed in the output queue buffer Q before being processed and sent onwards to the network. OUT In , they are queued as needed.

[0047] The appropriate output port for forwarding an input packet is determined depending on the destination address bit string contained in the input packet. The forwarding operation is controlled by a switch controller 22 which compares the address bit string in the input packet with the network addresses stored in the CAM. In particular, the switch controller 22 has a CAM 1 as described above, and a routing processor 23 for controlling address lookup operations. The network addresses to be compared with the input packet addresses are filtered by the processor 23 through a filter device f in the CAM 1. ij These columns are shown as C1 to C m where a typical address space is here 7 to 15 bits. m are the output ports O1 to O2. m If the input packet address is in the given column C i If the packet matches that stored in the i The output of CAM detector 6 (omitted from this diagram) is fed to address logic 24, which returns an output port address for each input packet to routing processor 23. The routing processor then controls the forwarding of the packets by switch fabric 21 to the correct output port.

[0048] In operation of router 20, routing processor 23 reads addresses from packets arriving at an input port and provides addresses from multiple input packets as input bit strings to CAM 1. Address logic 24 then simultaneously determines the appropriate output port for these data packets based on a match between the input packet addresses and the addresses stored in the CAM.

[0049] In a typical network, multiple network nodes communicate with router 20 at any given time. When the packet arrival rate exceeds the output routing rate, data traffic (queuing) occurs. Routing bandwidth is therefore limited by the speed at which the output port address for a given input data packet can be looked up. Even with the fastest imaginable electronic CAM, data traffic cannot be alleviated due to the sequential nature of CAM lookups. This represents a serious bottleneck and contributes to significant communication latency. By simultaneously looking up multiple input packet addresses in CAM 1, router 20 provides significantly increased throughput, alleviating this bottleneck and significantly improving network bandwidth.

[0050] Another emerging requirement for network switching devices is the ability to program CAMs on the fly for flexible use and in-memory logic computation, for example, to make routing decisions, change output port addresses, or perform application-level calculations on packets. CAMs embodying the present disclosure provide the ease of in-memory logic operations that accommodate such requirements. In particular, the CAM encoder can be adapted to encode, for each input search term, at least one additional logical bit associated with the term using at least one additional optical signal in at least one additional optical state different from the state in the first and second plurality of states used to encode the search term. The additional optical signals for the corresponding logical bits of the search term are simultaneously fed to row waveguides of the array. Additionally, a plurality of programmable logic devices can be provided in the array, and these logic devices are arranged to selectively couple the additional optical signals to column waveguides. A CAM detector is then operable to detect the additional optical signal in each column waveguide. Exemplary embodiments herein are described below with reference to FIGS. 7a and 7b.

[0051] FIG. 7a shows CAM 30, where features corresponding to those in CAM 1 (FIG. 1) are labeled with similar reference labels. k is the address bit s k1 From s kn , where the additional logical bits are now set to the value 1. The encoder 31 includes an additional bit encoder E L In particular, the input word S k The logical bits in k '' This wavelength λ k '' is all other operating wavelengths λ k ,λ k ' , which may be different for different input words as shown in the figure.'' ,λ2 '' and λ3 '' The resulting optical signals at are wavelength division multiplexed onto the row waveguides 32 of the array.

[0052] L1 to L m A plurality of programmable logic devices, denoted by L, are provided at each intersection of a column waveguide 4 and a row waveguide 32. These logic devices L i The structure and operation of each device L is shown in Figure 7b. i includes a directional coupler, here a broadband coupling waveguide 34, for coupling light from the row waveguides 32 to the column waveguides, and a programmable frequency filter. The frequency filter here has a wavelength λ k '' This is implemented by a ring resonator RL that includes a memory element (here a PCM element) that is programmable to tune the resonator RL to filter out light having wavelength λ1 in the on state of the resonator RL (corresponding to a stored logic bit of value 1). '' ,λ2 '' and λ3 '' is coupled to the drop port 35 and is therefore not transmitted to the column waveguide. In the off state of RL (corresponding to a stored logic bit of value 0), the wavelength λ '' ,λ2 '' and λ3 '' is transmitted to the column waveguides. The CAM detector 6 (not shown in FIG. 7a) detects a wavelength λ '' ,λ2 '' and λ3 '' and thereby detecting the input logic bits and logic device L i The logic bit generator is operable to identify any discrepancies between the logic bits stored in the logic bit generator.

[0053] Figure 8 illustrates the operation of CAM 30 as a simple example. This example corresponds to that of Figure 5 with additional logic devices L1 and L2 in each column of the array. Here, for routing to occur, node N k Address bit string S in a packet fromk must match that in the CAM column, and the logical bits must also match. Thus, in this example, L1 is set to 0, and detector PD1 outputs a 0 (no match) for the logical bit comparison in the first column. Thus, the router address logic (24 in FIG. 6) indicates a "routing failure" decision for packets from nodes N2 and N3. However, in the second column, the logical bits match for node N1, and the address logic returns the output port address corresponding to column 2 for node N1.

[0054] The simple in-memory logic scheme described above can be used to control routing decisions. For example, if an output port is overloaded, or if the destination node does not want to provide access, e.g., for maintenance or confidentiality reasons, the logic device for that output port address can be set to off. While a simple example is described here, it will be understood that one or a combination of different logic bits can be used to implement various other routing control schemes, and more complex Boolean operations can be performed using the detector outputs from the array columns. Such an embodiment provides ample flexibility in CAM programming, whether to reconfigure for different output port addresses or to perform in-memory logic operations.

[0055] Optical losses in photonic crossbar arrays increase quadratically with array size (n × m), which imposes constraints on the scalability of crossbar dimensions. To improve signal quality, a CAM embodying the present disclosure may include an optical amplifier between each column waveguide and detector, as shown schematically in FIG. 9. Here, a broadband optical amplifier (OA) is provided at the output of each column to amplify the accumulated optical signal in the column waveguide before feeding it to the detector (not shown). Additionally or alternatively, the encoder may be adapted to scale the amplitude of the optical signal fed to the row waveguide. This can be achieved using high input coupling to the row and / or amplification by a broadband optical amplifier at the row input, as shown. However, limiting the array size generally mitigates optical losses to an acceptable level. For example, a 64 × 64 array size for routing applications allows search operations for IPv4 (4 bytes), IPv6 (8 bytes) protocols, and MAC address lookups (6 bytes). Of course, other protocols that rely on reduced word lengths (3 bytes and less) can also be used.

[0056] Network switching devices and other apparatuses embodying the present disclosure may utilize multiple CAMs for parallel search operations. For example, for searches across multiple output port addresses, the search operation can be broadcast across multiple arrays. FIG. 10 shows an example of such a memory apparatus. The apparatus 40 includes multiple CAMs, here four CAMs 1 as described above, and a memory controller 41 for feeding input bit strings to the CAMs in parallel. The memory controller 41 may include an optical or electrical processor compatible with passive / quasi-passive photonic arrays as described above.

[0057] 11a and 11b illustrate an exemplary mode of operation of memory device 40, here for a simple 4x4 array. In FIG. 11a, each entered search term S kis fed into each of multiple (here two) CAMs 1, each containing a different set of stored words (A through D and E through H, respectively). This allows for parallel searches across a large number of words, e.g., output port addresses, using a moderately sized array, allowing for N×M parallel searches, where N is the number of columns and M is the number of arrays. In Figure 11b, each input search term S k is parsed into sections (here two sections), and the different sections are fed into respective CAMs 1, each storing a different section of the same set of stored words (A to D) (e.g., bits a1 to a4 and a5 to a8 of word A). A logical AND applied to the outputs of the two arrays for a given input word then determines whether there is an exact match. This makes it possible to perform parallel search operations for longer word lengths distributed across different arrays.

[0058] CAMs embodying the present disclosure can be applied to benefit a variety of applications other than routing, and the output of these CAMs can be processed appropriately for the application. By way of example, embodiments can be adapted to simultaneously perform Hamming difference calculations on multiple input bit strings. In this application, the pair of wavelengths λ that encode a given input bit string may be k ,λ k 'The intensity of light having either of the first and second bit strings can be detected by a CAM detector for each column. This intensity then provides a measure of the number of bits in the input bit string that differ from the stored bit string. Various other applications, including cache memories, decision trees, associative search operations for neural networks, and data mining applications, can also benefit from CAMs embodying the present disclosure. In general, these CAMs can be used in any application in which multiple first bit strings need to be compared with each of multiple second bit strings to determine a comparison result. The comparison can be performed simultaneously by storing each second bit string in a CAM embodying the present disclosure such that successive bits are stored in filter devices located at successive intersections of column and row waveguides; providing the multiple first bit strings to a CAM encoder as input bit strings; and determining the required comparison result based on the detection of light at the CAM detector.

[0059] The above embodiments provide a compact and efficient architecture for an ultra-fast, energy-efficient CAM. Of course, it will be understood that various changes and modifications can be made to the exemplary embodiments described. By way of example, alternatives / modifications described in connection with one embodiment may be applied to other embodiments, as appropriate. In general, where features are described herein with reference to a CAM embodying the present disclosure, corresponding features may be provided in memory devices / methods that use such a CAM, and vice versa.

[0060] The description of various embodiments of the present disclosure has been presented for purposes of illustration, but is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terms used herein have been selected to best explain the principles, practical applications, or technical improvements of the embodiments over the art found in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. a photonic crossbar array having multiple matrix waveguides; a plurality of photonic filter devices each located at a respective intersection of the matrix waveguides for selectively coupling light from the row waveguides to the column waveguides at the respective intersections, wherein each filter device is selectively programmable to first and second states representing a respective stored bit value, and wherein each filter device is operable, in the first state, to remove light in any of a first plurality of optical states from light coupled to the column waveguide, and in the second state, to remove light in any of a second, different plurality of optical states from light coupled to the column waveguide; an encoder for encoding a plurality of input bit sequences into optical signals such that bit values ​​in different bit sequences are encoded using optical signals in different pairs of optical states, each pair including one state from each of the first and second pluralities, and for simultaneously supplying to respective row waveguides of the array an optical signal corresponding to each bit position in the bit sequence; and a detector for detecting light in any of said optical states in each column waveguide, thereby identifying any discrepancies between each input bit string and the bit values ​​stored in said filter device that couples light into said waveguides; A photonic associative memory comprising:

2. 2. The associative memory of claim 1, wherein the encoder is adapted to encode an input bit string comprising bit values ​​0, 1, and X, where X indicates a don't care bit, and wherein bit values ​​0 and 1 in the bit string are encoded using optical signals in the pair of optical states, and bit value X is encoded as a zero signal.

3. 2. The associative memory of claim 1, wherein the optical states correspond to one of respective wavelengths of light and respective polarization states of light.

4. 2. The associative memory of claim 1, wherein each filter device comprises a directional coupler for coupling light from the row waveguide to the column waveguide, and a programmable filter for operation in the first and second programmable states.

5. 5. The associative memory of claim 4, wherein the directional couplers are adapted for equal distribution of optical power among the column waveguides of the array.

6. 5. The associative memory of claim 4, wherein the optical states correspond to respective wavelengths of light, and the programmable filter includes a frequency filter for filtering out light having any of a first plurality of wavelengths in the first programmable state and any of a second plurality of wavelengths in the second programmable state.

7. 7. The content addressable memory of claim 6, wherein the frequency filter includes first and second ring resonators operable to filter out the light in the first and second programmable states, respectively.

8. 8. The content addressable memory of claim 7, wherein the ring resonator includes respective memory elements that are programmable to tune the ring resonator for operation in the first and second programmable states.

9. The associative memory of claim 8 , wherein each memory element comprises a phase change memory element.

10. the encoder is operable to encode, for each input bit sequence, at least one additional logical bit associated with the bit sequence using at least one additional optical signal in at least one additional optical state different from a state in the first and second plurality of states, and to simultaneously supply the additional optical signal for a corresponding logical bit of the bit sequence to a row waveguide of the array; the memory comprising a plurality of programmable logic devices arranged to selectively couple the additional optical signals to the column waveguides; The detector is operable to detect the additional optical signal in each column waveguide.

2. The associative memory of claim 1.

11. 11. The associative memory of claim 10, wherein the at least one additional optical state is different for different input bit sequences.

12. the first and second pluralities of optical states correspond to respective wavelengths of light; the additional optical states correspond to additional wavelengths of light; Each programmable logic device includes a directional coupler for coupling light from a row waveguide to a column waveguide, and a programmable frequency filter for selectively removing light having the additional wavelength from the light coupled to the column waveguide.

11. The associative memory of claim 10.

13. 13. The associative memory of claim 12, wherein the frequency filter includes a ring resonator and a memory element programmable to tune the ring resonator to filter out light having the additional wavelength.

14. 2. The associative memory of claim 1, wherein the detector is adapted to generate, for each column waveguide, an output indicating whether each input bit string matches the bit value stored in the filter device that couples light to the waveguide.

15. 2. The associative memory of claim 1, wherein the detector is connected to logic for performing processing operations dependent on the detection of light in one of the optical states by the detector.

16. 2. The associative memory of claim 1, further comprising an optical amplifier provided between each column waveguide and the detector for amplifying light in the column waveguide.

17. The associative memory of claim 1 , wherein the encoder is adapted to scale the amplitude of an optical signal provided to the row waveguide.

18. 10. A memory device comprising: a plurality of associative memories according to claim 1; and a memory controller for supplying bit strings input in parallel to said plurality of memories.

19. a plurality of input ports for receiving input data packets and a plurality of output ports for outputting data packets; a switch fabric for forwarding input data packets to the output ports depending on respective address bit sequences within the input data packets; and 2. A switch controller having at least one associative memory according to claim 1 for storing the address bit string in its filter device, wherein the switch controller is adapted to provide the address bit string of a plurality of data packets as the input bit string to the at least one associative memory, and to determine the output port for forwarding these data packets depending on a match of the input bit string to a stored address bit string. A network switching device comprising:

20. 1. A method for simultaneously comparing a plurality of first bit strings with each of a plurality of second bit strings, the method comprising: storing each second bit string in the associative memory of claim 1 such that successive bits are stored in filter devices located at successive intersections of a column waveguide and said row waveguide; providing the plurality of first bit sequences as the input bit sequences to the encoder of the memory; and determining a comparison result based on detection of light in any of said optical states at said detector of said memory; A method for providing the above.

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