Integrated device, manufacturing method, detection device and terminal

Abstract

The present application relates to the field of electronics and provides an integrated device, a manufacturing method, a detection device, and a terminal for reducing parasitic elements introduced into the integrated device to improve the effective energy conversion efficiency of the integrated device. The detection device may be a lidar. The integrated device includes a substrate having at least two alternating etched layers and a laser located on the substrate. At least one fill structure is disposed on a side of the substrate away from the laser. The substrate and the fill structure may form a capacitor. The fill structure includes an insulator and a first metal layer. The height of the fill structure is less than the thickness of the substrate. The laser and the capacitor are disposed on the same substrate, thereby shortening the distance between the laser and the capacitor in a three-dimensional layout and realizing interconnection between the laser and the capacitor. This significantly reduces parasitic elements introduced into the structure of the integrated device.

Description

[Technical Field]

[0001] The present application relates to the field of electronic technology, and in particular to integrated devices, manufacturing methods, detection devices and terminals. [Background technology]

[0002] LiDAR (light detection and ranging) is an optical measurement device whose operating principle is to emit a laser signal to an object, receive a target echo signal reflected by the object, and then compare the target echo signal with the laser signal to obtain relevant parameters such as the object's position and distance. LiDAR can accurately scan surrounding objects to form high-resolution images, which helps to quickly recognize surrounding objects and make decisions. Currently, LiDAR is widely used in scenarios such as intelligent vehicles, smart transportation, three-dimensional city mapping, and air quality monitoring.

[0003] Lidar has multiple components. Currently, the layout of components on a printed circuit board (PCB) introduces a large amount of parasitic elements. For example, traces between components on a PCB introduce extra parasitic resistance, extra parasitic inductance, etc. into the circuit. In addition, the longer the trace, the larger the parameter value of the introduced parasitic elements. As a result, during the operation process of the lidar, more energy is consumed by the parasitic elements, reducing the effective energy conversion efficiency used for laser operation. Summary of the Invention

[0004] The present application provides an integrated device, a manufacturing method, a detection device, and a terminal for reducing parasitic introduction into the integrated device to improve the effective energy conversion efficiency of the integrated device. [Means for solving the problem]

[0005] According to a first aspect, the present application provides an integrated device. The integrated device includes a substrate having at least two alternating etching layers, the at least two etching layers being dielectric layers in which through-holes or grooves can be formed by etching or photoetching, and a laser located on the substrate, the laser being, for example, a laser diode capable of emitting laser light with a wavelength of 905 nanometers. At least one filling structure is disposed on a side of the substrate away from the laser. The substrate and filling structure may form a capacitor. The filling structure includes an insulator and a first metal layer. The height of the filling structure is less than the thickness of the substrate, i.e., the filling structure does not penetrate the substrate. Optionally, the filling structure has different radial widths in the at least two etching layers.

[0006] In the above technical solution, the laser and capacitor are arranged on the same substrate, shortening the distance between them in a three-dimensional layout and realizing the interconnection between them. Therefore, there is no need to arrange extra wiring traces between the laser and capacitor. This significantly reduces the parasitic elements (e.g., parasitic inductance and parasitic resistance) introduced into the structure of the integrated device, thereby improving the effective energy conversion efficiency of the integrated device. The substrate has at least two alternately stacked etching layers, so that at least one filling structure arranged in the substrate can have different radial widths in different etching layers. This increases the specific surface area of ​​the capacitor, promotes heat dissipation, and reduces heat loss.

[0007] In a possible implementation of the first aspect, the at least two etching layers have different etching-selective materials. In a possible example, the at least two etching layers may have two etching-selective materials, specifically, aluminum gallium arsenide (AlGaAs) layers and gallium arsenide (GaAs) layers. In other words, the substrate includes alternating AlGaAs and GaAs layers. In the above possible implementation, when the two etching layers include AlGaAs and GaAs layers, the lattice constant of AlGaAs is different from that of the GaAs layer, and the lattice constant of AlGaAs is smaller than that of the GaAs layer. Therefore, the AlGaAs and GaAs layers are subjected to compressive strain in the x-direction and y-direction (i.e., two directions parallel to the etching layers and perpendicular to each other) and tensile strain in the z-direction (i.e., a direction perpendicular to the etching layers). In this way, electrons in the AlGaAs and GaAs layers have high mobility and correspondingly low resistivity. This significantly reduces the parasitic resistance of the integrated device and improves the performance of the integrated device. In addition, due to the good electrical conductivity of AlGaAs, the resistance of the AlGaAs layer can be further reduced by using the AlGaAs layer, which can further improve the performance of the integrated device.

[0008] In a possible implementation of the first aspect, when the at least two etching layers include an AlGaAs layer and a GaAs layer, the GaAs layer is the etching layer closest to the laser among the at least two etching layers. In the above possible implementation, the GaAs layer is positioned closest to the laser to meet the current design requirements of the laser.

[0009] In possible implementations of the first aspect, the thickness of the AlGaAs layer may be the same as or different from the thickness of the GaAs layer, and in one example, the thickness of the AlGaAs layer is the same as the thickness of the GaAs layer.

[0010] In a possible implementation of the first aspect, the etching resistance of the AlGaAs layer may be greater than the etching resistance of the GaAs layer. Correspondingly, the radial width of the fill structure in the AlGaAs layer may be greater than the radial width of the fill structure in the GaAs layer. In this way, the fill structures in the alternating AlGaAs and GaAs layers have different radial widths.

[0011] In a possible implementation of the first aspect, the portions of the fill structure located in the AlGaAs layer are distributed linearly, and the portions of the fill structure located in the GaAs layer are distributed arc-shaped. In the possible implementation, the portions of the fill structure located in the AlGaAs layer are distributed linearly, and the portions of the fill structure located in the GaAs layer are distributed arc-shaped, so that the fill structure can have a large surface area. This increases the specific surface area of ​​the capacitor, thereby facilitating heat dissipation and reducing heat loss.

[0012] In a possible implementation of the first aspect, the insulator is located between the substrate and the first metal layer and is disposed in contact with the first metal layer. In the above possible implementation, a capacitor design having an MIS structure is provided. Specifically, the capacitor includes a substrate, an insulator, and a first metal layer. In this case, the substrate may be a heavily doped substrate. A heavily doped substrate may also be referred to as a low resistivity substrate.

[0013] In a possible implementation of the first aspect, the filling structure further includes a second metal layer. The second metal layer is located between the substrate and the insulator. In the above possible implementation, a capacitor design having an MIM structure is provided. Specifically, the capacitor includes a substrate, a second metal layer, an insulator, and a first metal layer. In this case, the substrate may be a lightly doped or undoped substrate. A lightly doped or undoped substrate may also be referred to as a high resistivity substrate.

[0014] In a possible implementation of the first aspect, the at least one filling structure includes a plurality of filling structures, and optionally, the distance between any two adjacent filling structures within the plurality of filling structures may be the same or different.

[0015] In a possible implementation of the first aspect, the plurality of packing structures are comb-shaped. Optionally, the heights of at least two comb teeth in the plurality of packing structures may be the same or different. Here, the height of each comb tooth may be the height to which the comb tooth extends into the substrate. In one example, the heights of the plurality of packing structures are all the same, or the heights of some comb teeth in the plurality of packing structures are different from the heights of other comb teeth.

[0016] According to a second aspect, the present application provides a method for manufacturing an integrated device, the method including the steps of: forming a substrate having at least two alternating etching layers, where the etching layers may be dielectric layers in which through-holes or grooves may be formed by etching or photoetching; forming a laser on the substrate, where the laser may be a laser diode capable of emitting laser light having a wavelength of 905 nanometers; and forming at least one fill structure on a side of the substrate away from the laser, where the substrate and the fill structure may form a capacitor, the fill structure including an insulator and a first metal layer, and the height of the fill structure is less than a thickness of the substrate, i.e., the fill structure does not penetrate the substrate.

[0017] In a possible implementation of the second aspect, the filling structures have different radial widths in the at least two etching layers. Optionally, the at least two etching layers have different etching selective materials.

[0018] In a possible implementation of the second aspect, the at least two etching layers include an aluminum gallium arsenide (AlGaAs) layer and a gallium arsenide (GaAs) layer, and forming the substrate includes alternately forming the AlGaAs layer and the GaAs layer to form a substrate having alternating stacked AlGaAs and GaAs layers.

[0019] In a possible implementation of the second aspect, the final layer of the alternating AlGaAs and GaAs layers is a GaAs layer. Forming a laser on the substrate includes forming the laser on the GaAs layer of the substrate. In this possible implementation, the GaAs layer is positioned closest to the laser to meet current design requirements for the laser.

[0020] In possible implementations of the second aspect, the thickness of the AlGaAs layer may be the same as or different from the thickness of the GaAs layer, and in one example, the thickness of the AlGaAs layer is the same as the thickness of the GaAs layer.

[0021] In a possible implementation of the second aspect, the radial width of the fill structure in the AlGaAs layer is greater than the radial width of the fill structure in the GaAs layer, such that the fill structures in the alternating AlGaAs and GaAs layers have different radial widths.

[0022] In a possible implementation of the second aspect, the portions of the fill structure located in the AlGaAs layer are distributed linearly, and the portions of the fill structure located in the GaAs layer are distributed arc-shaped. In the above possible implementation, the portions of the fill structure located in the AlGaAs layer are distributed linearly, and the portions of the fill structure located in the GaAs layer are distributed arc-shaped, so that the fill structure can have a large surface area. This increases the specific surface area of ​​the capacitor, promotes heat dissipation, and reduces heat loss.

[0023] In a possible implementation of the second aspect, an insulator is located between the substrate and the first metal layer. The step of forming at least one fill structure on the side of the substrate away from the laser includes: etching the side of the substrate away from the laser to form at least one groove, the height (also called depth) of the groove being less than the thickness of the substrate; forming an insulator on the surface of the substrate having the at least one groove, the thickness of the insulator being less than half the radial width of the groove; and forming a first metal layer on the insulator to obtain the at least one fill structure. In the above possible implementation, a capacitor design having an MIS structure is provided. Specifically, the capacitor includes a substrate, an insulator, and a first metal layer. In this case, the substrate may be a heavily doped substrate. A heavily doped substrate may also be called a low-resistivity substrate.

[0024] In a possible implementation of the second aspect, the filling structure further includes a second metal layer. The second metal layer is located between the substrate and the insulator. The step of forming the insulator on the surface of the substrate having at least one groove includes the steps of forming a second metal layer on the surface of the substrate having at least one groove, and forming an insulator on the second metal layer, wherein the sum of the thickness of the second metal layer and the thickness of the insulator is less than half the radial width of the groove. In the above possible implementation, a capacitor design having an MIM structure is provided. Specifically, the capacitor includes a substrate, a second metal layer, an insulator, and a first metal layer. In this case, the substrate may be a lightly doped or undoped substrate. A lightly doped or undoped substrate may also be referred to as a high resistivity substrate.

[0025] In a possible implementation of the second aspect, the at least one filling structure includes a plurality of filling structures, and optionally, the distance between any two adjacent filling structures within the plurality of filling structures may be the same or different.

[0026] In a possible implementation of the second aspect, the plurality of packing structures are comb-shaped. Optionally, the heights of at least two comb teeth in the plurality of packing structures may be the same or different. Here, the height of each comb tooth may be the height to which the comb tooth extends into the substrate. In one example, the heights of the plurality of packing structures are all the same, or the heights of some comb teeth in the plurality of packing structures are different from the heights of other comb teeth.

[0027] According to a third aspect, the present application provides an integrated circuit, the integrated circuit including an integrated device according to any one of the first aspect and possible implementations of the first aspect, and a switch device, the switch device being coupled to the integrated device.

[0028] According to a fourth aspect, the present application provides a detection device, the detection device including an integrated device according to the first aspect and any one of the possible implementations of the first aspect.

[0029] According to a fifth aspect, the present application provides a terminal. The terminal includes an integrated device according to the first aspect and any one of the possible implementation forms of the first aspect. Optionally, the terminal is a vehicle.

[0030] It can be understood that the beneficial effects that can be achieved by any one of the manufacturing methods, detection devices, and terminals for the integrated device provided above can be referred to the beneficial effects of the integrated device provided above, and the details will not be repeated here. [Brief explanation of the drawings]

[0031] [Figure 1] 1 is a diagram of an application scenario of a lidar according to an embodiment of the present application; [Figure 2] FIG. 1 is a diagram of the internal architecture of a lidar according to an embodiment of the present application. [Figure 3A] FIG. 2 is a diagram of the structure of a transmitting module according to an embodiment of the present application; [Figure 3B] FIG. 10 is a diagram of the structure of another transmitting module according to an embodiment of the present application. [Figure 4] FIG. 2 is a diagram of a layout scheme of components within a transmission module according to an embodiment of the present application. [Figure 5] 1 is a diagram of the structure of an integrated device according to an embodiment of the present application; [Figure 6] FIG. 10 is a diagram of another integrated device structure according to an embodiment of the present application. [Figure 7] 1 is a diagram of a capacitor structure according to an embodiment of the present application; [Figure 8] FIG. 10 is a diagram of yet another integrated device structure according to an embodiment of the present application. [Figure 9] 1 is a schematic flow chart of a manufacturing method for an integrated device according to an embodiment of the present application. [Figure 10] 1A-1C are cross-sectional views of an integrated device in a manufacturing process according to an embodiment of the present application. [Figure 11] 4 is a schematic flow chart of another manufacturing method for an integrated device according to an embodiment of the present application. DETAILED DESCRIPTION OF THE INVENTION

[0032] The following clearly and completely describes the technical solutions of the embodiments of the present application with reference to the accompanying drawings of the embodiments of the present application.

[0033] A "connection" in the embodiments of the present application may be an electrical connection, and a connection between two electrical elements may be a direct connection or an indirect connection between the two electrical elements. For example, a connection between A and B may be a direct connection between A and B, or an indirect connection between A and B via one or more other electrical elements. For example, the connection of A to B may alternatively mean that A is directly connected to C, C is directly connected to B, and A is connected to B via C. In some scenarios, a "connection" may alternatively be understood as a coupling, for example, an electromagnetic coupling between two inductors. In conclusion, through the connection between A and B, electrical energy may be transmitted between A and B.

[0034] The terminal names of electronic elements in the embodiments of the present application are merely examples for explanation and may be understood as connection terminals or connection points configured to connect to other circuit elements. In other examples, other terminal names, connection terminal names, or connection point names may alternatively exist. For example, in some scenarios, an terminal may be referred to as a communication terminal, information transmission terminal, terminal, connection terminal, communication connection terminal, information connection terminal, connection point, communication connection point, information connection point, or electrode.

[0035] An embodiment of the present application provides a circuit structure. In an application scenario, the circuit structure may be used in a detection device, such as a lidar. FIG. 1 is a diagram of an example of an application scenario of a lidar according to an embodiment of the present application. In this example, the lidar 100 is mounted on a vehicle, and is therefore also referred to as an on-board lidar. In addition to on-board lidars, lidars also include ship-mounted lidars mounted on ships and airborne lidars mounted on machines. In a possible example, as shown in FIG. 1, the lidar 100 may be mounted, for example, at the front of the vehicle. In this manner, during the vehicle's driving process, the lidar 100 can transmit a laser signal. After being irradiated by an object in the surrounding environment, the laser signal is reflected by the object, and the reflected target echo signal may be received by the lidar 100. The lidar 100 then performs detection based on the target echo signal to obtain information about the vehicle's surrounding environment, and uses the environmental information to assist or control the vehicle's driving functions, including, but not limited to, autonomous driving or assisted driving.

[0036] The lidar 100 may be any of a mechanical lidar, a liquid lidar, a pure solid-state lidar, a hybrid solid-state lidar (also called a semi-solid-state lidar), or another type of lidar. This is not specifically limited in the embodiments of the present application. In addition, the housing of the lidar 100 may be a rectangular parallelepiped as shown in FIG. 1 , or may be a cube, a cylinder, a ring, an amorphous body, or the like. The shape of the housing of the detection device is not particularly limited in the embodiments of the present application.

[0037] FIG. 2 is a diagram of the internal architecture of a lidar according to an embodiment of the present application. As shown in FIG. 2, the lidar 100 may include a control circuit 110, a transmission module 120, a scanning module 130, and a reception module 140. The transmission module 120 and the reception module 140 include optical elements such as one or more of lenses, optical filters, polarizers, reflectors, beam splitters, prisms, window panes, and scattering sheets. The specific number and types of optical elements included are related to the optical design of the transmission module 120 and the reception module 140 in the lidar 100 and are not specifically limited in the embodiment of the present application. The transmission module 120 may include at least one laser. The at least one laser may be connected in series or in parallel and configured to emit detection laser light under the control of the control circuit 110. The scanning module 130 may include one or more of a multi-faceted rotating mirror, a swinging mirror, a micro-electro-mechanical system (MEMS) scanning mirror, or a prism, and is configured to change the scan angle of the detection laser light emitted by the transmitting module 120 under the control of the control circuit 110, so that the detection laser light can perform a transverse scan on a target object in the environment. Different types of lidars have different implementations of the scanning module 130, and some types of lidars may not have a scanning module, such as a solid-state lidar phased array lidar. The detection laser light emitted by the transmitting module 120 is further reflected by objects in the environment to generate echo signals. Under the control of the control circuit 110, the receiving module 140 may be configured to receive echo signals corresponding to the detection laser light, convert the echo signals into electrical signals, and transmit the electrical signals to the control circuit 110. The control circuit 110 determines characteristics of the object based on the electrical signals. It can be understood that the lidar 100 may alternatively include more or fewer components than those shown in FIG. 2 . This is not specifically limited in the embodiments of the present application.

[0038] Control circuitry 110 may include at least one integrated circuit chip. For example, control circuitry 110 may include at least one processor, and if control circuitry 110 includes multiple processors, the processors may be of the same or different types. A processor is an element or circuit having processing capability, including, for example, one or more of a general-purpose processor, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a neural-network processing unit (NPU), a graphics processing unit (GPU), an application processor (AP), a modem processor, an image signal processor (ISP), a video codec, a digital signal processor (DSP), a baseband processor, a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, or another integrated chip. A general-purpose processor includes, for example, a central processing unit (CPU). Additionally, all or some of the integrated circuit chips included in control circuit 110 may be integrated together and presented in the form of a system on chip (SoC).

[0039] In a possible implementation, referring to FIG. 2 , the transmission module 120 may include a driver chip, a switch device, a laser, an energy storage element, and a power supply. The input terminal of the driver chip is connected to the control circuit 110, and the output terminal of the driver chip is connected to the third terminal (a3) ​​of the switch device. The first terminal (a1) of the switch device is connected to the first terminal (b1) of the laser. The second terminal (b2) of the laser is connected to the second terminal (d2) of the energy storage element and the positive terminal of the power supply, respectively. The second terminal (a2) of the switch device is connected to the first terminal (d1) of the energy storage element and the negative terminal of the power supply, respectively, and then grounded (i.e., the device shown in FIG. 2 as an inverted triangle “▽”; “grounded” may mean that a component is connected to ground via a conductor, or that a ground circuit is provided and the component is connected to the ground circuit, but this is not particularly limited). The driver chip may be a chip that can drive the switch device on or off, and may typically be implemented by integrating multiple levels of driving devices into one electronic chip. The switch device may be any device capable of switching on and off, such as a field-effect transistor (FET). The FET may be an N-channel metal-oxide-semiconductor field-effect transistor (NMOSFET) or a P-channel metal-oxide-semiconductor field-effect transistor (PMOSFET). This is not specifically limited. The laser may be a single laser, a laser chain formed by multiple lasers connected in series, a laser ring formed by multiple lasers connected in parallel, or a laser array formed by multiple lasers connected in series and in parallel.The type of laser may be an edge emitting laser (EEL), a surface emitting laser (SEL), etc. The energy storage element may be an element capable of storing electrical energy, such as a capacitor (such as a silicon capacitor) or an inductor.

[0040] In the above-described implementation, in the process of controlling the transmitting module 120 to operate, the control circuit 110 may send periodically repeated pulse control signals, for example, sending a first control signal used to turn off the switch device during an earlier period of the period and a second control signal used to turn on the switch device during a later period of the period. In this manner, during the earlier period of the period, the driver chip drives the first terminal a1 and the second terminal a2 of the switch device to be disconnected based on the first control signal. In this case, the electrical energy output by the power supply is supplied to the energy storage element but not to the laser. Therefore, the energy storage element can store the electrical energy output by the power supply. Then, during the later period of the period, the driver chip drives the first terminal a1 and the second terminal a2 of the switch device to be connected based on the second control signal. In this case, the energy storage element, which had already stored energy during the earlier period, begins to discharge, resulting in the generation of a transient current i in the loop including the laser, the switch device, and the energy storage element. The transient current i drives the laser to emit laser light for detection. A larger value of the transient current i indicates a larger transmitted optical power P of the laser. In this way, the laser in the transmitting module 120 also emits light correspondingly periodically under the periodically repeated pulse control signal of the control circuit 110.

[0041] In this embodiment of the present application, there are multiple possible connection schemes for the components in the transmit module 120. For example, assume that the switch device is an NMOS transistor, the driver chip is a driver integrated circuit chip (DIC), the laser is a single laser (LR), and the energy storage element is a capacitor C. In this case, Figure 3A is a diagram of an example of a component connection structure of a transmit module according to an embodiment of the present application.

[0042] 3A(a), in one example, the first end a1 of the switch device is the drain of the NMOS transistor, the second end a2 of the switch device is the source of the NMOS transistor, the third end a3 of the switch device is the gate of the NMOS transistor, the first end b1 of the laser is the cathode of the laser LR, and the second end b2 of the laser is the anode of the laser LR. The specific connection method is as follows: the output end of the driver chip DIC is connected to the gate a3 of the NMOS transistor, the drain a1 of the NMOS transistor is connected to the cathode b1 of the laser LR, the anode b2 of the laser LR is separately connected to the second end d2 of the capacitor C and the positive pole of the power supply, and the source a2 of the NMOS transistor is separately connected to the first end d1 of the capacitor C and the negative pole of the power supply, and then grounded. According to this circuit connection structure, in the process of controlling the operation of the transmitting module 120, the control circuit 110 may output a first control signal of low level to the driver chip DIC during an early period of the period, and output a second control signal of high level to the driver chip DIC during a later period of the period. In this way, during the earlier period of the period, the driver chip DIC drives the source a2 and drain a1 of the NMOSFET to be disconnected based on the low level. In this case, the electrical energy output by the power supply V cannot be supplied to the laser LR, but can be supplied to the capacitor C to charge the capacitor C. In this case, the laser LR does not emit detection laser light because the link on which the laser LR is located is disconnected. Then, during the later period of the period, the driver chip DIC drives the source a2 and drain a1 of the NMOSFET to be connected based on the high level. In this case, the link on which the laser LR is located is connected, and the capacitor C may discharge to the laser LR. Therefore, the laser LR may emit detection laser light.

[0043] In another example, as shown in FIG. 3A(b), the first end a1 of the switch device is the source of the NMOS transistor, the second end a2 of the switch device is the drain of the NMOS transistor, the third end a3 of the switch device is the gate of the NMOS transistor, the first end b1 of the laser is the anode of the laser LR, and the second end b2 of the laser is the cathode of the laser LR. The specific connection method is as follows: the output end of the driver chip DIC is connected to the gate a3 of the NMOS transistor, the source a1 of the NMOS transistor is connected to the cathode b1 of the laser LR, the anode b2 of the laser LR is separately connected to the second end d2 of the capacitor C and the negative pole of the power supply, and then grounded, and the drain a2 of the NMOS transistor is separately connected to the first end d1 of the capacitor C and the positive pole of the power supply. The operation process of the circuit connection structure shown in FIG. 3A(b) is similar to that of the circuit connection structure shown in FIG. 3A(a). The reason is as follows: the capacitor C is actually formed by two conductors that are insulated from each other and are close to each other. In the circuit connection structure shown in FIG. 3A(a), when capacitor C is charged in an earlier period, the conductor forming the second end d2 of capacitor C is charged to become positive, and the conductor forming the first end d1 of capacitor C is charged to become negative. Therefore, during discharge in a later period, the electrical energy output by the conductor forming the second end d2 of capacitor C flows sequentially through the anode b2 of laser LR, the cathode b1 of laser LR, the drain a1 of the NMOS transistor, and the source a2 of the NMOS transistor, before flowing back to the conductor forming the first end d1 of capacitor C, driving laser LR to emit light. Similarly, in the circuit connection structure shown in FIG. 3A(b), when capacitor C is charged in an earlier period, the conductor forming the first end d1 of capacitor C is charged to become positive, and the conductor forming the second end d2 of capacitor C is charged to become negative.Thus, during the slower discharge period, the electrical energy output by the conductor forming the first end d1 of the capacitor C flows through the drain a2 of the NMOS transistor, the source a1 of the NMOS transistor, the anode b1 of the laser LR, the cathode b2 of the laser LR, and then returns to the conductor forming the second end d2 of the capacitor C, driving the laser LR to emit light.

[0044] The above content is only an example to explain two possible component connection methods of the transmitting module 120. During actual operation, as long as the transmission function of the transmitting module 120 is not affected, some modifications may be made to the connection methods shown above, which fall within the protection scope of the embodiments of the present application, which is not specifically limited in the embodiments of the present application.

[0045] Additionally, some modifications may be made to the components included in the transmitting module 120. For example, some of the components of the transmitting module 120 may be replaced with other components capable of achieving the same functions. For example, an NMOS transistor may be replaced with a diode or a PMOS transistor. When an NMOS transistor is replaced with a PMOS transistor, the PMOS transistor turns on at a low level and turns off at a high level. Therefore, if the control circuit still sends a first control signal at a low level during an earlier period of the period and a second control signal at a high level during a later period of the period, the laser transmits detection laser light during the earlier period of the period and does not emit detection laser light during the later period of the period. As another example, some components may be added to or removed from the transmitting module 120. In a possible example, as shown in FIG. 3B(a) or 3B(b), the transmitting module 120 may further include a resistive element R. The resistive element R is connected in series with the power supply V. For example, as shown in FIG. 3B(a), the first terminal of the resistor R is connected to the positive terminal of the power supply V, and the second terminal of the resistor R is connected to the anode b2 of the laser LR and the second terminal d2 of the capacitor C; alternatively, the first terminal of the resistor R is connected to the negative terminal of the power supply V, and the second terminal of the resistor R is connected to the source a2 of the NMOS transistor and the first terminal d1 of the capacitor C, and then grounded. Alternatively, as shown in FIG. 3B(b), in another example, the first terminal of the resistor R is connected to the positive terminal of the power supply V, and the second terminal of the resistor R is connected to the drain a2 of the NMOS transistor and the first terminal d1 of the capacitor C; alternatively, the first terminal of the resistor R is connected to the negative terminal of the power supply V, and the second terminal of the resistor R is connected to the cathode b2 of the laser LR and the second terminal d2 of the capacitor C, and then grounded. For the operation process of the circuit connection structure, please refer to the circuit connection structure shown in FIG. 3A(a) or 3A(b). The difference is that in the early period of the period, part of the electrical energy output by the power source V is consumed by the resistive element R, and another part of the electrical energy is supplied to the capacitor C.In other words, after charging is completed, the electrical energy stored by the capacitor C is smaller than that in the structure shown in FIG. 3A(a) or 3A(b). During the slower period of the periodicity, the capacitor C, the resistor R, and the laser LR form a loop. Therefore, the current through this loop is smaller than the current through the loop formed by only the capacitor C and the laser LR shown in FIG. 3A(a) or 3A(b), and the intensity of the detection laser light emitted by the laser LR is weaker than that in the structure shown in FIG. 3A(a) or 3A(b). Additionally, if the intensity of the detection laser light needs to be flexibly adjusted, the resistance element R may be further configured as a variable resistor. If a weaker intensity of the detection laser light needs to be emitted, the resistance value of the variable resistor is set to a larger value. If a stronger intensity of the detection laser light needs to be emitted, the resistance value of the variable resistor is set to a smaller value.

[0046] Further referring to FIG. 2, FIG. 4 is a main diagram of the layout scheme of the components in the transmitting module, FIG. 4(a) is a diagram of the layout scheme of the components in the transmitting module, and FIG. 4(b) is a top view of the layout scheme of the components in the transmitting module. As shown in FIG. 4(a) and FIG. 4(b), in this layout scheme, a PCB substrate is arranged, and the driver chip, switch device, laser, energy storage element, and power supply in the transmitting module 120 are all separately packaged and then laid out in a planar manner on the PCB substrate, and the packages are connected to each other via traces on the PCB. In the partial circuit structure, parasitic elements (e.g., parasitic resistance and parasitic inductance) are introduced into the circuit structure due to the amount of packages and traces included in the circuit structure, and the introduced parasitic elements are connected in series with the link where the laser is located. The parasitic resistance is represented by R, the parasitic inductance is represented by L, and the output power of the power supply is represented by P. out, and the photoelectric conversion efficiency is η. From the operating principle of the transmitting module described above, it can be understood that when the energy storage element is discharged after the switch device is turned on, a transient current i is formed. When the parasitic inductance L and parasitic resistance R connected in series to the link in which the laser is located are reduced, the transient current i increases accordingly, and as a result, the transmitted optical power P of the laser also increases; that is, the transmitted optical power P of the laser is approximately proportional to the transient current i, and the transient current i is approximately proportional to 1 / LR. Therefore, it can be understood that the transmitted optical power P of the laser is approximately proportional to 1 / LR. In this way, the output power P of the same power supply out Under the condition, the photoelectric conversion efficiency η is out The ratio of the laser's transmitted optical power P to the out Since P is approximately proportional to 1 / LR, the photoelectric conversion efficiency η may be approximately proportional to 1 / LR. In other words, by reducing the parasitic inductance L and the parasitic resistance R, the photoelectric conversion efficiency η in the transmitter module can be improved.

[0047] However, the greater the number of packages and the longer the wiring in the circuit structure, the greater the parasitic inductance and parasitic resistance introduced into the circuit structure. In the above-described layout method, packaging each component separately results in a large number of packages in the transmitter module, and the planar layout of the packages results in winding traces on the PCB substrate. Due to both the large number of packages and the winding traces, large parasitic inductance and resistance are introduced into the transmitter module. As a result, the transmitted optical power of the detected laser light emitted by the laser is reduced. It can be seen that the above-described layout method reduces the efficiency of the transmitter module's conversion of electrical energy into optical energy and is not helpful in improving the photoelectric conversion efficiency of the transmitter module.

[0048] In consideration of this, an embodiment of the present application provides an integrated device for reducing parasitics introduced into the structure of the integrated device, so as to improve the effective energy conversion efficiency of the integrated device. For example, when the integrated device integrates a laser and a capacitor in a transmitting module, the parasitics introduced into the transmitting module are reduced, thereby improving the photoelectric conversion efficiency of the transmitting module.

[0049] In the following, specific implementation forms of the integrated device provided in the embodiments of the present application will be described by using specific embodiments.

[0050] 5 is a diagram of an integrated device structure according to one embodiment of the present application. The integrated device includes a substrate having at least two alternating etching layers and a laser LR located on the substrate. At least one fill structure is disposed on the side of the substrate away from the laser LR. The fill structure includes an insulator and a first metal layer. The height of the fill structure is less than the thickness of the substrate.

[0051] The at least two etching layers may include two or more etching layers. The etching layers may be dielectric layers in which through-holes or grooves can be formed by etching or photoetching. The at least one filling structure may include one or more filling structures. The filling structures may be embedded in the substrate on a side away from the laser LR, and the height of the portion of the filling structure embedded in the substrate is less than the thickness of the substrate, i.e., the filling structure does not penetrate the substrate.

[0052] In addition, the laser LR may be a laser diode. Optionally, the laser LR may be a laser capable of emitting laser light of a different wavelength. For example, the wavelength may be 905 nanometers (nm). In one example, the laser LR includes an anode and a cathode, and the anode is embedded in the substrate and does not penetrate the substrate.

[0053] Additionally, an insulator may be located between the substrate and the first metal layer and disposed in contact with the first metal layer. In this case, the substrate and the filling structure may form a capacitor C. In other words, the laser LR and the capacitor C may share the same substrate and be disposed on two opposite sides of the substrate, respectively. Optionally, the substrate may be a wafer.

[0054] Optionally, the filling structures have different radial widths in at least two etched layers. In this manner, when the substrate and filling structures form a capacitor C, the capacitor C can have a large specific surface area. The specific surface area may be the total surface area of ​​a material per unit mass.

[0055] In the integrated device provided in this embodiment of the present application, the laser LR and the capacitor C are arranged on the same substrate, thereby reducing the distance between the laser LR and the capacitor C in a three-dimensional layout and realizing the interconnection between the laser LD and the capacitor C. Therefore, there is no need to arrange extra interconnection traces between the laser LD and the capacitor. This significantly reduces parasitic elements (e.g., parasitic inductance and parasitic resistance) introduced into the structure of the integrated device, thereby improving the effective energy conversion efficiency of the integrated device. The substrate has at least two alternately stacked etching layers, so that at least one filling structure arranged in the substrate can have different radial widths in different etching layers. This increases the specific surface area of ​​the capacitor, thereby facilitating heat dissipation and reducing heat loss.

[0056] Optionally, the at least two etching layers have different etching selective materials. In a possible example, the at least two etching layers have two etching selective materials, specifically, may include an aluminum gallium arsenide (AlGaAs) layer and a gallium arsenide (GaAs) layer. In other words, the substrate includes an AlGaAs layer and a GaAs layer alternately stacked. In actual application, the materials of the at least two etching layers in the present application may alternatively be other materials. In this embodiment of the present application, only an example in which the materials include AlGaAs and GaAs is used for explanation, and does not constitute a limitation on the embodiment of the present application.

[0057] When the two etching layers include an AlGaAs layer and a GaAs layer, the lattice constant of AlGaAs is different from that of the GaAs layer, and the lattice constant of AlGaAs is smaller than that of the GaAs layer. Therefore, the AlGaAs layer and the GaAs layer are under compressive strain in the x-direction and the y-direction (i.e., two directions parallel to the etching layer and perpendicular to each other) and under tensile strain in the z-direction (i.e., the direction perpendicular to the etching layer). Thus, the electrons in the AlGaAs layer and the GaAs layer have high mobility and correspondingly low resistivity. This significantly reduces the parasitic resistance of the integrated device and improves its performance. Additionally, due to the good conductivity of AlGaAs, the resistance of the AlGaAs layer can be further reduced by using the AlGaAs layer, further improving the performance of the integrated device.

[0058] Optionally, when the at least two etching layers include an AlGaAs layer and a GaAs layer, the GaAs layer may be the etching layer closest to the laser among the at least two etching layers. In addition, the thickness of the AlGaAs layer may be the same as or different from the thickness of the GaAs layer. In one example, as shown in FIG. 5, the thickness of the AlGaAs layer is the same as the thickness of the GaAs layer.

[0059] In the above embodiment, the etching resistance of the AlGaAs layer may be greater than the etching resistance of the GaAs layer. Correspondingly, the radial width of the fill structure in the AlGaAs layer may be greater than the radial width of the fill structure in the GaAs layer. In this way, the fill structures in the alternating AlGaAs and GaAs layers have different radial widths.

[0060] In one possible embodiment, the portions of the filler structure located in the AlGaAs layer are distributed linearly, while the portions of the filler structure located in the GaAs layer are distributed arc-shaped. Because the portions of the filler structure located in the AlGaAs layer are distributed linearly and the portions of the filler structure located in the GaAs layer are distributed arc-shaped, the filler structure can have a large surface area. This increases the specific surface area of ​​the capacitor, thereby facilitating heat dissipation and reducing heat loss.

[0061] Optionally, the at least one filling structure includes a plurality of filling structures. In possible embodiments, the distance between any two adjacent filling structures in the plurality of filling structures may be the same or different. In Figure 5, an example is described in which the distance between any two adjacent filling structures is the same.

[0062] Furthermore, the multiple filling structures may be comb-shaped. The heights of at least two comb teeth in the multiple filling structures may be the same or different. Here, the height of each comb tooth may be the height to which the comb tooth extends into the substrate. In one example, as shown in FIG. 5, the multiple filling structures have the same height. Alternatively, in another example, as shown in FIG. 6, the heights of some comb teeth in the multiple filling structures are different from the heights of other comb teeth. When multiple filling structures have comb teeth of different heights, the comb teeth of different heights may be arranged randomly or in a specific order (e.g., ascending order, descending order, or an order in which a tall comb tooth is followed by a short comb tooth, a low comb tooth is followed by another tall comb tooth, and another tall comb tooth is followed by another low comb tooth). This is not specifically limited in the embodiments of the present application.

[0063] Optionally, when the plurality of filling structures are comb-shaped, the insulators within the plurality of filling structures may be connected to each other, forming a "bow" shape. The first metal layers within the plurality of filling structures may also be connected to each other, forming a comb shape.

[0064] In this embodiment of the present application, as shown in FIGS. 7(a) and 7(b), the capacitor C may have a metal-insulator-semiconductor (MIS) structure or a metal-insulator-metal (MIM) structure. In the MIS structure, the capacitor C may include a substrate, an insulator, and a first metal layer. In this case, the substrate may be a heavily doped substrate. For example, the substrate may include alternating layers of heavily doped AlGaAs and heavily doped gallium arsenide GaAs. A heavily doped substrate may also be referred to as a low-resistivity substrate. In the MIM structure, the capacitor C may further include another metal layer in addition to the substrate, insulator, and first metal layer. In this case, the substrate may be a lightly doped or non-doped substrate. A lightly doped or non-doped substrate may also be referred to as a high-resistivity substrate.

[0065] When the substrate is a high-resistivity substrate, in a possible embodiment, the filling structure further includes a second metal layer, as shown in FIG. 8. The second metal layer is located between the substrate and the insulator. The second metal layer may have a "bow" shape. Optionally, the second metal layer may be formed before the insulator. For example, after a groove is etched on the side of the substrate away from the laser LR, the second metal layer may be formed by depositing a metal material on the side of the substrate with the groove, and then the insulator is formed by depositing an insulating material on the second metal layer.

[0066] In the integrated device provided in this embodiment of the present application, the capacitor C of the MIS structure can be implemented by using a high-resistivity substrate, an insulator, and a first metal layer, or the capacitor C of the MIM structure can be implemented by using a low-resistivity substrate, a second metal layer, an insulator, and a first metal layer. Therefore, the flexibility and versatility of the capacitor C in the integrated device can be improved when specifically implemented.

[0067] In view of this, an embodiment of the present application further provides an integrated circuit, which includes the integrated device provided above and a switch device, wherein the switch device is coupled to the integrated device.

[0068] An embodiment of the present application further provides a transmitting module. The transmitting module may include a power supply, a driver chip, and the integrated device provided above. The power supply is configured to supply power to the integrated device. The driver chip is configured to send a drive signal to the integrated device. The integrated device is configured to send a detection laser light based on the drive signal.

[0069] An embodiment of the present application further provides a detection device, which may include a control circuit and the transmission module provided above, wherein the control circuit is configured to send a control signal to the transmission module, and the transmission module is configured to transmit a detection laser light based on the control signal.

[0070] In a possible embodiment, the detection device may further include a receiving module configured to receive echo signals returned after the detection laser light scans the target object and convert the echo signals into electrical signals, and the control circuitry is further configured to process the electrical signals to obtain point cloud data.

[0071] In another possible embodiment, the detection device may further include a scanning module configured to traverse and scan the object by using the detection laser light.

[0072] Optionally, the detection device may be a lidar or another device capable of emitting detection laser light, for example, some example detection devices include, but are not limited to, an on-board lidar, a laser sensor in a robot vacuum cleaner, a laser detection module in a dock, a laser printer, etc.

[0073] An embodiment of the present application further provides a terminal including the detection device described in the foregoing content. Optionally, the terminal includes, but is not limited to, a smart home device (e.g., a television, a robot vacuum cleaner, a smart desk lamp, a sound system, an intelligent lighting system, an electrical control system, home background music, a home theater system, a door phone system, and video surveillance), an intelligent transportation device (e.g., a vehicle such as an automobile, a ship, an unmanned aerial vehicle, a train, a lorry, or a truck), an intelligent manufacturing device (e.g., a robot, an industrial device, an intelligent logistics device, or a smart factory), or an intelligent terminal (a mobile phone, a computer, a tablet computer, a desktop computer, a headset, a speaker, a wearable device, an in-vehicle device, a virtual reality device, an augmented reality device, etc.).

[0074] 9 is a schematic flow chart of a method for manufacturing an integrated device according to an embodiment of the present application. The integrated device may be the integrated device described above. The method includes the following steps: FIG. 10 is a cross-sectional view of the integrated device during the manufacturing process;

[0075] S301: As shown in FIG. 10(a), a substrate having at least two etching layers stacked alternately is formed.

[0076] The at least two etching layers may include two or more etching layers. The etching layers may be dielectric layers in which through-holes or grooves can be formed by etching or photoetching. The at least one filling structure may include one or more filling structures. The filling structures may be embedded in the substrate on a side away from the laser LR, and the height of the portion of the filling structure embedded in the substrate is less than the thickness of the substrate, i.e., the filling structure does not penetrate the substrate.

[0077] In addition, the laser LR may be a laser diode. Optionally, the laser LR may be a laser capable of emitting laser light of a different wavelength. For example, the wavelength may be 905 nanometers (nm).

[0078] Additionally, an insulator may be located between the substrate and the first metal layer and disposed in contact with the first metal layer. In this case, the substrate and the filling structure may form a capacitor C. In other words, the laser LR and the capacitor C may share the same substrate and be disposed on two opposite sides of the substrate, respectively. Optionally, the substrate may be a wafer.

[0079] Optionally, the at least two etching layers have different etching selective materials. In a possible example, the at least two etching layers have two etching selective materials, specifically, may include an aluminum gallium arsenide (AlGaAs) layer and a gallium arsenide (GaAs) layer. In other words, the substrate includes an AlGaAs layer and a GaAs layer alternately stacked. In actual application, the materials of the at least two etching layers in the present application may alternatively be other materials. In this embodiment of the present application, only an example in which the materials include AlGaAs and GaAs is used for explanation, and does not constitute a limitation on the embodiment of the present application.

[0080] In a possible embodiment, the at least two etching layers include an AlGaAs layer and a GaAs layer, and correspondingly, forming the substrate may specifically include forming alternating AlGaAs and GaAs layers to form a substrate having alternating stacked AlGaAs and GaAs layers.

[0081] S302: As shown in FIG. 10(b), a laser is formed on a substrate.

[0082] Optionally, when the at least two etching layers include an AlGaAs layer and a GaAs layer, the GaAs layer may be the etching layer closest to the laser among the at least two etching layers, and the thickness of the AlGaAs layer may be the same as or different from the thickness of the GaAs layer.

[0083] In one possible embodiment, the final layer of the alternating AlGaAs and GaAs layers is a GaAs layer. Forming a laser on a substrate may specifically include forming a laser on the GaAs layer of the substrate. For example, the laser LR includes an anode and a cathode. The cathode is formed on the GaAs layer of the substrate, and the anode is recessed into the substrate for formation, so that the anode does not penetrate the substrate.

[0084] S303: Form at least one fill structure on the side of the substrate away from the laser, the fill structure including an insulator and a first metal layer, and a height of the fill structure is less than a thickness of the substrate.

[0085] In the above embodiment, the etching resistance of the AlGaAs layer may be greater than the etching resistance of the GaAs layer. Correspondingly, the radial width of the fill structure in the AlGaAs layer may be greater than the radial width of the fill structure in the GaAs layer. In this way, the fill structures in the alternating AlGaAs and GaAs layers have different radial widths.

[0086] In a possible embodiment, the portions of the filling structure located in the AlGaAs layer are distributed linearly, and the portions of the filling structure located in the GaAs layer are distributed arc-shaped.

[0087] Optionally, the at least one filling structure comprises a plurality of filling structures, in possible embodiments, the distance between any two adjacent filling structures in the plurality of filling structures may be the same or different.

[0088] Furthermore, the multiple filling structures may be comb-shaped. The heights of at least two comb teeth in the multiple filling structures may be the same or different. Here, the height of each comb tooth may be the height at which the comb tooth extends into the substrate. In one example, the multiple filling structures have the same height. Alternatively, in another example, the heights of some comb teeth in the multiple filling structures are different from the heights of other comb teeth. When multiple filling structures have comb teeth of different heights, the comb teeth of different heights may be arranged randomly or in a specific order (e.g., ascending order, descending order, or an order in which a tall comb tooth is followed by a short comb tooth, a low comb tooth is followed by another tall comb tooth, and another tall comb tooth is followed by another low comb tooth). This is not specifically limited in the embodiments of the present application.

[0089] Optionally, when the plurality of filling structures are comb-shaped, the insulators within the plurality of filling structures may be connected to each other, forming a "bow" shape. The first metal layers within the plurality of filling structures may also be connected to each other, forming a comb shape.

[0090] In a possible embodiment, an insulator is located between the substrate and the first metal layer. As shown in Figure 9, S303 may specifically include S3031 and S3032.

[0091] S3031: As shown in FIG. 10(c), at least one groove is formed on the substrate on the side away from the laser, and the height of the groove is smaller than the thickness of the substrate.

[0092] The at least one groove may include a plurality of grooves, and the distance between any two adjacent grooves in the plurality of grooves may be the same or different. In addition, the heights of at least two of the plurality of grooves may be the same or different. For example, the heights of the plurality of grooves may be the same, or the heights of some of the plurality of grooves may be different from the heights of the other grooves. FIG. 10 illustrates an example in which the distance between any two adjacent grooves is the same and the heights of the plurality of grooves are the same.

[0093] In a possible embodiment, in the present application, at least one groove may be formed on the side of the substrate away from the laser by using a process such as photoetching or etching.

[0094] S3032: As shown in (d) and (e) of Figure 10, an insulator is formed on a surface of the substrate having at least one groove, and a first metal layer is formed on the insulator to obtain at least one filling structure.

[0095] In a possible embodiment, an insulator is formed on the surface of the substrate, which has at least one groove, by using a process such as precipitation or deposition of an insulating material. The thickness of the insulator is less than half the radial width of the groove. A first metal layer may then be formed on the insulator by using a process such as precipitation or deposition of a metallic material. The sum of the thickness of the insulator and the thickness of the first metal layer may be equal to half the radial width of the groove.

[0096] The capacitor C may be a capacitor with an MIS structure or a capacitor with an MIM structure. In the case of an MIS structure, the capacitor C may include a substrate, an insulator, and a first metal layer. In this case, the substrate may be a heavily doped substrate. A heavily doped substrate may also be called a low resistivity substrate. In the case of an MIM structure, the capacitor C may further include another metal layer in addition to the substrate, the insulator, and the first metal layer. In this case, the substrate may be a lightly doped or non-doped substrate. A lightly doped or non-doped substrate may also be called a high resistivity substrate.

[0097] Furthermore, the substrate is a high-resistivity substrate, and the capacitor further includes a second metal layer located between the substrate and the insulator. In this case, as shown in FIG. 11, S3032 may specifically include S30321 and S30322.

[0098] S30321: As shown in FIG. 10(f), a second metal layer is formed on the surface of the substrate having the plurality of grooves.

[0099] In a possible embodiment, the second metal layer is formed on the surface of the substrate having at least one groove by using a process such as precipitation or deposition of a metallic material, the thickness of the second metal layer being less than half the radial width of the groove.

[0100] S30322: As shown in (g) and (h) of FIG. 10, an insulator is formed on the second metal layer, and a first metal layer is formed on the insulator.

[0101] In a possible embodiment, an insulator is formed on the second metal layer using a process such as precipitation or deposition of an insulating material. The sum of the thickness of the insulator and the thickness of the second metal layer is less than half the radial width of the groove. A first metal layer may then be formed on the insulator using a process such as precipitation or deposition of a metallic material. The sum of the thickness of the second metal layer, the thickness of the insulator, and the thickness of the first metal layer is equal to half the radial width of the groove.

[0102] In the manufacturing method of the integrated device provided in this embodiment of the present application, the laser LR and the capacitor C are arranged on the same substrate, thereby reducing the distance between the laser LR and the capacitor C in a three-dimensional layout and realizing the interconnection between the laser LD and the capacitor C. Therefore, there is no need to arrange extra interconnection traces between the laser LD and the capacitor. This significantly reduces parasitic elements (e.g., parasitic inductance and parasitic resistance) introduced into the structure of the integrated device, thereby improving the effective energy conversion efficiency of the integrated device. The substrate has at least two alternately stacked etching layers, so that at least one filling structure arranged in the substrate can have different radial widths in different etching layers. This increases the specific surface area of ​​the capacitor C, promotes heat dissipation, and reduces heat loss.

[0103] Based on the manufacturing method provided in the embodiment of the present application, an embodiment of the present application further provides a computer-readable storage medium, which stores a computer program, which, when executed, performs the manufacturing method described above.

[0104] Based on the manufacturing method provided in the embodiment of the present application, an embodiment of the present application further provides a computer program product, which, when executed on a processor, performs the manufacturing method described in the foregoing content.

[0105] Finally, it should be noted that the above description is merely a specific implementation form of the present application, but is not intended to limit the protection scope of the present application. Any variation or replacement within the technical scope disclosed in the present application shall fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims. [Explanation of symbols]

[0106] 100 Riders 110 control circuit 120 Transmitting Module 130 Scanning Module 140 Receiver Module C capacitor DIC driver chip i Transient current LR Laser P Transmitted optical power R resistive element V power supply R parasitic resistance L parasitic inductance P out Power supply output power η Photoelectric conversion efficiency

Claims

1. An accumulation device, the accumulation device comprising: a substrate having at least two etching layers stacked alternately; a laser disposed on the substrate; Equipped with at least one fill structure is disposed on a side of the substrate away from the laser, the fill structure comprising an insulator and a first metal layer, and the height of the fill structure is less than a thickness of the substrate; Accumulation device.

2. The integrated device of claim 1 , wherein the fill structures have different radial widths in the at least two etched layers.

3. 3. The integrated device according to claim 1, wherein the at least two etching layers have different etching selectivity materials.

4. 4. The integrated device of claim 3, wherein the at least two etching layers include an aluminum gallium arsenide AlGaAs layer and a gallium arsenide GaAs layer.

5. 5. The integrated device of claim 4, wherein the GaAs layer is the etching layer closest to the laser among the at least two etching layers.

6. 6. The integrated device according to claim 4, wherein the thickness of said AlGaAs layer is the same as the thickness of said GaAs layer.

7. 7. The integrated device according to claim 4, wherein the etching resistance of the AlGaAs layer is greater than the etching resistance of the GaAs layer.

8. 8. An integrated device according to claim 4, wherein the radial width of the filling structure in the AlGaAs layer is greater than the radial width of the filling structure in the GaAs layer.

9. 9. The integrated device according to claim 4, wherein the portions of the filling structure located in the AlGaAs layer are distributed linearly, and the portions of the filling structure located in the GaAs layer are distributed arc-shaped.

10. The integrated device according to claim 1 , wherein the insulator is located between the substrate and the first metal layer and is disposed in contact with the first metal layer.

11. 11. The integrated device of claim 1, wherein the filling structure further comprises a second metal layer, the second metal layer being located between the substrate and the insulator.

12. 12. The integrated device of claim 1, wherein the at least one filling structure comprises a plurality of filling structures.

13. The integrated device of claim 12 , wherein the plurality of packing structures are comb-shaped.

14. 1. A method for manufacturing an integrated device, the method comprising: forming a substrate, the substrate having at least two etching layers stacked alternately; forming a laser on the substrate; forming at least one fill structure on a side of the substrate away from the laser, the fill structure comprising an insulator and a first metal layer, the height of the fill structure being less than a thickness of the substrate; A manufacturing method comprising:

15. The method of claim 14 , wherein the fill structures have different radial widths in the at least two etch layers.

16. The method of claim 14 or 15, wherein the at least two etching layers have different etching selective materials.

17. the at least two etching layers include an aluminum gallium arsenide AlGaAs layer and a gallium arsenide GaAs layer; the step of forming a substrate includes the step of alternately forming the AlGaAs layers and the GaAs layers to form the substrate in which the AlGaAs layers and the GaAs layers are alternately stacked; The method of claim 16.

18. the last layer of the alternating AlGaAs layers and GaAs layers is the GaAs layer, and the step of forming a laser on the substrate comprises: The method of claim 17 including forming the laser on the GaAs layer of the substrate.

19. 19. The method of claim 17, wherein the thickness of the AlGaAs layer is the same as the thickness of the GaAs layer.

20. 20. The method of claim 17, wherein the radial width of the filling structure in the AlGaAs layer is greater than the radial width of the filling structure in the GaAs layer.

21. 21. The method of claim 17, wherein the portions of the filling structure located in the AlGaAs layer are distributed linearly, and the portions of the filling structure located in the GaAs layer are distributed arc-shaped.

22. The insulator is located between the substrate and the first metal layer, and the step of forming at least one fill structure on a side of the substrate away from the laser comprises: etching the side of the substrate away from the laser to form at least one groove, the height of the groove being less than the thickness of the substrate; forming the insulator on the surface of the substrate having the at least one groove, the thickness of the insulator being less than one-half of the radial width of the groove; forming the first metal layer on the insulator to obtain the at least one filling structure; The method of any one of claims 14 to 21, comprising:

23. The filling structure further comprises a second metal layer, the second metal layer being located between the substrate and the insulator, and the step of forming the insulator on the surface of the substrate having the at least one groove comprises: forming the second metal layer on the surface of the substrate having the at least one groove; forming the insulator on the second metal layer, the sum of the thickness of the second metal layer and the thickness of the insulator being less than half the radial width of the groove; 23. The method of claim 22, comprising:

24. 24. The method of any one of claims 14 to 23, wherein the at least one filling structure comprises a plurality of filling structures.

25. The method of claim 24 , wherein the plurality of packing structures are interdigitated.

26. A detection device comprising an integrated device according to any one of claims 1 to 13.

27. A terminal comprising an integrated device according to any one of claims 1 to 13.

28. 28. The terminal of claim 27, wherein the terminal is a vehicle.

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