Switch device and test apparatus

Abstract

SOLUTION: A switch device that electrically connects or disconnects a first terminal and a second terminal, the switch device comprising a plurality of main switches connected in series between the first terminal and the second terminal, a first detection buffer unit that receives a first voltage at the first terminal and outputs a first detection voltage corresponding to the first voltage, and a voltage divider that divides a potential difference between a voltage corresponding to a second voltage at the second terminal and the first detection voltage according to the number of main switches, and a bias circuit that applies each of the divided voltages to the corresponding main switch.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a switch device and a test device. [Background technology]

[0002] Patent Documents 1 to 3 describe semiconductor switch circuits and the like. [Prior art document] [Patent documents] Patent Document 1: JP 2015-065504 A Patent Document 2: International Publication No. 2022 / 030375 Patent Document 3: International Publication No. 2015 / 011949 Summary of the Invention

[0003] In a first aspect of the present invention, there is provided a switch device that electrically connects or disconnects a first terminal and a second terminal, the switch device comprising: a plurality of main switches connected in series between the first terminal and the second terminal; a first detection buffer unit that receives a first voltage at the first terminal and outputs a first detection voltage corresponding to the first voltage; and a bias circuit that divides the potential difference between the first detection voltage and a voltage corresponding to the second voltage at the second terminal according to the number of main switches, and applies each divided voltage to a corresponding main switch.

[0004] The above switch device may further include a second detection buffer unit that receives a second voltage at the second terminal and outputs a second detection voltage corresponding to the second voltage, and the bias circuit may divide the potential difference between the first detection voltage and the second detection voltage according to the number of main switches, and apply each divided voltage to the corresponding main switch.

[0005] In the above switch device, the bias circuit may include a plurality of voltage dividing resistors connected in series to divide the potential difference between the first detection voltage and the second detection voltage.

[0006] In the above switch device, the bias circuit may have one or more bias buffer units that apply voltages divided by a plurality of voltage dividing resistors to the corresponding main switches.

[0007] In the above switch device, the bias buffer section may stop outputting in response to at least one of the plurality of main switches being turned on.

[0008] In the above switch device, at least one of the plurality of main switches may be turned on after the output of the bias buffer unit is stopped.

[0009] In any of the above switch devices, the bias circuit may include a bias resistor connected to the output of the bias buffer section.

[0010] In any of the above switch devices, the bias buffer unit may have a higher current driving capability than the first sense buffer unit.

[0011] In any of the switch devices described above, the first sensing buffer unit may stop outputting in response to at least one of the plurality of main switches being turned on.

[0012] In the above switch device, at least one of the plurality of main switches may be turned on after the output of the first detection buffer unit is stopped.

[0013] In any of the above switch devices, the resistance value of each of the plurality of voltage dividing resistors may be 10 kΩ or less.

[0014] Any of the above switch devices may further include a first resistor connected between the first terminal and the first sense buffer unit, and the resistance value of each of the plurality of voltage dividing resistors may be smaller than the resistance value of the first resistor.

[0015] In any of the above switch devices, the switch device may include a plurality of second terminals arranged with respect to one first terminal, and a plurality of second sense buffer units respectively corresponding to the plurality of second terminals, and the bias circuit may include a first bias buffer unit that applies to the corresponding main switch a voltage obtained by dividing a potential difference between a first sense voltage output by the first sense buffer unit and a second sense voltage output by one of the plurality of second sense buffer units using a plurality of voltage dividing resistors, and a second bias buffer unit that applies to the corresponding main switch a voltage obtained by dividing a potential difference between the first sense voltage output by the first sense buffer unit and a second sense voltage output by another one of the plurality of second sense buffer units using a plurality of voltage dividing resistors.

[0016] In a second aspect of the present invention, there is provided a test apparatus for testing a device under test, comprising a test section for transmitting and receiving signals to and from the device under test, and a switch device of the second aspect provided on a path between the test section and the device under test.

[0017] The above summary of the invention does not list all of the necessary features of the present invention, and subcombinations of these features may also constitute inventions. [Brief explanation of the drawings]

[0018] [Figure 1] 1 shows a first configuration example of a switch device 10 according to the present embodiment. [Figure 2] 2 shows a second configuration example of the switch device 10 according to the present embodiment. [Figure 3] 10 shows a third configuration example of the switch device 10 according to the present embodiment. [Figure 4] 10 shows a fourth configuration example of the switch device 10 according to the present embodiment. [Figure 5] 10 shows a fifth configuration example of the switch device 10 according to the present embodiment. [Figure 6] An example of the configuration of a test apparatus 400 according to this embodiment is shown together with a device under test 410. DETAILED DESCRIPTION OF THE INVENTION

[0019] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.

[0020] FIG. 1 shows a first configuration example of a switch device 10 according to this embodiment. The switch device 10 electrically connects or disconnects a first terminal 20 and a second terminal 30. The first terminal 20 of the switch device 10 is connected to a test apparatus configuration, and the second terminal 30 is connected to a load 40 such as a device under test. Currents ranging from direct current to high frequency can flow between the first terminal 20 and the second terminal 30. The switch device 10 can allow current to flow unidirectionally from the first terminal 20 to the second terminal 30, or bidirectionally between the first terminal 20 and the second terminal 30. The switch device 10 includes a control unit 100 and a switching unit 110.

[0021] The control unit 100 is connected to the switching unit 110. The control unit 100 supplies a voltage to the switching unit 110 to electrically connect or disconnect the first terminal 20 and the second terminal 30 in response to a control signal input from the outside.

[0022] The switching unit 110 electrically connects or disconnects the first terminal 20 and the second terminal 30 in response to a voltage supplied from the control unit 100. The switching unit 110 includes a plurality of main switches 120, a first resistor 130, a first sense buffer unit 140, a second resistor 150, a second sense buffer unit 160, and a bias circuit 170. The switch device 10 is configured to divide a first voltage among the main switches 120 while reducing off-leakage current while the plurality of main switches 120 are off.

[0023] The main switches 120 are connected in series between the first terminal 20 and the second terminal 30. The main switches 120 are turned on or off in response to a gate voltage supplied from the control unit 100. When the main switches 120 are turned on, a current flows between the first terminal 20 and the second terminal 30. As an example, each of the main switches 120 is a semiconductor switch such as a field effect transistor (FET) whose source and drain are connected between the first terminal 20 and the second terminal 30. In this embodiment, the main switches 120 include a first main switch 120a and a second main switch 120b. The first main switch 120a is connected between the first terminal 20 and the second main switch 120b. The second main switch 120b is connected to the second terminal 30.

[0024] The first resistor 130 is connected between the first terminal 20 and the first sense buffer unit 140. One end of the first resistor 130 may be connected to a node between the first terminal 20 and the first main switch 120a, and the other end may be connected to the input of the first sense buffer unit 140. The first resistor 130 makes it difficult for high-frequency signals input from the first terminal 20 to flow, thereby reducing the influence of high-frequency signals on the first sense buffer unit 140. The first resistor 130 has a resistance value of, for example, 2 kΩ or more and 10 kΩ or less.

[0025] The output of the first sense buffer unit 140 is connected to the bias circuit 170. The first sense buffer unit 140 receives the first voltage at the first terminal 20 and outputs a first sense voltage corresponding to the first voltage. The first sense buffer unit 140 is, for example, a voltage follower circuit using an operational amplifier. The first sense buffer unit 140 may output the first sense voltage, which has the same voltage value as the first voltage at the first terminal 20, to the bias circuit 170. The first sense buffer unit 140 has a current amplification function (i.e., a buffer function) so that the first voltage at the first terminal 20 is hardly reduced (so that the first voltage is hardly a load).

[0026] One end of the second resistor 150 is connected to a node between the second terminal 30 and the second main switch 120b, and the other end is connected to the input of the second sense buffer unit 160. The second resistor 150 may have the same resistance value as the first resistor 130, and as an example, has a resistance value of 2 kΩ or more and 10 kΩ or less.

[0027] The output of the second sense buffer unit 160 is connected to the bias circuit 170. The second sense buffer unit 160 may receive the second voltage at the second terminal 30 and output a second sense voltage corresponding to the second voltage. The second sense buffer unit 160 is, for example, a voltage follower circuit using an operational amplifier. The second sense buffer unit 160 may output the second sense voltage, which has the same voltage value as the second voltage at the second terminal 30, to the bias circuit 170. The second sense buffer unit 160 has a current amplification function (i.e., a buffer function) so that the second voltage at the second terminal 30 is hardly reduced (so that the second voltage is hardly a load).

[0028] The bias circuit 170 has an output connected between the multiple main switches 120. The bias circuit 170 divides the potential difference between the first detection voltage and a voltage corresponding to the second voltage at the second terminal 30 according to the number of main switches 120, and applies each divided voltage to the corresponding main switch 120. The bias circuit 170 may divide the potential difference between the first detection voltage and the second detection voltage according to the number of main switches 120, and apply each divided voltage to the corresponding main switch 120. In this embodiment, the bias circuit 170 has an output connected between the first main switch 120a and the second main switch 120b, and may apply the divided voltage between the first main switch 120a and the second main switch 120b. The bias circuit 170 includes multiple voltage dividing resistors 180, one or more bias buffer units 185, a bias resistor 190, and a bias switch 195.

[0029] The multiple voltage dividing resistors 180 are connected in series between the output of the first sense buffer unit 140 and the output of the second sense buffer unit 160. The multiple voltage dividing resistors 180 are connected in parallel with the multiple main switches 120, respectively. The multiple voltage dividing resistors 180 may be arranged in the same number as the main switches 120. In this embodiment, two voltage dividing resistors 180a and 180b are connected in parallel with the two main switches 120a and 120b, respectively. The multiple voltage dividing resistors 180 may divide the potential difference between the first detection voltage and the second detection voltage. The resistance values ​​of each of the multiple voltage dividing resistors 180 may be equal to or greater than 1 kΩ and equal to or less than 10 kΩ. The resistance values ​​of each of the multiple voltage dividing resistors 180 may be smaller than the resistance value of the first resistor 130. The voltage dividing resistors 180 having such resistance values ​​enable the first voltage to be efficiently divided to each main switch 120.

[0030] The input of one or more bias buffer units 185 is connected to a node between the multiple voltage-dividing resistors 180. The one or more bias buffer units 185 may apply each voltage divided by the multiple voltage-dividing resistors 180 to a corresponding main switch 120. The bias buffer unit 185 is, for example, a voltage follower circuit using an operational amplifier. The bias buffer unit 185 may receive a voltage at a node between the multiple voltage-dividing resistors 180 and apply a voltage having the same voltage value as the received voltage to a node between the multiple main switches 120. In this embodiment, the bias buffer unit 185 may apply a voltage at a node between the voltage-dividing resistors 180a and 180b to a node between the first main switch 120a and the second main switch 120b. The bias buffer unit 185 may have a current amplification function (i.e., a buffer function) so that the voltage at the node between the voltage-dividing resistors 180a and 180b is hardly reduced. The number of bias buffer units 185 may be equal to the number of main switches 120 minus 1 (in this embodiment, 2-1=1). The current drive capability of the bias buffer unit 185 may be higher than the current drive capability of at least one of the first sense buffer unit 140 and the second sense buffer unit 160. The current drive capability is the maximum amount of current that can be supplied (output) to a load, and is measured in mA. The current drive capability of the bias buffer unit 185 is, for example, 0.1 mA or more and 100 mA or less. This allows the voltages output by the first sense buffer unit 140 and the second sense buffer unit 160 to be applied to the main switch 120 efficiently.

[0031] The output of the bias buffer unit 185 may be stopped by the control unit 100 in response to at least one of the multiple main switches 120 being turned on. For example, at least one of the multiple main switches 120 may be turned on by the control unit 100 after the output of the bias buffer unit 185 has been stopped. The output of the bias buffer unit 185 may be stopped by the control unit 100 turning off the bias switch 195. By turning off the output of the bias circuit 170 while the main switch 120 is turned on in this manner, it is possible to prevent the bias circuit 170 from affecting the signal passing through the main switch 120.

[0032] The bias resistor 190 is connected to the output of the bias buffer section 185. The bias resistor 190 may have a resistance value greater than the resistance value of at least one of the first resistor 130 and the second resistor 150.

[0033] The bias switch 195 is connected between the bias resistor 190 and a node between the multiple main switches 120. The bias switch 195 may be controlled to be on or off in response to a signal supplied from the control unit 100. The bias switch 195 can stop or start the output of the bias buffer unit 185 to the node between the main switches 120. When the bias switch 195 is turned on, the bias buffer unit 185 can apply a voltage to the node between the main switches 120. When the bias switch 195 is turned off, the bias buffer unit 185 stops applying a voltage between the main switches 120. The bias switch 195 may be turned on by the control unit 100 while all of the multiple main switches 120 are off, and may be turned off while at least one of the multiple main switches 120 is on.

[0034] As an example, when a first voltage Vin is input to the first terminal 20 while the main switches 120a and 120b are off, the switch device 10 outputs the first sense voltage Vin from the first sense buffer unit 140. On the other hand, the second sense buffer unit 160 outputs the second voltage Vout (=0) from the second terminal 30. In this case, the voltage Vin / 2 at the node between the voltage-dividing resistors 180a and 180b is applied to the node between the main switches 120 by the bias buffer unit 185, and the voltage Vin / 2 is applied to each main switch 120. Because the first sense buffer unit 140 hardly passes any current from the first terminal 20 even in the case of direct current, the off-leak current of the switch device 10 can be suppressed to approximately 1 to 10 nA.

[0035] The switch device 10 in this embodiment can reduce the off-leak current, particularly when a direct current flows, while the multiple main switches 120 are turned off, and can also reduce the concentration of the first voltage on the first main switch 120a on the first terminal 20 side to which a configuration such as a test device is connected, thereby improving the off-state withstand voltage of the entire switch device 10. Furthermore, by having the first detection buffer unit 140 and the bias buffer unit 185 output voltages in two stages, the voltage values ​​of the power supplies that supply power for the outputs of the first detection buffer unit 140 and the bias buffer unit 185 can be made lower than the first voltage (for example, half the voltage value of the first voltage).

[0036] In addition, the switch device 10 does not need to be equipped with the bias switch 195, and the output of the bias buffer unit 185 may be stopped by the control unit 100 turning off the power supply that supplies power for the output of the bias buffer unit 185.

[0037] Furthermore, the output of the first detection buffer unit 140 may be stopped in response to at least one of the main switches 120 being turned on. For example, at least one of the main switches 120 may be turned on under the control of the control unit 100 after the output of the first detection buffer unit 140 has been stopped. In this case, the first detection buffer unit 140 may include an output control switch between the output and the bias circuit 170. The output of the first detection buffer unit 140 may be stopped by turning off the output control switch. The output of the first detection buffer unit 140 may also be stopped by the control unit 100 turning off the power supply that supplies power to the first detection buffer unit 140. Note that the output of the second detection buffer unit 160 may be stopped in the same manner as the first detection buffer unit 140. Such a configuration for stopping the output of the first detection buffer unit 140 or the second detection buffer unit 160 is useful when the switch device 10 does not include the bias buffer unit 185 and the bias switch 195.

[0038] 2 shows a second configuration example of the switch device 10 according to this embodiment. The switch device 10 of the second configuration example has the same configuration and operation as the switch device 10 of the first configuration example, but includes more main switches 120. The following mainly describes the differences from the first configuration example.

[0039] The switching unit 110 of the switch device 10 includes a first main switch 120a, a second main switch 120b, a third main switch 120c, a fourth main switch 120d, a first resistor 130, a first sensing buffer unit 140, a second resistor 150, a second sensing buffer unit 160, and a bias circuit 170.

[0040] The first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d are connected in series with each other between the first terminal 20 and the second terminal 30. The first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d may be similar to the first main switch 120a or the second main switch 120b of the first configuration example, respectively.

[0041] The first resistor 130, the first sense buffer unit 140, the second resistor 150, and the second sense buffer unit 160 may have the same configuration as the first resistor 130, the first sense buffer unit 140, the second resistor 150, and the second sense buffer unit 160 of the first configuration example, respectively, and may operate in the same manner.

[0042] The bias circuit 170 includes a plurality of voltage dividing resistors 180, a first bias buffer section 185a, a second bias buffer section 185b, a third bias buffer section 185c, a first bias resistor 190a, a second bias resistor 190b, and a third bias resistor 190c.

[0043] The multiple voltage dividing resistors 180 are connected in series between the output of the first sense buffer unit 140 and the output of the second sense buffer unit 160. Four voltage dividing resistors 180a, 180b, 180c, and 180d are connected in parallel with the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d, respectively. The resistance values ​​of the multiple voltage dividing resistors 180 may be equal to or greater than 1 kΩ and equal to or less than 10 kΩ, and may be the same as each other. The resistance value of each of the multiple voltage dividing resistors 180 may be smaller than the resistance value of the first resistor 130.

[0044] The first bias buffer section 185a, the second bias buffer section 185b, and the third bias buffer section 185c have inputs connected to different nodes between the multiple voltage-dividing resistors 180. The first bias buffer section 185a, the second bias buffer section 185b, and the third bias buffer section 185c may each have a configuration similar to that of the bias buffer section 185 of the first configuration example and operate in a similar manner. The first bias buffer section 185a may apply a voltage divided by the multiple voltage-dividing resistors 180 to a node between the first main switch 120a and the second main switch 120b. The second bias buffer section 185b may apply a voltage divided by the multiple voltage-dividing resistors 180 to a node between the second main switch 120b and the third main switch 120c. The third bias buffer unit 185c may apply a voltage divided by the multiple voltage dividing resistors 180 to a node between the third main switch 120c and the fourth main switch 120d. The current drive capabilities of each of the first bias buffer unit 185a, the second bias buffer unit 185b, and the third bias buffer unit 185c may be higher than the current drive capabilities of the first sense buffer unit 140 and the second sense buffer unit 160.

[0045] The output of the first bias buffer unit 185a, the second bias buffer unit 185b, and the third bias buffer unit 185c may be stopped by the control unit 100 in response to at least one of the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d being turned on. The output of the first bias buffer unit 185a, the second bias buffer unit 185b, and the third bias buffer unit 185c may be stopped in the same manner as the bias buffer unit 185 of the first configuration example. The switch device 10 may further include a bias switch 195 similar to that of the first configuration example between the output of the first bias buffer unit 185a and a node between the first main switch 120a and the second main switch 120b. The switch device 10 may further include a bias switch 195 similar to that of the first configuration example between the output of the second bias buffer unit 185b and a node between the second main switch 120b and the third main switch 120c. The switch apparatus 10 may further include a bias switch 195 similar to that in the first configuration example between the output of the third bias buffer section 185c and a node between the third main switch 120c and the fourth main switch 120d.

[0046] The first bias resistor 190a, the second bias resistor 190b, and the third bias resistor 190c are connected to the outputs of the first bias buffer section 185a, the second bias buffer section 185b, and the third bias buffer section 185c, respectively. The first bias resistor 190a, the second bias resistor 190b, and the third bias resistor 190c may each have a resistance value greater than the resistance value of at least one of the first resistor 130 and the second resistor 150.

[0047] The switch device 10 of this embodiment turns on the output of the bias circuit 170 (the first bias buffer section 185a, the second bias buffer section 185b, and the third bias buffer section 185c) while the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d are turned off. This makes it possible to reduce the off-leak current and also to reduce the concentration of the first voltage on the first main switch 120a due to voltage division, thereby improving the off-state breakdown voltage of the entire switch device 10.

[0048] The switch device 10 may also include five or more main switches 120 connected in series, in which case it may also include a bias buffer unit 185, a voltage dividing resistor 180, and a bias resistor 190 corresponding to each main switch 120.

[0049] 3 shows a third configuration example of the switch device 10 according to this embodiment. The switch device 10 of the third configuration example has the same configuration and operation as the switch device 10 of the second configuration example, except that it is an SPDT (Single-Pole Double-Throw) switch. The following mainly describes the differences from the second configuration example.

[0050] The switch device 10 may include a plurality of second terminals 30 arranged with respect to one first terminal 20, a plurality of second sense buffer units 160 corresponding to the plurality of second terminals 30, respectively, and a plurality of second resistors 150 corresponding to the plurality of second sense buffer units 160, respectively. In this embodiment, the plurality of second terminals 30 include second terminal 30a and second terminal 30b. The plurality of second sense buffer units 160 include second sense buffer unit 160a and second sense buffer unit 160b. The plurality of second resistors 150 include second resistor 150a and second resistor 150b.

[0051] The first main switch 120a and the second main switch 120b are connected in series between the first terminal 20 and the second terminal 30a. The third main switch 120c and the fourth main switch 120d are connected in series between the first terminal 20 and the second terminal 30b.

[0052] The input of first sense buffer unit 140 is connected to a node between second main switch 120b and third main switch 120c via first resistor 130, and the output is connected to a node between multiple voltage dividing resistors 180b and 180c. First sense buffer unit 140 may have a configuration similar to that of first sense buffer unit 140 in the first configuration example, and may operate in a similar manner.

[0053] The input of second sense buffer unit 160a is connected to a node between second terminal 30a and first main switch 120a via second resistor 150a, and the output is connected to voltage-dividing resistor 180a. The input of second sense buffer unit 160b is connected to a node between second terminal 30b and fourth main switch 120d via second resistor 150b, and the output is connected to voltage-dividing resistor 180d. Second sense buffer unit 160a and second sense buffer unit 160b may each have a configuration similar to second sense buffer unit 160 of the first configuration example and operate in a similar manner.

[0054] The bias circuit 170 includes multiple voltage-dividing resistors 180, a first bias buffer section 185a, a second bias buffer section 185b, a first bias resistor 190a, and a second bias resistor 190b. The multiple voltage-dividing resistors 180 are connected in series between the output of the first sense buffer section 140 and the outputs of the second sense buffer sections 160a and 160b. The multiple voltage-dividing resistors 180a, 180b, 180c, and 180d are connected in parallel with the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d, respectively. The resistance values ​​of the multiple voltage-dividing resistors 180 may be equal to or greater than 1 kΩ and equal to or less than 10 kΩ. The resistance values ​​of the multiple voltage-dividing resistors 180 may be smaller than the resistance value of the first resistor 130.

[0055] The first bias buffer unit 185a has an input connected to a node between the multiple voltage-dividing resistors 180a and 180b, and an output connected to a node between the first main switch 120a and the second main switch 120b via a first bias resistor 190a. The first bias buffer unit 185a may apply a voltage obtained by dividing a potential difference between a first sense voltage output by the first sense buffer unit 140 and a second sense voltage output by one second sense buffer unit 160a of the multiple second sense buffer units 160 using the multiple voltage-dividing resistors 180a and 180b to the corresponding main switch 120a or 120b. The first bias buffer unit 185a may receive the voltage at the node between the multiple voltage-dividing resistors 180a and 180b and apply a voltage having the same voltage value as the received voltage to the node between the first main switch 120a and the second main switch 120b.

[0056] The second bias buffer section 185b has an input connected to a node between the multiple voltage-dividing resistors 180c and 180d, and an output connected to a node between the third main switch 120c and the fourth main switch 120d via a second bias resistor 190b. The second bias buffer section 185b may apply to the corresponding main switch 120c, 120d a voltage obtained by dividing, by the multiple voltage-dividing resistors 180c, 180d, a potential difference between the first sense voltage output by the first sense buffer section 140 and the second sense voltage output by another second sense buffer section 160b of the multiple second sense buffer sections 160. The second bias buffer section 185b may receive the voltage at the node between the multiple voltage-dividing resistors 180c, 180d and apply a voltage having the same voltage value as the received voltage to the node between the third main switch 120c and the fourth main switch 120d.

[0057] The current drive capability of each of first bias buffer unit 185a and second bias buffer unit 185b may be higher than the current drive capability of first sense buffer unit 140, second sense buffer unit 160a, and second sense buffer unit 160b. First bias buffer unit 185a and second bias buffer unit 185b may each have a configuration similar to that of bias buffer unit 185 of the first configuration example and operate in a similar manner.

[0058] The output of the first bias buffer unit 185a and the second bias buffer unit 185b may be stopped by the control unit 100 in response to at least one of the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d being turned on. The output of the first bias buffer unit 185a and the second bias buffer unit 185b may be stopped in the same manner as the bias buffer unit 185 of the first configuration example. The switch device 10 may further include a bias switch 195 similar to that of the first configuration example between the output of the first bias buffer unit 185a and a node between the first main switch 120a and the second main switch 120b. The switch device 10 may further include a bias switch 195 similar to that of the first configuration example between the output of the second bias buffer unit 185b and a node between the third main switch 120c and the fourth main switch 120d.

[0059] The switch device 10 of this embodiment switches on / off between the first main switch 120a and the second main switch 120b and the third main switch 120c and the fourth main switch 120d, and can output a signal input to the first terminal 20 from one of the second terminal 30 and the second terminal 30. The switch device 10 turns on the output of the bias circuit 170 (the first bias buffer unit 185a, the second bias buffer unit 185b, and the third bias buffer unit 185c) while the first main switch 120a, the second main switch 120b, the third main switch 120c, and the fourth main switch 120d are turned off. This makes it possible to reduce the off-leak current and also to reduce the concentration of the first voltage on the second main switch 120b and the third main switch 120c connected to the first terminal 20 by voltage division in the bias circuit 170, thereby improving the off-state breakdown voltage of the entire switch device 10.

[0060] The switch device 10 of this embodiment may include, for one first terminal 20, three or more second terminals 30 and second sensing buffers corresponding to the respective second terminals 30.

[0061] 4 shows a fourth configuration example of the switch device 10 according to this embodiment. The switch device 10 of the fourth configuration example has the same configuration and operation as the switch device 10 of the first configuration example, but does not include the bias buffer unit 185, bias resistor 190, and bias switch 195. The following mainly describes the differences from the first configuration example.

[0062] The input of the first sense buffer unit 140 is connected to a node between the first terminal 20 and the first main switch 120a via the first resistor 130, and the output is connected to one end of the voltage-dividing resistor 180a. The first sense buffer unit 140 may have a configuration similar to that of the first sense buffer unit 140 of the first configuration example and may operate in a similar manner. The first sense buffer unit 140 may output a voltage using a power supply having the same voltage value as the first voltage. This allows the first sense buffer unit 140 to independently apply a voltage corresponding to the first voltage across the main switch 120, thereby enabling more reliable voltage division.

[0063] One end of the second resistor 150 is connected to a node between the second terminal 30 and the second main switch 120b, and the other end is connected to the input of the second sense buffer unit 160. The second resistor 150 may have the same resistance value as the first resistor 130, and as an example, has a resistance value of 2 kΩ or more and 10 kΩ or less.

[0064] The output of the second sense buffer unit 160 is connected to one end of the voltage dividing resistor 180b. The second sense buffer unit 160 may have a configuration similar to that of the second sense buffer unit 160 of the first configuration example and may operate in a similar manner. The second sense buffer unit 160 may output a second sense voltage, which has the same voltage value as the second voltage at the second terminal 30, to the bias circuit 170.

[0065] The other end of each of the plurality of voltage dividing resistors 180 is directly connected to a node between the first main switch 120a and the second main switch 120b. The resistance value of each of the plurality of voltage dividing resistors 180 may be smaller than the resistance value of the first resistor 130.

[0066] The output of first detection buffer unit 140 and second detection buffer unit 160 may be stopped by control unit 100 in response to at least one of multiple main switches 120 being turned on. The output of first detection buffer unit 140 and second detection buffer unit 160 may be stopped by control unit 100 turning off the power supply that supplies power for the output of first detection buffer unit 140 and second detection buffer unit 160.

[0067] The switch device 10 of this embodiment can achieve a reduction in off-leak current and an improvement in off-state breakdown voltage with a simple circuit by using the first sensing buffer section 140.

[0068] FIG. 5 shows a fifth configuration example of the switch device 10 according to this embodiment. The switch device 10 of the fifth configuration example has the same configuration and operation as the switch device 10 of the first configuration example, but does not include the second resistor 150, the second detection buffer unit 160, the bias buffer unit 185, the bias resistor 190, and the bias switch 195. The switch device 10 of the fifth configuration example may allow a current to flow unidirectionally from the first terminal 20 (input terminal) to the second terminal 30 (output terminal). The following mainly describes the differences from the first configuration example.

[0069] The input of the first sense buffer unit 140 is connected to a node between the first terminal 20 and the first main switch 120a via the first resistor 130, and the output is connected to one end of the voltage-dividing resistor 180a. The first sense buffer unit 140 may have a configuration similar to that of the first sense buffer unit 140 of the first configuration example and may operate in a similar manner. The first sense buffer unit 140 may output a voltage using a power supply having the same voltage value as the first voltage. This allows the first sense buffer unit 140 to independently apply a voltage corresponding to the first voltage across the main switch 120, thereby enabling more reliable voltage division.

[0070] The second main switch 120b has one end connected to the first main switch 120a and the other end connected to the second terminal 30. Unlike the first configuration example, the second main switch 120b has the other end not connected to the voltage dividing resistor 180b.

[0071] The other end of each of the multiple voltage dividing resistors 180 is directly connected to a node between the first main switch 120a and the second main switch 120b. One end of the subsequent voltage dividing resistor 180b is connected to a reference potential (for example, ground) that is the same as the reference potential to which the load 40 is connected. The resistance value of each of the multiple voltage dividing resistors 180 may be greater than the resistance of the load 40 and may be smaller than the resistance value of the first resistor 130. This allows the voltage input to the first terminal 20 to be reliably divided by the voltage dividing resistors 180.

[0072] The output of first detection buffer unit 140 may be stopped by control unit 100 in response to at least one of multiple main switches 120 being turned on. The output of first detection buffer unit 140 may be stopped by control unit 100 turning off a power supply that supplies power for the output of first detection buffer unit 140.

[0073] The unidirectional switch device 10 of this embodiment can reduce the off-leak current and improve the off-state breakdown voltage by using the first sensing buffer section 140 with a simple circuit.

[0074] In at least one of the first to fifth configuration examples, a coil may be connected in place of at least one of the first resistor 130 and the second resistor 150. In this case, the coil can also reduce high-frequency signals input to the first sense buffer unit 140 or the second sense buffer unit 160. In at least one of the first to fifth configuration examples, a coil may be connected in series before or after at least one of the first resistor 130 and the second resistor 150.

[0075] 6 shows an example of the configuration of a test apparatus 400 according to this embodiment, together with a device under test 410. The test apparatus 400 tests the device under test 410, such as an analog circuit, a digital circuit, a memory, or a system-on-chip (SOC). The test apparatus 400 inputs test signals based on a test pattern for testing the device under test 410 to the device under test 410, and judges whether the device under test 410 is good or bad based on the output signal output by the device under test 410 in response to the test signal. The test apparatus 400 includes a testing section 420, a switch apparatus 10, and a switch control section 430.

[0076] The testing section 420 transmits and receives signals to and from the device under test 410. The testing section 420 includes a test signal generating section 440, a driver 450, a comparator 460, and a judging section 470. The test signal generating section 440 generates a test signal for testing the device under test 410 and outputs it to the driver 450. The test signal generating section 440 also generates an expected value corresponding to the generated test signal and outputs it to the judging section 470.

[0077] The driver 450 supplies the test signal generated by the test signal generating section 440 to the device under test 410. The comparator 460 acquires the logical value of the response signal output from the device under test 410 in response to the supply of the test signal. The judging section 470 compares the logical value acquired by the comparator 460 with an expected value to judge whether the device under test 410 is good or bad.

[0078] The switch apparatus 10 is provided on a path between the driver 450 of the testing section 420 and the device under test 410. The switch apparatus 10 may have a first terminal 20 connected to the driver 450 of the testing section 420 and a second terminal 30 connected to the device under test 410. The switch apparatus 10 establishes or breaks electrical continuity between the driver 450 and the device under test 410 in accordance with the voltage of a control signal supplied from a switch control section 430. The switch control section 430 turns on the main switch 120 of the switch apparatus 10 (conductive state) when a test is being performed by the test signal generating section 440, and turns off the main switch 120 of the switch apparatus 10 (disconnected state) when a test is not being performed by the test signal generating section 440.

[0079] The switch control unit 430 transmits, for example, a control signal to the control unit 100 included in the switch device 10. The control unit 100 switches the main switch 120 on and off according to the control voltage of the received control signal.

[0080] Although the present invention has been described above using embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It will be apparent to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the claims that such modifications and improvements can also be included within the technical scope of the present invention.

[0081] It should be noted that the execution order of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and that the processes can be performed in any order unless the output of a previous process is used in a subsequent process. Even if the operational flow in the claims, specifications, and drawings is described using "first," "next," etc. for convenience, this does not mean that the processes must be performed in this order. [Explanation of symbols]

[0082] 10 Switching device 20 1st terminal 30 2nd terminal 40 Load 100 control section 110 Switching section 120 Main switch 130 1st resistance 140 First detection buffer unit 150 2nd resistor 160 Second detection buffer unit 170 Bias circuit 180 Voltage dividing resistor 185 Bias buffer section 190 Bias Resistor 195 Bias Switch 400 Test Equipment 410 Device Under Test 420 Testing Department 430 Switch control section 440 Test signal generator 450 Driver 460 Comparator 470 Judgment section

Claims

1. A switch device that electrically connects or disconnects a first terminal and a second terminal, a plurality of main switches connected in series between the first terminal and the second terminal; a first sense buffer unit configured to receive a first voltage at the first terminal and output a first sense voltage corresponding to the first voltage; a bias circuit that divides a potential difference between a voltage corresponding to the second voltage at the second terminal and the first detection voltage in accordance with the number of the main switches, and applies each of the divided voltages to the corresponding main switch. Switch device.

2. a second sense buffer unit configured to receive the second voltage at the second terminal and output a second sense voltage corresponding to the second voltage; The bias circuit divides a potential difference between the first detection voltage and the second detection voltage in accordance with the number of the main switches, and applies each of the divided voltages to the corresponding main switch. The switch device according to claim 1 .

3. The bias circuit a plurality of voltage dividing resistors connected in series to divide the potential difference between the first detection voltage and the second detection voltage; The switch device according to claim 2 .

4. The bias circuit The voltage dividing circuit has one or more bias buffer units that apply the voltages divided by the plurality of voltage dividing resistors to the corresponding main switches. The switch device according to claim 3 .

5. The bias buffer section stops outputting in response to at least one of the plurality of main switches being turned on. The switch device according to claim 4.

6. At least one of the plurality of main switches is turned on after the output of the bias buffer unit is stopped. The switch device according to claim 5 .

7. The bias circuit a bias resistor connected to the output of the bias buffer unit; The switch device according to claim 4.

8. The current drive capability of the bias buffer unit is higher than the current drive capability of the first sense buffer unit. The switch device according to claim 4.

9. The first detection buffer unit stops outputting in response to at least one of the plurality of main switches being turned on. The switch device according to claim 1 .

10. At least one of the plurality of main switches is turned on after the output of the first detection buffer unit is stopped. The switch device according to claim 9.

11. The resistance value of each of the plurality of voltage dividing resistors is 10 kΩ or less. The switch device according to claim 3 .

12. a first resistor connected between the first terminal and the first sense buffer unit; The resistance value of each of the plurality of voltage dividing resistors is smaller than the resistance value of the first resistor. The switch device according to claim 3 .

13. The switch device a plurality of the second terminals arranged relative to one of the first terminals; a plurality of second sense buffer units respectively corresponding to the plurality of second terminals; The bias circuit a first bias buffer unit that applies a voltage obtained by dividing a potential difference between the first detection voltage output by the first detection buffer unit and the second detection voltage output by one of the second detection buffer units using the plurality of voltage dividing resistors to a corresponding main switch; a second bias buffer unit that applies a voltage obtained by dividing a potential difference between the first detection voltage output by the first detection buffer unit and the second detection voltage output by another one of the plurality of second detection buffer units using the plurality of voltage dividing resistors to the corresponding main switch; The switch device according to claim 4.

14. A test apparatus for testing a device under test, comprising: a test section that transmits and receives signals to and from the device under test; a switch device according to claim 1, which is provided on a path between the testing section and the device under test; Test equipment.

Images